arch/arm/dts/imx8mm-verdin-u-boot.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
   2 /*
   3  * Copyright 2020 Toradex
   4  */
   5
   6 / {
   7         wdt-reboot {
   8                 compatible = "wdt-reboot";
   9                 wdt = <&wdog1>;
  10                 u-boot,dm-spl;
  11         };
  12 };
  13
  14 &aips1 {
  15         u-boot,dm-spl;
  16         u-boot,dm-pre-reloc;
  17 };
  18
  19 &aips2 {
  20         u-boot,dm-spl;
  21 };
  22
  23 &aips3 {
  24         u-boot,dm-spl;
  25 };
  26
  27 &clk {
  28         u-boot,dm-spl;
  29         u-boot,dm-pre-reloc;
  30         /delete-property/ assigned-clocks;
  31         /delete-property/ assigned-clock-parents;
  32         /delete-property/ assigned-clock-rates;
  33 };
  34
  35 &gpio1 {
  36         u-boot,dm-spl;
  37 };
  38
  39 &gpio2 {
  40         u-boot,dm-spl;
  41 };
  42
  43 &gpio3 {
  44         u-boot,dm-spl;
  45 };
  46
  47 &gpio4 {
  48         u-boot,dm-spl;
  49 };
  50
  51 &gpio5 {
  52         u-boot,dm-spl;
  53 };
  54
  55 &i2c1 {
  56         u-boot,dm-spl;
  57 };
  58
  59 &iomuxc {
  60         u-boot,dm-spl;
  61 };
  62
  63 &osc_24m {
  64         u-boot,dm-spl;
  65         u-boot,dm-pre-reloc;
  66 };
  67
  68 &pinctrl_i2c1 {
  69         u-boot,dm-spl;
  70 };
  71
  72 &pinctrl_pmic {
  73         u-boot,dm-spl;
  74 };
  75
  76 &pinctrl_uart1 {
  77         u-boot,dm-spl;
  78 };
  79
  80 &pinctrl_usdhc1 {
  81         u-boot,dm-spl;
  82 };
  83
  84 &pinctrl_usdhc2 {
  85         u-boot,dm-spl;
  86 };
  87
  88 &{/soc@0} {
  89         u-boot,dm-pre-reloc;
  90         u-boot,dm-spl;
  91 };
  92
  93 &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b} {
  94         u-boot,dm-spl;
  95 };
  96
  97 &{/soc@0/bus@30800000/i2c@30a20000/pmic@4b/regulators} {
  98         u-boot,dm-spl;
  99 };
 100
 101 &uart1 {
 102         u-boot,dm-spl;
 103 };
 104
 105 &usdhc1 {
 106         u-boot,dm-spl;
 107 };
 108
 109 &usdhc2 {
 110         u-boot,dm-spl;
 111 };
 112
 113 &usdhc3 {
 114         u-boot,dm-spl;
 115 };
 116
 117 &wdog1 {
 118         u-boot,dm-spl;
 119 };