Merge branch 'master' of git://git.denx.de/u-boot-usb
[oweals/u-boot.git] / arch / arm / dts / imx6sx-sabreauto.dts
1 /*
2  * Copyright (C) 2014 Freescale Semiconductor, Inc.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
8
9 /dts-v1/;
10
11 #include "imx6sx.dtsi"
12
13 / {
14         model = "Freescale i.MX6 SoloX Sabre Auto Board";
15         compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx";
16
17         memory {
18                 reg = <0x80000000 0x80000000>;
19         };
20
21         regulators {
22                 compatible = "simple-bus";
23                 #address-cells = <1>;
24                 #size-cells = <0>;
25
26                 vcc_sd3: regulator@0 {
27                         compatible = "regulator-fixed";
28                         reg = <0>;
29                         pinctrl-names = "default";
30                         pinctrl-0 = <&pinctrl_vcc_sd3>;
31                         regulator-name = "VCC_SD3";
32                         regulator-min-microvolt = <3000000>;
33                         regulator-max-microvolt = <3000000>;
34                         gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
35                         enable-active-high;
36                 };
37         };
38 };
39
40 &uart1 {
41         pinctrl-names = "default";
42         pinctrl-0 = <&pinctrl_uart1>;
43         status = "okay";
44 };
45
46 &usdhc3 {
47         pinctrl-names = "default", "state_100mhz", "state_200mhz";
48         pinctrl-0 = <&pinctrl_usdhc3>;
49         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
50         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
51         bus-width = <8>;
52         cd-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
53         wp-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
54         keep-power-in-suspend;
55         wakeup-source;
56         vmmc-supply = <&vcc_sd3>;
57         status = "okay";
58 };
59
60 &usdhc4 {
61         pinctrl-names = "default";
62         pinctrl-0 = <&pinctrl_usdhc4>;
63         bus-width = <8>;
64         cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>;
65         no-1-8-v;
66         keep-power-in-suspend;
67         wakeup-source;
68         status = "okay";
69 };
70
71 &i2c2 {
72         clock-frequency = <100000>;
73         pinctrl-names = "default";
74         pinctrl-0 = <&pinctrl_i2c2_1>;
75         status = "okay";
76 };
77
78 &i2c3 {
79         clock-frequency = <100000>;
80         pinctrl-names = "default";
81         pinctrl-0 = <&pinctrl_i2c3_2>;
82         status = "okay";
83
84         max7310_a: gpio@30 {
85                 compatible = "maxim,max7310";
86                 reg = <0x30>;
87                 gpio-controller;
88                 #gpio-cells = <2>;
89         };
90
91         max7310_b: gpio@32 {
92                 compatible = "maxim,max7310";
93                 reg = <0x32>;
94                 gpio-controller;
95                 #gpio-cells = <2>;
96         };
97 };
98
99 &qspi1 {
100         pinctrl-names = "default";
101         pinctrl-0 = <&pinctrl_qspi1_1>;
102         status = "okay";
103         ddrsmp=<2>;
104
105         flash0: n25q256a@0 {
106                 #address-cells = <1>;
107                 #size-cells = <1>;
108                 compatible = "micron,n25q256a";
109                 spi-max-frequency = <29000000>;
110                 reg = <0>;
111         };
112
113         flash1: n25q256a@1 {
114                 #address-cells = <1>;
115                 #size-cells = <1>;
116                 compatible = "micron,n25q256a";
117                 spi-max-frequency = <29000000>;
118                 reg = <1>;
119         };
120 };
121
122 &iomuxc {
123         imx6x-sabreauto {
124                 pinctrl_i2c2_1: i2c2grp-1 {
125                         fsl,pins = <
126                                 MX6SX_PAD_GPIO1_IO03__I2C2_SDA          0x4001b8b1
127                                 MX6SX_PAD_GPIO1_IO02__I2C2_SCL          0x4001b8b1
128                         >;
129                 };
130
131                 pinctrl_i2c3_2: i2c3grp-2 {
132                         fsl,pins = <
133                                 MX6SX_PAD_KEY_ROW4__I2C3_SDA            0x4001b8b1
134                                 MX6SX_PAD_KEY_COL4__I2C3_SCL            0x4001b8b1
135                         >;
136                 };
137
138                 pinctrl_qspi1_1: qspi1grp_1 {
139                         fsl,pins = <
140                                 MX6SX_PAD_QSPI1A_DATA0__QSPI1_A_DATA_0  0x70a1
141                                 MX6SX_PAD_QSPI1A_DATA1__QSPI1_A_DATA_1  0x70a1
142                                 MX6SX_PAD_QSPI1A_DATA2__QSPI1_A_DATA_2  0x70a1
143                                 MX6SX_PAD_QSPI1A_DATA3__QSPI1_A_DATA_3  0x70a1
144                                 MX6SX_PAD_QSPI1A_SCLK__QSPI1_A_SCLK     0x70a1
145                                 MX6SX_PAD_QSPI1A_SS0_B__QSPI1_A_SS0_B   0x70a1
146                                 MX6SX_PAD_QSPI1B_DATA0__QSPI1_B_DATA_0  0x70a1
147                                 MX6SX_PAD_QSPI1B_DATA1__QSPI1_B_DATA_1  0x70a1
148                                 MX6SX_PAD_QSPI1B_DATA2__QSPI1_B_DATA_2  0x70a1
149                                 MX6SX_PAD_QSPI1B_DATA3__QSPI1_B_DATA_3  0x70a1
150                                 MX6SX_PAD_QSPI1B_SCLK__QSPI1_B_SCLK     0x70a1
151                                 MX6SX_PAD_QSPI1B_SS0_B__QSPI1_B_SS0_B   0x70a1
152                         >;
153                 };
154
155                 pinctrl_uart1: uart1grp {
156                         fsl,pins = <
157                                 MX6SX_PAD_GPIO1_IO04__UART1_TX          0x1b0b1
158                                 MX6SX_PAD_GPIO1_IO05__UART1_RX          0x1b0b1
159                         >;
160                 };
161
162                 pinctrl_usdhc3: usdhc3grp {
163                         fsl,pins = <
164                                 MX6SX_PAD_SD3_CMD__USDHC3_CMD           0x17059
165                                 MX6SX_PAD_SD3_CLK__USDHC3_CLK           0x10059
166                                 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0       0x17059
167                                 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1       0x17059
168                                 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2       0x17059
169                                 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3       0x17059
170                                 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4       0x17059
171                                 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5       0x17059
172                                 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6       0x17059
173                                 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7       0x17059
174                                 MX6SX_PAD_KEY_COL0__GPIO2_IO_10         0x17059 /* CD */
175                                 MX6SX_PAD_KEY_ROW0__GPIO2_IO_15         0x17059 /* WP */
176                         >;
177                 };
178
179                 pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
180                         fsl,pins = <
181                                 MX6SX_PAD_SD3_CMD__USDHC3_CMD           0x170b9
182                                 MX6SX_PAD_SD3_CLK__USDHC3_CLK           0x100b9
183                                 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0       0x170b9
184                                 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1       0x170b9
185                                 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2       0x170b9
186                                 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3       0x170b9
187                                 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4       0x170b9
188                                 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5       0x170b9
189                                 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6       0x170b9
190                                 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7       0x170b9
191                         >;
192                 };
193
194                 pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
195                         fsl,pins = <
196                                 MX6SX_PAD_SD3_CMD__USDHC3_CMD           0x170f9
197                                 MX6SX_PAD_SD3_CLK__USDHC3_CLK           0x100f9
198                                 MX6SX_PAD_SD3_DATA0__USDHC3_DATA0       0x170f9
199                                 MX6SX_PAD_SD3_DATA1__USDHC3_DATA1       0x170f9
200                                 MX6SX_PAD_SD3_DATA2__USDHC3_DATA2       0x170f9
201                                 MX6SX_PAD_SD3_DATA3__USDHC3_DATA3       0x170f9
202                                 MX6SX_PAD_SD3_DATA4__USDHC3_DATA4       0x170f9
203                                 MX6SX_PAD_SD3_DATA5__USDHC3_DATA5       0x170f9
204                                 MX6SX_PAD_SD3_DATA6__USDHC3_DATA6       0x170f9
205                                 MX6SX_PAD_SD3_DATA7__USDHC3_DATA7       0x170f9
206                         >;
207                 };
208
209                 pinctrl_usdhc4: usdhc4grp {
210                         fsl,pins = <
211                                 MX6SX_PAD_SD4_CMD__USDHC4_CMD           0x17059
212                                 MX6SX_PAD_SD4_CLK__USDHC4_CLK           0x10059
213                                 MX6SX_PAD_SD4_DATA0__USDHC4_DATA0       0x17059
214                                 MX6SX_PAD_SD4_DATA1__USDHC4_DATA1       0x17059
215                                 MX6SX_PAD_SD4_DATA2__USDHC4_DATA2       0x17059
216                                 MX6SX_PAD_SD4_DATA3__USDHC4_DATA3       0x17059
217                                 MX6SX_PAD_SD4_DATA7__GPIO6_IO_21        0x17059 /* CD */
218                                 MX6SX_PAD_SD4_DATA6__GPIO6_IO_20        0x17059 /* WP */
219                         >;
220                 };
221
222                 pinctrl_vcc_sd3: vccsd3grp {
223                         fsl,pins = <
224                                 MX6SX_PAD_KEY_COL1__GPIO2_IO_11         0x17059
225                         >;
226                 };
227         };
228 };