arch/arm/dts/fsl-ls1046a-rdb.dts

   1 // SPDX-License-Identifier: GPL-2.0+ OR X11
   2 /*
   3  * Device Tree Include file for Freescale Layerscape-1046A family SoC.
   4  *
   5  * Copyright 2016, Freescale Semiconductor
   6  * Copyright 2020 NXP
   7  *
   8  * Mingkai Hu <Mingkai.hu@freescale.com>
   9  */
  10
  11 /dts-v1/;
  12 /include/ "fsl-ls1046a.dtsi"
  13
  14 / {
  15         model = "LS1046A RDB Board";
  16
  17         aliases {
  18                 spi0 = &qspi;
  19         };
  20
  21 };
  22
  23 &qspi {
  24         status = "okay";
  25
  26         s25fs512s0: flash@0 {
  27                 #address-cells = <1>;
  28                 #size-cells = <1>;
  29                 compatible = "jedec,spi-nor";
  30                 spi-max-frequency = <50000000>;
  31                 reg = <0>;
  32         };
  33
  34         s25fs512s1: flash@1 {
  35                 #address-cells = <1>;
  36                 #size-cells = <1>;
  37                 compatible = "jedec,spi-nor";
  38                 spi-max-frequency = <50000000>;
  39                 reg = <1>;
  40          };
  41 };
  42
  43 &sata {
  44         status = "okay";
  45 };
  46
  47 &i2c0 {
  48         status = "okay";
  49 };
  50
  51 &i2c3 {
  52         status = "okay";
  53 };
  54
  55 #include "fsl-ls1046-post.dtsi"
  56
  57 &fman0 {
  58         ethernet@e4000 {
  59                 phy-handle = <&rgmii_phy1>;
  60                 phy-connection-type = "rgmii-id";
  61                 status = "okay";
  62         };
  63
  64         ethernet@e6000 {
  65                 phy-handle = <&rgmii_phy2>;
  66                 phy-connection-type = "rgmii-id";
  67                 status = "okay";
  68         };
  69
  70         ethernet@e8000 {
  71                 phy-handle = <&sgmii_phy1>;
  72                 phy-connection-type = "sgmii";
  73                 status = "okay";
  74         };
  75
  76         ethernet@ea000 {
  77                 phy-handle = <&sgmii_phy2>;
  78                 phy-connection-type = "sgmii";
  79                 status = "okay";
  80         };
  81
  82         ethernet@f0000 { /* 10GEC1 */
  83                 phy-handle = <&aqr106_phy>;
  84                 phy-connection-type = "xgmii";
  85                 status = "okay";
  86         };
  87
  88         ethernet@f2000 { /* 10GEC2 */
  89                 fixed-link = <0 1 1000 0 0>;
  90                 phy-connection-type = "xgmii";
  91                 status = "okay";
  92         };
  93
  94         mdio@fc000 {
  95                 rgmii_phy1: ethernet-phy@1 {
  96                         reg = <0x1>;
  97                 };
  98
  99                 rgmii_phy2: ethernet-phy@2 {
 100                         reg = <0x2>;
 101                 };
 102
 103                 sgmii_phy1: ethernet-phy@3 {
 104                         reg = <0x3>;
 105                 };
 106
 107                 sgmii_phy2: ethernet-phy@4 {
 108                         reg = <0x4>;
 109                 };
 110         };
 111
 112         mdio@fd000 {
 113                 aqr106_phy: ethernet-phy@0 {
 114                         compatible = "ethernet-phy-ieee802.3-c45";
 115                         interrupts = <0 131 4>;
 116                         reg = <0x0>;
 117                 };
 118         };
 119 };