Merge tag 'u-boot-imx-20191009' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
[oweals/u-boot.git] / arch / arm / dts / bcm63158.dtsi
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2019 Philippe Reynes <philippe.reynes@softathome.com>
4  */
5
6 #include "skeleton64.dtsi"
7
8 / {
9         compatible = "brcm,bcm63158";
10         #address-cells = <2>;
11         #size-cells = <2>;
12
13         cpus {
14                 #address-cells = <2>;
15                 #size-cells = <0>;
16                 u-boot,dm-pre-reloc;
17
18                 cpu0: cpu@0 {
19                         compatible = "arm,cortex-a53", "arm,armv8";
20                         device_type = "cpu";
21                         reg = <0x0 0x0>;
22                         next-level-cache = <&l2>;
23                         u-boot,dm-pre-reloc;
24                 };
25
26                 cpu1: cpu@1 {
27                         compatible = "arm,cortex-a53", "arm,armv8";
28                         device_type = "cpu";
29                         reg = <0x0 0x1>;
30                         next-level-cache = <&l2>;
31                         u-boot,dm-pre-reloc;
32                 };
33
34                 cpu2: cpu@2 {
35                         compatible = "arm,cortex-a53", "arm,armv8";
36                         device_type = "cpu";
37                         reg = <0x0 0x2>;
38                         next-level-cache = <&l2>;
39                         u-boot,dm-pre-reloc;
40                 };
41
42                 cpu3: cpu@3 {
43                         compatible = "arm,cortex-a53", "arm,armv8";
44                         device_type = "cpu";
45                         reg = <0x0 0x3>;
46                         next-level-cache = <&l2>;
47                         u-boot,dm-pre-reloc;
48                 };
49
50                 l2: l2-cache0 {
51                         compatible = "cache";
52                         u-boot,dm-pre-reloc;
53                 };
54         };
55
56         clocks {
57                 compatible = "simple-bus";
58                 #address-cells = <2>;
59                 #size-cells = <2>;
60                 ranges;
61                 u-boot,dm-pre-reloc;
62
63                 periph_osc: periph-osc {
64                         compatible = "fixed-clock";
65                         #clock-cells = <0>;
66                         clock-frequency = <0xbebc200>;
67                         u-boot,dm-pre-reloc;
68                 };
69
70                 refclk50mhz: refclk50mhz {
71                         compatible = "fixed-clock";
72                         #clock-cells = <0>;
73                         clock-frequency = <50000000>;
74                 };
75         };
76
77         ubus {
78                 compatible = "simple-bus";
79                 #address-cells = <2>;
80                 #size-cells = <2>;
81                 u-boot,dm-pre-reloc;
82
83                 uart0: serial@ff812000 {
84                         compatible = "arm,pl011", "arm,primecell";
85                         reg = <0x0 0xff812000 0x0 0x1000>;
86                         clock = <50000000>;
87
88                         status = "disabled";
89                 };
90
91                 leds: led-controller@ff800800 {
92                         compatible = "brcm,bcm6858-leds";
93                         reg = <0x0 0xff800800 0x0 0xe4>;
94
95                         status = "disabled";
96                 };
97
98                 wdt1: watchdog@ff800480 {
99                         compatible = "brcm,bcm6345-wdt";
100                         reg = <0x0 0xff800480 0x0 0x14>;
101                         clocks = <&refclk50mhz>;
102                 };
103
104                 wdt2: watchdog@ff8004c0 {
105                         compatible = "brcm,bcm6345-wdt";
106                         reg = <0x0 0xff8004c0 0x0 0x14>;
107                         clocks = <&refclk50mhz>;
108                 };
109
110                 wdt-reboot {
111                         compatible = "wdt-reboot";
112                         wdt = <&wdt1>;
113                 };
114
115                 gpio0: gpio-controller@0xff800500 {
116                         compatible = "brcm,bcm6345-gpio";
117                         reg = <0x0 0xff800500 0x0 0x4>,
118                               <0x0 0xff800520 0x0 0x4>;
119                         gpio-controller;
120                         #gpio-cells = <2>;
121
122                         status = "disabled";
123                 };
124
125                 gpio1: gpio-controller@0xff800504 {
126                         compatible = "brcm,bcm6345-gpio";
127                         reg = <0x0 0xff800504 0x0 0x4>,
128                               <0x0 0xff800524 0x0 0x4>;
129                         gpio-controller;
130                         #gpio-cells = <2>;
131
132                         status = "disabled";
133                 };
134
135                 gpio2: gpio-controller@0xff800508 {
136                         compatible = "brcm,bcm6345-gpio";
137                         reg = <0x0 0xff800508 0x0 0x4>,
138                               <0x0 0xff800528 0x0 0x4>;
139                         gpio-controller;
140                         #gpio-cells = <2>;
141
142                         status = "disabled";
143                 };
144
145                 gpio3: gpio-controller@0xff80050c {
146                         compatible = "brcm,bcm6345-gpio";
147                         reg = <0x0 0xff80050c 0x0 0x4>,
148                               <0x0 0xff80052c 0x0 0x4>;
149                         gpio-controller;
150                         #gpio-cells = <2>;
151
152                         status = "disabled";
153                 };
154
155                 gpio4: gpio-controller@0xff800510 {
156                         compatible = "brcm,bcm6345-gpio";
157                         reg = <0x0 0xff800510 0x0 0x4>,
158                               <0x0 0xff800530 0x0 0x4>;
159                         gpio-controller;
160                         #gpio-cells = <2>;
161
162                         status = "disabled";
163                 };
164
165                 gpio5: gpio-controller@0xff800514 {
166                         compatible = "brcm,bcm6345-gpio";
167                         reg = <0x0 0xff800514 0x0 0x4>,
168                               <0x0 0xff800534 0x0 0x4>;
169                         gpio-controller;
170                         #gpio-cells = <2>;
171
172                         status = "disabled";
173                 };
174
175                 gpio6: gpio-controller@0xff800518 {
176                         compatible = "brcm,bcm6345-gpio";
177                         reg = <0x0 0xff800518 0x0 0x4>,
178                               <0x0 0xff800538 0x0 0x4>;
179                         gpio-controller;
180                         #gpio-cells = <2>;
181
182                         status = "disabled";
183                 };
184
185                 gpio7: gpio-controller@0xff80051c {
186                         compatible = "brcm,bcm6345-gpio";
187                         reg = <0x0 0xff80051c 0x0 0x4>,
188                               <0x0 0xff80053c 0x0 0x4>;
189                         gpio-controller;
190                         #gpio-cells = <2>;
191
192                         status = "disabled";
193                 };
194
195                 nand: nand-controller@ff801800 {
196                         compatible = "brcm,nand-bcm63158",
197                                      "brcm,brcmnand-v5.0",
198                                      "brcm,brcmnand";
199                         reg-names = "nand", "nand-int-base", "nand-cache";
200                         reg = <0x0 0xff801800 0x0 0x180>,
201                               <0x0 0xff802000 0x0 0x10>,
202                               <0x0 0xff801c00 0x0 0x200>;
203                         parameter-page-big-endian = <0>;
204
205                         status = "disabled";
206                 };
207         };
208 };