Merge tag 'u-boot-imx-20191105' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
[oweals/u-boot.git] / arch / arm / dts / armada-cp110-slave.dtsi
1 /*
2  * Copyright (C) 2016 Marvell Technology Group Ltd.
3  *
4  * This file is dual-licensed: you can use it either under the terms
5  * of the GPLv2 or the X11 license, at your option. Note that this dual
6  * licensing only applies to this file, and not this project as a
7  * whole.
8  *
9  *  a) This library is free software; you can redistribute it and/or
10  *     modify it under the terms of the GNU General Public License as
11  *     published by the Free Software Foundation; either version 2 of the
12  *     License, or (at your option) any later version.
13  *
14  *     This library is distributed in the hope that it will be useful,
15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17  *     GNU General Public License for more details.
18  *
19  * Or, alternatively,
20  *
21  *  b) Permission is hereby granted, free of charge, to any person
22  *     obtaining a copy of this software and associated documentation
23  *     files (the "Software"), to deal in the Software without
24  *     restriction, including without limitation the rights to use,
25  *     copy, modify, merge, publish, distribute, sublicense, and/or
26  *     sell copies of the Software, and to permit persons to whom the
27  *     Software is furnished to do so, subject to the following
28  *     conditions:
29  *
30  *     The above copyright notice and this permission notice shall be
31  *     included in all copies or substantial portions of the Software.
32  *
33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40  *     OTHER DEALINGS IN THE SOFTWARE.
41  */
42
43 /*
44  * Device Tree file for Marvell Armada CP110 Slave.
45  */
46
47 #include <dt-bindings/comphy/comphy_data.h>
48
49 / {
50         cp110-slave {
51                 #address-cells = <2>;
52                 #size-cells = <2>;
53                 compatible = "simple-bus";
54                 interrupt-parent = <&gic>;
55                 ranges;
56
57                 config-space {
58                         #address-cells = <1>;
59                         #size-cells = <1>;
60                         compatible = "simple-bus";
61                         interrupt-parent = <&gic>;
62                         ranges = <0x0 0x0 0xf4000000 0x2000000>;
63
64                         cps_ethernet: ethernet@0 {
65                                 compatible = "marvell,armada-7k-pp22";
66                                 reg = <0x0 0x100000>, <0x129000 0xb000>;
67                                 clocks = <&cps_syscon0 1 3>, <&cps_syscon0 1 9>, <&cps_syscon0 1 5>;
68                                 clock-names = "pp_clk", "gop_clk", "mg_clk";
69                                 status = "disabled";
70                                 dma-coherent;
71
72                                 cps_eth0: eth0 {
73                                         interrupts = <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
74                                         port-id = <0>;
75                                         gop-port-id = <0>;
76                                         status = "disabled";
77                                 };
78
79                                 cps_eth1: eth1 {
80                                         interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
81                                         port-id = <1>;
82                                         gop-port-id = <2>;
83                                         status = "disabled";
84                                 };
85
86                                 cps_eth2: eth2 {
87                                         interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
88                                         port-id = <2>;
89                                         gop-port-id = <3>;
90                                         status = "disabled";
91                                 };
92                         };
93
94                         cps_mdio: mdio@12a200 {
95                                 #address-cells = <1>;
96                                 #size-cells = <0>;
97                                 compatible = "marvell,orion-mdio";
98                                 reg = <0x12a200 0x10>;
99                                 device-name = "cps-mdio";
100                         };
101
102                         cps_syscon0: system-controller@440000 {
103                                 compatible = "marvell,cp110-system-controller0",
104                                              "syscon";
105                                 reg = <0x440000 0x1000>;
106                                 #clock-cells = <2>;
107                                 core-clock-output-names =
108                                         "cps-apll", "cps-ppv2-core", "cps-eip",
109                                         "cps-core", "cps-nand-core";
110                                 gate-clock-output-names =
111                                         "cps-audio", "cps-communit", "cps-nand",
112                                         "cps-ppv2", "cps-sdio", "cps-mg-domain",
113                                         "cps-mg-core", "cps-xor1", "cps-xor0",
114                                         "cps-gop-dp", "none", "cps-pcie_x10",
115                                         "cps-pcie_x11", "cps-pcie_x4", "cps-pcie-xor",
116                                         "cps-sata", "cps-sata-usb", "cps-main",
117                                         "cps-sd-mmc", "none", "none",
118                                         "cps-slow-io", "cps-usb3h0", "cps-usb3h1",
119                                         "cps-usb3dev", "cps-eip150", "cps-eip197";
120                         };
121
122                         cps_pinctl: cps-pinctl@440000 {
123                                 compatible = "marvell,mvebu-pinctrl",
124                                              "marvell,armada-8k-cps-pinctrl";
125                                 bank-name ="cp1-110";
126                                 reg = <0x440000 0x20>;
127                                 pin-count = <63>;
128                                 max-func = <0xf>;
129
130                                 cps_ge1_rgmii_pins: cps-ge-rgmii-pins-0 {
131                                         marvell,pins = < 0  1  2  3  4  5  6  7
132                                                          8  9  10 11 >;
133                                         marvell,function = <3>;
134                                 };
135                                 cps_spi1_pins: cps-spi-pins-1 {
136                                         marvell,pins = < 13 14 15 16 >;
137                                         marvell,function = <3>;
138                                 };
139                         };
140
141                         cps_gpio0: gpio@440100 {
142                                 compatible = "marvell,orion-gpio";
143                                 reg = <0x440100 0x40>;
144                                 ngpios = <32>;
145                                 gpiobase = <20>;
146                                 gpio-controller;
147                                 #gpio-cells = <2>;
148                         };
149
150                         cps_gpio1: gpio@440140 {
151                                 compatible = "marvell,orion-gpio";
152                                 reg = <0x440140 0x40>;
153                                 ngpios = <31>;
154                                 gpiobase = <52>;
155                                 gpio-controller;
156                                 #gpio-cells = <2>;
157                         };
158
159                         cps_sata0: sata@540000 {
160                                 compatible = "marvell,armada-8k-ahci";
161                                 reg = <0x540000 0x30000>;
162                                 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
163                                 clocks = <&cps_syscon0 1 15>;
164                                 status = "disabled";
165                         };
166
167                         cps_usb3_0: usb3@500000 {
168                                 compatible = "marvell,armada-8k-xhci",
169                                              "generic-xhci";
170                                 reg = <0x500000 0x4000>;
171                                 dma-coherent;
172                                 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
173                                 clocks = <&cps_syscon0 1 22>;
174                                 status = "disabled";
175                         };
176
177                         cps_usb3_1: usb3@510000 {
178                                 compatible = "marvell,armada-8k-xhci",
179                                              "generic-xhci";
180                                 reg = <0x510000 0x4000>;
181                                 dma-coherent;
182                                 interrupts = <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
183                                 clocks = <&cps_syscon0 1 23>;
184                                 status = "disabled";
185                         };
186
187                         cps_xor0: xor@6a0000 {
188                                 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
189                                 reg = <0x6a0000 0x1000>,
190                                       <0x6b0000 0x1000>;
191                                 dma-coherent;
192                                 msi-parent = <&gic_v2m0>;
193                                 clocks = <&cps_syscon0 1 8>;
194                         };
195
196                         cps_xor1: xor@6c0000 {
197                                 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
198                                 reg = <0x6c0000 0x1000>,
199                                       <0x6d0000 0x1000>;
200                                 dma-coherent;
201                                 msi-parent = <&gic_v2m0>;
202                                 clocks = <&cps_syscon0 1 7>;
203                         };
204
205                         cps_spi0: spi@700600 {
206                                 compatible = "marvell,armada-380-spi";
207                                 reg = <0x700600 0x50>;
208                                 #address-cells = <0x1>;
209                                 #size-cells = <0x0>;
210                                 cell-index = <1>;
211                                 clocks = <&cps_syscon0 0 3>;
212                                 status = "disabled";
213                         };
214
215                         cps_spi1: spi@700680 {
216                                 compatible = "marvell,armada-380-spi";
217                                 reg = <0x700680 0x50>;
218                                 #address-cells = <1>;
219                                 #size-cells = <0>;
220                                 cell-index = <2>;
221                                 clocks = <&cps_syscon0 1 21>;
222                                 status = "disabled";
223                         };
224
225                         cps_i2c0: i2c@701000 {
226                                 compatible = "marvell,mv78230-i2c";
227                                 reg = <0x701000 0x20>;
228                                 #address-cells = <1>;
229                                 #size-cells = <0>;
230                                 interrupts = <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>;
231                                 clocks = <&cps_syscon0 1 21>;
232                                 status = "disabled";
233                         };
234
235                         cps_i2c1: i2c@701100 {
236                                 compatible = "marvell,mv78230-i2c";
237                                 reg = <0x701100 0x20>;
238                                 #address-cells = <1>;
239                                 #size-cells = <0>;
240                                 interrupts = <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
241                                 clocks = <&cps_syscon0 1 21>;
242                                 status = "disabled";
243                         };
244
245                         cps_comphy: comphy@441000 {
246                                 compatible = "marvell,mvebu-comphy", "marvell,comphy-cp110";
247                                 reg = <0x441000 0x8>,
248                                       <0x120000 0x8>;
249                                 mux-bitcount = <4>;
250                                 max-lanes = <6>;
251                         };
252
253                         cps_utmi0: utmi@580000 {
254                                 compatible = "marvell,mvebu-utmi-2.6.0";
255                                 reg = <0x580000 0x1000>,        /* utmi-unit */
256                                       <0x440420 0x4>,           /* usb-cfg */
257                                       <0x440440 0x4>;           /* utmi-cfg */
258                                 utmi-port = <UTMI_PHY_TO_USB3_HOST0>;
259                                 status = "disabled";
260                         };
261                 };
262
263                 cps_pcie0: pcie@f4600000 {
264                         compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
265                         reg = <0 0xf4600000 0 0x10000>,
266                               <0 0xfaf00000 0 0x80000>;
267                         reg-names = "ctrl", "config";
268                         #address-cells = <3>;
269                         #size-cells = <2>;
270                         #interrupt-cells = <1>;
271                         device_type = "pci";
272                         dma-coherent;
273                         msi-parent = <&gic_v2m0>;
274
275                         bus-range = <0 0xff>;
276                         ranges =
277                                 /* downstream I/O */
278                                 <0x81000000 0 0xfd000000 0  0xfd000000 0 0x10000
279                                 /* non-prefetchable memory */
280                                 0x82000000 0 0xfa000000 0  0xfa000000 0 0xf00000>;
281                         interrupt-map-mask = <0 0 0 0>;
282                         interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
283                         interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
284                         num-lanes = <1>;
285                         clocks = <&cps_syscon0 1 13>;
286                         status = "disabled";
287                 };
288
289                 cps_pcie1: pcie@f4620000 {
290                         compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
291                         reg = <0 0xf4620000 0 0x10000>,
292                               <0 0xfbf00000 0 0x80000>;
293                         reg-names = "ctrl", "config";
294                         #address-cells = <3>;
295                         #size-cells = <2>;
296                         #interrupt-cells = <1>;
297                         device_type = "pci";
298                         dma-coherent;
299                         msi-parent = <&gic_v2m0>;
300
301                         bus-range = <0 0xff>;
302                         ranges =
303                                 /* downstream I/O */
304                                 <0x81000000 0 0xfd010000 0  0xfd010000 0 0x10000
305                                 /* non-prefetchable memory */
306                                 0x82000000 0 0xfb000000 0  0xfb000000 0 0xf00000>;
307                         interrupt-map-mask = <0 0 0 0>;
308                         interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>;
309                         interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>;
310
311                         num-lanes = <1>;
312                         clocks = <&cps_syscon0 1 11>;
313                         status = "disabled";
314                 };
315
316                 cps_pcie2: pcie@f4640000 {
317                         compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
318                         reg = <0 0xf4640000 0 0x10000>,
319                               <0 0xfcf00000 0 0x80000>;
320                         reg-names = "ctrl", "config";
321                         #address-cells = <3>;
322                         #size-cells = <2>;
323                         #interrupt-cells = <1>;
324                         device_type = "pci";
325                         dma-coherent;
326                         msi-parent = <&gic_v2m0>;
327
328                         bus-range = <0 0xff>;
329                         ranges =
330                                 /* downstream I/O */
331                                 <0x81000000 0 0xfd020000 0  0xfd020000 0 0x10000
332                                 /* non-prefetchable memory */
333                                 0x82000000 0 0xfc000000 0  0xfc000000 0 0xf00000>;
334                         interrupt-map-mask = <0 0 0 0>;
335                         interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>;
336                         interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>;
337
338                         num-lanes = <1>;
339                         clocks = <&cps_syscon0 1 12>;
340                         status = "disabled";
341                 };
342         };
343 };