arch/arm/dts/armada-3720-turris-mox.dts

   1 // SPDX-License-Identifier: GPL-2.0+ or X11
   2 /*
   3  * Device Tree file for CZ.NIC Turris Mox Board
   4  * 2018 by Marek Behun <marek.behun@nic.cz>
   5  *
   6  * Based on armada-3720-espressobin.dts by:
   7  *   Gregory CLEMENT <gregory.clement@free-electrons.com>
   8  *   Konstantin Porotchkin <kostap@marvell.com>
   9  */
  10
  11 /dts-v1/;
  12
  13 #include <dt-bindings/gpio/gpio.h>
  14 #include "armada-372x.dtsi"
  15
  16 / {
  17         model = "CZ.NIC Turris Mox Board";
  18         compatible = "cznic,turris-mox", "marvell,armada3720",
  19                      "marvell,armada3710";
  20
  21         chosen {
  22                 stdout-path = "serial0:115200n8";
  23         };
  24
  25         aliases {
  26                 ethernet0 = &eth0;
  27                 ethernet1 = &eth1;
  28                 i2c0 = &i2c0;
  29                 spi0 = &spi0;
  30         };
  31
  32         memory {
  33                 device_type = "memory";
  34                 reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
  35         };
  36
  37         reg_usb3_vbus: usb3_vbus@0 {
  38                 compatible = "regulator-fixed";
  39                 regulator-name = "usb3-vbus";
  40                 regulator-min-microvolt = <5000000>;
  41                 regulator-max-microvolt = <5000000>;
  42                 startup-delay-us = <2000000>;
  43                 shutdown-delay-us = <1000000>;
  44                 gpio = <&gpiosb 0 GPIO_ACTIVE_HIGH>;
  45                 regulator-boot-on;
  46         };
  47
  48         mdio {
  49                 #address-cells = <1>;
  50                 #size-cells = <0>;
  51
  52                 eth_phy1: ethernet-phy@1 {
  53                         reg = <1>;
  54                 };
  55         };
  56 };
  57
  58 &comphy {
  59         max-lanes = <3>;
  60         phy0 {
  61                 phy-type = <PHY_TYPE_SGMII1>;
  62                 phy-speed = <PHY_SPEED_3_125G>;
  63         };
  64
  65         phy1 {
  66                 phy-type = <PHY_TYPE_PEX0>;
  67                 phy-speed = <PHY_SPEED_5G>;
  68         };
  69
  70         phy2 {
  71                 phy-type = <PHY_TYPE_USB3_HOST0>;
  72                 phy-speed = <PHY_SPEED_5G>;
  73         };
  74 };
  75
  76 &eth0 {
  77         status = "okay";
  78         pinctrl-names = "default";
  79         pinctrl-0 = <&rgmii_pins>, <&smi_pins>;
  80         phy-mode = "rgmii";
  81         phy = <&eth_phy1>;
  82 };
  83
  84 &i2c0 {
  85         pinctrl-names = "default";
  86         pinctrl-0 = <&i2c1_pins>;
  87         status = "okay";
  88
  89         rtc@6f {
  90                 compatible = "microchip,mcp7941x";
  91                 reg = <0x6f>;
  92         };
  93 };
  94
  95 &sdhci1 {
  96         bus-width = <4>;
  97         status = "okay";
  98 };
  99
 100 &pinctrl_nb {
 101         spi_cs1_pins: spi-cs1-pins {
 102                 groups = "spi_cs1";
 103                 function = "spi";
 104         };
 105 };
 106
 107 &spi0 {
 108         status = "okay";
 109         pinctrl-names = "default";
 110         pinctrl-0 = <&spi_cs1_pins>;
 111         assigned-clocks = <&nb_periph_clk 7>;
 112         assigned-clock-parents = <&tbg 1>;
 113         assigned-clock-rates = <20000000>;
 114
 115         spi-flash@0 {
 116                 #address-cells = <1>;
 117                 #size-cells = <1>;
 118                 compatible = "st,s25fl064l", "jedec,spi-nor";
 119                 reg = <0>;
 120                 spi-max-frequency = <20000000>;
 121                 m25p,fast-read;
 122         };
 123
 124         moxtet@1 {
 125                 #address-cells = <1>;
 126                 #size-cells = <0>;
 127                 compatible = "cznic,moxtet";
 128                 reg = <1>;
 129                 reset-gpios = <&gpiosb 2 GPIO_ACTIVE_LOW>;
 130                 spi-max-frequency = <1000000>;
 131                 spi-cpol;
 132                 spi-cpha;
 133         };
 134 };
 135
 136 &uart0 {
 137         pinctrl-names = "default";
 138         pinctrl-0 = <&uart1_pins>;
 139         status = "okay";
 140 };
 141
 142 &usb2 {
 143         status = "okay";
 144 };
 145
 146 &usb3 {
 147         vbus-supply = <&reg_usb3_vbus>;
 148         status = "okay";
 149 };
 150
 151 &pcie0 {
 152         pinctrl-names = "default";
 153         pinctrl-0 = <&pcie_pins>;
 154         reset-gpio = <&gpiosb 3 GPIO_ACTIVE_HIGH>;
 155         status = "disabled";
 156 };