arch/arm/dts/am335x-phycore-som.dtsi

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2015 Phytec Messtechnik GmbH
   4  * Author: Teresa Remmet <t.remmet@phytec.de>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #include "am33xx.dtsi"
  12 #include <dt-bindings/interrupt-controller/irq.h>
  13
  14 / {
  15         model = "Phytec AM335x phyCORE";
  16         compatible = "phytec,am335x-phycore-som", "ti,am33xx";
  17
  18         aliases {
  19                 rtc0 = &i2c_rtc;
  20                 rtc1 = &rtc;
  21         };
  22
  23         cpus {
  24                 cpu@0 {
  25                         cpu0-supply = <&vdd1_reg>;
  26                 };
  27         };
  28
  29         memory@80000000 {
  30                 device_type = "memory";
  31                 reg = <0x80000000 0x10000000>; /* 256 MB */
  32         };
  33
  34         regulators {
  35                 compatible = "simple-bus";
  36
  37                 vcc5v: fixedregulator0 {
  38                         compatible = "regulator-fixed";
  39                         regulator-name = "vcc5v";
  40                         regulator-min-microvolt = <5000000>;
  41                         regulator-max-microvolt = <5000000>;
  42                         regulator-boot-on;
  43                         regulator-always-on;
  44                 };
  45         };
  46 };
  47
  48 /* Crypto Module */
  49 &aes {
  50         status = "okay";
  51 };
  52
  53 &sham {
  54         status = "okay";
  55 };
  56
  57 /* Ethernet */
  58 &am33xx_pinmux {
  59         ethernet0_pins: pinmux_ethernet0 {
  60                 pinctrl-single,pins = <
  61                         AM33XX_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_crs.rmii1_crs_dv */
  62                         AM33XX_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxerr.rmii1_rxerr */
  63                         AM33XX_IOPAD(0x914, PIN_OUTPUT | MUX_MODE1)             /* mii1_txen.rmii1_txen */
  64                         AM33XX_IOPAD(0x924, PIN_OUTPUT | MUX_MODE1)             /* mii1_txd1.rmii1_txd1 */
  65                         AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE1)             /* mii1_txd0.rmii1_txd0 */
  66                         AM33XX_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxd1.rmii1_rxd1 */
  67                         AM33XX_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE1)     /* mii1_rxd0.rmii1_rxd0 */
  68                         AM33XX_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* rmii1_refclk.rmii1_refclk */
  69                 >;
  70         };
  71
  72         mdio_pins: pinmux_mdio {
  73                 pinctrl-single,pins = <
  74                         /* MDIO */
  75                         AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)       /* mdio_data.mdio_data */
  76                         AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0)                      /* mdio_clk.mdio_clk */
  77                 >;
  78         };
  79 };
  80
  81 &cpsw_emac0 {
  82         phy-handle = <&phy0>;
  83         phy-mode = "rmii";
  84         dual_emac_res_vlan = <1>;
  85 };
  86
  87 &davinci_mdio {
  88         pinctrl-names = "default";
  89         pinctrl-0 = <&mdio_pins>;
  90         status = "okay";
  91
  92         phy0: ethernet-phy@0 {
  93                 reg = <0>;
  94         };
  95 };
  96
  97 &mac {
  98         slaves = <1>;
  99         pinctrl-names = "default";
 100         pinctrl-0 = <&ethernet0_pins>;
 101         status = "okay";
 102 };
 103
 104 /* I2C Busses */
 105 &am33xx_pinmux {
 106         i2c0_pins: pinmux_i2c0 {
 107                 pinctrl-single,pins = <
 108                         AM33XX_IOPAD(0x988, PIN_INPUT | MUX_MODE0)      /* i2c0_sda.i2c0_sda */
 109                         AM33XX_IOPAD(0x98c, PIN_INPUT | MUX_MODE0)      /* i2c0_scl.i2c0_scl */
 110                 >;
 111         };
 112 };
 113
 114 &i2c0 {
 115         pinctrl-names = "default";
 116         pinctrl-0 = <&i2c0_pins>;
 117         clock-frequency = <400000>;
 118         status = "okay";
 119
 120         tps: pmic@2d {
 121                 reg = <0x2d>;
 122         };
 123
 124         i2c_tmp102: temp@4b {
 125                 compatible = "ti,tmp102";
 126                 reg = <0x4b>;
 127                 status = "disabled";
 128         };
 129
 130         i2c_eeprom: eeprom@52 {
 131                 compatible = "atmel,24c32";
 132                 pagesize = <32>;
 133                 reg = <0x52>;
 134                 status = "disabled";
 135         };
 136
 137         i2c_rtc: rtc@68 {
 138                 compatible = "microcrystal,rv4162";
 139                 reg = <0x68>;
 140                 status = "disabled";
 141         };
 142 };
 143
 144 /* NAND memory */
 145 &am33xx_pinmux {
 146                 nandflash_pins: pinmux_nandflash {
 147                         pinctrl-single,pins = <
 148                         AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad0.gpmc_ad0 */
 149                         AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad1.gpmc_ad1 */
 150                         AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad2.gpmc_ad2 */
 151                         AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad3.gpmc_ad3 */
 152                         AM33XX_IOPAD(0x810, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad4.gpmc_ad4 */
 153                         AM33XX_IOPAD(0x814, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad5.gpmc_ad5 */
 154                         AM33XX_IOPAD(0x818, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad6.gpmc_ad6 */
 155                         AM33XX_IOPAD(0x81c, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_ad7.gpmc_ad7 */
 156                         AM33XX_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)       /* gpmc_wait0.gpmc_wait0 */
 157                         AM33XX_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_csn0.gpmc_csn0 */
 158                         AM33XX_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0)             /* gpmc_advn_ale.gpmc_advn_ale */
 159                         AM33XX_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0)             /* gpmc_oen_ren.gpmc_oen_ren */
 160                         AM33XX_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0)             /* gpmc_wen.gpmc_wen */
 161                         AM33XX_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0)             /* gpmc_be0n_cle.gpmc_be0n_cle */
 162                 >;
 163         };
 164 };
 165
 166 &elm {
 167         status = "okay";
 168 };
 169
 170 &gpmc {
 171         status = "okay";
 172         pinctrl-names = "default";
 173         pinctrl-0 = <&nandflash_pins>;
 174         ranges = <0 0 0x08000000 0x1000000>;   /* CS0: NAND */
 175         nandflash: nand@0,0 {
 176                 compatible = "ti,omap2-nand";
 177                 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
 178                 interrupt-parent = <&gpmc>;
 179                 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
 180                              <1 IRQ_TYPE_NONE>; /* termcount */
 181                 rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
 182                 nand-bus-width = <8>;
 183                 ti,nand-ecc-opt = "bch8";
 184                 gpmc,device-nand = "true";
 185                 gpmc,device-width = <1>;
 186                 gpmc,sync-clk-ps = <0>;
 187                 gpmc,cs-on-ns = <0>;
 188                 gpmc,cs-rd-off-ns = <30>;
 189                 gpmc,cs-wr-off-ns = <30>;
 190                 gpmc,adv-on-ns = <0>;
 191                 gpmc,adv-rd-off-ns = <30>;
 192                 gpmc,adv-wr-off-ns = <30>;
 193                 gpmc,we-on-ns = <0>;
 194                 gpmc,we-off-ns = <20>;
 195                 gpmc,oe-on-ns = <10>;
 196                 gpmc,oe-off-ns = <30>;
 197                 gpmc,access-ns = <30>;
 198                 gpmc,rd-cycle-ns = <30>;
 199                 gpmc,wr-cycle-ns = <30>;
 200                 gpmc,bus-turnaround-ns = <0>;
 201                 gpmc,cycle2cycle-delay-ns = <50>;
 202                 gpmc,cycle2cycle-diffcsen;
 203                 gpmc,clk-activation-ns = <0>;
 204                 gpmc,wr-access-ns = <30>;
 205                 gpmc,wr-data-mux-bus-ns = <0>;
 206
 207                 ti,elm-id = <&elm>;
 208
 209                 #address-cells = <1>;
 210                 #size-cells = <1>;
 211         };
 212 };
 213
 214 /* Power */
 215 #include "tps65910.dtsi"
 216
 217 &tps {
 218         vcc1-supply = <&vcc5v>;
 219         vcc2-supply = <&vcc5v>;
 220         vcc3-supply = <&vcc5v>;
 221         vcc4-supply = <&vcc5v>;
 222         vcc5-supply = <&vcc5v>;
 223         vcc6-supply = <&vcc5v>;
 224         vcc7-supply = <&vcc5v>;
 225         vccio-supply = <&vcc5v>;
 226
 227         regulators {
 228                 vrtc_reg: regulator@0 {
 229                         regulator-always-on;
 230                 };
 231
 232                 vio_reg: regulator@1 {
 233                         regulator-always-on;
 234                 };
 235
 236                 vdd1_reg: regulator@2 {
 237                         /* VDD_MPU voltage limits 0.95V - 1.325V with +/-4% tolerance */
 238                         regulator-name = "vdd_mpu";
 239                         regulator-min-microvolt = <912500>;
 240                         regulator-max-microvolt = <1378000>;
 241                         regulator-boot-on;
 242                         regulator-always-on;
 243                 };
 244
 245                 vdd2_reg: regulator@3 {
 246                         /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
 247                         regulator-name = "vdd_core";
 248                         regulator-min-microvolt = <912500>;
 249                         regulator-max-microvolt = <1150000>;
 250                         regulator-boot-on;
 251                         regulator-always-on;
 252                 };
 253
 254                 vdd3_reg: regulator@4 {
 255                         regulator-always-on;
 256                 };
 257
 258                 vdig1_reg: regulator@5 {
 259                         regulator-name = "vdig1_1p8v";
 260                         regulator-min-microvolt = <1800000>;
 261                         regulator-max-microvolt = <1800000>;
 262                 };
 263
 264                 vdig2_reg: regulator@6 {
 265                         regulator-always-on;
 266                 };
 267
 268                 vpll_reg: regulator@7 {
 269                         regulator-always-on;
 270                 };
 271
 272                 vdac_reg: regulator@8 {
 273                         regulator-always-on;
 274                 };
 275
 276                 vaux1_reg: regulator@9 {
 277                         regulator-always-on;
 278                 };
 279
 280                 vaux2_reg: regulator@10 {
 281                         regulator-always-on;
 282                 };
 283
 284                 vaux33_reg: regulator@11 {
 285                         regulator-always-on;
 286                 };
 287
 288                 vmmc_reg: regulator@12 {
 289                         regulator-min-microvolt = <3300000>;
 290                         regulator-max-microvolt = <3300000>;
 291                         regulator-always-on;
 292                 };
 293         };
 294 };
 295
 296 /* SPI Busses */
 297 &am33xx_pinmux {
 298         spi0_pins: pinmux_spi0 {
 299                 pinctrl-single,pins = <
 300                         AM33XX_IOPAD(0x950, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* spi0_clk.spi0_clk */
 301                         AM33XX_IOPAD(0x954, PIN_INPUT_PULLDOWN | MUX_MODE0)     /* spi0_d0.spi0_d0 */
 302                         AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE0)       /* spi0_d1.spi0_d1 */
 303                         AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE0)       /* spi0_cs0.spi0_cs0 */
 304                 >;
 305         };
 306 };
 307
 308 &spi0 {
 309         pinctrl-names = "default";
 310         pinctrl-0 = <&spi0_pins>;
 311         status = "okay";
 312
 313         serial_flash: m25p80@0 {
 314                 compatible = "jedec,spi-nor";
 315                 spi-max-frequency = <48000000>;
 316                 reg = <0x0>;
 317                 m25p,fast-read;
 318                 status = "disabled";
 319                 #address-cells = <1>;
 320                 #size-cells = <1>;
 321         };
 322 };