arch/arm/cpu/armv8/zynqmp/spl.c

   1 /*
   2  * Copyright 2015 - 2016 Xilinx, Inc.
   3  *
   4  * Michal Simek <michal.simek@xilinx.com>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 #include <common.h>
  10 #include <debug_uart.h>
  11 #include <spl.h>
  12
  13 #include <asm/io.h>
  14 #include <asm/spl.h>
  15 #include <asm/arch/hardware.h>
  16 #include <asm/arch/sys_proto.h>
  17
  18 void board_init_f(ulong dummy)
  19 {
  20         psu_init();
  21         board_early_init_r();
  22
  23 #ifdef CONFIG_DEBUG_UART
  24         /* Uart debug for sure */
  25         debug_uart_init();
  26         puts("Debug uart enabled\n"); /* or printch() */
  27 #endif
  28         /* Delay is required for clocks to be propagated */
  29         udelay(1000000);
  30
  31         /* Clear the BSS */
  32         memset(__bss_start, 0, __bss_end - __bss_start);
  33
  34         /* No need to call timer init - it is empty for ZynqMP */
  35         board_init_r(NULL, 0);
  36 }
  37
  38 static void ps_mode_reset(ulong mode)
  39 {
  40         writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
  41                &crlapb_base->boot_pin_ctrl);
  42         udelay(5);
  43         writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_VAL_SHIFT |
  44                mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT,
  45                &crlapb_base->boot_pin_ctrl);
  46 }
  47
  48 /*
  49  * Set default PS_MODE1 which is used for USB ULPI phy reset
  50  * Also other resets can be connected to this certain pin
  51  */
  52 #ifndef MODE_RESET
  53 # define MODE_RESET     PS_MODE1
  54 #endif
  55
  56 #ifdef CONFIG_SPL_BOARD_INIT
  57 void spl_board_init(void)
  58 {
  59         preloader_console_init();
  60         ps_mode_reset(MODE_RESET);
  61         board_init();
  62 }
  63 #endif
  64
  65 u32 spl_boot_device(void)
  66 {
  67         u32 reg = 0;
  68         u8 bootmode;
  69
  70 #if defined(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE_ENABLED)
  71         /* Change default boot mode at run-time */
  72         writel(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE << BOOT_MODE_ALT_SHIFT,
  73                &crlapb_base->boot_mode);
  74 #endif
  75
  76         reg = readl(&crlapb_base->boot_mode);
  77         if (reg >> BOOT_MODE_ALT_SHIFT)
  78                 reg >>= BOOT_MODE_ALT_SHIFT;
  79
  80         bootmode = reg & BOOT_MODES_MASK;
  81
  82         switch (bootmode) {
  83         case JTAG_MODE:
  84                 return BOOT_DEVICE_RAM;
  85 #ifdef CONFIG_SPL_MMC_SUPPORT
  86         case EMMC_MODE:
  87         case SD_MODE:
  88         case SD_MODE1:
  89                 return BOOT_DEVICE_MMC1;
  90 #endif
  91 #ifdef CONFIG_SPL_DFU_SUPPORT
  92         case USB_MODE:
  93                 return BOOT_DEVICE_DFU;
  94 #endif
  95         default:
  96                 printf("Invalid Boot Mode:0x%x\n", bootmode);
  97                 break;
  98         }
  99
 100         return 0;
 101 }
 102
 103 u32 spl_boot_mode(const u32 boot_device)
 104 {
 105         switch (spl_boot_device()) {
 106         case BOOT_DEVICE_RAM:
 107                 return 0;
 108         case BOOT_DEVICE_MMC1:
 109                 return MMCSD_MODE_FS;
 110         default:
 111                 puts("spl: error: unsupported device\n");
 112                 hang();
 113         }
 114 }
 115
 116 __weak void psu_init(void)
 117 {
 118          /*
 119           * This function is overridden by the one in
 120           * board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists.
 121           */
 122 }
 123
 124 #ifdef CONFIG_SPL_OS_BOOT
 125 int spl_start_uboot(void)
 126 {
 127         return 0;
 128 }
 129 #endif
 130
 131 #ifdef CONFIG_SPL_LOAD_FIT
 132 int board_fit_config_name_match(const char *name)
 133 {
 134         /* Just empty function now - can't decide what to choose */
 135         debug("%s: %s\n", __func__, name);
 136
 137         return 0;
 138 }
 139 #endif