arch/arm/cpu/armv8/s32v234/cpu.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2014-2016, Freescale Semiconductor, Inc.
   4  */
   5
   6 #include <common.h>
   7 #include <cpu_func.h>
   8 #include <init.h>
   9 #include <asm/cache.h>
  10 #include <asm/io.h>
  11 #include <asm/system.h>
  12 #include <asm/armv8/mmu.h>
  13 #include <asm/io.h>
  14 #include <asm/arch/mc_me_regs.h>
  15 #include <linux/bitops.h>
  16 #include "cpu.h"
  17
  18 u32 cpu_mask(void)
  19 {
  20         return readl(MC_ME_CS);
  21 }
  22
  23 #if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF)
  24
  25 #define S32V234_IRAM_BASE        0x3e800000UL
  26 #define S32V234_IRAM_SIZE        0x800000UL
  27 #define S32V234_DRAM_BASE1       0x80000000UL
  28 #define S32V234_DRAM_SIZE1       0x40000000UL
  29 #define S32V234_DRAM_BASE2       0xC0000000UL
  30 #define S32V234_DRAM_SIZE2       0x20000000UL
  31 #define S32V234_PERIPH_BASE      0x40000000UL
  32 #define S32V234_PERIPH_SIZE      0x40000000UL
  33
  34 static struct mm_region s32v234_mem_map[] = {
  35         {
  36                 .virt = S32V234_IRAM_BASE,
  37                 .phys = S32V234_IRAM_BASE,
  38                 .size = S32V234_IRAM_SIZE,
  39                 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  40                          PTE_BLOCK_OUTER_SHARE
  41         }, {
  42                 .virt = S32V234_DRAM_BASE1,
  43                 .phys = S32V234_DRAM_BASE1,
  44                 .size = S32V234_DRAM_SIZE1,
  45                 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  46                          PTE_BLOCK_OUTER_SHARE
  47         }, {
  48                 .virt = S32V234_PERIPH_BASE,
  49                 .phys = S32V234_PERIPH_BASE,
  50                 .size = S32V234_PERIPH_SIZE,
  51                 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  52                          PTE_BLOCK_NON_SHARE
  53                          /* TODO: Do we need these? */
  54                          /* | PTE_BLOCK_PXN | PTE_BLOCK_UXN */
  55         }, {
  56                 .virt = S32V234_DRAM_BASE2,
  57                 .phys = S32V234_DRAM_BASE2,
  58                 .size = S32V234_DRAM_SIZE2,
  59                 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL_NC) |
  60                          PTE_BLOCK_OUTER_SHARE
  61         }, {
  62                 /* List terminator */
  63                 0,
  64         }
  65 };
  66
  67 struct mm_region *mem_map = s32v234_mem_map;
  68
  69 #endif
  70
  71 /*
  72  * Return the number of cores on this SOC.
  73  */
  74 int cpu_numcores(void)
  75 {
  76         int numcores;
  77         u32 mask;
  78
  79         mask = cpu_mask();
  80         numcores = hweight32(cpu_mask());
  81
  82         /* Verify if M4 is deactivated */
  83         if (mask & 0x1)
  84                 numcores--;
  85
  86         return numcores;
  87 }
  88
  89 #if defined(CONFIG_ARCH_EARLY_INIT_R)
  90 int arch_early_init_r(void)
  91 {
  92         int rv;
  93         asm volatile ("dsb sy");
  94         rv = fsl_s32v234_wake_seconday_cores();
  95
  96         if (rv)
  97                 printf("Did not wake secondary cores\n");
  98
  99         asm volatile ("sev");
 100         return 0;
 101 }
 102 #endif /* CONFIG_ARCH_EARLY_INIT_R */