1 // SPDX-License-Identifier: GPL-2.0+
3 * Freescale i.MX28 timer driver
5 * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
6 * on behalf of DENX Software Engineering GmbH
8 * Based on code from LTIB:
9 * (C) Copyright 2009-2010 Freescale Semiconductor, Inc.
16 #include <asm/arch/imx-regs.h>
17 #include <asm/arch/sys_proto.h>
19 /* Maximum fixed count */
20 #if defined(CONFIG_MX23)
21 #define TIMER_LOAD_VAL 0xffff
22 #elif defined(CONFIG_MX28)
23 #define TIMER_LOAD_VAL 0xffffffff
26 DECLARE_GLOBAL_DATA_PTR;
28 #define timestamp (gd->arch.tbl)
29 #define lastdec (gd->arch.lastinc)
32 * This driver uses 1kHz clock source.
34 #define MXS_INCREMENTER_HZ 1000
36 static inline unsigned long tick_to_time(unsigned long tick)
38 return tick / (MXS_INCREMENTER_HZ / CONFIG_SYS_HZ);
41 static inline unsigned long time_to_tick(unsigned long time)
43 return time * (MXS_INCREMENTER_HZ / CONFIG_SYS_HZ);
46 /* Calculate how many ticks happen in "us" microseconds */
47 static inline unsigned long us_to_tick(unsigned long us)
49 return (us * MXS_INCREMENTER_HZ) / 1000000;
54 struct mxs_timrot_regs *timrot_regs =
55 (struct mxs_timrot_regs *)MXS_TIMROT_BASE;
57 /* Reset Timers and Rotary Encoder module */
58 mxs_reset_block(&timrot_regs->hw_timrot_rotctrl_reg);
60 /* Set fixed_count to 0 */
61 #if defined(CONFIG_MX23)
62 writel(0, &timrot_regs->hw_timrot_timcount0);
63 #elif defined(CONFIG_MX28)
64 writel(0, &timrot_regs->hw_timrot_fixed_count0);
67 /* Set UPDATE bit and 1Khz frequency */
68 writel(TIMROT_TIMCTRLn_UPDATE | TIMROT_TIMCTRLn_RELOAD |
69 TIMROT_TIMCTRLn_SELECT_1KHZ_XTAL,
70 &timrot_regs->hw_timrot_timctrl0);
72 /* Set fixed_count to maximal value */
73 #if defined(CONFIG_MX23)
74 writel(TIMER_LOAD_VAL - 1, &timrot_regs->hw_timrot_timcount0);
75 #elif defined(CONFIG_MX28)
76 writel(TIMER_LOAD_VAL, &timrot_regs->hw_timrot_fixed_count0);
82 unsigned long long get_ticks(void)
84 struct mxs_timrot_regs *timrot_regs =
85 (struct mxs_timrot_regs *)MXS_TIMROT_BASE;
88 /* Current tick value */
89 #if defined(CONFIG_MX23)
90 /* Upper bits are the valid ones. */
91 now = readl(&timrot_regs->hw_timrot_timcount0) >>
92 TIMROT_RUNNING_COUNTn_RUNNING_COUNT_OFFSET;
93 #elif defined(CONFIG_MX28)
94 now = readl(&timrot_regs->hw_timrot_running_count0);
96 #error "Don't know how to read timrot_regs"
101 * normal mode (non roll)
102 * move stamp forward with absolut diff ticks
104 timestamp += (lastdec - now);
106 /* we have rollover of decrementer */
107 timestamp += (TIMER_LOAD_VAL - now) + lastdec;
115 ulong get_timer(ulong base)
117 return tick_to_time(get_ticks()) - base;
120 /* We use the HW_DIGCTL_MICROSECONDS register for sub-millisecond timer. */
121 #define MXS_HW_DIGCTL_MICROSECONDS 0x8001c0c0
123 void __udelay(unsigned long usec)
125 uint32_t old, new, incr;
126 uint32_t counter = 0;
128 old = readl(MXS_HW_DIGCTL_MICROSECONDS);
130 while (counter < usec) {
131 new = readl(MXS_HW_DIGCTL_MICROSECONDS);
133 /* Check if the timer wrapped. */
135 incr = 0xffffffff - old;
142 * Check if we are close to the maximum time and the counter
143 * would wrap if incremented. If that's the case, break out
144 * from the loop as the requested delay time passed.
146 if (counter + incr < counter)
154 ulong get_tbclk(void)
156 return MXS_INCREMENTER_HZ;