1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
15 select INIT_SP_RELATIVE
17 U-Boot expects to be linked to a specific hard-coded address, and to
18 be loaded to and run from that address. This option lifts that
19 restriction, thus allowing the code to be loaded to and executed
20 from almost any address. This logic relies on the relocation
21 information that is embedded in the binary to support U-Boot
22 relocating itself to the top-of-RAM later during execution.
24 config INIT_SP_RELATIVE
25 bool "Specify the early stack pointer relative to the .bss section"
27 U-Boot typically uses a hard-coded value for the stack pointer
28 before relocation. Enable this option to instead calculate the
29 initial SP at run-time. This is useful to avoid hard-coding addresses
30 into U-Boot, so that it can be loaded and executed at arbitrary
31 addresses and thus avoid using arbitrary addresses at runtime.
33 If this option is enabled, the early stack pointer is set to
34 &_bss_start with a offset value added. The offset is specified by
35 SYS_INIT_SP_BSS_OFFSET.
37 config SYS_INIT_SP_BSS_OFFSET
38 int "Early stack offset from the .bss base address"
39 depends on INIT_SP_RELATIVE
42 This option's value is the offset added to &_bss_start in order to
43 calculate the stack pointer. This offset should be large enough so
44 that the early malloc region, global data (gd), and early stack usage
45 do not overlap any appended DTB.
47 config LINUX_KERNEL_IMAGE_HEADER
50 Place a Linux kernel image header at the start of the U-Boot binary.
51 The format of the header is described in the Linux kernel source at
52 Documentation/arm64/booting.txt. This feature is useful since the
53 image header reports the amount of memory (BSS and similar) that
54 U-Boot needs to use, but which isn't part of the binary.
56 if LINUX_KERNEL_IMAGE_HEADER
57 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
60 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
61 TEXT_OFFSET value written to the Linux kernel image header.
68 ARM GICV3 Interrupt translation service (ITS).
69 Basic support for programming locality specific peripheral
70 interrupts (LPI) configuration tables and enable LPI tables.
71 LPI configuration table can be used by u-boot or Linux.
72 ARM GICV3 has limitation, once the LPI table is enabled, LPI
73 configuration table can not be re-programmed, unless GICV3 reset.
77 default y if ARM64 && !POSITION_INDEPENDENT
79 config DMA_ADDR_T_64BIT
89 # Used for compatibility with asm files copied from the kernel
90 config ARM_ASM_UNIFIED
94 # Used for compatibility with asm files copied from the kernel
99 bool "Do not enable icache"
102 Do not enable instruction cache in U-Boot.
104 config SPL_SYS_ICACHE_OFF
105 bool "Do not enable icache in SPL"
107 default SYS_ICACHE_OFF
109 Do not enable instruction cache in SPL.
111 config SYS_DCACHE_OFF
112 bool "Do not enable dcache"
115 Do not enable data cache in U-Boot.
117 config SPL_SYS_DCACHE_OFF
118 bool "Do not enable dcache in SPL"
120 default SYS_DCACHE_OFF
122 Do not enable data cache in SPL.
124 config SYS_ARM_CACHE_CP15
125 bool "CP15 based cache enabling support"
127 Select this if your processor suports enabling caches by using
131 bool "MMU-based Paged Memory Management Support"
132 select SYS_ARM_CACHE_CP15
134 Select if you want MMU-based virtualised addressing space
135 support via paged memory management.
138 bool 'Use the ARM v7 PMSA Compliant MPU'
140 Some ARM systems without an MMU have instead a Memory Protection
141 Unit (MPU) that defines the type and permissions for regions of
143 If your CPU has an MPU then you should choose 'y' here unless you
144 know that you do not want to use the MPU.
146 # If set, the workarounds for these ARM errata are applied early during U-Boot
147 # startup. Note that in general these options force the workarounds to be
148 # applied; no CPU-type/version detection exists, unlike the similar options in
149 # the Linux kernel. Do not set these options unless they apply! Also note that
150 # the following can be machine-specific errata. These do have ability to
151 # provide rudimentary version and machine-specific checks, but expect no
153 # CONFIG_ARM_ERRATA_430973
154 # CONFIG_ARM_ERRATA_454179
155 # CONFIG_ARM_ERRATA_621766
156 # CONFIG_ARM_ERRATA_798870
157 # CONFIG_ARM_ERRATA_801819
158 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
159 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
161 config ARM_ERRATA_430973
164 config ARM_ERRATA_454179
167 config ARM_ERRATA_621766
170 config ARM_ERRATA_716044
173 config ARM_ERRATA_725233
176 config ARM_ERRATA_742230
179 config ARM_ERRATA_743622
182 config ARM_ERRATA_751472
185 config ARM_ERRATA_761320
188 config ARM_ERRATA_773022
191 config ARM_ERRATA_774769
194 config ARM_ERRATA_794072
197 config ARM_ERRATA_798870
200 config ARM_ERRATA_801819
203 config ARM_ERRATA_826974
206 config ARM_ERRATA_828024
209 config ARM_ERRATA_829520
212 config ARM_ERRATA_833069
215 config ARM_ERRATA_833471
218 config ARM_ERRATA_845369
221 config ARM_ERRATA_852421
224 config ARM_ERRATA_852423
227 config ARM_ERRATA_855873
230 config ARM_CORTEX_A8_CVE_2017_5715
233 config ARM_CORTEX_A15_CVE_2017_5715
238 select SYS_CACHE_SHIFT_5
243 select SYS_CACHE_SHIFT_5
248 select SYS_CACHE_SHIFT_5
253 select SYS_CACHE_SHIFT_5
258 select SYS_CACHE_SHIFT_5
264 select SYS_CACHE_SHIFT_5
271 select SYS_CACHE_SHIFT_6
278 select SYS_CACHE_SHIFT_5
279 select SYS_THUMB_BUILD
285 select SYS_ARM_CACHE_CP15
287 select SYS_CACHE_SHIFT_6
291 select SYS_CACHE_SHIFT_5
296 select SYS_CACHE_SHIFT_5
300 default "arm720t" if CPU_ARM720T
301 default "arm920t" if CPU_ARM920T
302 default "arm926ejs" if CPU_ARM926EJS
303 default "arm946es" if CPU_ARM946ES
304 default "arm1136" if CPU_ARM1136
305 default "arm1176" if CPU_ARM1176
306 default "armv7" if CPU_V7A
307 default "armv7" if CPU_V7R
308 default "armv7m" if CPU_V7M
309 default "pxa" if CPU_PXA
310 default "sa1100" if CPU_SA1100
311 default "armv8" if ARM64
315 default 4 if CPU_ARM720T
316 default 4 if CPU_ARM920T
317 default 5 if CPU_ARM926EJS
318 default 5 if CPU_ARM946ES
319 default 6 if CPU_ARM1136
320 default 6 if CPU_ARM1176
325 default 4 if CPU_SA1100
328 config SYS_CACHE_SHIFT_5
331 config SYS_CACHE_SHIFT_6
334 config SYS_CACHE_SHIFT_7
337 config SYS_CACHELINE_SIZE
339 default 128 if SYS_CACHE_SHIFT_7
340 default 64 if SYS_CACHE_SHIFT_6
341 default 32 if SYS_CACHE_SHIFT_5
344 bool "Enable ARCH_CPU_INIT"
346 Some architectures require a call to arch_cpu_init().
347 Say Y here to enable it
349 config SYS_ARCH_TIMER
350 bool "ARM Generic Timer support"
351 depends on CPU_V7A || ARM64
354 The ARM Generic Timer (aka arch-timer) provides an architected
355 interface to a timer source on an SoC.
356 It is mandatory for ARMv8 implementation and widely available
360 bool "Support for ARM SMC Calling Convention (SMCCC)"
361 depends on CPU_V7A || ARM64
364 Say Y here if you want to enable ARM SMC Calling Convention.
365 This should be enabled if U-Boot needs to communicate with system
366 firmware (for example, PSCI) according to SMCCC.
369 bool "support boot from semihosting"
371 In emulated environments, semihosting is a way for
372 the hosted environment to call out to the emulator to
373 retrieve files from the host machine.
375 config SYS_THUMB_BUILD
376 bool "Build U-Boot using the Thumb instruction set"
379 Use this flag to build U-Boot using the Thumb instruction set for
380 ARM architectures. Thumb instruction set provides better code
381 density. For ARM architectures that support Thumb2 this flag will
382 result in Thumb2 code generated by GCC.
384 config SPL_SYS_THUMB_BUILD
385 bool "Build SPL using the Thumb instruction set"
386 default y if SYS_THUMB_BUILD
387 depends on !ARM64 && SPL
389 Use this flag to build SPL using the Thumb instruction set for
390 ARM architectures. Thumb instruction set provides better code
391 density. For ARM architectures that support Thumb2 this flag will
392 result in Thumb2 code generated by GCC.
394 config TPL_SYS_THUMB_BUILD
395 bool "Build TPL using the Thumb instruction set"
396 default y if SYS_THUMB_BUILD
397 depends on TPL && !ARM64
399 Use this flag to build TPL using the Thumb instruction set for
400 ARM architectures. Thumb instruction set provides better code
401 density. For ARM architectures that support Thumb2 this flag will
402 result in Thumb2 code generated by GCC.
405 config SYS_L2CACHE_OFF
408 If SoC does not support L2CACHE or one does not want to enable
409 L2CACHE, choose this option.
411 config ENABLE_ARM_SOC_BOOT0_HOOK
412 bool "prepare BOOT0 header"
414 If the SoC's BOOT0 requires a header area filled with (magic)
415 values, then choose this option, and create a file included as
416 <asm/arch/boot0.h> which contains the required assembler code.
418 config ARM_CORTEX_CPU_IS_UP
422 config USE_ARCH_MEMCPY
423 bool "Use an assembly optimized implementation of memcpy"
427 Enable the generation of an optimized version of memcpy.
428 Such an implementation may be faster under some conditions
429 but may increase the binary size.
431 config SPL_USE_ARCH_MEMCPY
432 bool "Use an assembly optimized implementation of memcpy for SPL"
433 default y if USE_ARCH_MEMCPY
434 depends on !ARM64 && SPL
436 Enable the generation of an optimized version of memcpy.
437 Such an implementation may be faster under some conditions
438 but may increase the binary size.
440 config TPL_USE_ARCH_MEMCPY
441 bool "Use an assembly optimized implementation of memcpy for TPL"
442 default y if USE_ARCH_MEMCPY
443 depends on !ARM64 && TPL
445 Enable the generation of an optimized version of memcpy.
446 Such an implementation may be faster under some conditions
447 but may increase the binary size.
449 config USE_ARCH_MEMSET
450 bool "Use an assembly optimized implementation of memset"
454 Enable the generation of an optimized version of memset.
455 Such an implementation may be faster under some conditions
456 but may increase the binary size.
458 config SPL_USE_ARCH_MEMSET
459 bool "Use an assembly optimized implementation of memset for SPL"
460 default y if USE_ARCH_MEMSET
461 depends on !ARM64 && SPL
463 Enable the generation of an optimized version of memset.
464 Such an implementation may be faster under some conditions
465 but may increase the binary size.
467 config TPL_USE_ARCH_MEMSET
468 bool "Use an assembly optimized implementation of memset for TPL"
469 default y if USE_ARCH_MEMSET
470 depends on !ARM64 && TPL
472 Enable the generation of an optimized version of memset.
473 Such an implementation may be faster under some conditions
474 but may increase the binary size.
476 config SET_STACK_SIZE
477 bool "Enable an option to set max stack size that can be used"
478 default y if ARCH_VERSAL || ARCH_ZYNQMP
480 This will enable an option to set max stack size that can be
484 hex "Define max stack size that can be used by U-Boot"
485 depends on SET_STACK_SIZE
486 default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
488 Define Max stack size that can be used by U-Boot so that the
489 initrd_high will be calculated as base stack pointer minus this
492 config ARM64_SUPPORT_AARCH32
493 bool "ARM64 system support AArch32 execution state"
495 default y if !TARGET_THUNDERX_88XX
497 This ARM64 system supports AArch32 execution state.
500 prompt "Target select"
505 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
507 config TARGET_EDB93XX
508 bool "Support edb93xx"
512 config TARGET_ASPENITE
513 bool "Support aspenite"
517 bool "Support gplugd"
525 Support for TI's DaVinci platform.
528 bool "Marvell Kirkwood"
529 select ARCH_MISC_INIT
530 select BOARD_EARLY_INIT_F
534 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
554 config TARGET_SPEAR300
555 bool "Support spear300"
556 select BOARD_EARLY_INIT_F
561 config TARGET_SPEAR310
562 bool "Support spear310"
563 select BOARD_EARLY_INIT_F
568 config TARGET_SPEAR320
569 bool "Support spear320"
570 select BOARD_EARLY_INIT_F
575 config TARGET_SPEAR600
576 bool "Support spear600"
577 select BOARD_EARLY_INIT_F
582 config TARGET_STV0991
583 bool "Support stv0991"
596 select BOARD_LATE_INIT
601 config TARGET_WOODBURN
602 bool "Support woodburn"
605 config TARGET_WOODBURN_SD
606 bool "Support woodburn_sd"
614 config TARGET_MX35PDK
615 bool "Support mx35pdk"
616 select BOARD_LATE_INIT
620 bool "Broadcom BCM283X family"
626 select SERIAL_SEARCH_ALL
631 bool "Broadcom BCM63158 family"
637 bool "Broadcom BCM6858 family"
642 config TARGET_VEXPRESS_CA15_TC2
643 bool "Support vexpress_ca15_tc2"
645 select CPU_V7_HAS_NONSEC
646 select CPU_V7_HAS_VIRT
650 bool "Broadcom BCM7XXX family"
654 select OF_PRIOR_STAGE
657 This enables support for Broadcom ARM-based set-top box
658 chipsets, including the 7445 family of chips.
660 config TARGET_VEXPRESS_CA5X2
661 bool "Support vexpress_ca5x2"
665 config TARGET_VEXPRESS_CA9X4
666 bool "Support vexpress_ca9x4"
670 config TARGET_BCM23550_W1D
671 bool "Support bcm23550_w1d"
676 config TARGET_BCM28155_AP
677 bool "Support bcm28155_ap"
682 config TARGET_BCMCYGNUS
683 bool "Support bcmcygnus"
686 imply BCM_SF2_ETH_GMAC
694 bool "Support bcmnsp"
698 bool "Support Broadcom Northstar2"
701 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
702 ARMv8 Cortex-A57 processors targeting a broad range of networking
706 bool "Samsung EXYNOS"
715 imply SYS_THUMB_BUILD
720 bool "Samsung S5PC1XX"
729 bool "Calxeda Highbank"
733 config ARCH_INTEGRATOR
734 bool "ARM Ltd. Integrator family"
745 select SYS_ARCH_TIMER
746 select SYS_THUMB_BUILD
752 bool "Texas Instruments' K3 Architecture"
757 config ARCH_OMAP2PLUS
760 select SPL_BOARD_INIT if SPL
761 select SPL_STACK_R if SPL
767 imply DISTRO_DEFAULTS
769 Support for the Meson SoC family developed by Amlogic Inc.,
770 targeted at media players and tablet computers. We currently
771 support the S905 (GXBaby) 64-bit SoC.
779 select SPL_LIBCOMMON_SUPPORT if SPL
780 select SPL_LIBGENERIC_SUPPORT if SPL
781 select SPL_OF_CONTROL if SPL
784 Support for the MediaTek SoCs family developed by MediaTek Inc.
785 Please refer to doc/README.mediatek for more information.
788 bool "NXP LPC32xx platform"
798 bool "NXP i.MX8 platform"
802 select ENABLE_ARM_SOC_BOOT0_HOOK
805 bool "NXP i.MX8M platform"
812 bool "NXP i.MX23 family"
823 bool "NXP i.MX28 family"
829 bool "NXP i.MX31 family"
835 select ROM_UNIFIED_SECTIONS
837 imply SYS_THUMB_BUILD
841 select ARCH_MISC_INIT
842 select BOARD_EARLY_INIT_F
844 select SYS_FSL_HAS_SEC if IMX_HAB
845 select SYS_FSL_SEC_COMPAT_4
846 select SYS_FSL_SEC_LE
848 imply SYS_THUMB_BUILD
853 select SYS_FSL_HAS_SEC if IMX_HAB
854 select SYS_FSL_SEC_COMPAT_4
855 select SYS_FSL_SEC_LE
857 imply SYS_THUMB_BUILD
861 default "arch/arm/mach-omap2/u-boot-spl.lds"
866 select BOARD_EARLY_INIT_F
871 bool "Actions Semi OWL SoCs"
879 bool "QEMU Virtual Platform"
880 select ARCH_SUPPORT_TFABOOT
890 bool "Renesas ARM SoCs"
891 select BOARD_EARLY_INIT_F if !RZA1
896 imply SYS_THUMB_BUILD
897 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
899 config TARGET_S32V234EVB
900 bool "Support s32v234evb"
902 select SYS_FSL_ERRATUM_ESDHC111
904 config ARCH_SNAPDRAGON
905 bool "Qualcomm Snapdragon SoCs"
918 bool "Altera SOCFPGA family"
919 select ARCH_EARLY_INIT_R
920 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
921 select ARM64 if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
922 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
925 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
927 select SPL_DM_RESET if DM_RESET
929 select SPL_LIBCOMMON_SUPPORT
930 select SPL_LIBGENERIC_SUPPORT
931 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
932 select SPL_OF_CONTROL
933 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10 || TARGET_SOCFPGA_AGILEX
934 select SPL_SERIAL_SUPPORT
936 select SPL_WATCHDOG_SUPPORT
939 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
941 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
942 select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
951 imply SPL_LIBDISK_SUPPORT
952 imply SPL_MMC_SUPPORT
953 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
954 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
955 imply SPL_SPI_FLASH_SUPPORT
956 imply SPL_SPI_SUPPORT
960 bool "Support sunxi (Allwinner) SoCs"
963 select CMD_MMC if MMC
964 select CMD_USB if DISTRO_DEFAULTS
971 select DM_SCSI if SCSI
973 select DM_USB if DISTRO_DEFAULTS
974 select OF_BOARD_SETUP
977 select SPECIFY_CONSOLE_INDEX
978 select SPL_STACK_R if SPL
979 select SPL_SYS_MALLOC_SIMPLE if SPL
980 select SPL_SYS_THUMB_BUILD if !ARM64
983 select SYS_THUMB_BUILD if !ARM64
984 select USB if DISTRO_DEFAULTS
985 select USB_KEYBOARD if DISTRO_DEFAULTS
986 select USB_STORAGE if DISTRO_DEFAULTS
987 select SPL_USE_TINY_PRINTF
990 imply CMD_UBI if MTD_RAW_NAND
991 imply DISTRO_DEFAULTS
994 imply OF_LIBFDT_OVERLAY
995 imply PRE_CONSOLE_BUFFER
996 imply SPL_GPIO_SUPPORT
997 imply SPL_LIBCOMMON_SUPPORT
998 imply SPL_LIBGENERIC_SUPPORT
999 imply SPL_MMC_SUPPORT if MMC
1000 imply SPL_POWER_SUPPORT
1001 imply SPL_SERIAL_SUPPORT
1005 bool "Support Xilinx Versal Platform"
1009 select DM_ETH if NET
1010 select DM_MMC if MMC
1013 imply BOARD_LATE_INIT
1016 bool "Freescale Vybrid"
1018 select SYS_FSL_ERRATUM_ESDHC111
1023 bool "Xilinx Zynq based platform"
1028 select DM_ETH if NET
1029 select DM_MMC if MMC
1033 select DM_USB if USB
1036 select SPL_BOARD_INIT if SPL
1037 select SPL_CLK if SPL
1038 select SPL_DM if SPL
1039 select SPL_OF_CONTROL if SPL
1040 select SPL_SEPARATE_BSS if SPL
1042 imply ARCH_EARLY_INIT_R
1043 imply BOARD_LATE_INIT
1049 config ARCH_ZYNQMP_R5
1050 bool "Xilinx ZynqMP R5 based platform"
1054 select DM_ETH if NET
1055 select DM_MMC if MMC
1062 bool "Xilinx ZynqMP based platform"
1066 select DM_ETH if NET
1068 select DM_MMC if MMC
1070 select DM_SPI if SPI
1071 select DM_SPI_FLASH if DM_SPI
1072 select DM_USB if USB
1075 select SPL_BOARD_INIT if SPL
1076 select SPL_CLK if SPL
1077 select SPL_DM_MAILBOX if SPL
1078 select SPL_FIRMWARE if SPL
1079 select SPL_SEPARATE_BSS if SPL
1082 imply BOARD_LATE_INIT
1090 imply DISTRO_DEFAULTS
1093 config TARGET_VEXPRESS64_AEMV8A
1094 bool "Support vexpress_aemv8a"
1098 config TARGET_VEXPRESS64_BASE_FVP
1099 bool "Support Versatile Express ARMv8a FVP BASE model"
1104 config TARGET_VEXPRESS64_JUNO
1105 bool "Support Versatile Express Juno Development Platform"
1109 config TARGET_LS2080A_EMU
1110 bool "Support ls2080a_emu"
1112 select ARCH_MISC_INIT
1114 select ARMV8_MULTIENTRY
1115 select FSL_DDR_SYNC_REFRESH
1117 Support for Freescale LS2080A_EMU platform.
1118 The LS2080A Development System (EMULATOR) is a pre-silicon
1119 development platform that supports the QorIQ LS2080A
1120 Layerscape Architecture processor.
1122 config TARGET_LS2080A_SIMU
1123 bool "Support ls2080a_simu"
1125 select ARCH_MISC_INIT
1127 select ARMV8_MULTIENTRY
1128 select BOARD_LATE_INIT
1130 Support for Freescale LS2080A_SIMU platform.
1131 The LS2080A Development System (QDS) is a pre silicon
1132 development platform that supports the QorIQ LS2080A
1133 Layerscape Architecture processor.
1135 config TARGET_LS1088AQDS
1136 bool "Support ls1088aqds"
1138 select ARCH_MISC_INIT
1140 select ARMV8_MULTIENTRY
1141 select ARCH_SUPPORT_TFABOOT
1142 select BOARD_LATE_INIT
1144 select FSL_DDR_INTERACTIVE if !SD_BOOT
1146 Support for NXP LS1088AQDS platform.
1147 The LS1088A Development System (QDS) is a high-performance
1148 development platform that supports the QorIQ LS1088A
1149 Layerscape Architecture processor.
1151 config TARGET_LS2080AQDS
1152 bool "Support ls2080aqds"
1154 select ARCH_MISC_INIT
1156 select ARMV8_MULTIENTRY
1157 select ARCH_SUPPORT_TFABOOT
1158 select BOARD_LATE_INIT
1163 select FSL_DDR_INTERACTIVE if !SPL
1165 Support for Freescale LS2080AQDS platform.
1166 The LS2080A Development System (QDS) is a high-performance
1167 development platform that supports the QorIQ LS2080A
1168 Layerscape Architecture processor.
1170 config TARGET_LS2080ARDB
1171 bool "Support ls2080ardb"
1173 select ARCH_MISC_INIT
1175 select ARMV8_MULTIENTRY
1176 select ARCH_SUPPORT_TFABOOT
1177 select BOARD_LATE_INIT
1180 select FSL_DDR_INTERACTIVE if !SPL
1184 Support for Freescale LS2080ARDB platform.
1185 The LS2080A Reference design board (RDB) is a high-performance
1186 development platform that supports the QorIQ LS2080A
1187 Layerscape Architecture processor.
1189 config TARGET_LS2081ARDB
1190 bool "Support ls2081ardb"
1192 select ARCH_MISC_INIT
1194 select ARMV8_MULTIENTRY
1195 select BOARD_LATE_INIT
1198 Support for Freescale LS2081ARDB platform.
1199 The LS2081A Reference design board (RDB) is a high-performance
1200 development platform that supports the QorIQ LS2081A/LS2041A
1201 Layerscape Architecture processor.
1203 config TARGET_LX2160ARDB
1204 bool "Support lx2160ardb"
1206 select ARCH_MISC_INIT
1208 select ARMV8_MULTIENTRY
1209 select ARCH_SUPPORT_TFABOOT
1210 select BOARD_LATE_INIT
1212 Support for NXP LX2160ARDB platform.
1213 The lx2160ardb (LX2160A Reference design board (RDB)
1214 is a high-performance development platform that supports the
1215 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1217 config TARGET_LX2160AQDS
1218 bool "Support lx2160aqds"
1220 select ARCH_MISC_INIT
1222 select ARMV8_MULTIENTRY
1223 select ARCH_SUPPORT_TFABOOT
1224 select BOARD_LATE_INIT
1226 Support for NXP LX2160AQDS platform.
1227 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1228 is a high-performance development platform that supports the
1229 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1232 bool "Support HiKey 96boards Consumer Edition Platform"
1239 select SPECIFY_CONSOLE_INDEX
1242 Support for HiKey 96boards platform. It features a HI6220
1243 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1245 config TARGET_HIKEY960
1246 bool "Support HiKey960 96boards Consumer Edition Platform"
1254 Support for HiKey960 96boards platform. It features a HI3660
1255 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1257 config TARGET_POPLAR
1258 bool "Support Poplar 96boards Enterprise Edition Platform"
1267 Support for Poplar 96boards EE platform. It features a HI3798cv200
1268 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1269 making it capable of running any commercial set-top solution based on
1272 config TARGET_LS1012AQDS
1273 bool "Support ls1012aqds"
1276 select ARCH_SUPPORT_TFABOOT
1277 select BOARD_LATE_INIT
1279 Support for Freescale LS1012AQDS platform.
1280 The LS1012A Development System (QDS) is a high-performance
1281 development platform that supports the QorIQ LS1012A
1282 Layerscape Architecture processor.
1284 config TARGET_LS1012ARDB
1285 bool "Support ls1012ardb"
1288 select ARCH_SUPPORT_TFABOOT
1289 select BOARD_LATE_INIT
1293 Support for Freescale LS1012ARDB platform.
1294 The LS1012A Reference design board (RDB) is a high-performance
1295 development platform that supports the QorIQ LS1012A
1296 Layerscape Architecture processor.
1298 config TARGET_LS1012A2G5RDB
1299 bool "Support ls1012a2g5rdb"
1302 select ARCH_SUPPORT_TFABOOT
1303 select BOARD_LATE_INIT
1306 Support for Freescale LS1012A2G5RDB platform.
1307 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1308 development platform that supports the QorIQ LS1012A
1309 Layerscape Architecture processor.
1311 config TARGET_LS1012AFRWY
1312 bool "Support ls1012afrwy"
1315 select ARCH_SUPPORT_TFABOOT
1316 select BOARD_LATE_INIT
1320 Support for Freescale LS1012AFRWY platform.
1321 The LS1012A FRWY board (FRWY) is a high-performance
1322 development platform that supports the QorIQ LS1012A
1323 Layerscape Architecture processor.
1325 config TARGET_LS1012AFRDM
1326 bool "Support ls1012afrdm"
1329 select ARCH_SUPPORT_TFABOOT
1331 Support for Freescale LS1012AFRDM platform.
1332 The LS1012A Freedom board (FRDM) is a high-performance
1333 development platform that supports the QorIQ LS1012A
1334 Layerscape Architecture processor.
1336 config TARGET_LS1028AQDS
1337 bool "Support ls1028aqds"
1340 select ARMV8_MULTIENTRY
1341 select ARCH_SUPPORT_TFABOOT
1342 select BOARD_LATE_INIT
1343 select ARCH_MISC_INIT
1345 Support for Freescale LS1028AQDS platform
1346 The LS1028A Development System (QDS) is a high-performance
1347 development platform that supports the QorIQ LS1028A
1348 Layerscape Architecture processor.
1350 config TARGET_LS1028ARDB
1351 bool "Support ls1028ardb"
1354 select ARMV8_MULTIENTRY
1355 select ARCH_SUPPORT_TFABOOT
1357 Support for Freescale LS1028ARDB platform
1358 The LS1028A Development System (RDB) is a high-performance
1359 development platform that supports the QorIQ LS1028A
1360 Layerscape Architecture processor.
1362 config TARGET_LS1088ARDB
1363 bool "Support ls1088ardb"
1365 select ARCH_MISC_INIT
1367 select ARMV8_MULTIENTRY
1368 select ARCH_SUPPORT_TFABOOT
1369 select BOARD_LATE_INIT
1371 select FSL_DDR_INTERACTIVE if !SD_BOOT
1373 Support for NXP LS1088ARDB platform.
1374 The LS1088A Reference design board (RDB) is a high-performance
1375 development platform that supports the QorIQ LS1088A
1376 Layerscape Architecture processor.
1378 config TARGET_LS1021AQDS
1379 bool "Support ls1021aqds"
1381 select ARCH_SUPPORT_PSCI
1382 select BOARD_EARLY_INIT_F
1383 select BOARD_LATE_INIT
1385 select CPU_V7_HAS_NONSEC
1386 select CPU_V7_HAS_VIRT
1387 select LS1_DEEP_SLEEP
1390 select FSL_DDR_INTERACTIVE
1393 config TARGET_LS1021ATWR
1394 bool "Support ls1021atwr"
1396 select ARCH_SUPPORT_PSCI
1397 select BOARD_EARLY_INIT_F
1398 select BOARD_LATE_INIT
1400 select CPU_V7_HAS_NONSEC
1401 select CPU_V7_HAS_VIRT
1402 select LS1_DEEP_SLEEP
1406 config TARGET_LS1021ATSN
1407 bool "Support ls1021atsn"
1409 select ARCH_SUPPORT_PSCI
1410 select BOARD_EARLY_INIT_F
1411 select BOARD_LATE_INIT
1413 select CPU_V7_HAS_NONSEC
1414 select CPU_V7_HAS_VIRT
1415 select LS1_DEEP_SLEEP
1419 config TARGET_LS1021AIOT
1420 bool "Support ls1021aiot"
1422 select ARCH_SUPPORT_PSCI
1423 select BOARD_LATE_INIT
1425 select CPU_V7_HAS_NONSEC
1426 select CPU_V7_HAS_VIRT
1430 Support for Freescale LS1021AIOT platform.
1431 The LS1021A Freescale board (IOT) is a high-performance
1432 development platform that supports the QorIQ LS1021A
1433 Layerscape Architecture processor.
1435 config TARGET_LS1043AQDS
1436 bool "Support ls1043aqds"
1439 select ARMV8_MULTIENTRY
1440 select ARCH_SUPPORT_TFABOOT
1441 select BOARD_EARLY_INIT_F
1442 select BOARD_LATE_INIT
1444 select FSL_DDR_INTERACTIVE if !SPL
1448 Support for Freescale LS1043AQDS platform.
1450 config TARGET_LS1043ARDB
1451 bool "Support ls1043ardb"
1454 select ARMV8_MULTIENTRY
1455 select ARCH_SUPPORT_TFABOOT
1456 select BOARD_EARLY_INIT_F
1457 select BOARD_LATE_INIT
1460 Support for Freescale LS1043ARDB platform.
1462 config TARGET_LS1046AQDS
1463 bool "Support ls1046aqds"
1466 select ARMV8_MULTIENTRY
1467 select ARCH_SUPPORT_TFABOOT
1468 select BOARD_EARLY_INIT_F
1469 select BOARD_LATE_INIT
1470 select DM_SPI_FLASH if DM_SPI
1472 select FSL_DDR_BIST if !SPL
1473 select FSL_DDR_INTERACTIVE if !SPL
1474 select FSL_DDR_INTERACTIVE if !SPL
1477 Support for Freescale LS1046AQDS platform.
1478 The LS1046A Development System (QDS) is a high-performance
1479 development platform that supports the QorIQ LS1046A
1480 Layerscape Architecture processor.
1482 config TARGET_LS1046ARDB
1483 bool "Support ls1046ardb"
1486 select ARMV8_MULTIENTRY
1487 select ARCH_SUPPORT_TFABOOT
1488 select BOARD_EARLY_INIT_F
1489 select BOARD_LATE_INIT
1490 select DM_SPI_FLASH if DM_SPI
1491 select POWER_MC34VR500
1494 select FSL_DDR_INTERACTIVE if !SPL
1497 Support for Freescale LS1046ARDB platform.
1498 The LS1046A Reference Design Board (RDB) is a high-performance
1499 development platform that supports the QorIQ LS1046A
1500 Layerscape Architecture processor.
1502 config TARGET_LS1046AFRWY
1503 bool "Support ls1046afrwy"
1506 select ARMV8_MULTIENTRY
1507 select ARCH_SUPPORT_TFABOOT
1508 select BOARD_EARLY_INIT_F
1509 select BOARD_LATE_INIT
1510 select DM_SPI_FLASH if DM_SPI
1513 Support for Freescale LS1046AFRWY platform.
1514 The LS1046A Freeway Board (FRWY) is a high-performance
1515 development platform that supports the QorIQ LS1046A
1516 Layerscape Architecture processor.
1518 config TARGET_COLIBRI_PXA270
1519 bool "Support colibri_pxa270"
1522 config ARCH_UNIPHIER
1523 bool "Socionext UniPhier SoCs"
1524 select BOARD_LATE_INIT
1532 select OF_BOARD_SETUP
1536 select SPL_BOARD_INIT if SPL
1537 select SPL_DM if SPL
1538 select SPL_LIBCOMMON_SUPPORT if SPL
1539 select SPL_LIBGENERIC_SUPPORT if SPL
1540 select SPL_OF_CONTROL if SPL
1541 select SPL_PINCTRL if SPL
1544 imply DISTRO_DEFAULTS
1547 Support for UniPhier SoC family developed by Socionext Inc.
1548 (formerly, System LSI Business Division of Panasonic Corporation)
1551 bool "Support STMicroelectronics STM32 MCU with cortex M"
1558 bool "Support STMicrolectronics SoCs"
1567 Support for STMicroelectronics STiH407/10 SoC family.
1568 This SoC is used on Linaro 96Board STiH410-B2260
1571 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1572 select ARCH_MISC_INIT
1573 select BOARD_LATE_INIT
1582 select OF_SYSTEM_SETUP
1588 select SYS_THUMB_BUILD
1592 imply OF_LIBFDT_OVERLAY
1593 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1596 Support for STM32MP SoC family developed by STMicroelectronics,
1597 MPUs based on ARM cortex A core
1598 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1599 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1601 SPL is the unsecure FSBL for the basic boot chain.
1603 config ARCH_ROCKCHIP
1604 bool "Support Rockchip SoCs"
1615 select DM_USB if USB
1616 select ENABLE_ARM_SOC_BOOT0_HOOK
1619 select SPL_DM if SPL
1621 select SYS_THUMB_BUILD if !ARM64
1624 imply DEBUG_UART_BOARD_INIT
1625 imply DISTRO_DEFAULTS
1627 imply SARADC_ROCKCHIP
1629 imply SPL_SYS_MALLOC_SIMPLE
1632 imply USB_FUNCTION_FASTBOOT
1634 config TARGET_THUNDERX_88XX
1635 bool "Support ThunderX 88xx"
1639 select SYS_CACHE_SHIFT_7
1642 bool "Support Aspeed SoCs"
1647 config TARGET_DURIAN
1648 bool "Support Phytium Durian Platform"
1651 Support for durian platform.
1652 It has 2GB Sdram, uart and pcie.
1656 config ARCH_SUPPORT_TFABOOT
1660 bool "Support for booting from TF-A"
1661 depends on ARCH_SUPPORT_TFABOOT
1664 Enabling this will make a U-Boot binary that is capable of being
1665 booted via TF-A (Trusted Firmware for Cortex-A).
1667 config TI_SECURE_DEVICE
1668 bool "HS Device Type Support"
1669 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1671 If a high secure (HS) device type is being used, this config
1672 must be set. This option impacts various aspects of the
1673 build system (to create signed boot images that can be
1674 authenticated) and the code. See the doc/README.ti-secure
1675 file for further details.
1677 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1678 config ISW_ENTRY_ADDR
1679 hex "Address in memory or XIP address of bootloader entry point"
1680 default 0x402F4000 if AM43XX
1681 default 0x402F0400 if AM33XX
1682 default 0x40301350 if OMAP54XX
1684 After any reset, the boot ROM searches the boot media for a valid
1685 boot image. For non-XIP devices, the ROM then copies the image into
1686 internal memory. For all boot modes, after the ROM processes the
1687 boot image it eventually computes the entry point address depending
1688 on the device type (secure/non-secure), boot media (xip/non-xip) and
1692 source "arch/arm/mach-aspeed/Kconfig"
1694 source "arch/arm/mach-at91/Kconfig"
1696 source "arch/arm/mach-bcm283x/Kconfig"
1698 source "arch/arm/mach-bcmstb/Kconfig"
1700 source "arch/arm/mach-davinci/Kconfig"
1702 source "arch/arm/mach-exynos/Kconfig"
1704 source "arch/arm/mach-highbank/Kconfig"
1706 source "arch/arm/mach-integrator/Kconfig"
1708 source "arch/arm/mach-k3/Kconfig"
1710 source "arch/arm/mach-keystone/Kconfig"
1712 source "arch/arm/mach-kirkwood/Kconfig"
1714 source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1716 source "arch/arm/mach-mvebu/Kconfig"
1718 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1720 source "arch/arm/mach-imx/mx2/Kconfig"
1722 source "arch/arm/mach-imx/mx3/Kconfig"
1724 source "arch/arm/mach-imx/mx5/Kconfig"
1726 source "arch/arm/mach-imx/mx6/Kconfig"
1728 source "arch/arm/mach-imx/mx7/Kconfig"
1730 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1732 source "arch/arm/mach-imx/imx8/Kconfig"
1734 source "arch/arm/mach-imx/imx8m/Kconfig"
1736 source "arch/arm/mach-imx/mxs/Kconfig"
1738 source "arch/arm/mach-omap2/Kconfig"
1740 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1742 source "arch/arm/mach-orion5x/Kconfig"
1744 source "arch/arm/mach-owl/Kconfig"
1746 source "arch/arm/mach-rmobile/Kconfig"
1748 source "arch/arm/mach-meson/Kconfig"
1750 source "arch/arm/mach-mediatek/Kconfig"
1752 source "arch/arm/mach-qemu/Kconfig"
1754 source "arch/arm/mach-rockchip/Kconfig"
1756 source "arch/arm/mach-s5pc1xx/Kconfig"
1758 source "arch/arm/mach-snapdragon/Kconfig"
1760 source "arch/arm/mach-socfpga/Kconfig"
1762 source "arch/arm/mach-sti/Kconfig"
1764 source "arch/arm/mach-stm32/Kconfig"
1766 source "arch/arm/mach-stm32mp/Kconfig"
1768 source "arch/arm/mach-sunxi/Kconfig"
1770 source "arch/arm/mach-tegra/Kconfig"
1772 source "arch/arm/mach-uniphier/Kconfig"
1774 source "arch/arm/cpu/armv7/vf610/Kconfig"
1776 source "arch/arm/mach-zynq/Kconfig"
1778 source "arch/arm/mach-zynqmp/Kconfig"
1780 source "arch/arm/mach-versal/Kconfig"
1782 source "arch/arm/mach-zynqmp-r5/Kconfig"
1784 source "arch/arm/cpu/armv7/Kconfig"
1786 source "arch/arm/cpu/armv8/Kconfig"
1788 source "arch/arm/mach-imx/Kconfig"
1790 source "board/bosch/shc/Kconfig"
1791 source "board/bosch/guardian/Kconfig"
1792 source "board/CarMediaLab/flea3/Kconfig"
1793 source "board/Marvell/aspenite/Kconfig"
1794 source "board/Marvell/gplugd/Kconfig"
1795 source "board/armadeus/apf27/Kconfig"
1796 source "board/armltd/vexpress/Kconfig"
1797 source "board/armltd/vexpress64/Kconfig"
1798 source "board/broadcom/bcm23550_w1d/Kconfig"
1799 source "board/broadcom/bcm28155_ap/Kconfig"
1800 source "board/broadcom/bcm963158/Kconfig"
1801 source "board/broadcom/bcm968580xref/Kconfig"
1802 source "board/broadcom/bcmcygnus/Kconfig"
1803 source "board/broadcom/bcmnsp/Kconfig"
1804 source "board/broadcom/bcmns2/Kconfig"
1805 source "board/cavium/thunderx/Kconfig"
1806 source "board/cirrus/edb93xx/Kconfig"
1807 source "board/eets/pdu001/Kconfig"
1808 source "board/emulation/qemu-arm/Kconfig"
1809 source "board/freescale/ls2080a/Kconfig"
1810 source "board/freescale/ls2080aqds/Kconfig"
1811 source "board/freescale/ls2080ardb/Kconfig"
1812 source "board/freescale/ls1088a/Kconfig"
1813 source "board/freescale/ls1028a/Kconfig"
1814 source "board/freescale/ls1021aqds/Kconfig"
1815 source "board/freescale/ls1043aqds/Kconfig"
1816 source "board/freescale/ls1021atwr/Kconfig"
1817 source "board/freescale/ls1021atsn/Kconfig"
1818 source "board/freescale/ls1021aiot/Kconfig"
1819 source "board/freescale/ls1046aqds/Kconfig"
1820 source "board/freescale/ls1043ardb/Kconfig"
1821 source "board/freescale/ls1046ardb/Kconfig"
1822 source "board/freescale/ls1046afrwy/Kconfig"
1823 source "board/freescale/ls1012aqds/Kconfig"
1824 source "board/freescale/ls1012ardb/Kconfig"
1825 source "board/freescale/ls1012afrdm/Kconfig"
1826 source "board/freescale/lx2160a/Kconfig"
1827 source "board/freescale/mx35pdk/Kconfig"
1828 source "board/freescale/s32v234evb/Kconfig"
1829 source "board/grinn/chiliboard/Kconfig"
1830 source "board/gumstix/pepper/Kconfig"
1831 source "board/hisilicon/hikey/Kconfig"
1832 source "board/hisilicon/hikey960/Kconfig"
1833 source "board/hisilicon/poplar/Kconfig"
1834 source "board/isee/igep003x/Kconfig"
1835 source "board/phytec/pcm051/Kconfig"
1836 source "board/silica/pengwyn/Kconfig"
1837 source "board/spear/spear300/Kconfig"
1838 source "board/spear/spear310/Kconfig"
1839 source "board/spear/spear320/Kconfig"
1840 source "board/spear/spear600/Kconfig"
1841 source "board/spear/x600/Kconfig"
1842 source "board/st/stv0991/Kconfig"
1843 source "board/tcl/sl50/Kconfig"
1844 source "board/ucRobotics/bubblegum_96/Kconfig"
1845 source "board/birdland/bav335x/Kconfig"
1846 source "board/toradex/colibri_pxa270/Kconfig"
1847 source "board/variscite/dart_6ul/Kconfig"
1848 source "board/vscom/baltos/Kconfig"
1849 source "board/woodburn/Kconfig"
1850 source "board/xilinx/Kconfig"
1851 source "board/xilinx/zynq/Kconfig"
1852 source "board/xilinx/zynqmp/Kconfig"
1853 source "board/phytium/durian/Kconfig"
1855 source "arch/arm/Kconfig.debug"
1860 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1861 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1862 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64