1 menu "ARM architecture"
10 select SYS_CACHE_SHIFT_6
13 config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed
19 from almost any address. This logic relies on the relocation
20 information that is embedded into the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
23 config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
26 U-Boot typically uses a hard-coded value for the stack pointer
27 before relocation. Enable this option to instead calculate the
28 initial SP at run-time. This is useful to avoid hard-coding addresses
29 into U-Boot, so that can be loaded and executed at arbitrary
30 addresses and thus avoid using arbitrary addresses at runtime.
32 If this option is enabled, the early stack pointer is set to
33 &_bss_start with a offset value added. The offset is specified by
34 SYS_INIT_SP_BSS_OFFSET.
36 config SYS_INIT_SP_BSS_OFFSET
37 int "Early stack offset from the .bss base address"
38 depends on INIT_SP_RELATIVE
41 This option's value is the offset added to &_bss_start in order to
42 calculate the stack pointer. This offset should be large enough so
43 that the early malloc region, global data (gd), and early stack usage
44 do not overlap any appended DTB.
46 config LINUX_KERNEL_IMAGE_HEADER
49 Place a Linux kernel image header at the start of the U-Boot binary.
50 The format of the header is described in the Linux kernel source at
51 Documentation/arm64/booting.txt. This feature is useful since the
52 image header reports the amount of memory (BSS and similar) that
53 U-Boot needs to use, but which isn't part of the binary.
55 if LINUX_KERNEL_IMAGE_HEADER
56 config LNX_KRNL_IMG_TEXT_OFFSET_BASE
59 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
60 TEXT_OFFSET value written in to the Linux kernel image header.
66 default y if ARM64 && !POSITION_INDEPENDENT
68 config DMA_ADDR_T_64BIT
78 # Used for compatibility with asm files copied from the kernel
79 config ARM_ASM_UNIFIED
83 # Used for compatibility with asm files copied from the kernel
88 bool "Do not enable icache"
91 Do not enable instruction cache in U-Boot.
93 config SPL_SYS_ICACHE_OFF
94 bool "Do not enable icache in SPL"
96 default SYS_ICACHE_OFF
98 Do not enable instruction cache in SPL.
100 config SYS_DCACHE_OFF
101 bool "Do not enable dcache"
104 Do not enable data cache in U-Boot.
106 config SPL_SYS_DCACHE_OFF
107 bool "Do not enable dcache in SPL"
109 default SYS_DCACHE_OFF
111 Do not enable data cache in SPL.
113 config SYS_ARM_CACHE_CP15
114 bool "CP15 based cache enabling support"
116 Select this if your processor suports enabling caches by using
120 bool "MMU-based Paged Memory Management Support"
121 select SYS_ARM_CACHE_CP15
123 Select if you want MMU-based virtualised addressing space
124 support by paged memory management.
127 bool 'Use the ARM v7 PMSA Compliant MPU'
129 Some ARM systems without an MMU have instead a Memory Protection
130 Unit (MPU) that defines the type and permissions for regions of
132 If your CPU has an MPU then you should choose 'y' here unless you
133 know that you do not want to use the MPU.
135 # If set, the workarounds for these ARM errata are applied early during U-Boot
136 # startup. Note that in general these options force the workarounds to be
137 # applied; no CPU-type/version detection exists, unlike the similar options in
138 # the Linux kernel. Do not set these options unless they apply! Also note that
139 # the following can be machine specific errata. These do have ability to
140 # provide rudimentary version and machine specific checks, but expect no
142 # CONFIG_ARM_ERRATA_430973
143 # CONFIG_ARM_ERRATA_454179
144 # CONFIG_ARM_ERRATA_621766
145 # CONFIG_ARM_ERRATA_798870
146 # CONFIG_ARM_ERRATA_801819
147 # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
148 # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
150 config ARM_ERRATA_430973
153 config ARM_ERRATA_454179
156 config ARM_ERRATA_621766
159 config ARM_ERRATA_716044
162 config ARM_ERRATA_725233
165 config ARM_ERRATA_742230
168 config ARM_ERRATA_743622
171 config ARM_ERRATA_751472
174 config ARM_ERRATA_761320
177 config ARM_ERRATA_773022
180 config ARM_ERRATA_774769
183 config ARM_ERRATA_794072
186 config ARM_ERRATA_798870
189 config ARM_ERRATA_801819
192 config ARM_ERRATA_826974
195 config ARM_ERRATA_828024
198 config ARM_ERRATA_829520
201 config ARM_ERRATA_833069
204 config ARM_ERRATA_833471
207 config ARM_ERRATA_845369
210 config ARM_ERRATA_852421
213 config ARM_ERRATA_852423
216 config ARM_ERRATA_855873
219 config ARM_CORTEX_A8_CVE_2017_5715
222 config ARM_CORTEX_A15_CVE_2017_5715
227 select SYS_CACHE_SHIFT_5
232 select SYS_CACHE_SHIFT_5
237 select SYS_CACHE_SHIFT_5
242 select SYS_CACHE_SHIFT_5
247 select SYS_CACHE_SHIFT_5
253 select SYS_CACHE_SHIFT_5
260 select SYS_CACHE_SHIFT_6
267 select SYS_CACHE_SHIFT_5
268 select SYS_THUMB_BUILD
274 select SYS_ARM_CACHE_CP15
276 select SYS_CACHE_SHIFT_6
280 select SYS_CACHE_SHIFT_5
285 select SYS_CACHE_SHIFT_5
289 default "arm720t" if CPU_ARM720T
290 default "arm920t" if CPU_ARM920T
291 default "arm926ejs" if CPU_ARM926EJS
292 default "arm946es" if CPU_ARM946ES
293 default "arm1136" if CPU_ARM1136
294 default "arm1176" if CPU_ARM1176
295 default "armv7" if CPU_V7A
296 default "armv7" if CPU_V7R
297 default "armv7m" if CPU_V7M
298 default "pxa" if CPU_PXA
299 default "sa1100" if CPU_SA1100
300 default "armv8" if ARM64
304 default 4 if CPU_ARM720T
305 default 4 if CPU_ARM920T
306 default 5 if CPU_ARM926EJS
307 default 5 if CPU_ARM946ES
308 default 6 if CPU_ARM1136
309 default 6 if CPU_ARM1176
314 default 4 if CPU_SA1100
317 config SYS_CACHE_SHIFT_5
320 config SYS_CACHE_SHIFT_6
323 config SYS_CACHE_SHIFT_7
326 config SYS_CACHELINE_SIZE
328 default 128 if SYS_CACHE_SHIFT_7
329 default 64 if SYS_CACHE_SHIFT_6
330 default 32 if SYS_CACHE_SHIFT_5
333 bool "Enable ARCH_CPU_INIT"
335 Some architectures require a call to arch_cpu_init()
336 Say Y here to enable it
338 config SYS_ARCH_TIMER
339 bool "ARM Generic Timer support"
340 depends on CPU_V7A || ARM64
343 The ARM Generic Timer (aka arch-timer) provides an architected
344 interface to a timer source on an SoC.
345 It is mandantory for ARMv8 implementation and widely available
349 bool "Support for ARM SMC Calling Convention (SMCCC)"
350 depends on CPU_V7A || ARM64
353 Say Y here if you want to enable ARM SMC Calling Convention.
354 This should be enabled if U-Boot needs to communicate with system
355 firmware (for example, PSCI) according to SMCCC.
358 bool "support boot from semihosting"
360 In emulated environments, semihosting is a way for
361 the hosted environment to call out to the emulator to
362 retrieve files from the host machine.
364 config SYS_THUMB_BUILD
365 bool "Build U-Boot using the Thumb instruction set"
368 Use this flag to build U-Boot using the Thumb instruction set for
369 ARM architectures. Thumb instruction set provides better code
370 density. For ARM architectures that support Thumb2 this flag will
371 result in Thumb2 code generated by GCC.
373 config SPL_SYS_THUMB_BUILD
374 bool "Build SPL using the Thumb instruction set"
375 default y if SYS_THUMB_BUILD
376 depends on !ARM64 && SPL
378 Use this flag to build SPL using the Thumb instruction set for
379 ARM architectures. Thumb instruction set provides better code
380 density. For ARM architectures that support Thumb2 this flag will
381 result in Thumb2 code generated by GCC.
383 config TPL_SYS_THUMB_BUILD
384 bool "Build TPL using the Thumb instruction set"
385 default y if SYS_THUMB_BUILD
386 depends on TPL && !ARM64
388 Use this flag to build SPL using the Thumb instruction set for
389 ARM architectures. Thumb instruction set provides better code
390 density. For ARM architectures that support Thumb2 this flag will
391 result in Thumb2 code generated by GCC.
394 config SYS_L2CACHE_OFF
397 If SoC does not support L2CACHE or one do not want to enable
398 L2CACHE, choose this option.
400 config ENABLE_ARM_SOC_BOOT0_HOOK
401 bool "prepare BOOT0 header"
403 If the SoC's BOOT0 requires a header area filled with (magic)
404 values, then choose this option, and create a file included as
405 <asm/arch/boot0.h> which contains the required assembler code.
407 config ARM_CORTEX_CPU_IS_UP
411 config USE_ARCH_MEMCPY
412 bool "Use an assembly optimized implementation of memcpy"
416 Enable the generation of an optimized version of memcpy.
417 Such implementation may be faster under some conditions
418 but may increase the binary size.
420 config SPL_USE_ARCH_MEMCPY
421 bool "Use an assembly optimized implementation of memcpy for SPL"
422 default y if USE_ARCH_MEMCPY
423 depends on !ARM64 && SPL
425 Enable the generation of an optimized version of memcpy.
426 Such implementation may be faster under some conditions
427 but may increase the binary size.
429 config TPL_USE_ARCH_MEMCPY
430 bool "Use an assembly optimized implementation of memcpy for TPL"
431 default y if USE_ARCH_MEMCPY
432 depends on !ARM64 && TPL
434 Enable the generation of an optimized version of memcpy.
435 Such implementation may be faster under some conditions
436 but may increase the binary size.
438 config USE_ARCH_MEMSET
439 bool "Use an assembly optimized implementation of memset"
443 Enable the generation of an optimized version of memset.
444 Such implementation may be faster under some conditions
445 but may increase the binary size.
447 config SPL_USE_ARCH_MEMSET
448 bool "Use an assembly optimized implementation of memset for SPL"
449 default y if USE_ARCH_MEMSET
450 depends on !ARM64 && SPL
452 Enable the generation of an optimized version of memset.
453 Such implementation may be faster under some conditions
454 but may increase the binary size.
456 config TPL_USE_ARCH_MEMSET
457 bool "Use an assembly optimized implementation of memset for TPL"
458 default y if USE_ARCH_MEMSET
459 depends on !ARM64 && TPL
461 Enable the generation of an optimized version of memset.
462 Such implementation may be faster under some conditions
463 but may increase the binary size.
465 config SET_STACK_SIZE
466 bool "Enable an option to set max stack size that can be used"
467 default y if ARCH_VERSAL
469 This will enable an option to set max stack size that can be
473 hex "Define max stack size that can be used by u-boot"
474 depends on SET_STACK_SIZE
475 default 0x4000000 if ARCH_VERSAL
477 Defines Max stack size that can be used by u-boot so that the
478 initrd_high will be calculated as base stack pointer minus this
481 config ARM64_SUPPORT_AARCH32
482 bool "ARM64 system support AArch32 execution state"
484 default y if !TARGET_THUNDERX_88XX
486 This ARM64 system supports AArch32 execution state.
489 prompt "Target select"
494 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
496 config TARGET_EDB93XX
497 bool "Support edb93xx"
501 config TARGET_ASPENITE
502 bool "Support aspenite"
506 bool "Support gplugd"
514 Support for TI's DaVinci platform.
517 bool "Marvell Kirkwood"
518 select ARCH_MISC_INIT
519 select BOARD_EARLY_INIT_F
523 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
543 config TARGET_SPEAR300
544 bool "Support spear300"
545 select BOARD_EARLY_INIT_F
550 config TARGET_SPEAR310
551 bool "Support spear310"
552 select BOARD_EARLY_INIT_F
557 config TARGET_SPEAR320
558 bool "Support spear320"
559 select BOARD_EARLY_INIT_F
564 config TARGET_SPEAR600
565 bool "Support spear600"
566 select BOARD_EARLY_INIT_F
571 config TARGET_STV0991
572 bool "Support stv0991"
585 select BOARD_LATE_INIT
590 config TARGET_WOODBURN
591 bool "Support woodburn"
594 config TARGET_WOODBURN_SD
595 bool "Support woodburn_sd"
603 config TARGET_MX35PDK
604 bool "Support mx35pdk"
605 select BOARD_LATE_INIT
609 bool "Broadcom BCM283X family"
615 select SERIAL_SEARCH_ALL
620 bool "Broadcom BCM63158 family"
626 bool "Broadcom BCM6858 family"
631 config TARGET_VEXPRESS_CA15_TC2
632 bool "Support vexpress_ca15_tc2"
634 select CPU_V7_HAS_NONSEC
635 select CPU_V7_HAS_VIRT
639 bool "Broadcom BCM7XXX family"
643 select OF_PRIOR_STAGE
646 This enables support for Broadcom ARM-based set-top box
647 chipsets, including the 7445 family of chips.
649 config TARGET_VEXPRESS_CA5X2
650 bool "Support vexpress_ca5x2"
654 config TARGET_VEXPRESS_CA9X4
655 bool "Support vexpress_ca9x4"
659 config TARGET_BCM23550_W1D
660 bool "Support bcm23550_w1d"
665 config TARGET_BCM28155_AP
666 bool "Support bcm28155_ap"
671 config TARGET_BCMCYGNUS
672 bool "Support bcmcygnus"
675 imply BCM_SF2_ETH_GMAC
683 bool "Support bcmnsp"
687 bool "Support Broadcom Northstar2"
690 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
691 ARMv8 Cortex-A57 processors targeting a broad range of networking
695 bool "Samsung EXYNOS"
704 imply SYS_THUMB_BUILD
709 bool "Samsung S5PC1XX"
718 bool "Calxeda Highbank"
722 config ARCH_INTEGRATOR
723 bool "ARM Ltd. Integrator family"
734 select SYS_ARCH_TIMER
735 select SYS_THUMB_BUILD
741 bool "Texas Instruments' K3 Architecture"
746 config ARCH_OMAP2PLUS
749 select SPL_BOARD_INIT if SPL
750 select SPL_STACK_R if SPL
756 imply DISTRO_DEFAULTS
758 Support for the Meson SoC family developed by Amlogic Inc.,
759 targeted at media players and tablet computers. We currently
760 support the S905 (GXBaby) 64-bit SoC.
768 select SPL_LIBCOMMON_SUPPORT if SPL
769 select SPL_LIBGENERIC_SUPPORT if SPL
770 select SPL_OF_CONTROL if SPL
773 Support for the MediaTek SoCs family developed by MediaTek Inc.
774 Please refer to doc/README.mediatek for more information.
777 bool "NXP LPC32xx platform"
787 bool "NXP i.MX8 platform"
793 bool "NXP i.MX8M platform"
800 bool "NXP i.MX23 family"
811 bool "NXP i.MX28 family"
817 bool "NXP i.MX31 family"
823 select ROM_UNIFIED_SECTIONS
828 select ARCH_MISC_INIT
829 select BOARD_EARLY_INIT_F
831 select SYS_FSL_HAS_SEC if SECURE_BOOT
832 select SYS_FSL_SEC_COMPAT_4
833 select SYS_FSL_SEC_LE
839 select SYS_FSL_HAS_SEC if SECURE_BOOT
840 select SYS_FSL_SEC_COMPAT_4
841 select SYS_FSL_SEC_LE
842 select SYS_THUMB_BUILD if SPL
847 default "arch/arm/mach-omap2/u-boot-spl.lds"
852 select BOARD_EARLY_INIT_F
857 bool "Actions Semi OWL SoCs"
865 bool "QEMU Virtual Platform"
866 select ARCH_SUPPORT_TFABOOT
876 bool "Renesas ARM SoCs"
877 select BOARD_EARLY_INIT_F if !RZA1
882 imply SYS_THUMB_BUILD
883 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
885 config TARGET_S32V234EVB
886 bool "Support s32v234evb"
888 select SYS_FSL_ERRATUM_ESDHC111
890 config ARCH_SNAPDRAGON
891 bool "Qualcomm Snapdragon SoCs"
904 bool "Altera SOCFPGA family"
905 select ARCH_EARLY_INIT_R
906 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
907 select ARM64 if TARGET_SOCFPGA_STRATIX10
908 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
911 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
913 select SPL_DM_RESET if DM_RESET
915 select SPL_LIBCOMMON_SUPPORT
916 select SPL_LIBGENERIC_SUPPORT
917 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
918 select SPL_OF_CONTROL
919 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
920 select SPL_SERIAL_SUPPORT
922 select SPL_WATCHDOG_SUPPORT
925 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
927 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
928 select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
937 imply SPL_LIBDISK_SUPPORT
938 imply SPL_MMC_SUPPORT
939 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
940 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
941 imply SPL_SPI_FLASH_SUPPORT
942 imply SPL_SPI_SUPPORT
946 bool "Support sunxi (Allwinner) SoCs"
949 select CMD_MMC if MMC
950 select CMD_USB if DISTRO_DEFAULTS
957 select DM_SCSI if SCSI
959 select DM_USB if DISTRO_DEFAULTS
960 select OF_BOARD_SETUP
963 select SPECIFY_CONSOLE_INDEX
964 select SPL_STACK_R if SPL
965 select SPL_SYS_MALLOC_SIMPLE if SPL
966 select SPL_SYS_THUMB_BUILD if !ARM64
969 select SYS_THUMB_BUILD if !ARM64
970 select USB if DISTRO_DEFAULTS
971 select USB_KEYBOARD if DISTRO_DEFAULTS
972 select USB_STORAGE if DISTRO_DEFAULTS
973 select USE_TINY_PRINTF
976 imply CMD_UBI if NAND
977 imply DISTRO_DEFAULTS
980 imply OF_LIBFDT_OVERLAY
981 imply PRE_CONSOLE_BUFFER
982 imply SPL_GPIO_SUPPORT
983 imply SPL_LIBCOMMON_SUPPORT
984 imply SPL_LIBGENERIC_SUPPORT
985 imply SPL_MMC_SUPPORT if MMC
986 imply SPL_POWER_SUPPORT
987 imply SPL_SERIAL_SUPPORT
991 bool "Support Xilinx Versal Platform"
999 imply BOARD_LATE_INIT
1002 bool "Freescale Vybrid"
1004 select SYS_FSL_ERRATUM_ESDHC111
1009 bool "Xilinx Zynq based platform"
1010 select BOARD_EARLY_INIT_F if WDT
1015 select DM_ETH if NET
1016 select DM_MMC if MMC
1020 select DM_USB if USB
1023 select SPL_BOARD_INIT if SPL
1024 select SPL_CLK if SPL
1025 select SPL_DM if SPL
1026 select SPL_OF_CONTROL if SPL
1027 select SPL_SEPARATE_BSS if SPL
1029 imply ARCH_EARLY_INIT_R
1030 imply BOARD_LATE_INIT
1036 config ARCH_ZYNQMP_R5
1037 bool "Xilinx ZynqMP R5 based platform"
1041 select DM_ETH if NET
1042 select DM_MMC if MMC
1049 bool "Xilinx ZynqMP based platform"
1053 select DM_ETH if NET
1054 select DM_MMC if MMC
1056 select DM_SPI if SPI
1057 select DM_SPI_FLASH if DM_SPI
1058 select DM_USB if USB
1060 select SPL_BOARD_INIT if SPL
1061 select SPL_CLK if SPL
1062 select SPL_SEPARATE_BSS if SPL
1064 imply BOARD_LATE_INIT
1072 imply DISTRO_DEFAULTS
1075 config TARGET_VEXPRESS64_AEMV8A
1076 bool "Support vexpress_aemv8a"
1080 config TARGET_VEXPRESS64_BASE_FVP
1081 bool "Support Versatile Express ARMv8a FVP BASE model"
1086 config TARGET_VEXPRESS64_JUNO
1087 bool "Support Versatile Express Juno Development Platform"
1091 config TARGET_LS2080A_EMU
1092 bool "Support ls2080a_emu"
1094 select ARCH_MISC_INIT
1096 select ARMV8_MULTIENTRY
1097 select FSL_DDR_SYNC_REFRESH
1099 Support for Freescale LS2080A_EMU platform
1100 The LS2080A Development System (EMULATOR) is a pre silicon
1101 development platform that supports the QorIQ LS2080A
1102 Layerscape Architecture processor.
1104 config TARGET_LS2080A_SIMU
1105 bool "Support ls2080a_simu"
1107 select ARCH_MISC_INIT
1109 select ARMV8_MULTIENTRY
1110 select BOARD_LATE_INIT
1112 Support for Freescale LS2080A_SIMU platform
1113 The LS2080A Development System (QDS) is a pre silicon
1114 development platform that supports the QorIQ LS2080A
1115 Layerscape Architecture processor.
1117 config TARGET_LS1088AQDS
1118 bool "Support ls1088aqds"
1120 select ARCH_MISC_INIT
1122 select ARMV8_MULTIENTRY
1123 select ARCH_SUPPORT_TFABOOT
1124 select BOARD_LATE_INIT
1126 select FSL_DDR_INTERACTIVE if !SD_BOOT
1128 Support for NXP LS1088AQDS platform
1129 The LS1088A Development System (QDS) is a high-performance
1130 development platform that supports the QorIQ LS1088A
1131 Layerscape Architecture processor.
1133 config TARGET_LS2080AQDS
1134 bool "Support ls2080aqds"
1136 select ARCH_MISC_INIT
1138 select ARMV8_MULTIENTRY
1139 select ARCH_SUPPORT_TFABOOT
1140 select BOARD_LATE_INIT
1145 select FSL_DDR_INTERACTIVE if !SPL
1147 Support for Freescale LS2080AQDS platform
1148 The LS2080A Development System (QDS) is a high-performance
1149 development platform that supports the QorIQ LS2080A
1150 Layerscape Architecture processor.
1152 config TARGET_LS2080ARDB
1153 bool "Support ls2080ardb"
1155 select ARCH_MISC_INIT
1157 select ARMV8_MULTIENTRY
1158 select ARCH_SUPPORT_TFABOOT
1159 select BOARD_LATE_INIT
1162 select FSL_DDR_INTERACTIVE if !SPL
1166 Support for Freescale LS2080ARDB platform.
1167 The LS2080A Reference design board (RDB) is a high-performance
1168 development platform that supports the QorIQ LS2080A
1169 Layerscape Architecture processor.
1171 config TARGET_LS2081ARDB
1172 bool "Support ls2081ardb"
1174 select ARCH_MISC_INIT
1176 select ARMV8_MULTIENTRY
1177 select BOARD_LATE_INIT
1180 Support for Freescale LS2081ARDB platform.
1181 The LS2081A Reference design board (RDB) is a high-performance
1182 development platform that supports the QorIQ LS2081A/LS2041A
1183 Layerscape Architecture processor.
1185 config TARGET_LX2160ARDB
1186 bool "Support lx2160ardb"
1188 select ARCH_MISC_INIT
1190 select ARMV8_MULTIENTRY
1191 select ARCH_SUPPORT_TFABOOT
1192 select BOARD_LATE_INIT
1194 Support for NXP LX2160ARDB platform.
1195 The lx2160ardb (LX2160A Reference design board (RDB)
1196 is a high-performance development platform that supports the
1197 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1199 config TARGET_LX2160AQDS
1200 bool "Support lx2160aqds"
1202 select ARCH_MISC_INIT
1204 select ARMV8_MULTIENTRY
1205 select ARCH_SUPPORT_TFABOOT
1206 select BOARD_LATE_INIT
1208 Support for NXP LX2160AQDS platform.
1209 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1210 is a high-performance development platform that supports the
1211 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1214 bool "Support HiKey 96boards Consumer Edition Platform"
1221 select SPECIFY_CONSOLE_INDEX
1224 Support for HiKey 96boards platform. It features a HI6220
1225 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1227 config TARGET_HIKEY960
1228 bool "Support HiKey960 96boards Consumer Edition Platform"
1236 Support for HiKey960 96boards platform. It features a HI3660
1237 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1239 config TARGET_POPLAR
1240 bool "Support Poplar 96boards Enterprise Edition Platform"
1249 Support for Poplar 96boards EE platform. It features a HI3798cv200
1250 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1251 making it capable of running any commercial set-top solution based on
1254 config TARGET_LS1012AQDS
1255 bool "Support ls1012aqds"
1258 select ARCH_SUPPORT_TFABOOT
1259 select BOARD_LATE_INIT
1261 Support for Freescale LS1012AQDS platform.
1262 The LS1012A Development System (QDS) is a high-performance
1263 development platform that supports the QorIQ LS1012A
1264 Layerscape Architecture processor.
1266 config TARGET_LS1012ARDB
1267 bool "Support ls1012ardb"
1270 select ARCH_SUPPORT_TFABOOT
1271 select BOARD_LATE_INIT
1275 Support for Freescale LS1012ARDB platform.
1276 The LS1012A Reference design board (RDB) is a high-performance
1277 development platform that supports the QorIQ LS1012A
1278 Layerscape Architecture processor.
1280 config TARGET_LS1012A2G5RDB
1281 bool "Support ls1012a2g5rdb"
1284 select ARCH_SUPPORT_TFABOOT
1285 select BOARD_LATE_INIT
1288 Support for Freescale LS1012A2G5RDB platform.
1289 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1290 development platform that supports the QorIQ LS1012A
1291 Layerscape Architecture processor.
1293 config TARGET_LS1012AFRWY
1294 bool "Support ls1012afrwy"
1297 select ARCH_SUPPORT_TFABOOT
1298 select BOARD_LATE_INIT
1302 Support for Freescale LS1012AFRWY platform.
1303 The LS1012A FRWY board (FRWY) is a high-performance
1304 development platform that supports the QorIQ LS1012A
1305 Layerscape Architecture processor.
1307 config TARGET_LS1012AFRDM
1308 bool "Support ls1012afrdm"
1311 select ARCH_SUPPORT_TFABOOT
1313 Support for Freescale LS1012AFRDM platform.
1314 The LS1012A Freedom board (FRDM) is a high-performance
1315 development platform that supports the QorIQ LS1012A
1316 Layerscape Architecture processor.
1318 config TARGET_LS1028AQDS
1319 bool "Support ls1028aqds"
1322 select ARMV8_MULTIENTRY
1323 select ARCH_SUPPORT_TFABOOT
1324 select BOARD_LATE_INIT
1325 select ARCH_MISC_INIT
1327 Support for Freescale LS1028AQDS platform
1328 The LS1028A Development System (QDS) is a high-performance
1329 development platform that supports the QorIQ LS1028A
1330 Layerscape Architecture processor.
1332 config TARGET_LS1028ARDB
1333 bool "Support ls1028ardb"
1336 select ARMV8_MULTIENTRY
1337 select ARCH_SUPPORT_TFABOOT
1339 Support for Freescale LS1028ARDB platform
1340 The LS1028A Development System (RDB) is a high-performance
1341 development platform that supports the QorIQ LS1028A
1342 Layerscape Architecture processor.
1344 config TARGET_LS1088ARDB
1345 bool "Support ls1088ardb"
1347 select ARCH_MISC_INIT
1349 select ARMV8_MULTIENTRY
1350 select ARCH_SUPPORT_TFABOOT
1351 select BOARD_LATE_INIT
1353 select FSL_DDR_INTERACTIVE if !SD_BOOT
1355 Support for NXP LS1088ARDB platform.
1356 The LS1088A Reference design board (RDB) is a high-performance
1357 development platform that supports the QorIQ LS1088A
1358 Layerscape Architecture processor.
1360 config TARGET_LS1021AQDS
1361 bool "Support ls1021aqds"
1363 select ARCH_SUPPORT_PSCI
1364 select BOARD_EARLY_INIT_F
1365 select BOARD_LATE_INIT
1367 select CPU_V7_HAS_NONSEC
1368 select CPU_V7_HAS_VIRT
1369 select LS1_DEEP_SLEEP
1372 select FSL_DDR_INTERACTIVE
1375 config TARGET_LS1021ATWR
1376 bool "Support ls1021atwr"
1378 select ARCH_SUPPORT_PSCI
1379 select BOARD_EARLY_INIT_F
1380 select BOARD_LATE_INIT
1382 select CPU_V7_HAS_NONSEC
1383 select CPU_V7_HAS_VIRT
1384 select LS1_DEEP_SLEEP
1388 config TARGET_LS1021ATSN
1389 bool "Support ls1021atsn"
1391 select ARCH_SUPPORT_PSCI
1392 select BOARD_EARLY_INIT_F
1393 select BOARD_LATE_INIT
1395 select CPU_V7_HAS_NONSEC
1396 select CPU_V7_HAS_VIRT
1397 select LS1_DEEP_SLEEP
1401 config TARGET_LS1021AIOT
1402 bool "Support ls1021aiot"
1404 select ARCH_SUPPORT_PSCI
1405 select BOARD_LATE_INIT
1407 select CPU_V7_HAS_NONSEC
1408 select CPU_V7_HAS_VIRT
1412 Support for Freescale LS1021AIOT platform.
1413 The LS1021A Freescale board (IOT) is a high-performance
1414 development platform that supports the QorIQ LS1021A
1415 Layerscape Architecture processor.
1417 config TARGET_LS1043AQDS
1418 bool "Support ls1043aqds"
1421 select ARMV8_MULTIENTRY
1422 select ARCH_SUPPORT_TFABOOT
1423 select BOARD_EARLY_INIT_F
1424 select BOARD_LATE_INIT
1426 select FSL_DDR_INTERACTIVE if !SPL
1430 Support for Freescale LS1043AQDS platform.
1432 config TARGET_LS1043ARDB
1433 bool "Support ls1043ardb"
1436 select ARMV8_MULTIENTRY
1437 select ARCH_SUPPORT_TFABOOT
1438 select BOARD_EARLY_INIT_F
1439 select BOARD_LATE_INIT
1442 Support for Freescale LS1043ARDB platform.
1444 config TARGET_LS1046AQDS
1445 bool "Support ls1046aqds"
1448 select ARMV8_MULTIENTRY
1449 select ARCH_SUPPORT_TFABOOT
1450 select BOARD_EARLY_INIT_F
1451 select BOARD_LATE_INIT
1452 select DM_SPI_FLASH if DM_SPI
1454 select FSL_DDR_BIST if !SPL
1455 select FSL_DDR_INTERACTIVE if !SPL
1456 select FSL_DDR_INTERACTIVE if !SPL
1459 Support for Freescale LS1046AQDS platform.
1460 The LS1046A Development System (QDS) is a high-performance
1461 development platform that supports the QorIQ LS1046A
1462 Layerscape Architecture processor.
1464 config TARGET_LS1046ARDB
1465 bool "Support ls1046ardb"
1468 select ARMV8_MULTIENTRY
1469 select ARCH_SUPPORT_TFABOOT
1470 select BOARD_EARLY_INIT_F
1471 select BOARD_LATE_INIT
1472 select DM_SPI_FLASH if DM_SPI
1473 select POWER_MC34VR500
1476 select FSL_DDR_INTERACTIVE if !SPL
1479 Support for Freescale LS1046ARDB platform.
1480 The LS1046A Reference Design Board (RDB) is a high-performance
1481 development platform that supports the QorIQ LS1046A
1482 Layerscape Architecture processor.
1484 config TARGET_LS1046AFRWY
1485 bool "Support ls1046afrwy"
1488 select ARMV8_MULTIENTRY
1489 select ARCH_SUPPORT_TFABOOT
1490 select BOARD_EARLY_INIT_F
1491 select BOARD_LATE_INIT
1492 select DM_SPI_FLASH if DM_SPI
1495 Support for Freescale LS1046AFRWY platform.
1496 The LS1046A Freeway Board (FRWY) is a high-performance
1497 development platform that supports the QorIQ LS1046A
1498 Layerscape Architecture processor.
1500 bool "Support h2200"
1503 config TARGET_COLIBRI_PXA270
1504 bool "Support colibri_pxa270"
1507 config ARCH_UNIPHIER
1508 bool "Socionext UniPhier SoCs"
1509 select BOARD_LATE_INIT
1517 select OF_BOARD_SETUP
1521 select SPL_BOARD_INIT if SPL
1522 select SPL_DM if SPL
1523 select SPL_LIBCOMMON_SUPPORT if SPL
1524 select SPL_LIBGENERIC_SUPPORT if SPL
1525 select SPL_OF_CONTROL if SPL
1526 select SPL_PINCTRL if SPL
1529 imply DISTRO_DEFAULTS
1532 Support for UniPhier SoC family developed by Socionext Inc.
1533 (formerly, System LSI Business Division of Panasonic Corporation)
1536 bool "Support STMicroelectronics STM32 MCU with cortex M"
1543 bool "Support STMicrolectronics SoCs"
1552 Support for STMicroelectronics STiH407/10 SoC family.
1553 This SoC is used on Linaro 96Board STiH410-B2260
1556 bool "Support STMicroelectronics STM32MP Socs with cortex A"
1557 select ARCH_MISC_INIT
1558 select BOARD_LATE_INIT
1567 select OF_SYSTEM_SETUP
1573 select SYS_THUMB_BUILD
1577 imply OF_LIBFDT_OVERLAY
1578 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
1581 Support for STM32MP SoC family developed by STMicroelectronics,
1582 MPUs based on ARM cortex A core
1583 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1584 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1586 SPL is the unsecure FSBL for the basic boot chain.
1588 config ARCH_ROCKCHIP
1589 bool "Support Rockchip SoCs"
1600 select DM_USB if USB
1601 select ENABLE_ARM_SOC_BOOT0_HOOK
1604 select SPL_DM if SPL
1605 select SPL_SYS_MALLOC_SIMPLE if SPL
1607 select SYS_THUMB_BUILD if !ARM64
1610 imply DEBUG_UART_BOARD_INIT
1611 imply DISTRO_DEFAULTS
1613 imply SARADC_ROCKCHIP
1617 imply USB_FUNCTION_FASTBOOT
1619 config TARGET_THUNDERX_88XX
1620 bool "Support ThunderX 88xx"
1624 select SYS_CACHE_SHIFT_7
1627 bool "Support Aspeed SoCs"
1634 config ARCH_SUPPORT_TFABOOT
1638 bool "Support for booting from TF-A"
1639 depends on ARCH_SUPPORT_TFABOOT
1642 Enabling this will make a U-Boot binary that is capable of being
1645 config TI_SECURE_DEVICE
1646 bool "HS Device Type Support"
1647 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
1649 If a high secure (HS) device type is being used, this config
1650 must be set. This option impacts various aspects of the
1651 build system (to create signed boot images that can be
1652 authenticated) and the code. See the doc/README.ti-secure
1653 file for further details.
1655 if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1656 config ISW_ENTRY_ADDR
1657 hex "Address in memory or XIP address of bootloader entry point"
1658 default 0x402F4000 if AM43XX
1659 default 0x402F0400 if AM33XX
1660 default 0x40301350 if OMAP54XX
1662 After any reset, the boot ROM searches the boot media for a valid
1663 boot image. For non-XIP devices, the ROM then copies the image into
1664 internal memory. For all boot modes, after the ROM processes the
1665 boot image it eventually computes the entry point address depending
1666 on the device type (secure/non-secure), boot media (xip/non-xip) and
1670 source "arch/arm/mach-aspeed/Kconfig"
1672 source "arch/arm/mach-at91/Kconfig"
1674 source "arch/arm/mach-bcm283x/Kconfig"
1676 source "arch/arm/mach-bcmstb/Kconfig"
1678 source "arch/arm/mach-davinci/Kconfig"
1680 source "arch/arm/mach-exynos/Kconfig"
1682 source "arch/arm/mach-highbank/Kconfig"
1684 source "arch/arm/mach-integrator/Kconfig"
1686 source "arch/arm/mach-k3/Kconfig"
1688 source "arch/arm/mach-keystone/Kconfig"
1690 source "arch/arm/mach-kirkwood/Kconfig"
1692 source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1694 source "arch/arm/mach-mvebu/Kconfig"
1696 source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1698 source "arch/arm/mach-imx/mx2/Kconfig"
1700 source "arch/arm/mach-imx/mx3/Kconfig"
1702 source "arch/arm/mach-imx/mx5/Kconfig"
1704 source "arch/arm/mach-imx/mx6/Kconfig"
1706 source "arch/arm/mach-imx/mx7/Kconfig"
1708 source "arch/arm/mach-imx/mx7ulp/Kconfig"
1710 source "arch/arm/mach-imx/imx8/Kconfig"
1712 source "arch/arm/mach-imx/imx8m/Kconfig"
1714 source "arch/arm/mach-imx/mxs/Kconfig"
1716 source "arch/arm/mach-omap2/Kconfig"
1718 source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1720 source "arch/arm/mach-orion5x/Kconfig"
1722 source "arch/arm/mach-owl/Kconfig"
1724 source "arch/arm/mach-rmobile/Kconfig"
1726 source "arch/arm/mach-meson/Kconfig"
1728 source "arch/arm/mach-mediatek/Kconfig"
1730 source "arch/arm/mach-qemu/Kconfig"
1732 source "arch/arm/mach-rockchip/Kconfig"
1734 source "arch/arm/mach-s5pc1xx/Kconfig"
1736 source "arch/arm/mach-snapdragon/Kconfig"
1738 source "arch/arm/mach-socfpga/Kconfig"
1740 source "arch/arm/mach-sti/Kconfig"
1742 source "arch/arm/mach-stm32/Kconfig"
1744 source "arch/arm/mach-stm32mp/Kconfig"
1746 source "arch/arm/mach-sunxi/Kconfig"
1748 source "arch/arm/mach-tegra/Kconfig"
1750 source "arch/arm/mach-uniphier/Kconfig"
1752 source "arch/arm/cpu/armv7/vf610/Kconfig"
1754 source "arch/arm/mach-zynq/Kconfig"
1756 source "arch/arm/mach-zynqmp/Kconfig"
1758 source "arch/arm/mach-versal/Kconfig"
1760 source "arch/arm/mach-zynqmp-r5/Kconfig"
1762 source "arch/arm/cpu/armv7/Kconfig"
1764 source "arch/arm/cpu/armv8/Kconfig"
1766 source "arch/arm/mach-imx/Kconfig"
1768 source "board/bosch/shc/Kconfig"
1769 source "board/bosch/guardian/Kconfig"
1770 source "board/CarMediaLab/flea3/Kconfig"
1771 source "board/Marvell/aspenite/Kconfig"
1772 source "board/Marvell/gplugd/Kconfig"
1773 source "board/armadeus/apf27/Kconfig"
1774 source "board/armltd/vexpress/Kconfig"
1775 source "board/armltd/vexpress64/Kconfig"
1776 source "board/broadcom/bcm23550_w1d/Kconfig"
1777 source "board/broadcom/bcm28155_ap/Kconfig"
1778 source "board/broadcom/bcm963158/Kconfig"
1779 source "board/broadcom/bcm968580xref/Kconfig"
1780 source "board/broadcom/bcmcygnus/Kconfig"
1781 source "board/broadcom/bcmnsp/Kconfig"
1782 source "board/broadcom/bcmns2/Kconfig"
1783 source "board/cavium/thunderx/Kconfig"
1784 source "board/cirrus/edb93xx/Kconfig"
1785 source "board/eets/pdu001/Kconfig"
1786 source "board/emulation/qemu-arm/Kconfig"
1787 source "board/freescale/ls2080a/Kconfig"
1788 source "board/freescale/ls2080aqds/Kconfig"
1789 source "board/freescale/ls2080ardb/Kconfig"
1790 source "board/freescale/ls1088a/Kconfig"
1791 source "board/freescale/ls1028a/Kconfig"
1792 source "board/freescale/ls1021aqds/Kconfig"
1793 source "board/freescale/ls1043aqds/Kconfig"
1794 source "board/freescale/ls1021atwr/Kconfig"
1795 source "board/freescale/ls1021atsn/Kconfig"
1796 source "board/freescale/ls1021aiot/Kconfig"
1797 source "board/freescale/ls1046aqds/Kconfig"
1798 source "board/freescale/ls1043ardb/Kconfig"
1799 source "board/freescale/ls1046ardb/Kconfig"
1800 source "board/freescale/ls1046afrwy/Kconfig"
1801 source "board/freescale/ls1012aqds/Kconfig"
1802 source "board/freescale/ls1012ardb/Kconfig"
1803 source "board/freescale/ls1012afrdm/Kconfig"
1804 source "board/freescale/lx2160a/Kconfig"
1805 source "board/freescale/mx35pdk/Kconfig"
1806 source "board/freescale/s32v234evb/Kconfig"
1807 source "board/grinn/chiliboard/Kconfig"
1808 source "board/gumstix/pepper/Kconfig"
1809 source "board/h2200/Kconfig"
1810 source "board/hisilicon/hikey/Kconfig"
1811 source "board/hisilicon/hikey960/Kconfig"
1812 source "board/hisilicon/poplar/Kconfig"
1813 source "board/isee/igep003x/Kconfig"
1814 source "board/phytec/pcm051/Kconfig"
1815 source "board/silica/pengwyn/Kconfig"
1816 source "board/spear/spear300/Kconfig"
1817 source "board/spear/spear310/Kconfig"
1818 source "board/spear/spear320/Kconfig"
1819 source "board/spear/spear600/Kconfig"
1820 source "board/spear/x600/Kconfig"
1821 source "board/st/stv0991/Kconfig"
1822 source "board/tcl/sl50/Kconfig"
1823 source "board/ucRobotics/bubblegum_96/Kconfig"
1824 source "board/birdland/bav335x/Kconfig"
1825 source "board/toradex/colibri_pxa270/Kconfig"
1826 source "board/variscite/dart_6ul/Kconfig"
1827 source "board/vscom/baltos/Kconfig"
1828 source "board/woodburn/Kconfig"
1829 source "board/xilinx/Kconfig"
1830 source "board/xilinx/zynq/Kconfig"
1831 source "board/xilinx/zynqmp/Kconfig"
1833 source "arch/arm/Kconfig.debug"
1838 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1839 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
1840 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64