target/linux/mediatek/patches-5.4/0005-dts-mt7622-add-gsw.patch

   1 --- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
   2 +++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
   3 @@ -53,6 +53,13 @@
   4                 };
   5         };
   6
   7 +       gsw: gsw@0 {
   8 +               compatible = "mediatek,mt753x";
   9 +               mediatek,ethsys = <&ethsys>;
  10 +               #address-cells = <1>;
  11 +               #size-cells = <0>;
  12 +       };
  13 +
  14         leds {
  15                 compatible = "gpio-leds";
  16
  17 @@ -146,6 +153,36 @@
  18         };
  19  };
  20
  21 +&gsw {
  22 +        mediatek,mdio = <&mdio>;
  23 +        mediatek,portmap = "wllll";
  24 +        mediatek,mdio_master_pinmux = <0>;
  25 +        reset-gpios = <&pio 54 0>;
  26 +        interrupt-parent = <&pio>;
  27 +        interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
  28 +        status = "okay";
  29 +
  30 +        port5: port@5 {
  31 +                compatible = "mediatek,mt753x-port";
  32 +                reg = <5>;
  33 +                phy-mode = "rgmii";
  34 +                fixed-link {
  35 +                        speed = <1000>;
  36 +                        full-duplex;
  37 +                };
  38 +        };
  39 +
  40 +        port6: port@6 {
  41 +                compatible = "mediatek,mt753x-port";
  42 +                reg = <6>;
  43 +                phy-mode = "sgmii";
  44 +                fixed-link {
  45 +                        speed = <2500>;
  46 +                        full-duplex;
  47 +                };
  48 +        };
  49 +};
  50 +
  51  &i2c1 {
  52         pinctrl-names = "default";
  53         pinctrl-0 = <&i2c1_pins>;
  54 --- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
  55 +++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
  56 @@ -1,7 +1,6 @@
  57  /*
  58 - * Copyright (c) 2017 MediaTek Inc.
  59 - * Author: Ming Huang <ming.huang@mediatek.com>
  60 - *        Sean Wang <sean.wang@mediatek.com>
  61 + * Copyright (c) 2018 MediaTek Inc.
  62 + * Author: Ryder Lee <ryder.lee@mediatek.com>
  63   *
  64   * SPDX-License-Identifier: (GPL-2.0 OR MIT)
  65   */
  66 @@ -14,8 +13,8 @@
  67  #include "mt6380.dtsi"
  68
  69  / {
  70 -       model = "MediaTek MT7622 RFB1 board";
  71 -       compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
  72 +       model = "MT7622_MT7531 RFB";
  73 +       compatible = "bananapi,bpi-r64", "mediatek,mt7622";
  74
  75         aliases {
  76                 serial0 = &uart0;
  77 @@ -23,7 +22,7 @@
  78
  79         chosen {
  80                 stdout-path = "serial0:115200n8";
  81 -               bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512";
  82 +               bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
  83         };
  84
  85         cpus {
  86 @@ -40,23 +39,45 @@
  87
  88         gpio-keys {
  89                 compatible = "gpio-keys";
  90 -               poll-interval = <100>;
  91
  92                 factory {
  93                         label = "factory";
  94                         linux,code = <BTN_0>;
  95 -                       gpios = <&pio 0 0>;
  96 +                       gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
  97                 };
  98
  99                 wps {
 100                         label = "wps";
 101                         linux,code = <KEY_WPS_BUTTON>;
 102 -                       gpios = <&pio 102 0>;
 103 +                       gpios = <&pio 102 GPIO_ACTIVE_HIGH>;
 104 +               };
 105 +       };
 106 +
 107 +       gsw: gsw@0 {
 108 +                compatible = "mediatek,mt753x";
 109 +                mediatek,ethsys = <&ethsys>;
 110 +                #address-cells = <1>;
 111 +                #size-cells = <0>;
 112 +        };
 113 +
 114 +       leds {
 115 +               compatible = "gpio-leds";
 116 +
 117 +               green {
 118 +                       label = "bpi-r64:pio:green";
 119 +                       gpios = <&pio 89 GPIO_ACTIVE_HIGH>;
 120 +                       default-state = "off";
 121 +               };
 122 +
 123 +               red {
 124 +                       label = "bpi-r64:pio:red";
 125 +                       gpios = <&pio 88 GPIO_ACTIVE_HIGH>;
 126 +                       default-state = "off";
 127                 };
 128         };
 129
 130         memory {
 131 -               reg = <0 0x40000000 0 0x20000000>;
 132 +               reg = <0 0x40000000 0 0x40000000>;
 133         };
 134
 135         reg_1p8v: regulator-1p8v {
 136 @@ -101,27 +122,67 @@
 137  };
 138
 139  &eth {
 140 -       pinctrl-names = "default";
 141 -       pinctrl-0 = <&eth_pins>;
 142         status = "okay";
 143 +       gmac0: mac@0 {
 144 +               compatible = "mediatek,eth-mac";
 145 +               reg = <0>;
 146 +               phy-mode = "2500base-x";
 147 +
 148 +               fixed-link {
 149 +                       speed = <2500>;
 150 +                       full-duplex;
 151 +                       pause;
 152 +               };
 153 +       };
 154
 155         gmac1: mac@1 {
 156                 compatible = "mediatek,eth-mac";
 157                 reg = <1>;
 158 -               phy-handle = <&phy5>;
 159 +               phy-mode = "rgmii";
 160 +
 161 +               fixed-link {
 162 +                       speed = <1000>;
 163 +                       full-duplex;
 164 +                       pause;
 165 +               };
 166         };
 167
 168 -       mdio-bus {
 169 +       mdio: mdio-bus {
 170                 #address-cells = <1>;
 171                 #size-cells = <0>;
 172 -
 173 -               phy5: ethernet-phy@5 {
 174 -                       reg = <5>;
 175 -                       phy-mode = "sgmii";
 176 -               };
 177         };
 178  };
 179
 180 +&gsw {
 181 +        mediatek,mdio = <&mdio>;
 182 +        mediatek,portmap = "llllw";
 183 +        mediatek,mdio_master_pinmux = <0>;
 184 +        reset-gpios = <&pio 54 0>;
 185 +        interrupt-parent = <&pio>;
 186 +        interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
 187 +        status = "okay";
 188 +
 189 +        port5: port@5 {
 190 +                compatible = "mediatek,mt753x-port";
 191 +                reg = <5>;
 192 +                phy-mode = "rgmii";
 193 +                fixed-link {
 194 +                        speed = <1000>;
 195 +                        full-duplex;
 196 +                };
 197 +        };
 198 +
 199 +        port6: port@6 {
 200 +                compatible = "mediatek,mt753x-port";
 201 +                reg = <6>;
 202 +                phy-mode = "sgmii";
 203 +                fixed-link {
 204 +                        speed = <2500>;
 205 +                        full-duplex;
 206 +                };
 207 +        };
 208 +};
 209 +
 210  &i2c1 {
 211         pinctrl-names = "default";
 212         pinctrl-0 = <&i2c1_pins>;
 213 @@ -185,15 +246,28 @@
 214
 215  &pcie {
 216         pinctrl-names = "default";
 217 -       pinctrl-0 = <&pcie0_pins>;
 218 +       pinctrl-0 = <&pcie0_pins>, <&pcie1_pins>;
 219         status = "okay";
 220
 221         pcie@0,0 {
 222                 status = "okay";
 223         };
 224 +
 225 +       pcie@1,0 {
 226 +               status = "okay";
 227 +       };
 228  };
 229
 230  &pio {
 231 +       /* Attention: GPIO 90 is used to switch between PCIe@1,0 and
 232 +        * SATA functions. i.e. output-high: PCIe, output-low: SATA
 233 +        */
 234 +       asm_sel {
 235 +               gpio-hog;
 236 +               gpios = <90 GPIO_ACTIVE_HIGH>;
 237 +               output-high;
 238 +       };
 239 +
 240         /* eMMC is shared pin with parallel NAND */
 241         emmc_pins_default: emmc-pins-default {
 242                 mux {
 243 @@ -460,11 +534,11 @@
 244  };
 245
 246  &sata {
 247 -       status = "okay";
 248 +       status = "disable";
 249  };
 250
 251  &sata_phy {
 252 -       status = "okay";
 253 +       status = "disable";
 254  };
 255
 256  &spi0 {