target/linux/brcm63xx/patches-4.19/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch

   1 From 4fd286c3e5a5bebab0391cf1937695b3ed6721a3 Mon Sep 17 00:00:00 2001
   2 From: Jonas Gorski <jogo@openwrt.org>
   3 Date: Sun, 30 Nov 2014 20:20:30 +0100
   4 Subject: [PATCH 4/5] MIPS: BCM63XX: wire up BCM6358's external interrupts 4
   5  and 5
   6
   7 Due to the external interrupts being non consecutive, the previous
   8 implementation did not support them. Now that we treat both registers
   9 as separate irq controllers, there is no such limitation anymore and
  10 we can expose them for drivers to use.
  11
  12 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
  13 ---
  14  arch/mips/bcm63xx/irq.c                           |    5 ++++-
  15  arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h  |    2 ++
  16  arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |    1 +
  17  3 files changed, 7 insertions(+), 1 deletion(-)
  18
  19 --- a/arch/mips/bcm63xx/irq.c
  20 +++ b/arch/mips/bcm63xx/irq.c
  21 @@ -108,11 +108,14 @@ void __init arch_init_irq(void)
  22                 periph_width = 1;
  23
  24                 ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358;
  25 -               ext_irq_count = 4;
  26 +               ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6358;
  27 +               ext_irq_count = 6;
  28                 ext_irqs[0] = BCM_6358_EXT_IRQ0;
  29                 ext_irqs[1] = BCM_6358_EXT_IRQ1;
  30                 ext_irqs[2] = BCM_6358_EXT_IRQ2;
  31                 ext_irqs[3] = BCM_6358_EXT_IRQ3;
  32 +               ext_irqs[4] = BCM_6358_EXT_IRQ4;
  33 +               ext_irqs[5] = BCM_6358_EXT_IRQ5;
  34                 ext_shift = 4;
  35                 break;
  36         case BCM6362_CPU_ID:
  37 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
  38 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
  39 @@ -896,6 +896,8 @@ enum bcm63xx_irq {
  40  #define BCM_6358_EXT_IRQ1              (IRQ_INTERNAL_BASE + 26)
  41  #define BCM_6358_EXT_IRQ2              (IRQ_INTERNAL_BASE + 27)
  42  #define BCM_6358_EXT_IRQ3              (IRQ_INTERNAL_BASE + 28)
  43 +#define BCM_6358_EXT_IRQ4              (IRQ_INTERNAL_BASE + 20)
  44 +#define BCM_6358_EXT_IRQ5              (IRQ_INTERNAL_BASE + 21)
  45
  46  /*
  47   * 6362 irqs
  48 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
  49 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
  50 @@ -244,6 +244,7 @@
  51  #define PERF_EXTIRQ_CFG_REG_6362       0x18
  52  #define PERF_EXTIRQ_CFG_REG_6368       0x18
  53
  54 +#define PERF_EXTIRQ_CFG_REG2_6358      0x1c
  55  #define PERF_EXTIRQ_CFG_REG2_6368      0x1c
  56
  57  /* for 6348 only */