target/linux/ath79/dts/qca9563_rosinson_wr818.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2 /dts-v1/;
   3
   4 #include <dt-bindings/gpio/gpio.h>
   5 #include <dt-bindings/input/input.h>
   6
   7 #include "qca956x.dtsi"
   8
   9 / {
  10         model = "ROSINSON WR818";
  11         compatible = "rosinson,wr818", "qca,qca9563";
  12
  13         aliases {
  14                 led-boot = &led_system;
  15                 led-failsafe = &led_system;
  16                 led-running = &led_system;
  17                 led-upgrade = &led_system;
  18         };
  19
  20         leds {
  21                 compatible = "gpio-leds";
  22
  23                 led_system: system {
  24                         label = "wr818:red:system";
  25                         gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
  26                 };
  27
  28                 wifi_2g {
  29                         label = "wr818:red:wifi2g";
  30                         gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
  31                         linux,default-trigger = "phy0tpt";
  32                 };
  33         };
  34
  35         keys {
  36                 compatible = "gpio-keys";
  37
  38                 reset {
  39                         label = "reset";
  40                         linux,code = <KEY_RESTART>;
  41                         gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
  42                         debounce-interval = <60>;
  43                 };
  44         };
  45 };
  46
  47 &uart {
  48         status = "okay";
  49 };
  50
  51 &gpio {
  52         status = "okay";
  53 };
  54
  55 &spi {
  56         status = "okay";
  57
  58         num-cs = <1>;
  59
  60         flash@0 {
  61                 compatible = "jedec,spi-nor";
  62                 reg = <0>;
  63                 spi-max-frequency = <25000000>;
  64
  65                 partitions {
  66                         compatible = "fixed-partitions";
  67                         #address-cells = <1>;
  68                         #size-cells = <1>;
  69
  70                         partition@0 {
  71                                 label = "u-boot";
  72                                 reg = <0x000000 0x040000>;
  73                                 read-only;
  74                         };
  75
  76                         partition@40000 {
  77                                 label = "u-boot-env";
  78                                 reg = <0x040000 0x010000>;
  79                                 read-only;
  80                         };
  81
  82                         info: partition@50000 {
  83                                 label = "factory";
  84                                 reg = <0x050000 0x010000>;
  85                                 read-only;
  86                         };
  87
  88                         partition@60000 {
  89                                 compatible = "denx,uimage";
  90                                 label = "firmware";
  91                                 reg = <0x060000 0xf80000>;
  92                         };
  93
  94                         art: partition@ff0000 {
  95                                 label = "art";
  96                                 reg = <0xff0000 0x010000>;
  97                                 read-only;
  98                         };
  99                 };
 100         };
 101 };
 102
 103 &mdio0 {
 104         status = "okay";
 105
 106         phy-mask = <0>;
 107         phy0: ethernet-phy@0 {
 108                 reg = <0>;
 109                 phy-mode = "sgmii";
 110
 111                 qca,ar8327-initvals = <
 112                         0x04 0x00080080 /* PORT0 PAD MODE CTRL */
 113                         0x7c 0x0000007e /* PORT0_STATUS */
 114                 >;
 115         };
 116 };
 117
 118 &eth0 {
 119         status = "okay";
 120
 121         mtd-mac-address = <&info 0x0>;
 122         phy-mode = "sgmii";
 123         phy-handle = <&phy0>;
 124 };
 125
 126 &wmac {
 127         status = "okay";
 128
 129         mtd-cal-data = <&art 0x1000>;
 130 };
 131
 132 &usb_phy0 {
 133         status = "okay";
 134 };
 135
 136 &usb0 {
 137         #address-cells = <1>;
 138         #size-cells = <0>;
 139         status = "okay";
 140
 141         port@1 {
 142                 reg = <1>;
 143                 #trigger-source-cells = <0>;
 144         };
 145 };
 146
 147 &usb_phy1 {
 148         status = "okay";
 149 };
 150
 151 &usb1 {
 152         #address-cells = <1>;
 153         #size-cells = <0>;
 154         status = "okay";
 155
 156         port@2 {
 157                 reg = <2>;
 158                 #trigger-source-cells = <0>;
 159         };
 160 };