ath79: drop and consolidate redundant chosen/bootargs
[oweals/openwrt.git] / target / linux / ath79 / dts / qca9563_dlink_dir-859-a1.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6
7 #include "qca956x.dtsi"
8
9 / {
10         model = "D-Link DIR-859 A1";
11         compatible = "dlink,dir-859-a1", "qca,qca9563";
12
13         aliases {
14                 led-boot = &led_power;
15                 led-failsafe = &led_power;
16                 led-running = &led_power;
17                 led-upgrade = &led_power;
18         };
19
20         leds {
21                 compatible = "gpio-leds";
22
23                 wps {
24                         label = "dir-859-a1:green:wps";
25                         gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
26                 };
27
28                 led_power: power {
29                         label = "dir-859-a1:green:power";
30                         gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
31                 };
32
33                 internet {
34                         label = "dir-859-a1:green:internet";
35                         gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
36                 };
37
38                 wlan {
39                         label = "dir-859-a1:green:wlan";
40                         gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
41                         linux,default-trigger = "phy0tpt";
42                 };
43         };
44
45         keys {
46                 compatible = "gpio-keys";
47
48                 wps {
49                         linux,code = <KEY_WPS_BUTTON>;
50                         gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
51                         debounce-interval = <60>;
52                 };
53
54                 reset {
55                         linux,code = <KEY_RESTART>;
56                         gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
57                         debounce-interval = <60>;
58                 };
59         };
60
61         gpio-export {
62                 compatible = "gpio-export";
63                 #size-cells = <0>;
64
65                 gpio_switch_reset {
66                         gpio-export,name = "dir-859-a1:reset:switch";
67                         gpio-export,output = <1>;
68                         gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
69                 };
70         };
71 };
72
73 &uart {
74         status = "okay";
75 };
76
77 &gpio {
78         status = "okay";
79 };
80
81 &pcie {
82         status = "okay";
83 };
84
85 &spi {
86         status = "okay";
87
88         num-cs = <1>;
89
90         flash@0 {
91                 compatible = "jedec,spi-nor";
92                 reg = <0>;
93                 spi-max-frequency = <30000000>;
94
95                 partitions {
96                         compatible = "fixed-partitions";
97                         #address-cells = <1>;
98                         #size-cells = <1>;
99
100                         partition@0 {
101                                 label = "bootloader";
102                                 reg = <0x000000 0x40000>;
103                                 read-only;
104                         };
105
106                         partition@40000 {
107                                 label = "bdcfg";
108                                 reg = <0x040000 0x10000>;
109                                 read-only;
110                         };
111
112                         partition@50000 {
113                                 label = "devdata";
114                                 reg = <0x050000 0x10000>;
115                                 read-only;
116                         };
117
118                         partition@60000 {
119                                 label = "devconf";
120                                 reg = <0x060000 0x10000>;
121                                 read-only;
122                         };
123
124                         partition@70000 {
125                                 compatible = "seama";
126                                 label = "firmware";
127                                 reg = <0x070000 0xf80000>;
128                         };
129
130                         art: partition@ff0000 {
131                                 label = "art";
132                                 reg = <0xff0000 0x010000>;
133                                 read-only;
134                         };
135                 };
136         };
137 };
138
139 &mdio0 {
140         status = "okay";
141
142         phy-mask = <0>;
143
144         phy0: ethernet-phy@0 {
145                 reg = <0>;
146                 phy-mode = "sgmii";
147                 qca,mib-poll-interval = <500>;
148
149                 qca,ar8327-initvals = <
150                         0x04 0x00080080 /* PORT0 PAD MODE CTRL */
151                         0x10 0x81000080 /* POWER_ON_STRIP */
152                         0x50 0xcc35cc35 /* LED_CTRL0 */
153                         0x54 0xcb37cb37 /* LED_CTRL1 */
154                         0x58 0x00000000 /* LED_CTRL2 */
155                         0x5c 0x00f3cf00 /* LED_CTRL3 */
156                         0x7c 0x0000007e /* PORT0_STATUS */
157                         >;
158         };
159 };
160
161 &eth0 {
162         status = "okay";
163
164         pll-data = <0x03000101 0x00000101 0x00001919>;
165
166         phy-mode = "sgmii";
167         phy-handle = <&phy0>;
168 };
169
170 &wmac {
171         status = "okay";
172
173         qca,no-eeprom;
174 };