8502bed4c528f4de319f6161a92aaaf7bac38f13
[oweals/openwrt.git] / target / linux / ath79 / dts / qca9563_dlink_dir-859-a1.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6
7 #include "qca956x.dtsi"
8
9 / {
10         model = "D-Link DIR-859 A1";
11         compatible = "dlink,dir-859-a1", "qca,qca9563";
12
13         aliases {
14                 led-boot = &led_power;
15                 led-failsafe = &led_power;
16                 led-running = &led_power;
17                 led-upgrade = &led_power;
18         };
19
20         chosen {
21                 bootargs = "console=ttyS0,115200n8";
22         };
23
24         leds {
25                 compatible = "gpio-leds";
26
27                 wps {
28                         label = "dir-859-a1:green:wps";
29                         gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
30                 };
31
32                 led_power: power {
33                         label = "dir-859-a1:green:power";
34                         gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
35                 };
36
37                 internet {
38                         label = "dir-859-a1:green:internet";
39                         gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
40                 };
41
42                 wlan {
43                         label = "dir-859-a1:green:wlan";
44                         gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
45                         linux,default-trigger = "phy0tpt";
46                 };
47         };
48
49         keys {
50                 compatible = "gpio-keys";
51
52                 wps {
53                         linux,code = <KEY_WPS_BUTTON>;
54                         gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
55                         debounce-interval = <60>;
56                 };
57
58                 reset {
59                         linux,code = <KEY_RESTART>;
60                         gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
61                         debounce-interval = <60>;
62                 };
63         };
64
65         gpio-export {
66                 compatible = "gpio-export";
67                 #size-cells = <0>;
68
69                 gpio_switch_reset {
70                         gpio-export,name = "dir-859-a1:reset:switch";
71                         gpio-export,output = <1>;
72                         gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
73                 };
74         };
75 };
76
77 &uart {
78         status = "okay";
79 };
80
81 &gpio {
82         status = "okay";
83 };
84
85 &pcie {
86         status = "okay";
87 };
88
89 &spi {
90         status = "okay";
91
92         num-cs = <1>;
93
94         flash@0 {
95                 compatible = "jedec,spi-nor";
96                 reg = <0>;
97                 spi-max-frequency = <30000000>;
98
99                 partitions {
100                         compatible = "fixed-partitions";
101                         #address-cells = <1>;
102                         #size-cells = <1>;
103
104                         partition@0 {
105                                 label = "bootloader";
106                                 reg = <0x000000 0x40000>;
107                                 read-only;
108                         };
109
110                         partition@40000 {
111                                 label = "bdcfg";
112                                 reg = <0x040000 0x10000>;
113                                 read-only;
114                         };
115
116                         partition@50000 {
117                                 label = "devdata";
118                                 reg = <0x050000 0x10000>;
119                                 read-only;
120                         };
121
122                         partition@60000 {
123                                 label = "devconf";
124                                 reg = <0x060000 0x10000>;
125                                 read-only;
126                         };
127
128                         partition@70000 {
129                                 compatible = "seama";
130                                 label = "firmware";
131                                 reg = <0x070000 0xf80000>;
132                         };
133
134                         art: partition@ff0000 {
135                                 label = "art";
136                                 reg = <0xff0000 0x010000>;
137                                 read-only;
138                         };
139                 };
140         };
141 };
142
143 &mdio0 {
144         status = "okay";
145
146         phy-mask = <0>;
147
148         phy0: ethernet-phy@0 {
149                 reg = <0>;
150                 phy-mode = "sgmii";
151                 qca,mib-poll-interval = <500>;
152
153                 qca,ar8327-initvals = <
154                         0x04 0x00080080 /* PORT0 PAD MODE CTRL */
155                         0x10 0x81000080 /* POWER_ON_STRIP */
156                         0x50 0xcc35cc35 /* LED_CTRL0 */
157                         0x54 0xcb37cb37 /* LED_CTRL1 */
158                         0x58 0x00000000 /* LED_CTRL2 */
159                         0x5c 0x00f3cf00 /* LED_CTRL3 */
160                         0x7c 0x0000007e /* PORT0_STATUS */
161                         >;
162         };
163 };
164
165 &eth0 {
166         status = "okay";
167
168         pll-data = <0x03000101 0x00000101 0x00001919>;
169
170         phy-mode = "sgmii";
171         phy-handle = <&phy0>;
172 };
173
174 &wmac {
175         status = "okay";
176
177         qca,no-eeprom;
178 };