ath79: drop and consolidate redundant chosen/bootargs
[oweals/openwrt.git] / target / linux / ath79 / dts / qca955x.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 #include <dt-bindings/clock/ath79-clk.h>
3 #include "ath79.dtsi"
4
5 / {
6         compatible = "qca,qca9550";
7
8         #address-cells = <1>;
9         #size-cells = <1>;
10
11         chosen {
12                 bootargs = "console=ttyS0,115200n8";
13         };
14
15         cpus {
16                 #address-cells = <1>;
17                 #size-cells = <0>;
18
19                 cpu@0 {
20                         device_type = "cpu";
21                         compatible = "mips,mips74Kc";
22                         clocks = <&pll ATH79_CLK_CPU>;
23                         reg = <0>;
24                 };
25         };
26
27         extosc: ref {
28                 compatible = "fixed-clock";
29                 #clock-cells = <0>;
30                 clock-output-names = "ref";
31                 clock-frequency = <40000000>;
32         };
33
34         ahb {
35                 apb {
36                         ddr_ctrl: memory-controller@18000000 {
37                                 compatible = "qca,qca9550-ddr-controller",
38                                                 "qca,ar7240-ddr-controller";
39                                 reg = <0x18000000 0x100>;
40
41                                 #qca,ddr-wb-channel-cells = <1>;
42                         };
43
44                         uart: uart@18020000 {
45                                 compatible = "ns16550a";
46                                 reg = <0x18020000 0x20>;
47
48                                 interrupts = <3>;
49
50                                 clocks = <&pll ATH79_CLK_REF>;
51                                 clock-names = "uart";
52
53                                 reg-io-width = <4>;
54                                 reg-shift = <2>;
55                                 no-loopback-test;
56
57                                 status = "disabled";
58                         };
59
60                         usb_phy0: usb-phy0@18030000 {
61                                 compatible ="qca,qca9550-usb-phy", "qca,ar7200-usb-phy";
62                                 reg = <0x18030000 4>, <0x18030004 4>;
63
64                                 reset-names = "usb-phy", "usb-suspend-override";
65                                 resets = <&rst 4>, <&rst 3>;
66
67                                 #phy-cells = <0>;
68
69                                 status = "disabled";
70                         };
71
72                         usb_phy1: usb-phy1@18030010 {
73                                 compatible = "qca,qca9550-usb-phy", "qca,ar7200-usb-phy";
74                                 reg = <0x18030010 4>, <0x18030014 4>;
75
76                                 reset-names = "usb-phy", "usb-suspend-override";
77                                 resets = <&rst2 4>, <&rst2 3>;
78
79                                 #phy-cells = <0>;
80
81                                 status = "disabled";
82                         };
83
84                         gpio: gpio@18040000 {
85                                 compatible = "qca,qca9550-gpio",
86                                                 "qca,ar9340-gpio";
87                                 reg = <0x18040000 0x28>;
88
89                                 interrupts = <2>;
90                                 ngpios = <24>;
91
92                                 gpio-controller;
93                                 #gpio-cells = <2>;
94
95                                 interrupt-controller;
96                                 #interrupt-cells = <2>;
97                         };
98
99                         pinmux: pinmux@1804002c {
100                                 compatible = "pinctrl-single";
101
102                                 reg = <0x1804002c 0x44>;
103
104                                 #size-cells = <0>;
105
106                                 pinctrl-single,bit-per-mux;
107                                 pinctrl-single,register-width = <32>;
108                                 pinctrl-single,function-mask = <0x1>;
109                                 #pinctrl-cells = <2>;
110
111                                 jtag_disable_pins: pinmux_jtag_disable_pins {
112                                         pinctrl-single,bits = <0x40 0x2  0x2>;
113                                 };
114                         };
115
116                         pll: pll-controller@18050000 {
117                                 compatible = "qca,qca9550-pll",
118                                                 "qca,qca9550-pll", "syscon";
119                                 reg = <0x18050000 0x50>;
120
121                                 #clock-cells = <1>;
122                                 clock-output-names = "cpu", "ddr", "ahb";
123
124                                 clocks = <&extosc>;
125                         };
126
127                         wdt: wdt@18060008 {
128                                 compatible = "qca,ar7130-wdt";
129                                 reg = <0x18060008 0x8>;
130
131                                 interrupts = <4>;
132
133                                 clocks = <&pll ATH79_CLK_AHB>;
134                                 clock-names = "wdt";
135                         };
136
137                         rst: reset-controller@1806001c {
138                                 compatible = "qca,qca9550-reset",
139                                                 "qca,ar7100-reset";
140                                 reg = <0x1806001c 0x4>;
141
142                                 #reset-cells = <1>;
143                                 interrupt-parent = <&cpuintc>;
144
145                                 intc2: interrupt-controller2 {
146                                         compatible = "qca,ar9340-intc";
147
148                                         interrupt-parent = <&cpuintc>;
149                                         interrupts = <2>;
150
151                                         interrupt-controller;
152                                         #interrupt-cells = <1>;
153
154                                         qca,int-status-addr = <0xac>;
155                                         qca,pending-bits = <0xf>,       /* wmac */
156                                                         <0x1f0>;        /* pcie rc 0 */
157                                 };
158
159                                 intc3: interrupt-controller3 {
160                                         compatible = "qca,ar9340-intc";
161
162                                         interrupt-parent = <&cpuintc>;
163                                         interrupts = <3>;
164
165                                         interrupt-controller;
166                                         #interrupt-cells = <1>;
167
168                                         qca,int-status-addr = <0xac>;
169                                         qca,pending-bits = <0x1f000>,           /* pcie rc 1 */
170                                                             <0x1000000>,        /* usb1 */
171                                                             <0x10000000>;       /* usb2 */
172                                 };
173                         };
174
175                         rst2: reset-controller@180600c0 {
176                                 compatible = "qca,qca9550-reset",
177                                                 "qca,ar7100-reset",
178                                                  "simple-bus";
179                                 reg = <0x180600c0 0x4>;
180
181                                 #reset-cells = <1>;
182                         };
183                 };
184
185                 nand: nand@1b800200 {
186                         compatible = "qca,ar934x-nand";
187                         reg = <0x1b800200 0xb8>;
188
189                         interrupts = <21>;
190                         interrupt-parent = <&miscintc>;
191
192                         resets = <&rst 14>;
193                         reset-names = "nand";
194
195                         nand-ecc-mode = "hw";
196
197                         #address-cells = <1>;
198                         #size-cells = <0>;
199
200                         status = "disabled";
201                 };
202
203                 gmac: gmac@18070000 {
204                         compatible = "qca,qca9550-gmac";
205                         reg = <0x18070000 0x58>;
206                 };
207
208                 pcie0: pcie-controller@180c0000 {
209                         compatible = "qcom,qca9550-pci", "qcom,ar7240-pci";
210                         #address-cells = <3>;
211                         #size-cells = <2>;
212                         bus-range = <0x0 0x0>;
213                         reg = <0x180c0000 0x1000>, /* CRP */
214                               <0x180f0000 0x100>,  /* CTRL */
215                               <0x14000000 0x1000>; /* CFG */
216                         reg-names = "crp_base", "ctrl_base", "cfg_base";
217                         ranges = <0x2000000 0 0x10000000 0x10000000 0 0x02000000        /* pci memory */
218                                   0x1000000 0 0x00000000 0x0000000 0 0x000001>;         /* io space */
219                         interrupt-parent = <&intc2>;
220                         interrupts = <1>;
221
222                         resets = <&rst 6>, <&rst 7>;
223                         reset-names = "hc", "phy";
224
225                         interrupt-controller;
226                         #interrupt-cells = <1>;
227
228                         interrupt-map-mask = <0 0 0 1>;
229                         interrupt-map = <0 0 0 0 &pcie0 0>;
230                         status = "disabled";
231                 };
232
233                 wmac: wmac@18100000 {
234                         compatible = "qca,qca9550-wmac";
235                         reg = <0x18100000 0x10000>;
236
237                         interrupt-parent = <&intc2>;
238                         interrupts = <0>;
239
240                         status = "disabled";
241                 };
242
243                 pcie1: pcie-controller@18250000 {
244                         compatible = "qcom,qca9550-pci", "qcom,ar7240-pci";
245                         #address-cells = <3>;
246                         #size-cells = <2>;
247                         bus-range = <0x0 0x0>;
248                         reg = <0x18250000 0x1000>, /* CRP */
249                               <0x18280000 0x100>,  /* CTRL */
250                               <0x16000000 0x1000>; /* CFG */
251                         reg-names = "crp_base", "ctrl_base", "cfg_base";
252                         ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000        /* pci memory */
253                                   0x1000000 0 0x00000000 0x0000001 0 0x000001>;         /* io space */
254                         interrupt-parent = <&intc3>;
255                         interrupts = <0>;
256
257                         resets = <&rst2 6>, <&rst2 7>;
258                         reset-names = "hc", "phy";
259
260                         interrupt-controller;
261                         #interrupt-cells = <1>;
262
263                         interrupt-map-mask = <0 0 0 1>;
264                         interrupt-map = <0 0 0 0 &pcie1 0>;
265                         status = "disabled";
266                 };
267
268                 usb0: usb@1b000000 {
269                         compatible = "generic-ehci";
270                         reg = <0x1b000000 0x1fc>;
271
272                         interrupt-parent = <&intc3>;
273                         interrupts = <1>;
274                         resets = <&rst 5>;
275                         reset-names = "usb-host";
276
277                         has-transaction-translator;
278                         caps-offset = <0x100>;
279
280                         phy-names = "usb-phy0";
281                         phys = <&usb_phy0>;
282
283                         status = "disabled";
284                 };
285
286                 usb1: usb@1b400000 {
287                         compatible = "generic-ehci";
288                         reg = <0x1b400000 0x1fc>;
289
290                         interrupt-parent = <&intc3>;
291                         interrupts = <2>;
292                         resets = <&rst2 5>;
293                         reset-names = "usb-host";
294
295                         has-transaction-translator;
296                         caps-offset = <0x100>;
297
298                         phy-names = "usb-phy1";
299                         phys = <&usb_phy1>;
300
301                         status = "disabled";
302                 };
303
304                 spi: spi@1f000000 {
305                         compatible = "qca,ar934x-spi";
306                         reg = <0x1f000000 0x1c>;
307
308                         clocks = <&pll ATH79_CLK_AHB>;
309
310                         status = "disabled";
311
312                         #address-cells = <1>;
313                         #size-cells = <0>;
314                 };
315         };
316 };
317
318 &mdio0 {
319         compatible = "qca,ar9340-mdio";
320 };
321
322 &eth0 {
323         compatible = "qca,qca9550-eth", "syscon";
324
325         pll-reg = <0 0x28 0>;
326         pll-handle = <&pll>;
327
328         pll-data = <0x16000000 0x00000101 0x00001616>;
329         phy-mode = "rgmii";
330
331         resets = <&rst 9>, <&rst 22>;
332         reset-names = "mac", "mdio";
333 };
334
335 &mdio1 {
336         compatible = "qca,ar9340-mdio";
337 };
338
339 &eth1 {
340         compatible = "qca,qca9550-eth", "syscon";
341
342         pll-reg = <0 0x48 0>;
343         pll-handle = <&pll>;
344
345         pll-data = <0x16000000 0x00000101 0x00001616>;
346         phy-mode = "sgmii";
347
348         resets = <&rst 13>, <&rst 23>;
349         reset-names = "mac", "mdio";
350 };