target/linux/ath79/dts/ar9344_dlink_dir-8x5.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/input/input.h>
   5
   6 #include "ar9344.dtsi"
   7
   8 / {
   9         chosen {
  10                 bootargs = "console=ttyS0,115200";
  11         };
  12
  13         keys {
  14                 compatible = "gpio-keys";
  15
  16                 reset {
  17                         linux,code = <KEY_RESTART>;
  18                         gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
  19                         debounce-interval = <60>;
  20                 };
  21
  22                 wps {
  23                         linux,code = <KEY_WPS_BUTTON>;
  24                         gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
  25                         debounce-interval = <60>;
  26                 };
  27         };
  28 };
  29
  30 &eth0 {
  31         status = "okay";
  32
  33         /* default for ar934x, except for 1000M */
  34         pll-data = <0x06000000 0x00000101 0x00001616>;
  35
  36         phy-mode = "rgmii";
  37         phy-handle = <&phy0>;
  38 };
  39
  40 &mdio0 {
  41         status = "okay";
  42
  43         phy-mask = <0>;
  44
  45         phy0: ethernet-phy@0 {
  46                 reg = <0>;
  47                 qca,ar8327-initvals = <
  48                         /* GPL code drop (bsp.h & athrs17_phy.c) */
  49                         0x10 0xc1000000 /* PWS_REG_VALUE */
  50                         0x04 0x07600000 /* PORT0 PAD Mode */
  51                         0x0c 0x01000000 /* PORT6 PAD Mode */
  52                         0x7c 0x0000007e /* PORT0_STATUS */
  53                         0x94 0x0000007e /* PORT6_STATUS */
  54                 >;
  55         };
  56 };
  57
  58 &pcie {
  59         status = "okay";
  60
  61         ath9k: wifi@0,0 {
  62                 compatible = "pci168c,0030";
  63                 reg = <0x0000 0 0 0 0>;
  64                 qca,no-eeprom;
  65                 gpio-controller;
  66                 #gpio-cells = <2>;
  67         };
  68 };
  69
  70 &ref {
  71         clock-frequency = <40000000>;
  72 };
  73
  74 &spi {
  75         status = "okay";
  76         num-cs = <1>;
  77
  78         flash@0 {
  79                 compatible = "jedec,spi-nor";
  80                 reg = <0>;
  81                 spi-max-frequency = <25000000>;
  82
  83                 partitions {
  84                         compatible = "fixed-partitions";
  85                         #address-cells = <1>;
  86                         #size-cells = <1>;
  87
  88                         partition@0 {
  89                                 label = "uboot";
  90                                 reg = <0x000000 0x010000>;
  91                                 read-only;
  92                         };
  93
  94                         partition@10000 {
  95                                 label = "nvram";
  96                                 reg = <0x010000 0x010000>;
  97                                 read-only;
  98                         };
  99
 100                         partition@20000 {
 101                                 label = "firmware";
 102                                 reg = <0x020000 0xF90000>;
 103                                 compatible = "denx,uimage";
 104                         };
 105
 106                         partition@fb0000 {
 107                                 label = "lang";
 108                                 reg = <0xfb0000 0x030000>;
 109                                 read-only;
 110                         };
 111
 112                         partition@fe0000 {
 113                                 label = "mac";
 114                                 reg = <0xfe0000 0x010000>;
 115                                 read-only;
 116                         };
 117
 118                         partition@ff0000 {
 119                                 label = "art";
 120                                 reg = <0xff0000 0x010000>;
 121                                 read-only;
 122                         };
 123                 };
 124         };
 125 };
 126
 127 &uart {
 128         status = "okay";
 129 };
 130
 131 &usb {
 132         status = "okay";
 133         #address-cells = <1>;
 134         #size-cells = <0>;
 135
 136         hub_port1: port@1 {
 137                 reg = <1>;
 138                 #trigger-source-cells = <0>;
 139         };
 140 };
 141
 142 &usb_phy {
 143         status = "okay";
 144 };
 145
 146 &wmac {
 147         status = "okay";
 148         qca,no-eeprom;
 149 };