tools/perf/pmu-events/arch/x86/haswellx/floating-point.json

   1 [
   2     {
   3         "EventCode": "0xC1",
   4         "UMask": "0x8",
   5         "BriefDescription": "Number of transitions from AVX-256 to legacy SSE when penalty applicable.",
   6         "Counter": "0,1,2,3",
   7         "EventName": "OTHER_ASSISTS.AVX_TO_SSE",
   8         "Errata": "HSD56, HSM57",
   9         "SampleAfterValue": "100003",
  10         "CounterHTOff": "0,1,2,3,4,5,6,7"
  11     },
  12     {
  13         "EventCode": "0xC1",
  14         "UMask": "0x10",
  15         "BriefDescription": "Number of transitions from SSE to AVX-256 when penalty applicable.",
  16         "Counter": "0,1,2,3",
  17         "EventName": "OTHER_ASSISTS.SSE_TO_AVX",
  18         "Errata": "HSD56, HSM57",
  19         "SampleAfterValue": "100003",
  20         "CounterHTOff": "0,1,2,3,4,5,6,7"
  21     },
  22     {
  23         "EventCode": "0xC6",
  24         "UMask": "0x7",
  25         "BriefDescription": "Approximate counts of AVX & AVX2 256-bit instructions, including non-arithmetic instructions, loads, and stores.  May count non-AVX instructions that employ 256-bit operations, including (but not necessarily limited to) rep string instructions that use 256-bit loads and stores for optimized performance, XSAVE* and XRSTOR*, and operations that transition the x87 FPU data registers between x87 and MMX.",
  26         "Counter": "0,1,2,3",
  27         "EventName": "AVX_INSTS.ALL",
  28         "PublicDescription": "Note that a whole rep string only counts AVX_INST.ALL once.",
  29         "SampleAfterValue": "2000003",
  30         "CounterHTOff": "0,1,2,3,4,5,6,7"
  31     },
  32     {
  33         "EventCode": "0xCA",
  34         "UMask": "0x2",
  35         "BriefDescription": "Number of X87 assists due to output value.",
  36         "Counter": "0,1,2,3",
  37         "EventName": "FP_ASSIST.X87_OUTPUT",
  38         "PublicDescription": "Number of X87 FP assists due to output values.",
  39         "SampleAfterValue": "100003",
  40         "CounterHTOff": "0,1,2,3,4,5,6,7"
  41     },
  42     {
  43         "EventCode": "0xCA",
  44         "UMask": "0x4",
  45         "BriefDescription": "Number of X87 assists due to input value.",
  46         "Counter": "0,1,2,3",
  47         "EventName": "FP_ASSIST.X87_INPUT",
  48         "PublicDescription": "Number of X87 FP assists due to input values.",
  49         "SampleAfterValue": "100003",
  50         "CounterHTOff": "0,1,2,3,4,5,6,7"
  51     },
  52     {
  53         "EventCode": "0xCA",
  54         "UMask": "0x8",
  55         "BriefDescription": "Number of SIMD FP assists due to Output values",
  56         "Counter": "0,1,2,3",
  57         "EventName": "FP_ASSIST.SIMD_OUTPUT",
  58         "PublicDescription": "Number of SIMD FP assists due to output values.",
  59         "SampleAfterValue": "100003",
  60         "CounterHTOff": "0,1,2,3,4,5,6,7"
  61     },
  62     {
  63         "EventCode": "0xCA",
  64         "UMask": "0x10",
  65         "BriefDescription": "Number of SIMD FP assists due to input values",
  66         "Counter": "0,1,2,3",
  67         "EventName": "FP_ASSIST.SIMD_INPUT",
  68         "PublicDescription": "Number of SIMD FP assists due to input values.",
  69         "SampleAfterValue": "100003",
  70         "CounterHTOff": "0,1,2,3,4,5,6,7"
  71     },
  72     {
  73         "EventCode": "0xCA",
  74         "UMask": "0x1e",
  75         "BriefDescription": "Cycles with any input/output SSE or FP assist",
  76         "Counter": "0,1,2,3",
  77         "EventName": "FP_ASSIST.ANY",
  78         "CounterMask": "1",
  79         "PublicDescription": "Cycles with any input/output SSE* or FP assists.",
  80         "SampleAfterValue": "100003",
  81         "CounterHTOff": "0,1,2,3"
  82     }
  83 ]