7 Intel Processor Trace (Intel PT) is an extension of Intel Architecture that
8 collects information about software execution such as control flow, execution
9 modes and timings and formats it into highly compressed binary packets.
10 Technical details are documented in the Intel 64 and IA-32 Architectures
11 Software Developer Manuals, Chapter 36 Intel Processor Trace.
13 Intel PT is first supported in Intel Core M and 5th generation Intel Core
14 processors that are based on the Intel micro-architecture code name Broadwell.
16 Trace data is collected by 'perf record' and stored within the perf.data file.
17 See below for options to 'perf record'.
19 Trace data must be 'decoded' which involves walking the object code and matching
20 the trace data packets. For example a TNT packet only tells whether a
21 conditional branch was taken or not taken, so to make use of that packet the
22 decoder must know precisely which instruction was being executed.
24 Decoding is done on-the-fly. The decoder outputs samples in the same format as
25 samples output by perf hardware events, for example as though the "instructions"
26 or "branches" events had been recorded. Presently 3 tools support this:
27 'perf script', 'perf report' and 'perf inject'. See below for more information
30 The main distinguishing feature of Intel PT is that the decoder can determine
31 the exact flow of software execution. Intel PT can be used to understand why
32 and how did software get to a certain point, or behave a certain way. The
33 software does not have to be recompiled, so Intel PT works with debug or release
34 builds, however the executed images are needed - which makes use in JIT-compiled
35 environments, or with self-modified code, a challenge. Also symbols need to be
36 provided to make sense of addresses.
38 A limitation of Intel PT is that it produces huge amounts of trace data
39 (hundreds of megabytes per second per core) which takes a long time to decode,
40 for example two or three orders of magnitude longer than it took to collect.
41 Another limitation is the performance impact of tracing, something that will
42 vary depending on the use-case and architecture.
48 It is important to start small. That is because it is easy to capture vastly
49 more data than can possibly be processed.
51 The simplest thing to do with Intel PT is userspace profiling of small programs.
52 Data is captured with 'perf record' e.g. to trace 'ls' userspace-only:
54 perf record -e intel_pt//u ls
56 And profiled with 'perf report' e.g.
60 To also trace kernel space presents a problem, namely kernel self-modifying
61 code. A fairly good kernel image is available in /proc/kcore but to get an
62 accurate image a copy of /proc/kcore needs to be made under the same conditions
63 as the data capture. A script perf-with-kcore can do that, but beware that the
64 script makes use of 'sudo' to copy /proc/kcore. If you have perf installed
65 locally from the source tree you can do:
67 ~/libexec/perf-core/perf-with-kcore record pt_ls -e intel_pt// -- ls
69 which will create a directory named 'pt_ls' and put the perf.data file and
70 copies of /proc/kcore, /proc/kallsyms and /proc/modules into it. Then to use
71 'perf report' becomes:
73 ~/libexec/perf-core/perf-with-kcore report pt_ls
75 Because samples are synthesized after-the-fact, the sampling period can be
76 selected for reporting. e.g. sample every microsecond
78 ~/libexec/perf-core/perf-with-kcore report pt_ls --itrace=i1usge
80 See the sections below for more information about the --itrace option.
82 Beware the smaller the period, the more samples that are produced, and the
83 longer it takes to process them.
85 Also note that the coarseness of Intel PT timing information will start to
86 distort the statistical value of the sampling as the sampling period becomes
89 To represent software control flow, "branches" samples are produced. By default
90 a branch sample is synthesized for every single branch. To get an idea what
91 data is available you can use the 'perf script' tool with all itrace sampling
92 options, which will list all the samples.
94 perf record -e intel_pt//u ls
95 perf script --itrace=ibxwpe
97 An interesting field that is not printed by default is 'flags' which can be
100 perf script --itrace=ibxwpe -F+flags
102 The flags are "bcrosyiABEx" which stand for branch, call, return, conditional,
103 system, asynchronous, interrupt, transaction abort, trace begin, trace end, and
104 in transaction, respectively.
106 Another interesting field that is not printed by default is 'ipc' which can be
107 displayed as follows:
109 perf script --itrace=be -F+ipc
111 There are two ways that instructions-per-cycle (IPC) can be calculated depending
114 If the 'cyc' config term (see config terms section below) was used, then IPC is
115 calculated using the cycle count from CYC packets, otherwise MTC packets are
116 used - refer to the 'mtc' config term. When MTC is used, however, the values
117 are less accurate because the timing is less accurate.
119 Because Intel PT does not update the cycle count on every branch or instruction,
120 the values will often be zero. When there are values, they will be the number
121 of instructions and number of cycles since the last update, and thus represent
122 the average IPC since the last IPC for that event type. Note IPC for "branches"
123 events is calculated separately from IPC for "instructions" events.
125 Also note that the IPC instruction count may or may not include the current
126 instruction. If the cycle count is associated with an asynchronous branch
127 (e.g. page fault or interrupt), then the instruction count does not include the
128 current instruction, otherwise it does. That is consistent with whether or not
129 that instruction has retired when the cycle count is updated.
131 Another note, in the case of "branches" events, non-taken branches are not
132 presently sampled, so IPC values for them do not appear e.g. a CYC packet with a
133 TNT packet that starts with a non-taken branch. To see every possible IPC
134 value, "instructions" events can be used e.g. --itrace=i0ns
136 While it is possible to create scripts to analyze the data, an alternative
137 approach is available to export the data to a sqlite or postgresql database.
138 Refer to script export-to-sqlite.py or export-to-postgresql.py for more details,
139 and to script exported-sql-viewer.py for an example of using the database.
141 There is also script intel-pt-events.py which provides an example of how to
142 unpack the raw data for power events and PTWRITE.
144 As mentioned above, it is easy to capture too much data. One way to limit the
145 data captured is to use 'snapshot' mode which is explained further below.
146 Refer to 'new snapshot option' and 'Intel PT modes of operation' further below.
148 Another problem that will be experienced is decoder errors. They can be caused
149 by inability to access the executed image, self-modified or JIT-ed code, or the
150 inability to match side-band information (such as context switches and mmaps)
151 which results in the decoder not knowing what code was executed.
153 There is also the problem of perf not being able to copy the data fast enough,
154 resulting in data lost because the buffer was full. See 'Buffer handling' below
164 The Intel PT kernel driver creates a new PMU for Intel PT. PMU events are
165 selected by providing the PMU name followed by the "config" separated by slashes.
166 An enhancement has been made to allow default "config" e.g. the option
170 will use a default config value. Currently that is the same as
172 -e intel_pt/tsc,noretcomp=0/
176 -e intel_pt/tsc=1,noretcomp=0/
178 Note there are now new config terms - see section 'config terms' further below.
180 The config terms are listed in /sys/devices/intel_pt/format. They are bit
181 fields within the config member of the struct perf_event_attr which is
182 passed to the kernel by the perf_event_open system call. They correspond to bit
183 fields in the IA32_RTIT_CTL MSR. Here is a list of them and their definitions:
185 $ grep -H . /sys/bus/event_source/devices/intel_pt/format/*
186 /sys/bus/event_source/devices/intel_pt/format/cyc:config:1
187 /sys/bus/event_source/devices/intel_pt/format/cyc_thresh:config:19-22
188 /sys/bus/event_source/devices/intel_pt/format/mtc:config:9
189 /sys/bus/event_source/devices/intel_pt/format/mtc_period:config:14-17
190 /sys/bus/event_source/devices/intel_pt/format/noretcomp:config:11
191 /sys/bus/event_source/devices/intel_pt/format/psb_period:config:24-27
192 /sys/bus/event_source/devices/intel_pt/format/tsc:config:10
194 Note that the default config must be overridden for each term i.e.
196 -e intel_pt/noretcomp=0/
200 -e intel_pt/tsc=1,noretcomp=0/
202 So, to disable TSC packets use:
206 It is also possible to specify the config value explicitly:
208 -e intel_pt/config=0x400/
210 Note that, as with all events, the event is suffixed with event modifiers:
219 'h', 'G' and 'H' are for virtualization which is not supported by Intel PT.
220 'p' is also not relevant to Intel PT. So only options 'u' and 'k' are
221 meaningful for Intel PT.
223 perf_event_attr is displayed if the -vv option is used e.g.
225 ------------------------------------------------------------
230 { sample_period, sample_freq } 1
231 sample_type IP|TID|TIME|CPU|IDENTIFIER
239 ------------------------------------------------------------
240 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8
241 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8
242 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8
243 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8
244 ------------------------------------------------------------
250 The June 2015 version of Intel 64 and IA-32 Architectures Software Developer
251 Manuals, Chapter 36 Intel Processor Trace, defined new Intel PT features.
252 Some of the features are reflect in new config terms. All the config terms are
255 tsc Always supported. Produces TSC timestamp packets to provide
256 timing information. In some cases it is possible to decode
257 without timing information, for example a per-thread context
258 that does not overlap executable memory maps.
260 The default config selects tsc (i.e. tsc=1).
262 noretcomp Always supported. Disables "return compression" so a TIP packet
263 is produced when a function returns. Causes more packets to be
264 produced but might make decoding more reliable.
266 The default config does not select noretcomp (i.e. noretcomp=0).
268 psb_period Allows the frequency of PSB packets to be specified.
270 The PSB packet is a synchronization packet that provides a
271 starting point for decoding or recovery from errors.
273 Support for psb_period is indicated by:
275 /sys/bus/event_source/devices/intel_pt/caps/psb_cyc
277 which contains "1" if the feature is supported and "0"
280 Valid values are given by:
282 /sys/bus/event_source/devices/intel_pt/caps/psb_periods
284 which contains a hexadecimal value, the bits of which represent
285 valid values e.g. bit 2 set means value 2 is valid.
287 The psb_period value is converted to the approximate number of
288 trace bytes between PSB packets as:
292 e.g. value 3 means 16KiB bytes between PSBs
294 If an invalid value is entered, the error message
295 will give a list of valid values e.g.
297 $ perf record -e intel_pt/psb_period=15/u uname
298 Invalid psb_period for intel_pt. Valid values are: 0-5
300 If MTC packets are selected, the default config selects a value
301 of 3 (i.e. psb_period=3) or the nearest lower value that is
302 supported (0 is always supported). Otherwise the default is 0.
304 If decoding is expected to be reliable and the buffer is large
305 then a large PSB period can be used.
307 Because a TSC packet is produced with PSB, the PSB period can
308 also affect the granularity to timing information in the absence
311 mtc Produces MTC timing packets.
313 MTC packets provide finer grain timestamp information than TSC
314 packets. MTC packets record time using the hardware crystal
315 clock (CTC) which is related to TSC packets using a TMA packet.
317 Support for this feature is indicated by:
319 /sys/bus/event_source/devices/intel_pt/caps/mtc
321 which contains "1" if the feature is supported and
324 The frequency of MTC packets can also be specified - see
327 mtc_period Specifies how frequently MTC packets are produced - see mtc
328 above for how to determine if MTC packets are supported.
330 Valid values are given by:
332 /sys/bus/event_source/devices/intel_pt/caps/mtc_periods
334 which contains a hexadecimal value, the bits of which represent
335 valid values e.g. bit 2 set means value 2 is valid.
337 The mtc_period value is converted to the MTC frequency as:
339 CTC-frequency / (2 ^ value)
341 e.g. value 3 means one eighth of CTC-frequency
343 Where CTC is the hardware crystal clock, the frequency of which
344 can be related to TSC via values provided in cpuid leaf 0x15.
346 If an invalid value is entered, the error message
347 will give a list of valid values e.g.
349 $ perf record -e intel_pt/mtc_period=15/u uname
350 Invalid mtc_period for intel_pt. Valid values are: 0,3,6,9
352 The default value is 3 or the nearest lower value
353 that is supported (0 is always supported).
355 cyc Produces CYC timing packets.
357 CYC packets provide even finer grain timestamp information than
358 MTC and TSC packets. A CYC packet contains the number of CPU
359 cycles since the last CYC packet. Unlike MTC and TSC packets,
360 CYC packets are only sent when another packet is also sent.
362 Support for this feature is indicated by:
364 /sys/bus/event_source/devices/intel_pt/caps/psb_cyc
366 which contains "1" if the feature is supported and
369 The number of CYC packets produced can be reduced by specifying
370 a threshold - see cyc_thresh below.
372 cyc_thresh Specifies how frequently CYC packets are produced - see cyc
373 above for how to determine if CYC packets are supported.
375 Valid cyc_thresh values are given by:
377 /sys/bus/event_source/devices/intel_pt/caps/cycle_thresholds
379 which contains a hexadecimal value, the bits of which represent
380 valid values e.g. bit 2 set means value 2 is valid.
382 The cyc_thresh value represents the minimum number of CPU cycles
383 that must have passed before a CYC packet can be sent. The
384 number of CPU cycles is:
388 e.g. value 4 means 8 CPU cycles must pass before a CYC packet
389 can be sent. Note a CYC packet is still only sent when another
390 packet is sent, not at, e.g. every 8 CPU cycles.
392 If an invalid value is entered, the error message
393 will give a list of valid values e.g.
395 $ perf record -e intel_pt/cyc,cyc_thresh=15/u uname
396 Invalid cyc_thresh for intel_pt. Valid values are: 0-12
398 CYC packets are not requested by default.
400 pt Specifies pass-through which enables the 'branch' config term.
402 The default config selects 'pt' if it is available, so a user will
403 never need to specify this term.
405 branch Enable branch tracing. Branch tracing is enabled by default so to
406 disable branch tracing use 'branch=0'.
408 The default config selects 'branch' if it is available.
410 ptw Enable PTWRITE packets which are produced when a ptwrite instruction
413 Support for this feature is indicated by:
415 /sys/bus/event_source/devices/intel_pt/caps/ptwrite
417 which contains "1" if the feature is supported and
420 fup_on_ptw Enable a FUP packet to follow the PTWRITE packet. The FUP packet
421 provides the address of the ptwrite instruction. In the absence of
422 fup_on_ptw, the decoder will use the address of the previous branch
423 if branch tracing is enabled, otherwise the address will be zero.
424 Note that fup_on_ptw will work even when branch tracing is disabled.
426 pwr_evt Enable power events. The power events provide information about
427 changes to the CPU C-state.
429 Support for this feature is indicated by:
431 /sys/bus/event_source/devices/intel_pt/caps/power_event_trace
433 which contains "1" if the feature is supported and
440 The difference between full trace and snapshot from the kernel's perspective is
441 that in full trace we don't overwrite trace data that the user hasn't collected
442 yet (and indicated that by advancing aux_tail), whereas in snapshot mode we let
443 the trace run and overwrite older data in the buffer so that whenever something
444 interesting happens, we can stop it and grab a snapshot of what was going on
445 around that interesting moment.
447 To select snapshot mode a new option has been added:
451 Optionally it can be followed by the snapshot size e.g.
455 The default snapshot size is the auxtrace mmap size. If neither auxtrace mmap size
456 nor snapshot size is specified, then the default is 4MiB for privileged users
457 (or if /proc/sys/kernel/perf_event_paranoid < 0), 128KiB for unprivileged users.
458 If an unprivileged user does not specify mmap pages, the mmap pages will be
459 reduced as described in the 'new auxtrace mmap size option' section below.
461 The snapshot size is displayed if the option -vv is used e.g.
463 Intel PT snapshot size: %zu
466 new auxtrace mmap size option
467 ---------------------------
469 Intel PT buffer size is specified by an addition to the -m option e.g.
473 selects a buffer size of 16 pages i.e. 64KiB.
475 Note that the existing functionality of -m is unchanged. The auxtrace mmap size
476 is specified by the optional addition of a comma and the value.
478 The default auxtrace mmap size for Intel PT is 4MiB/page_size for privileged users
479 (or if /proc/sys/kernel/perf_event_paranoid < 0), 128KiB for unprivileged users.
480 If an unprivileged user does not specify mmap pages, the mmap pages will be
481 reduced from the default 512KiB/page_size to 256KiB/page_size, otherwise the
482 user is likely to get an error as they exceed their mlock limit (Max locked
483 memory as shown in /proc/self/limits). Note that perf does not count the first
484 512KiB (actually /proc/sys/kernel/perf_event_mlock_kb minus 1 page) per cpu
485 against the mlock limit so an unprivileged user is allowed 512KiB per cpu plus
486 their mlock limit (which defaults to 64KiB but is not multiplied by the number
489 In full-trace mode, powers of two are allowed for buffer size, with a minimum
490 size of 2 pages. In snapshot mode, it is the same but the minimum size is
493 The mmap size and auxtrace mmap size are displayed if the -vv option is used e.g.
496 auxtrace mmap length 4198400
499 Intel PT modes of operation
500 ---------------------------
502 Intel PT can be used in 2 modes:
506 Full-trace mode traces continuously e.g.
508 perf record -e intel_pt//u uname
510 Snapshot mode captures the available data when a signal is sent e.g.
512 perf record -v -e intel_pt//u -S ./loopy 1000000000 &
515 Recording AUX area tracing snapshot
517 Note that the signal sent is SIGUSR2.
518 Note that "Recording AUX area tracing snapshot" is displayed because the -v
521 The 2 modes cannot be used together.
527 There may be buffer limitations (i.e. single ToPa entry) which means that actual
528 buffer sizes are limited to powers of 2 up to 4MiB (MAX_ORDER). In order to
529 provide other sizes, and in particular an arbitrarily large size, multiple
530 buffers are logically concatenated. However an interrupt must be used to switch
531 between buffers. That has two potential problems:
532 a) the interrupt may not be handled in time so that the current buffer
533 becomes full and some trace data is lost.
534 b) the interrupts may slow the system and affect the performance
537 If trace data is lost, the driver sets 'truncated' in the PERF_RECORD_AUX event
538 which the tools report as an error.
540 In full-trace mode, the driver waits for data to be copied out before allowing
541 the (logical) buffer to wrap-around. If data is not copied out quickly enough,
542 again 'truncated' is set in the PERF_RECORD_AUX event. If the driver has to
543 wait, the intel_pt event gets disabled. Because it is difficult to know when
544 that happens, perf tools always re-enable the intel_pt event after copying out
548 Intel PT and build ids
549 ----------------------
551 By default "perf record" post-processes the event stream to find all build ids
552 for executables for all addresses sampled. Deliberately, Intel PT is not
553 decoded for that purpose (it would take too long). Instead the build ids for
554 all executables encountered (due to mmap, comm or task events) are included
555 in the perf.data file.
557 To see buildids included in the perf.data file use the command:
561 If the perf.data file contains Intel PT data, that is the same as:
563 perf buildid-list --with-hits
566 Snapshot mode and event disabling
567 ---------------------------------
569 In order to make a snapshot, the intel_pt event is disabled using an IOCTL,
570 namely PERF_EVENT_IOC_DISABLE. However doing that can also disable the
571 collection of side-band information. In order to prevent that, a dummy
572 software event has been introduced that permits tracking events (like mmaps) to
573 continue to be recorded while intel_pt is disabled. That is important to ensure
574 there is complete side-band information to allow the decoding of subsequent
577 A test has been created for that. To find the test:
581 23: Test using a dummy software event to keep tracking
586 23: Test using a dummy software event to keep tracking : Ok
589 perf record modes (nothing new here)
590 ------------------------------------
592 perf record essentially operates in one of three modes:
597 "per thread" mode is selected by -t or by --per-thread (with -p or -u or just a
599 "per cpu" is selected by -C or -a.
600 "workload only" mode is selected by not using the other options but providing a
601 command to run (i.e. the workload).
603 In per-thread mode an exact list of threads is traced. There is no inheritance.
604 Each thread has its own event buffer.
606 In per-cpu mode all processes (or processes from the selected cgroup i.e. -G
607 option, or processes selected with -p or -u) are traced. Each cpu has its own
608 buffer. Inheritance is allowed.
610 In workload-only mode, the workload is traced but with per-cpu buffers.
611 Inheritance is allowed. Note that you can now trace a workload in per-thread
612 mode by using the --per-thread option.
615 Privileged vs non-privileged users
616 ----------------------------------
618 Unless /proc/sys/kernel/perf_event_paranoid is set to -1, unprivileged users
619 have memory limits imposed upon them. That affects what buffer sizes they can
620 have as outlined above.
622 The v4.2 kernel introduced support for a context switch metadata event,
623 PERF_RECORD_SWITCH, which allows unprivileged users to see when their processes
624 are scheduled out and in, just not by whom, which is left for the
625 PERF_RECORD_SWITCH_CPU_WIDE, that is only accessible in system wide context,
626 which in turn requires CAP_SYS_ADMIN.
628 Please see the 45ac1403f564 ("perf: Add PERF_RECORD_SWITCH to indicate context
629 switches") commit, that introduces these metadata events for further info.
631 When working with kernels < v4.2, the following considerations must be taken,
632 as the sched:sched_switch tracepoints will be used to receive such information:
634 Unless /proc/sys/kernel/perf_event_paranoid is set to -1, unprivileged users are
635 not permitted to use tracepoints which means there is insufficient side-band
636 information to decode Intel PT in per-cpu mode, and potentially workload-only
637 mode too if the workload creates new processes.
639 Note also, that to use tracepoints, read-access to debugfs is required. So if
640 debugfs is not mounted or the user does not have read-access, it will again not
641 be possible to decode Intel PT in per-cpu mode.
644 sched_switch tracepoint
645 -----------------------
647 The sched_switch tracepoint is used to provide side-band data for Intel PT
648 decoding in kernels where the PERF_RECORD_SWITCH metadata event isn't
651 The sched_switch events are automatically added. e.g. the second event shown
654 $ perf record -vv -e intel_pt//u uname
655 ------------------------------------------------------------
660 { sample_period, sample_freq } 1
661 sample_type IP|TID|TIME|CPU|IDENTIFIER
669 ------------------------------------------------------------
670 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8
671 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8
672 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8
673 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8
674 ------------------------------------------------------------
679 { sample_period, sample_freq } 1
680 sample_type IP|TID|TIME|CPU|PERIOD|RAW|IDENTIFIER
685 ------------------------------------------------------------
686 sys_perf_event_open: pid -1 cpu 0 group_fd -1 flags 0x8
687 sys_perf_event_open: pid -1 cpu 1 group_fd -1 flags 0x8
688 sys_perf_event_open: pid -1 cpu 2 group_fd -1 flags 0x8
689 sys_perf_event_open: pid -1 cpu 3 group_fd -1 flags 0x8
690 ------------------------------------------------------------
695 { sample_period, sample_freq } 1
696 sample_type IP|TID|TIME|IDENTIFIER
709 ------------------------------------------------------------
710 sys_perf_event_open: pid 31104 cpu 0 group_fd -1 flags 0x8
711 sys_perf_event_open: pid 31104 cpu 1 group_fd -1 flags 0x8
712 sys_perf_event_open: pid 31104 cpu 2 group_fd -1 flags 0x8
713 sys_perf_event_open: pid 31104 cpu 3 group_fd -1 flags 0x8
715 AUX area mmap length 4194304
716 perf event ring buffer mmapped per cpu
717 Synthesizing auxtrace information
719 [ perf record: Woken up 1 times to write data ]
720 [ perf record: Captured and wrote 0.042 MB perf.data ]
722 Note, the sched_switch event is only added if the user is permitted to use it
723 and only in per-cpu mode.
725 Note also, the sched_switch event is only added if TSC packets are requested.
726 That is because, in the absence of timing information, the sched_switch events
727 cannot be matched against the Intel PT trace.
733 By default, perf script will decode trace data found in the perf.data file.
734 This can be further controlled by new option --itrace.
740 Having no option is the same as
744 which, in turn, is the same as
750 i synthesize "instructions" events
751 b synthesize "branches" events
752 x synthesize "transactions" events
753 w synthesize "ptwrite" events
754 p synthesize "power" events
755 c synthesize branches events (calls only)
756 r synthesize branches events (returns only)
757 e synthesize tracing error events
759 g synthesize a call chain (use with i or x)
760 l synthesize last branch entries (use with i or x)
761 s skip initial number of events
763 "Instructions" events look like they were recorded by "perf record -e
766 "Branches" events look like they were recorded by "perf record -e branches". "c"
767 and "r" can be combined to get calls and returns.
769 "Transactions" events correspond to the start or end of transactions. The
770 'flags' field can be used in perf script to determine whether the event is a
771 tranasaction start, commit or abort.
773 Note that "instructions", "branches" and "transactions" events depend on code
774 flow packets which can be disabled by using the config term "branch=0". Refer
775 to the config terms section above.
777 "ptwrite" events record the payload of the ptwrite instruction and whether
778 "fup_on_ptw" was used. "ptwrite" events depend on PTWRITE packets which are
779 recorded only if the "ptw" config term was used. Refer to the config terms
780 section above. perf script "synth" field displays "ptwrite" information like
781 this: "ip: 0 payload: 0x123456789abcdef0" where "ip" is 1 if "fup_on_ptw" was
784 "Power" events correspond to power event packets and CBR (core-to-bus ratio)
785 packets. While CBR packets are always recorded when tracing is enabled, power
786 event packets are recorded only if the "pwr_evt" config term was used. Refer to
787 the config terms section above. The power events record information about
788 C-state changes, whereas CBR is indicative of CPU frequency. perf script
789 "event,synth" fields display information like this:
790 cbr: cbr: 22 freq: 2189 MHz (200%)
791 mwait: hints: 0x60 extensions: 0x1
792 pwre: hw: 0 cstate: 2 sub-cstate: 0
794 pwrx: deepest cstate: 2 last cstate: 2 wake reason: 0x4
796 "cbr" includes the frequency and the percentage of maximum non-turbo
797 "mwait" shows mwait hints and extensions
798 "pwre" shows C-state transitions (to a C-state deeper than C0) and
799 whether initiated by hardware
800 "exstop" indicates execution stopped and whether the IP was recorded
802 "pwrx" indicates return to C0
803 For more details refer to the Intel 64 and IA-32 Architectures Software
806 Error events show where the decoder lost the trace. Error events
807 are quite important. Users must know if what they are seeing is a complete
810 The "d" option will cause the creation of a file "intel_pt.log" containing all
811 decoded packets and instructions. Note that this option slows down the decoder
812 and that the resulting file may be very large.
814 In addition, the period of the "instructions" event can be specified. e.g.
818 sets the period to 10us i.e. one instruction sample is synthesized for each 10
819 microseconds of trace. Alternatives to "us" are "ms" (milliseconds),
820 "ns" (nanoseconds), "t" (TSC ticks) or "i" (instructions).
822 "ms", "us" and "ns" are converted to TSC ticks.
824 The timing information included with Intel PT does not give the time of every
825 instruction. Consequently, for the purpose of sampling, the decoder estimates
826 the time since the last timing packet based on 1 tick per instruction. The time
827 on the sample is *not* adjusted and reflects the last known value of TSC.
829 For Intel PT, the default period is 100us.
831 Setting it to a zero period means "as often as possible".
833 In the case of Intel PT that is the same as a period of 1 and a unit of
834 'instructions' (i.e. --itrace=i1i).
836 Also the call chain size (default 16, max. 1024) for instructions or
837 transactions events can be specified. e.g.
842 Also the number of last branch entries (default 64, max. 1024) for instructions or
843 transactions events can be specified. e.g.
848 Note that last branch entries are cleared for each sample, so there is no overlap
849 from one sample to the next.
851 To disable trace decoding entirely, use the option --no-itrace.
853 It is also possible to skip events generated (instructions, branches, transactions)
854 at the beginning. This is useful to ignore initialization code.
856 --itrace=i0nss1000000
858 skips the first million instructions.
863 perf script has an option (-D) to "dump" the events i.e. display the binary
866 When -D is used, Intel PT packets are displayed. The packet decoder does not
867 pay attention to PSB packets, but just decodes the bytes - so the packets seen
868 by the actual decoder may not be identical in places where the data is corrupt.
869 One example of that would be when the buffer-switching interrupt has been too
870 slow, and the buffer has been filled completely. In that case, the last packet
871 in the buffer might be truncated and immediately followed by a PSB as the trace
872 continues in the next buffer.
874 To disable the display of Intel PT packets, combine the -D option with
881 By default, perf report will decode trace data found in the perf.data file.
882 This can be further controlled by new option --itrace exactly the same as
883 perf script, with the exception that the default is --itrace=igxe.
889 perf inject also accepts the --itrace option in which case tracing data is
890 removed and replaced with the synthesized events. e.g.
892 perf inject --itrace -i perf.data -o perf.data.new
894 Below is an example of using Intel PT with autofdo. It requires autofdo
895 (https://github.com/google/autofdo) and gcc version 5. The bubble
896 sort example is from the AutoFDO tutorial (https://gcc.gnu.org/wiki/AutoFDO/Tutorial)
897 amended to take the number of elements as a parameter.
899 $ gcc-5 -O3 sort.c -o sort_optimized
900 $ ./sort_optimized 30000
901 Bubble sorting array of 30000 elements
908 $ perf record -e intel_pt//u ./sort 3000
909 Bubble sorting array of 3000 elements
911 [ perf record: Woken up 2 times to write data ]
912 [ perf record: Captured and wrote 3.939 MB perf.data ]
913 $ perf inject -i perf.data -o inj --itrace=i100usle --strip
914 $ ./create_gcov --binary=./sort --profile=inj --gcov=sort.gcov -gcov_version=1
915 $ gcc-5 -O3 -fauto-profile=sort.gcov sort.c -o sort_autofdo
916 $ ./sort_autofdo 30000
917 Bubble sorting array of 30000 elements
920 Note there is currently no advantage to using Intel PT instead of LBR, but
921 that may change in the future if greater use is made of the data.
927 Some hardware has the feature to redirect PEBS records to the Intel PT trace.
928 Recording is selected by using the aux-output config term e.g.
930 perf record -c 10000 -e '{intel_pt/branch=0/,cycles/aux-output/ppp}' uname
932 Note that currently, software only supports redirecting at most one PEBS event.
934 To display PEBS events from the Intel PT trace, use the itrace 'o' option e.g.
936 perf script --itrace=oe