Linux-libre 4.9.189-gnu
[librecmc/linux-libre.git] / sound / soc / samsung / i2s.c
1 /* sound/soc/samsung/i2s.c
2  *
3  * ALSA SoC Audio Layer - Samsung I2S Controller driver
4  *
5  * Copyright (c) 2010 Samsung Electronics Co. Ltd.
6  *      Jaswinder Singh <jassisinghbrar@gmail.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12
13 #include <dt-bindings/sound/samsung-i2s.h>
14 #include <linux/delay.h>
15 #include <linux/slab.h>
16 #include <linux/clk.h>
17 #include <linux/clk-provider.h>
18 #include <linux/io.h>
19 #include <linux/module.h>
20 #include <linux/of.h>
21 #include <linux/of_device.h>
22 #include <linux/of_gpio.h>
23 #include <linux/pm_runtime.h>
24
25 #include <sound/soc.h>
26 #include <sound/pcm_params.h>
27
28 #include <linux/platform_data/asoc-s3c.h>
29
30 #include "dma.h"
31 #include "idma.h"
32 #include "i2s.h"
33 #include "i2s-regs.h"
34
35 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
36
37 enum samsung_dai_type {
38         TYPE_PRI,
39         TYPE_SEC,
40 };
41
42 struct samsung_i2s_variant_regs {
43         unsigned int    bfs_off;
44         unsigned int    rfs_off;
45         unsigned int    sdf_off;
46         unsigned int    txr_off;
47         unsigned int    rclksrc_off;
48         unsigned int    mss_off;
49         unsigned int    cdclkcon_off;
50         unsigned int    lrp_off;
51         unsigned int    bfs_mask;
52         unsigned int    rfs_mask;
53         unsigned int    ftx0cnt_off;
54 };
55
56 struct samsung_i2s_dai_data {
57         int dai_type;
58         u32 quirks;
59         const struct samsung_i2s_variant_regs *i2s_variant_regs;
60 };
61
62 struct i2s_dai {
63         /* Platform device for this DAI */
64         struct platform_device *pdev;
65         /* Memory mapped SFR region */
66         void __iomem    *addr;
67         /* Rate of RCLK source clock */
68         unsigned long rclk_srcrate;
69         /* Frame Clock */
70         unsigned frmclk;
71         /*
72          * Specifically requested RCLK,BCLK by MACHINE Driver.
73          * 0 indicates CPU driver is free to choose any value.
74          */
75         unsigned rfs, bfs;
76         /* I2S Controller's core clock */
77         struct clk *clk;
78         /* Clock for generating I2S signals */
79         struct clk *op_clk;
80         /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
81         struct i2s_dai *pri_dai;
82         /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
83         struct i2s_dai *sec_dai;
84 #define DAI_OPENED      (1 << 0) /* Dai is opened */
85 #define DAI_MANAGER     (1 << 1) /* Dai is the manager */
86         unsigned mode;
87         /* Driver for this DAI */
88         struct snd_soc_dai_driver i2s_dai_drv;
89         /* DMA parameters */
90         struct snd_dmaengine_dai_dma_data dma_playback;
91         struct snd_dmaengine_dai_dma_data dma_capture;
92         struct snd_dmaengine_dai_dma_data idma_playback;
93         dma_filter_fn filter;
94         u32     quirks;
95         u32     suspend_i2smod;
96         u32     suspend_i2scon;
97         u32     suspend_i2spsr;
98         const struct samsung_i2s_variant_regs *variant_regs;
99
100         /* Spinlock protecting access to the device's registers */
101         spinlock_t spinlock;
102         spinlock_t *lock;
103
104         /* Below fields are only valid if this is the primary FIFO */
105         struct clk *clk_table[3];
106         struct clk_onecell_data clk_data;
107 };
108
109 /* Lock for cross i/f checks */
110 static DEFINE_SPINLOCK(lock);
111
112 /* If this is the 'overlay' stereo DAI */
113 static inline bool is_secondary(struct i2s_dai *i2s)
114 {
115         return i2s->pri_dai ? true : false;
116 }
117
118 /* If operating in SoC-Slave mode */
119 static inline bool is_slave(struct i2s_dai *i2s)
120 {
121         u32 mod = readl(i2s->addr + I2SMOD);
122         return (mod & (1 << i2s->variant_regs->mss_off)) ? true : false;
123 }
124
125 /* If this interface of the controller is transmitting data */
126 static inline bool tx_active(struct i2s_dai *i2s)
127 {
128         u32 active;
129
130         if (!i2s)
131                 return false;
132
133         active = readl(i2s->addr + I2SCON);
134
135         if (is_secondary(i2s))
136                 active &= CON_TXSDMA_ACTIVE;
137         else
138                 active &= CON_TXDMA_ACTIVE;
139
140         return active ? true : false;
141 }
142
143 /* Return pointer to the other DAI */
144 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s)
145 {
146         return i2s->pri_dai ? : i2s->sec_dai;
147 }
148
149 /* If the other interface of the controller is transmitting data */
150 static inline bool other_tx_active(struct i2s_dai *i2s)
151 {
152         struct i2s_dai *other = get_other_dai(i2s);
153
154         return tx_active(other);
155 }
156
157 /* If any interface of the controller is transmitting data */
158 static inline bool any_tx_active(struct i2s_dai *i2s)
159 {
160         return tx_active(i2s) || other_tx_active(i2s);
161 }
162
163 /* If this interface of the controller is receiving data */
164 static inline bool rx_active(struct i2s_dai *i2s)
165 {
166         u32 active;
167
168         if (!i2s)
169                 return false;
170
171         active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
172
173         return active ? true : false;
174 }
175
176 /* If the other interface of the controller is receiving data */
177 static inline bool other_rx_active(struct i2s_dai *i2s)
178 {
179         struct i2s_dai *other = get_other_dai(i2s);
180
181         return rx_active(other);
182 }
183
184 /* If any interface of the controller is receiving data */
185 static inline bool any_rx_active(struct i2s_dai *i2s)
186 {
187         return rx_active(i2s) || other_rx_active(i2s);
188 }
189
190 /* If the other DAI is transmitting or receiving data */
191 static inline bool other_active(struct i2s_dai *i2s)
192 {
193         return other_rx_active(i2s) || other_tx_active(i2s);
194 }
195
196 /* If this DAI is transmitting or receiving data */
197 static inline bool this_active(struct i2s_dai *i2s)
198 {
199         return tx_active(i2s) || rx_active(i2s);
200 }
201
202 /* If the controller is active anyway */
203 static inline bool any_active(struct i2s_dai *i2s)
204 {
205         return this_active(i2s) || other_active(i2s);
206 }
207
208 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
209 {
210         return snd_soc_dai_get_drvdata(dai);
211 }
212
213 static inline bool is_opened(struct i2s_dai *i2s)
214 {
215         if (i2s && (i2s->mode & DAI_OPENED))
216                 return true;
217         else
218                 return false;
219 }
220
221 static inline bool is_manager(struct i2s_dai *i2s)
222 {
223         if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
224                 return true;
225         else
226                 return false;
227 }
228
229 /* Read RCLK of I2S (in multiples of LRCLK) */
230 static inline unsigned get_rfs(struct i2s_dai *i2s)
231 {
232         u32 rfs;
233         rfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->rfs_off;
234         rfs &= i2s->variant_regs->rfs_mask;
235
236         switch (rfs) {
237         case 7: return 192;
238         case 6: return 96;
239         case 5: return 128;
240         case 4: return 64;
241         case 3: return 768;
242         case 2: return 384;
243         case 1: return 512;
244         default: return 256;
245         }
246 }
247
248 /* Write RCLK of I2S (in multiples of LRCLK) */
249 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
250 {
251         u32 mod = readl(i2s->addr + I2SMOD);
252         int rfs_shift = i2s->variant_regs->rfs_off;
253
254         mod &= ~(i2s->variant_regs->rfs_mask << rfs_shift);
255
256         switch (rfs) {
257         case 192:
258                 mod |= (EXYNOS7_MOD_RCLK_192FS << rfs_shift);
259                 break;
260         case 96:
261                 mod |= (EXYNOS7_MOD_RCLK_96FS << rfs_shift);
262                 break;
263         case 128:
264                 mod |= (EXYNOS7_MOD_RCLK_128FS << rfs_shift);
265                 break;
266         case 64:
267                 mod |= (EXYNOS7_MOD_RCLK_64FS << rfs_shift);
268                 break;
269         case 768:
270                 mod |= (MOD_RCLK_768FS << rfs_shift);
271                 break;
272         case 512:
273                 mod |= (MOD_RCLK_512FS << rfs_shift);
274                 break;
275         case 384:
276                 mod |= (MOD_RCLK_384FS << rfs_shift);
277                 break;
278         default:
279                 mod |= (MOD_RCLK_256FS << rfs_shift);
280                 break;
281         }
282
283         writel(mod, i2s->addr + I2SMOD);
284 }
285
286 /* Read Bit-Clock of I2S (in multiples of LRCLK) */
287 static inline unsigned get_bfs(struct i2s_dai *i2s)
288 {
289         u32 bfs;
290         bfs = readl(i2s->addr + I2SMOD) >> i2s->variant_regs->bfs_off;
291         bfs &= i2s->variant_regs->bfs_mask;
292
293         switch (bfs) {
294         case 8: return 256;
295         case 7: return 192;
296         case 6: return 128;
297         case 5: return 96;
298         case 4: return 64;
299         case 3: return 24;
300         case 2: return 16;
301         case 1: return 48;
302         default: return 32;
303         }
304 }
305
306 /* Write Bit-Clock of I2S (in multiples of LRCLK) */
307 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
308 {
309         u32 mod = readl(i2s->addr + I2SMOD);
310         int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
311         int bfs_shift = i2s->variant_regs->bfs_off;
312
313         /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
314         if (!tdm && bfs > 48) {
315                 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
316                 return;
317         }
318
319         mod &= ~(i2s->variant_regs->bfs_mask << bfs_shift);
320
321         switch (bfs) {
322         case 48:
323                 mod |= (MOD_BCLK_48FS << bfs_shift);
324                 break;
325         case 32:
326                 mod |= (MOD_BCLK_32FS << bfs_shift);
327                 break;
328         case 24:
329                 mod |= (MOD_BCLK_24FS << bfs_shift);
330                 break;
331         case 16:
332                 mod |= (MOD_BCLK_16FS << bfs_shift);
333                 break;
334         case 64:
335                 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
336                 break;
337         case 96:
338                 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
339                 break;
340         case 128:
341                 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
342                 break;
343         case 192:
344                 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
345                 break;
346         case 256:
347                 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
348                 break;
349         default:
350                 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
351                 return;
352         }
353
354         writel(mod, i2s->addr + I2SMOD);
355 }
356
357 /* Sample-Size */
358 static inline int get_blc(struct i2s_dai *i2s)
359 {
360         int blc = readl(i2s->addr + I2SMOD);
361
362         blc = (blc >> 13) & 0x3;
363
364         switch (blc) {
365         case 2: return 24;
366         case 1: return 8;
367         default: return 16;
368         }
369 }
370
371 /* TX Channel Control */
372 static void i2s_txctrl(struct i2s_dai *i2s, int on)
373 {
374         void __iomem *addr = i2s->addr;
375         int txr_off = i2s->variant_regs->txr_off;
376         u32 con = readl(addr + I2SCON);
377         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
378
379         if (on) {
380                 con |= CON_ACTIVE;
381                 con &= ~CON_TXCH_PAUSE;
382
383                 if (is_secondary(i2s)) {
384                         con |= CON_TXSDMA_ACTIVE;
385                         con &= ~CON_TXSDMA_PAUSE;
386                 } else {
387                         con |= CON_TXDMA_ACTIVE;
388                         con &= ~CON_TXDMA_PAUSE;
389                 }
390
391                 if (any_rx_active(i2s))
392                         mod |= 2 << txr_off;
393                 else
394                         mod |= 0 << txr_off;
395         } else {
396                 if (is_secondary(i2s)) {
397                         con |=  CON_TXSDMA_PAUSE;
398                         con &= ~CON_TXSDMA_ACTIVE;
399                 } else {
400                         con |=  CON_TXDMA_PAUSE;
401                         con &= ~CON_TXDMA_ACTIVE;
402                 }
403
404                 if (other_tx_active(i2s)) {
405                         writel(con, addr + I2SCON);
406                         return;
407                 }
408
409                 con |=  CON_TXCH_PAUSE;
410
411                 if (any_rx_active(i2s))
412                         mod |= 1 << txr_off;
413                 else
414                         con &= ~CON_ACTIVE;
415         }
416
417         writel(mod, addr + I2SMOD);
418         writel(con, addr + I2SCON);
419 }
420
421 /* RX Channel Control */
422 static void i2s_rxctrl(struct i2s_dai *i2s, int on)
423 {
424         void __iomem *addr = i2s->addr;
425         int txr_off = i2s->variant_regs->txr_off;
426         u32 con = readl(addr + I2SCON);
427         u32 mod = readl(addr + I2SMOD) & ~(3 << txr_off);
428
429         if (on) {
430                 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
431                 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
432
433                 if (any_tx_active(i2s))
434                         mod |= 2 << txr_off;
435                 else
436                         mod |= 1 << txr_off;
437         } else {
438                 con |=  CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
439                 con &= ~CON_RXDMA_ACTIVE;
440
441                 if (any_tx_active(i2s))
442                         mod |= 0 << txr_off;
443                 else
444                         con &= ~CON_ACTIVE;
445         }
446
447         writel(mod, addr + I2SMOD);
448         writel(con, addr + I2SCON);
449 }
450
451 /* Flush FIFO of an interface */
452 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
453 {
454         void __iomem *fic;
455         u32 val;
456
457         if (!i2s)
458                 return;
459
460         if (is_secondary(i2s))
461                 fic = i2s->addr + I2SFICS;
462         else
463                 fic = i2s->addr + I2SFIC;
464
465         /* Flush the FIFO */
466         writel(readl(fic) | flush, fic);
467
468         /* Be patient */
469         val = msecs_to_loops(1) / 1000; /* 1 usec */
470         while (--val)
471                 cpu_relax();
472
473         writel(readl(fic) & ~flush, fic);
474 }
475
476 static int i2s_set_sysclk(struct snd_soc_dai *dai,
477           int clk_id, unsigned int rfs, int dir)
478 {
479         struct i2s_dai *i2s = to_info(dai);
480         struct i2s_dai *other = get_other_dai(i2s);
481         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
482         unsigned int cdcon_mask = 1 << i2s_regs->cdclkcon_off;
483         unsigned int rsrc_mask = 1 << i2s_regs->rclksrc_off;
484         u32 mod, mask, val = 0;
485         unsigned long flags;
486
487         spin_lock_irqsave(i2s->lock, flags);
488         mod = readl(i2s->addr + I2SMOD);
489         spin_unlock_irqrestore(i2s->lock, flags);
490
491         switch (clk_id) {
492         case SAMSUNG_I2S_OPCLK:
493                 mask = MOD_OPCLK_MASK;
494                 val = dir;
495                 break;
496         case SAMSUNG_I2S_CDCLK:
497                 mask = 1 << i2s_regs->cdclkcon_off;
498                 /* Shouldn't matter in GATING(CLOCK_IN) mode */
499                 if (dir == SND_SOC_CLOCK_IN)
500                         rfs = 0;
501
502                 if ((rfs && other && other->rfs && (other->rfs != rfs)) ||
503                                 (any_active(i2s) &&
504                                 (((dir == SND_SOC_CLOCK_IN)
505                                         && !(mod & cdcon_mask)) ||
506                                 ((dir == SND_SOC_CLOCK_OUT)
507                                         && (mod & cdcon_mask))))) {
508                         dev_err(&i2s->pdev->dev,
509                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
510                         return -EAGAIN;
511                 }
512
513                 if (dir == SND_SOC_CLOCK_IN)
514                         val = 1 << i2s_regs->cdclkcon_off;
515
516                 i2s->rfs = rfs;
517                 break;
518
519         case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
520         case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
521                 mask = 1 << i2s_regs->rclksrc_off;
522
523                 if ((i2s->quirks & QUIRK_NO_MUXPSR)
524                                 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
525                         clk_id = 0;
526                 else
527                         clk_id = 1;
528
529                 if (!any_active(i2s)) {
530                         if (i2s->op_clk && !IS_ERR(i2s->op_clk)) {
531                                 if ((clk_id && !(mod & rsrc_mask)) ||
532                                         (!clk_id && (mod & rsrc_mask))) {
533                                         clk_disable_unprepare(i2s->op_clk);
534                                         clk_put(i2s->op_clk);
535                                 } else {
536                                         i2s->rclk_srcrate =
537                                                 clk_get_rate(i2s->op_clk);
538                                         return 0;
539                                 }
540                         }
541
542                         if (clk_id)
543                                 i2s->op_clk = clk_get(&i2s->pdev->dev,
544                                                 "i2s_opclk1");
545                         else
546                                 i2s->op_clk = clk_get(&i2s->pdev->dev,
547                                                 "i2s_opclk0");
548
549                         if (WARN_ON(IS_ERR(i2s->op_clk)))
550                                 return PTR_ERR(i2s->op_clk);
551
552                         clk_prepare_enable(i2s->op_clk);
553                         i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
554
555                         /* Over-ride the other's */
556                         if (other) {
557                                 other->op_clk = i2s->op_clk;
558                                 other->rclk_srcrate = i2s->rclk_srcrate;
559                         }
560                 } else if ((!clk_id && (mod & rsrc_mask))
561                                 || (clk_id && !(mod & rsrc_mask))) {
562                         dev_err(&i2s->pdev->dev,
563                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
564                         return -EAGAIN;
565                 } else {
566                         /* Call can't be on the active DAI */
567                         i2s->op_clk = other->op_clk;
568                         i2s->rclk_srcrate = other->rclk_srcrate;
569                         return 0;
570                 }
571
572                 if (clk_id == 1)
573                         val = 1 << i2s_regs->rclksrc_off;
574                 break;
575         default:
576                 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
577                 return -EINVAL;
578         }
579
580         spin_lock_irqsave(i2s->lock, flags);
581         mod = readl(i2s->addr + I2SMOD);
582         mod = (mod & ~mask) | val;
583         writel(mod, i2s->addr + I2SMOD);
584         spin_unlock_irqrestore(i2s->lock, flags);
585
586         return 0;
587 }
588
589 static int i2s_set_fmt(struct snd_soc_dai *dai,
590         unsigned int fmt)
591 {
592         struct i2s_dai *i2s = to_info(dai);
593         int lrp_shift, sdf_shift, sdf_mask, lrp_rlow, mod_slave;
594         u32 mod, tmp = 0;
595         unsigned long flags;
596
597         lrp_shift = i2s->variant_regs->lrp_off;
598         sdf_shift = i2s->variant_regs->sdf_off;
599         mod_slave = 1 << i2s->variant_regs->mss_off;
600
601         sdf_mask = MOD_SDF_MASK << sdf_shift;
602         lrp_rlow = MOD_LR_RLOW << lrp_shift;
603
604         /* Format is priority */
605         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
606         case SND_SOC_DAIFMT_RIGHT_J:
607                 tmp |= lrp_rlow;
608                 tmp |= (MOD_SDF_MSB << sdf_shift);
609                 break;
610         case SND_SOC_DAIFMT_LEFT_J:
611                 tmp |= lrp_rlow;
612                 tmp |= (MOD_SDF_LSB << sdf_shift);
613                 break;
614         case SND_SOC_DAIFMT_I2S:
615                 tmp |= (MOD_SDF_IIS << sdf_shift);
616                 break;
617         default:
618                 dev_err(&i2s->pdev->dev, "Format not supported\n");
619                 return -EINVAL;
620         }
621
622         /*
623          * INV flag is relative to the FORMAT flag - if set it simply
624          * flips the polarity specified by the Standard
625          */
626         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
627         case SND_SOC_DAIFMT_NB_NF:
628                 break;
629         case SND_SOC_DAIFMT_NB_IF:
630                 if (tmp & lrp_rlow)
631                         tmp &= ~lrp_rlow;
632                 else
633                         tmp |= lrp_rlow;
634                 break;
635         default:
636                 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
637                 return -EINVAL;
638         }
639
640         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
641         case SND_SOC_DAIFMT_CBM_CFM:
642                 tmp |= mod_slave;
643                 break;
644         case SND_SOC_DAIFMT_CBS_CFS:
645                 /*
646                  * Set default source clock in Master mode, only when the
647                  * CLK_I2S_RCLK_SRC clock is not exposed so we ensure any
648                  * clock configuration assigned in DT is not overwritten.
649                  */
650                 if (i2s->rclk_srcrate == 0 && i2s->clk_data.clks == NULL)
651                         i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
652                                                         0, SND_SOC_CLOCK_IN);
653                 break;
654         default:
655                 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
656                 return -EINVAL;
657         }
658
659         spin_lock_irqsave(i2s->lock, flags);
660         mod = readl(i2s->addr + I2SMOD);
661         /*
662          * Don't change the I2S mode if any controller is active on this
663          * channel.
664          */
665         if (any_active(i2s) &&
666                 ((mod & (sdf_mask | lrp_rlow | mod_slave)) != tmp)) {
667                 spin_unlock_irqrestore(i2s->lock, flags);
668                 dev_err(&i2s->pdev->dev,
669                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
670                 return -EAGAIN;
671         }
672
673         mod &= ~(sdf_mask | lrp_rlow | mod_slave);
674         mod |= tmp;
675         writel(mod, i2s->addr + I2SMOD);
676         spin_unlock_irqrestore(i2s->lock, flags);
677
678         return 0;
679 }
680
681 static int i2s_hw_params(struct snd_pcm_substream *substream,
682         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
683 {
684         struct i2s_dai *i2s = to_info(dai);
685         u32 mod, mask = 0, val = 0;
686         unsigned long flags;
687
688         if (!is_secondary(i2s))
689                 mask |= (MOD_DC2_EN | MOD_DC1_EN);
690
691         switch (params_channels(params)) {
692         case 6:
693                 val |= MOD_DC2_EN;
694         case 4:
695                 val |= MOD_DC1_EN;
696                 break;
697         case 2:
698                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
699                         i2s->dma_playback.addr_width = 4;
700                 else
701                         i2s->dma_capture.addr_width = 4;
702                 break;
703         case 1:
704                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
705                         i2s->dma_playback.addr_width = 2;
706                 else
707                         i2s->dma_capture.addr_width = 2;
708
709                 break;
710         default:
711                 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
712                                 params_channels(params));
713                 return -EINVAL;
714         }
715
716         if (is_secondary(i2s))
717                 mask |= MOD_BLCS_MASK;
718         else
719                 mask |= MOD_BLCP_MASK;
720
721         if (is_manager(i2s))
722                 mask |= MOD_BLC_MASK;
723
724         switch (params_width(params)) {
725         case 8:
726                 if (is_secondary(i2s))
727                         val |= MOD_BLCS_8BIT;
728                 else
729                         val |= MOD_BLCP_8BIT;
730                 if (is_manager(i2s))
731                         val |= MOD_BLC_8BIT;
732                 break;
733         case 16:
734                 if (is_secondary(i2s))
735                         val |= MOD_BLCS_16BIT;
736                 else
737                         val |= MOD_BLCP_16BIT;
738                 if (is_manager(i2s))
739                         val |= MOD_BLC_16BIT;
740                 break;
741         case 24:
742                 if (is_secondary(i2s))
743                         val |= MOD_BLCS_24BIT;
744                 else
745                         val |= MOD_BLCP_24BIT;
746                 if (is_manager(i2s))
747                         val |= MOD_BLC_24BIT;
748                 break;
749         default:
750                 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
751                                 params_format(params));
752                 return -EINVAL;
753         }
754
755         spin_lock_irqsave(i2s->lock, flags);
756         mod = readl(i2s->addr + I2SMOD);
757         mod = (mod & ~mask) | val;
758         writel(mod, i2s->addr + I2SMOD);
759         spin_unlock_irqrestore(i2s->lock, flags);
760
761         snd_soc_dai_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
762
763         i2s->frmclk = params_rate(params);
764
765         return 0;
766 }
767
768 /* We set constraints on the substream acc to the version of I2S */
769 static int i2s_startup(struct snd_pcm_substream *substream,
770           struct snd_soc_dai *dai)
771 {
772         struct i2s_dai *i2s = to_info(dai);
773         struct i2s_dai *other = get_other_dai(i2s);
774         unsigned long flags;
775
776         spin_lock_irqsave(&lock, flags);
777
778         i2s->mode |= DAI_OPENED;
779
780         if (is_manager(other))
781                 i2s->mode &= ~DAI_MANAGER;
782         else
783                 i2s->mode |= DAI_MANAGER;
784
785         if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
786                 writel(CON_RSTCLR, i2s->addr + I2SCON);
787
788         spin_unlock_irqrestore(&lock, flags);
789
790         return 0;
791 }
792
793 static void i2s_shutdown(struct snd_pcm_substream *substream,
794         struct snd_soc_dai *dai)
795 {
796         struct i2s_dai *i2s = to_info(dai);
797         struct i2s_dai *other = get_other_dai(i2s);
798         unsigned long flags;
799
800         spin_lock_irqsave(&lock, flags);
801
802         i2s->mode &= ~DAI_OPENED;
803         i2s->mode &= ~DAI_MANAGER;
804
805         if (is_opened(other))
806                 other->mode |= DAI_MANAGER;
807
808         /* Reset any constraint on RFS and BFS */
809         i2s->rfs = 0;
810         i2s->bfs = 0;
811
812         spin_unlock_irqrestore(&lock, flags);
813 }
814
815 static int config_setup(struct i2s_dai *i2s)
816 {
817         struct i2s_dai *other = get_other_dai(i2s);
818         unsigned rfs, bfs, blc;
819         u32 psr;
820
821         blc = get_blc(i2s);
822
823         bfs = i2s->bfs;
824
825         if (!bfs && other)
826                 bfs = other->bfs;
827
828         /* Select least possible multiple(2) if no constraint set */
829         if (!bfs)
830                 bfs = blc * 2;
831
832         rfs = i2s->rfs;
833
834         if (!rfs && other)
835                 rfs = other->rfs;
836
837         if ((rfs == 256 || rfs == 512) && (blc == 24)) {
838                 dev_err(&i2s->pdev->dev,
839                         "%d-RFS not supported for 24-blc\n", rfs);
840                 return -EINVAL;
841         }
842
843         if (!rfs) {
844                 if (bfs == 16 || bfs == 32)
845                         rfs = 256;
846                 else
847                         rfs = 384;
848         }
849
850         /* If already setup and running */
851         if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
852                 dev_err(&i2s->pdev->dev,
853                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
854                 return -EAGAIN;
855         }
856
857         set_bfs(i2s, bfs);
858         set_rfs(i2s, rfs);
859
860         /* Don't bother with PSR in Slave mode */
861         if (is_slave(i2s))
862                 return 0;
863
864         if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
865                 struct clk *rclksrc = i2s->clk_table[CLK_I2S_RCLK_SRC];
866
867                 if (i2s->rclk_srcrate == 0 && rclksrc && !IS_ERR(rclksrc))
868                         i2s->rclk_srcrate = clk_get_rate(rclksrc);
869
870                 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
871                 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
872                 dev_dbg(&i2s->pdev->dev,
873                         "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
874                                 i2s->rclk_srcrate, psr, rfs, bfs);
875         }
876
877         return 0;
878 }
879
880 static int i2s_trigger(struct snd_pcm_substream *substream,
881         int cmd, struct snd_soc_dai *dai)
882 {
883         int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
884         struct snd_soc_pcm_runtime *rtd = substream->private_data;
885         struct i2s_dai *i2s = to_info(rtd->cpu_dai);
886         unsigned long flags;
887
888         switch (cmd) {
889         case SNDRV_PCM_TRIGGER_START:
890         case SNDRV_PCM_TRIGGER_RESUME:
891         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
892                 spin_lock_irqsave(i2s->lock, flags);
893
894                 if (config_setup(i2s)) {
895                         spin_unlock_irqrestore(i2s->lock, flags);
896                         return -EINVAL;
897                 }
898
899                 if (capture)
900                         i2s_rxctrl(i2s, 1);
901                 else
902                         i2s_txctrl(i2s, 1);
903
904                 spin_unlock_irqrestore(i2s->lock, flags);
905                 break;
906         case SNDRV_PCM_TRIGGER_STOP:
907         case SNDRV_PCM_TRIGGER_SUSPEND:
908         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
909                 spin_lock_irqsave(i2s->lock, flags);
910
911                 if (capture) {
912                         i2s_rxctrl(i2s, 0);
913                         i2s_fifo(i2s, FIC_RXFLUSH);
914                 } else {
915                         i2s_txctrl(i2s, 0);
916                         i2s_fifo(i2s, FIC_TXFLUSH);
917                 }
918
919                 spin_unlock_irqrestore(i2s->lock, flags);
920                 break;
921         }
922
923         return 0;
924 }
925
926 static int i2s_set_clkdiv(struct snd_soc_dai *dai,
927         int div_id, int div)
928 {
929         struct i2s_dai *i2s = to_info(dai);
930         struct i2s_dai *other = get_other_dai(i2s);
931
932         switch (div_id) {
933         case SAMSUNG_I2S_DIV_BCLK:
934                 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
935                         || (other && other->bfs && (other->bfs != div))) {
936                         dev_err(&i2s->pdev->dev,
937                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
938                         return -EAGAIN;
939                 }
940                 i2s->bfs = div;
941                 break;
942         default:
943                 dev_err(&i2s->pdev->dev,
944                         "Invalid clock divider(%d)\n", div_id);
945                 return -EINVAL;
946         }
947
948         return 0;
949 }
950
951 static snd_pcm_sframes_t
952 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
953 {
954         struct i2s_dai *i2s = to_info(dai);
955         u32 reg = readl(i2s->addr + I2SFIC);
956         snd_pcm_sframes_t delay;
957         const struct samsung_i2s_variant_regs *i2s_regs = i2s->variant_regs;
958
959         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
960                 delay = FIC_RXCOUNT(reg);
961         else if (is_secondary(i2s))
962                 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
963         else
964                 delay = (reg >> i2s_regs->ftx0cnt_off) & 0x7f;
965
966         return delay;
967 }
968
969 #ifdef CONFIG_PM
970 static int i2s_suspend(struct snd_soc_dai *dai)
971 {
972         struct i2s_dai *i2s = to_info(dai);
973
974         i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
975         i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
976         i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
977
978         return 0;
979 }
980
981 static int i2s_resume(struct snd_soc_dai *dai)
982 {
983         struct i2s_dai *i2s = to_info(dai);
984
985         writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
986         writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
987         writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
988
989         return 0;
990 }
991 #else
992 #define i2s_suspend NULL
993 #define i2s_resume  NULL
994 #endif
995
996 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
997 {
998         struct i2s_dai *i2s = to_info(dai);
999         struct i2s_dai *other = get_other_dai(i2s);
1000         unsigned long flags;
1001
1002         if (is_secondary(i2s)) { /* If this is probe on the secondary DAI */
1003                 snd_soc_dai_init_dma_data(dai, &other->sec_dai->dma_playback,
1004                                            NULL);
1005         } else {
1006                 snd_soc_dai_init_dma_data(dai, &i2s->dma_playback,
1007                                            &i2s->dma_capture);
1008
1009                 if (i2s->quirks & QUIRK_NEED_RSTCLR)
1010                         writel(CON_RSTCLR, i2s->addr + I2SCON);
1011
1012                 if (i2s->quirks & QUIRK_SUPPORTS_IDMA)
1013                         idma_reg_addr_init(i2s->addr,
1014                                         i2s->sec_dai->idma_playback.addr);
1015         }
1016
1017         /* Reset any constraint on RFS and BFS */
1018         i2s->rfs = 0;
1019         i2s->bfs = 0;
1020         i2s->rclk_srcrate = 0;
1021
1022         spin_lock_irqsave(i2s->lock, flags);
1023         i2s_txctrl(i2s, 0);
1024         i2s_rxctrl(i2s, 0);
1025         i2s_fifo(i2s, FIC_TXFLUSH);
1026         i2s_fifo(other, FIC_TXFLUSH);
1027         i2s_fifo(i2s, FIC_RXFLUSH);
1028         spin_unlock_irqrestore(i2s->lock, flags);
1029
1030         /* Gate CDCLK by default */
1031         if (!is_opened(other))
1032                 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1033                                 0, SND_SOC_CLOCK_IN);
1034
1035         return 0;
1036 }
1037
1038 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1039 {
1040         struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
1041         unsigned long flags;
1042
1043         if (!is_secondary(i2s)) {
1044                 if (i2s->quirks & QUIRK_NEED_RSTCLR) {
1045                         spin_lock_irqsave(i2s->lock, flags);
1046                         writel(0, i2s->addr + I2SCON);
1047                         spin_unlock_irqrestore(i2s->lock, flags);
1048                 }
1049         }
1050
1051         return 0;
1052 }
1053
1054 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1055         .trigger = i2s_trigger,
1056         .hw_params = i2s_hw_params,
1057         .set_fmt = i2s_set_fmt,
1058         .set_clkdiv = i2s_set_clkdiv,
1059         .set_sysclk = i2s_set_sysclk,
1060         .startup = i2s_startup,
1061         .shutdown = i2s_shutdown,
1062         .delay = i2s_delay,
1063 };
1064
1065 static const struct snd_soc_component_driver samsung_i2s_component = {
1066         .name           = "samsung-i2s",
1067 };
1068
1069 #define SAMSUNG_I2S_RATES       SNDRV_PCM_RATE_8000_96000
1070
1071 #define SAMSUNG_I2S_FMTS        (SNDRV_PCM_FMTBIT_S8 | \
1072                                         SNDRV_PCM_FMTBIT_S16_LE | \
1073                                         SNDRV_PCM_FMTBIT_S24_LE)
1074
1075 static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
1076 {
1077         struct i2s_dai *i2s;
1078         int ret;
1079
1080         i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
1081         if (i2s == NULL)
1082                 return NULL;
1083
1084         i2s->pdev = pdev;
1085         i2s->pri_dai = NULL;
1086         i2s->sec_dai = NULL;
1087         i2s->i2s_dai_drv.symmetric_rates = 1;
1088         i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
1089         i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
1090         i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
1091         i2s->i2s_dai_drv.suspend = i2s_suspend;
1092         i2s->i2s_dai_drv.resume = i2s_resume;
1093         i2s->i2s_dai_drv.playback.channels_min = 1;
1094         i2s->i2s_dai_drv.playback.channels_max = 2;
1095         i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
1096         i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
1097
1098         if (!sec) {
1099                 i2s->i2s_dai_drv.capture.channels_min = 1;
1100                 i2s->i2s_dai_drv.capture.channels_max = 2;
1101                 i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
1102                 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
1103                 dev_set_drvdata(&i2s->pdev->dev, i2s);
1104         } else {        /* Create a new platform_device for Secondary */
1105                 i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1);
1106                 if (!i2s->pdev)
1107                         return NULL;
1108
1109                 i2s->pdev->dev.parent = &pdev->dev;
1110
1111                 platform_set_drvdata(i2s->pdev, i2s);
1112                 ret = platform_device_add(i2s->pdev);
1113                 if (ret < 0)
1114                         return NULL;
1115         }
1116
1117         return i2s;
1118 }
1119
1120 static void i2s_free_sec_dai(struct i2s_dai *i2s)
1121 {
1122         platform_device_del(i2s->pdev);
1123 }
1124
1125 #ifdef CONFIG_PM
1126 static int i2s_runtime_suspend(struct device *dev)
1127 {
1128         struct i2s_dai *i2s = dev_get_drvdata(dev);
1129
1130         clk_disable_unprepare(i2s->clk);
1131
1132         return 0;
1133 }
1134
1135 static int i2s_runtime_resume(struct device *dev)
1136 {
1137         struct i2s_dai *i2s = dev_get_drvdata(dev);
1138
1139         clk_prepare_enable(i2s->clk);
1140
1141         return 0;
1142 }
1143 #endif /* CONFIG_PM */
1144
1145 static void i2s_unregister_clocks(struct i2s_dai *i2s)
1146 {
1147         int i;
1148
1149         for (i = 0; i < i2s->clk_data.clk_num; i++) {
1150                 if (!IS_ERR(i2s->clk_table[i]))
1151                         clk_unregister(i2s->clk_table[i]);
1152         }
1153 }
1154
1155 static void i2s_unregister_clock_provider(struct platform_device *pdev)
1156 {
1157         struct i2s_dai *i2s = dev_get_drvdata(&pdev->dev);
1158
1159         of_clk_del_provider(pdev->dev.of_node);
1160         i2s_unregister_clocks(i2s);
1161 }
1162
1163 static int i2s_register_clock_provider(struct platform_device *pdev)
1164 {
1165         struct device *dev = &pdev->dev;
1166         struct i2s_dai *i2s = dev_get_drvdata(dev);
1167         const char *clk_name[2] = { "i2s_opclk0", "i2s_opclk1" };
1168         const char *p_names[2] = { NULL };
1169         const struct samsung_i2s_variant_regs *reg_info = i2s->variant_regs;
1170         struct clk *rclksrc;
1171         int ret, i;
1172
1173         /* Register the clock provider only if it's expected in the DTB */
1174         if (!of_find_property(dev->of_node, "#clock-cells", NULL))
1175                 return 0;
1176
1177         /* Get the RCLKSRC mux clock parent clock names */
1178         for (i = 0; i < ARRAY_SIZE(p_names); i++) {
1179                 rclksrc = clk_get(dev, clk_name[i]);
1180                 if (IS_ERR(rclksrc))
1181                         continue;
1182                 p_names[i] = __clk_get_name(rclksrc);
1183                 clk_put(rclksrc);
1184         }
1185
1186         if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
1187                 /* Activate the prescaler */
1188                 u32 val = readl(i2s->addr + I2SPSR);
1189                 writel(val | PSR_PSREN, i2s->addr + I2SPSR);
1190
1191                 i2s->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(NULL,
1192                                 "i2s_rclksrc", p_names, ARRAY_SIZE(p_names),
1193                                 CLK_SET_RATE_NO_REPARENT | CLK_SET_RATE_PARENT,
1194                                 i2s->addr + I2SMOD, reg_info->rclksrc_off,
1195                                 1, 0, i2s->lock);
1196
1197                 i2s->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(NULL,
1198                                 "i2s_presc", "i2s_rclksrc",
1199                                 CLK_SET_RATE_PARENT,
1200                                 i2s->addr + I2SPSR, 8, 6, 0, i2s->lock);
1201
1202                 p_names[0] = "i2s_presc";
1203                 i2s->clk_data.clk_num = 2;
1204         }
1205         of_property_read_string_index(dev->of_node,
1206                                 "clock-output-names", 0, &clk_name[0]);
1207
1208         i2s->clk_table[CLK_I2S_CDCLK] = clk_register_gate(NULL, clk_name[0],
1209                                 p_names[0], CLK_SET_RATE_PARENT,
1210                                 i2s->addr + I2SMOD, reg_info->cdclkcon_off,
1211                                 CLK_GATE_SET_TO_DISABLE, i2s->lock);
1212
1213         i2s->clk_data.clk_num += 1;
1214         i2s->clk_data.clks = i2s->clk_table;
1215
1216         ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1217                                   &i2s->clk_data);
1218         if (ret < 0) {
1219                 dev_err(dev, "failed to add clock provider: %d\n", ret);
1220                 i2s_unregister_clocks(i2s);
1221         }
1222
1223         return ret;
1224 }
1225
1226 static int samsung_i2s_probe(struct platform_device *pdev)
1227 {
1228         struct i2s_dai *pri_dai, *sec_dai = NULL;
1229         struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1230         struct samsung_i2s *i2s_cfg = NULL;
1231         struct resource *res;
1232         u32 regs_base, quirks = 0, idma_addr = 0;
1233         struct device_node *np = pdev->dev.of_node;
1234         const struct samsung_i2s_dai_data *i2s_dai_data;
1235         int ret;
1236
1237         if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node)
1238                 i2s_dai_data = of_device_get_match_data(&pdev->dev);
1239         else
1240                 i2s_dai_data = (struct samsung_i2s_dai_data *)
1241                                 platform_get_device_id(pdev)->driver_data;
1242
1243         /* Call during the secondary interface registration */
1244         if (i2s_dai_data->dai_type == TYPE_SEC) {
1245                 sec_dai = dev_get_drvdata(&pdev->dev);
1246                 if (!sec_dai) {
1247                         dev_err(&pdev->dev, "Unable to get drvdata\n");
1248                         return -EFAULT;
1249                 }
1250                 ret = samsung_asoc_dma_platform_register(&pdev->dev,
1251                                         sec_dai->filter, "tx-sec", NULL);
1252                 if (ret != 0)
1253                         return ret;
1254
1255                 return devm_snd_soc_register_component(&sec_dai->pdev->dev,
1256                                                 &samsung_i2s_component,
1257                                                 &sec_dai->i2s_dai_drv, 1);
1258         }
1259
1260         pri_dai = i2s_alloc_dai(pdev, false);
1261         if (!pri_dai) {
1262                 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
1263                 return -ENOMEM;
1264         }
1265
1266         spin_lock_init(&pri_dai->spinlock);
1267         pri_dai->lock = &pri_dai->spinlock;
1268
1269         if (!np) {
1270                 if (i2s_pdata == NULL) {
1271                         dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1272                         return -EINVAL;
1273                 }
1274
1275                 pri_dai->dma_playback.filter_data = i2s_pdata->dma_playback;
1276                 pri_dai->dma_capture.filter_data = i2s_pdata->dma_capture;
1277                 pri_dai->filter = i2s_pdata->dma_filter;
1278
1279                 if (&i2s_pdata->type)
1280                         i2s_cfg = &i2s_pdata->type.i2s;
1281
1282                 if (i2s_cfg) {
1283                         quirks = i2s_cfg->quirks;
1284                         idma_addr = i2s_cfg->idma_addr;
1285                 }
1286         } else {
1287                 quirks = i2s_dai_data->quirks;
1288                 if (of_property_read_u32(np, "samsung,idma-addr",
1289                                          &idma_addr)) {
1290                         if (quirks & QUIRK_SUPPORTS_IDMA) {
1291                                 dev_info(&pdev->dev, "idma address is not"\
1292                                                 "specified");
1293                         }
1294                 }
1295         }
1296
1297         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1298         pri_dai->addr = devm_ioremap_resource(&pdev->dev, res);
1299         if (IS_ERR(pri_dai->addr))
1300                 return PTR_ERR(pri_dai->addr);
1301
1302         regs_base = res->start;
1303
1304         pri_dai->clk = devm_clk_get(&pdev->dev, "iis");
1305         if (IS_ERR(pri_dai->clk)) {
1306                 dev_err(&pdev->dev, "Failed to get iis clock\n");
1307                 return PTR_ERR(pri_dai->clk);
1308         }
1309
1310         ret = clk_prepare_enable(pri_dai->clk);
1311         if (ret != 0) {
1312                 dev_err(&pdev->dev, "failed to enable clock: %d\n", ret);
1313                 return ret;
1314         }
1315         pri_dai->dma_playback.addr = regs_base + I2STXD;
1316         pri_dai->dma_capture.addr = regs_base + I2SRXD;
1317         pri_dai->dma_playback.chan_name = "tx";
1318         pri_dai->dma_capture.chan_name = "rx";
1319         pri_dai->dma_playback.addr_width = 4;
1320         pri_dai->dma_capture.addr_width = 4;
1321         pri_dai->quirks = quirks;
1322         pri_dai->variant_regs = i2s_dai_data->i2s_variant_regs;
1323
1324         if (quirks & QUIRK_PRI_6CHAN)
1325                 pri_dai->i2s_dai_drv.playback.channels_max = 6;
1326
1327         ret = samsung_asoc_dma_platform_register(&pdev->dev, pri_dai->filter,
1328                                                  NULL, NULL);
1329         if (ret < 0)
1330                 goto err_disable_clk;
1331
1332         if (quirks & QUIRK_SEC_DAI) {
1333                 sec_dai = i2s_alloc_dai(pdev, true);
1334                 if (!sec_dai) {
1335                         dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
1336                         ret = -ENOMEM;
1337                         goto err_disable_clk;
1338                 }
1339
1340                 sec_dai->lock = &pri_dai->spinlock;
1341                 sec_dai->variant_regs = pri_dai->variant_regs;
1342                 sec_dai->dma_playback.addr = regs_base + I2STXDS;
1343                 sec_dai->dma_playback.chan_name = "tx-sec";
1344
1345                 if (!np) {
1346                         sec_dai->dma_playback.filter_data = i2s_pdata->dma_play_sec;
1347                         sec_dai->filter = i2s_pdata->dma_filter;
1348                 }
1349
1350                 sec_dai->dma_playback.addr_width = 4;
1351                 sec_dai->addr = pri_dai->addr;
1352                 sec_dai->clk = pri_dai->clk;
1353                 sec_dai->quirks = quirks;
1354                 sec_dai->idma_playback.addr = idma_addr;
1355                 sec_dai->pri_dai = pri_dai;
1356                 pri_dai->sec_dai = sec_dai;
1357         }
1358
1359         if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1360                 dev_err(&pdev->dev, "Unable to configure gpio\n");
1361                 ret = -EINVAL;
1362                 goto err_disable_clk;
1363         }
1364
1365         ret = devm_snd_soc_register_component(&pri_dai->pdev->dev,
1366                                         &samsung_i2s_component,
1367                                         &pri_dai->i2s_dai_drv, 1);
1368         if (ret < 0)
1369                 goto err_free_dai;
1370
1371
1372         pm_runtime_enable(&pdev->dev);
1373
1374         ret = i2s_register_clock_provider(pdev);
1375         if (!ret)
1376                 return 0;
1377
1378         pm_runtime_disable(&pdev->dev);
1379 err_free_dai:
1380         if (sec_dai)
1381                 i2s_free_sec_dai(sec_dai);
1382 err_disable_clk:
1383         clk_disable_unprepare(pri_dai->clk);
1384         return ret;
1385 }
1386
1387 static int samsung_i2s_remove(struct platform_device *pdev)
1388 {
1389         struct i2s_dai *i2s, *other;
1390
1391         i2s = dev_get_drvdata(&pdev->dev);
1392         other = get_other_dai(i2s);
1393
1394         if (other) {
1395                 other->pri_dai = NULL;
1396                 other->sec_dai = NULL;
1397         } else {
1398                 pm_runtime_disable(&pdev->dev);
1399         }
1400
1401         if (!is_secondary(i2s)) {
1402                 i2s_unregister_clock_provider(pdev);
1403                 clk_disable_unprepare(i2s->clk);
1404         }
1405
1406         i2s->pri_dai = NULL;
1407         i2s->sec_dai = NULL;
1408
1409         return 0;
1410 }
1411
1412 static const struct samsung_i2s_variant_regs i2sv3_regs = {
1413         .bfs_off = 1,
1414         .rfs_off = 3,
1415         .sdf_off = 5,
1416         .txr_off = 8,
1417         .rclksrc_off = 10,
1418         .mss_off = 11,
1419         .cdclkcon_off = 12,
1420         .lrp_off = 7,
1421         .bfs_mask = 0x3,
1422         .rfs_mask = 0x3,
1423         .ftx0cnt_off = 8,
1424 };
1425
1426 static const struct samsung_i2s_variant_regs i2sv6_regs = {
1427         .bfs_off = 0,
1428         .rfs_off = 4,
1429         .sdf_off = 6,
1430         .txr_off = 8,
1431         .rclksrc_off = 10,
1432         .mss_off = 11,
1433         .cdclkcon_off = 12,
1434         .lrp_off = 15,
1435         .bfs_mask = 0xf,
1436         .rfs_mask = 0x3,
1437         .ftx0cnt_off = 8,
1438 };
1439
1440 static const struct samsung_i2s_variant_regs i2sv7_regs = {
1441         .bfs_off = 0,
1442         .rfs_off = 4,
1443         .sdf_off = 7,
1444         .txr_off = 9,
1445         .rclksrc_off = 11,
1446         .mss_off = 12,
1447         .cdclkcon_off = 22,
1448         .lrp_off = 15,
1449         .bfs_mask = 0xf,
1450         .rfs_mask = 0x7,
1451         .ftx0cnt_off = 0,
1452 };
1453
1454 static const struct samsung_i2s_variant_regs i2sv5_i2s1_regs = {
1455         .bfs_off = 0,
1456         .rfs_off = 3,
1457         .sdf_off = 6,
1458         .txr_off = 8,
1459         .rclksrc_off = 10,
1460         .mss_off = 11,
1461         .cdclkcon_off = 12,
1462         .lrp_off = 15,
1463         .bfs_mask = 0x7,
1464         .rfs_mask = 0x7,
1465         .ftx0cnt_off = 8,
1466 };
1467
1468 static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1469         .dai_type = TYPE_PRI,
1470         .quirks = QUIRK_NO_MUXPSR,
1471         .i2s_variant_regs = &i2sv3_regs,
1472 };
1473
1474 static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1475         .dai_type = TYPE_PRI,
1476         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1477                         QUIRK_SUPPORTS_IDMA,
1478         .i2s_variant_regs = &i2sv3_regs,
1479 };
1480
1481 static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1482         .dai_type = TYPE_PRI,
1483         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1484                         QUIRK_SUPPORTS_TDM | QUIRK_SUPPORTS_IDMA,
1485         .i2s_variant_regs = &i2sv6_regs,
1486 };
1487
1488 static const struct samsung_i2s_dai_data i2sv7_dai_type = {
1489         .dai_type = TYPE_PRI,
1490         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1491                         QUIRK_SUPPORTS_TDM,
1492         .i2s_variant_regs = &i2sv7_regs,
1493 };
1494
1495 static const struct samsung_i2s_dai_data i2sv5_dai_type_i2s1 = {
1496         .dai_type = TYPE_PRI,
1497         .quirks = QUIRK_PRI_6CHAN | QUIRK_NEED_RSTCLR,
1498         .i2s_variant_regs = &i2sv5_i2s1_regs,
1499 };
1500
1501 static const struct samsung_i2s_dai_data samsung_dai_type_sec = {
1502         .dai_type = TYPE_SEC,
1503 };
1504
1505 static const struct platform_device_id samsung_i2s_driver_ids[] = {
1506         {
1507                 .name           = "samsung-i2s",
1508                 .driver_data    = (kernel_ulong_t)&i2sv3_dai_type,
1509         }, {
1510                 .name           = "samsung-i2s-sec",
1511                 .driver_data    = (kernel_ulong_t)&samsung_dai_type_sec,
1512         },
1513         {},
1514 };
1515 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1516
1517 #ifdef CONFIG_OF
1518 static const struct of_device_id exynos_i2s_match[] = {
1519         {
1520                 .compatible = "samsung,s3c6410-i2s",
1521                 .data = &i2sv3_dai_type,
1522         }, {
1523                 .compatible = "samsung,s5pv210-i2s",
1524                 .data = &i2sv5_dai_type,
1525         }, {
1526                 .compatible = "samsung,exynos5420-i2s",
1527                 .data = &i2sv6_dai_type,
1528         }, {
1529                 .compatible = "samsung,exynos7-i2s",
1530                 .data = &i2sv7_dai_type,
1531         }, {
1532                 .compatible = "samsung,exynos7-i2s1",
1533                 .data = &i2sv5_dai_type_i2s1,
1534         },
1535         {},
1536 };
1537 MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1538 #endif
1539
1540 static const struct dev_pm_ops samsung_i2s_pm = {
1541         SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1542                                 i2s_runtime_resume, NULL)
1543 };
1544
1545 static struct platform_driver samsung_i2s_driver = {
1546         .probe  = samsung_i2s_probe,
1547         .remove = samsung_i2s_remove,
1548         .id_table = samsung_i2s_driver_ids,
1549         .driver = {
1550                 .name = "samsung-i2s",
1551                 .of_match_table = of_match_ptr(exynos_i2s_match),
1552                 .pm = &samsung_i2s_pm,
1553         },
1554 };
1555
1556 module_platform_driver(samsung_i2s_driver);
1557
1558 /* Module information */
1559 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1560 MODULE_DESCRIPTION("Samsung I2S Interface");
1561 MODULE_ALIAS("platform:samsung-i2s");
1562 MODULE_LICENSE("GPL");