sound/soc/codecs/da732x.c

   1 /*
   2  * da732x.c --- Dialog DA732X ALSA SoC Audio Driver
   3  *
   4  * Copyright (C) 2012 Dialog Semiconductor GmbH
   5  *
   6  * Author: Michal Hajduk <Michal.Hajduk@diasemi.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #include <linux/module.h>
  14 #include <linux/moduleparam.h>
  15 #include <linux/init.h>
  16 #include <linux/delay.h>
  17 #include <linux/pm.h>
  18 #include <linux/i2c.h>
  19 #include <linux/regmap.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/slab.h>
  22 #include <linux/sysfs.h>
  23 #include <sound/core.h>
  24 #include <sound/pcm.h>
  25 #include <sound/pcm_params.h>
  26 #include <sound/soc.h>
  27 #include <sound/soc-dapm.h>
  28 #include <sound/initval.h>
  29 #include <sound/tlv.h>
  30 #include <asm/div64.h>
  31
  32 #include "da732x.h"
  33 #include "da732x_reg.h"
  34
  35
  36 struct da732x_priv {
  37         struct regmap *regmap;
  38         struct snd_soc_codec *codec;
  39
  40         unsigned int sysclk;
  41         bool pll_en;
  42 };
  43
  44 /*
  45  * da732x register cache - default settings
  46  */
  47 static struct reg_default da732x_reg_cache[] = {
  48         { DA732X_REG_REF1               , 0x02 },
  49         { DA732X_REG_BIAS_EN            , 0x80 },
  50         { DA732X_REG_BIAS1              , 0x00 },
  51         { DA732X_REG_BIAS2              , 0x00 },
  52         { DA732X_REG_BIAS3              , 0x00 },
  53         { DA732X_REG_BIAS4              , 0x00 },
  54         { DA732X_REG_MICBIAS2           , 0x00 },
  55         { DA732X_REG_MICBIAS1           , 0x00 },
  56         { DA732X_REG_MICDET             , 0x00 },
  57         { DA732X_REG_MIC1_PRE           , 0x01 },
  58         { DA732X_REG_MIC1               , 0x40 },
  59         { DA732X_REG_MIC2_PRE           , 0x01 },
  60         { DA732X_REG_MIC2               , 0x40 },
  61         { DA732X_REG_AUX1L              , 0x75 },
  62         { DA732X_REG_AUX1R              , 0x75 },
  63         { DA732X_REG_MIC3_PRE           , 0x01 },
  64         { DA732X_REG_MIC3               , 0x40 },
  65         { DA732X_REG_INP_PINBIAS        , 0x00 },
  66         { DA732X_REG_INP_ZC_EN          , 0x00 },
  67         { DA732X_REG_INP_MUX            , 0x50 },
  68         { DA732X_REG_HP_DET             , 0x00 },
  69         { DA732X_REG_HPL_DAC_OFFSET     , 0x00 },
  70         { DA732X_REG_HPL_DAC_OFF_CNTL   , 0x00 },
  71         { DA732X_REG_HPL_OUT_OFFSET     , 0x00 },
  72         { DA732X_REG_HPL                , 0x40 },
  73         { DA732X_REG_HPL_VOL            , 0x0F },
  74         { DA732X_REG_HPR_DAC_OFFSET     , 0x00 },
  75         { DA732X_REG_HPR_DAC_OFF_CNTL   , 0x00 },
  76         { DA732X_REG_HPR_OUT_OFFSET     , 0x00 },
  77         { DA732X_REG_HPR                , 0x40 },
  78         { DA732X_REG_HPR_VOL            , 0x0F },
  79         { DA732X_REG_LIN2               , 0x4F },
  80         { DA732X_REG_LIN3               , 0x4F },
  81         { DA732X_REG_LIN4               , 0x4F },
  82         { DA732X_REG_OUT_ZC_EN          , 0x00 },
  83         { DA732X_REG_HP_LIN1_GNDSEL     , 0x00 },
  84         { DA732X_REG_CP_HP1             , 0x0C },
  85         { DA732X_REG_CP_HP2             , 0x03 },
  86         { DA732X_REG_CP_CTRL1           , 0x00 },
  87         { DA732X_REG_CP_CTRL2           , 0x99 },
  88         { DA732X_REG_CP_CTRL3           , 0x25 },
  89         { DA732X_REG_CP_LEVEL_MASK      , 0x3F },
  90         { DA732X_REG_CP_DET             , 0x00 },
  91         { DA732X_REG_CP_STATUS          , 0x00 },
  92         { DA732X_REG_CP_THRESH1         , 0x00 },
  93         { DA732X_REG_CP_THRESH2         , 0x00 },
  94         { DA732X_REG_CP_THRESH3         , 0x00 },
  95         { DA732X_REG_CP_THRESH4         , 0x00 },
  96         { DA732X_REG_CP_THRESH5         , 0x00 },
  97         { DA732X_REG_CP_THRESH6         , 0x00 },
  98         { DA732X_REG_CP_THRESH7         , 0x00 },
  99         { DA732X_REG_CP_THRESH8         , 0x00 },
 100         { DA732X_REG_PLL_DIV_LO         , 0x00 },
 101         { DA732X_REG_PLL_DIV_MID        , 0x00 },
 102         { DA732X_REG_PLL_DIV_HI         , 0x00 },
 103         { DA732X_REG_PLL_CTRL           , 0x02 },
 104         { DA732X_REG_CLK_CTRL           , 0xaa },
 105         { DA732X_REG_CLK_DSP            , 0x07 },
 106         { DA732X_REG_CLK_EN1            , 0x00 },
 107         { DA732X_REG_CLK_EN2            , 0x00 },
 108         { DA732X_REG_CLK_EN3            , 0x00 },
 109         { DA732X_REG_CLK_EN4            , 0x00 },
 110         { DA732X_REG_CLK_EN5            , 0x00 },
 111         { DA732X_REG_AIF_MCLK           , 0x00 },
 112         { DA732X_REG_AIFA1              , 0x02 },
 113         { DA732X_REG_AIFA2              , 0x00 },
 114         { DA732X_REG_AIFA3              , 0x08 },
 115         { DA732X_REG_AIFB1              , 0x02 },
 116         { DA732X_REG_AIFB2              , 0x00 },
 117         { DA732X_REG_AIFB3              , 0x08 },
 118         { DA732X_REG_PC_CTRL            , 0xC0 },
 119         { DA732X_REG_DATA_ROUTE         , 0x00 },
 120         { DA732X_REG_DSP_CTRL           , 0x00 },
 121         { DA732X_REG_CIF_CTRL2          , 0x00 },
 122         { DA732X_REG_HANDSHAKE          , 0x00 },
 123         { DA732X_REG_SPARE1_OUT         , 0x00 },
 124         { DA732X_REG_SPARE2_OUT         , 0x00 },
 125         { DA732X_REG_SPARE1_IN          , 0x00 },
 126         { DA732X_REG_ADC1_PD            , 0x00 },
 127         { DA732X_REG_ADC1_HPF           , 0x00 },
 128         { DA732X_REG_ADC1_SEL           , 0x00 },
 129         { DA732X_REG_ADC1_EQ12          , 0x00 },
 130         { DA732X_REG_ADC1_EQ34          , 0x00 },
 131         { DA732X_REG_ADC1_EQ5           , 0x00 },
 132         { DA732X_REG_ADC2_PD            , 0x00 },
 133         { DA732X_REG_ADC2_HPF           , 0x00 },
 134         { DA732X_REG_ADC2_SEL           , 0x00 },
 135         { DA732X_REG_ADC2_EQ12          , 0x00 },
 136         { DA732X_REG_ADC2_EQ34          , 0x00 },
 137         { DA732X_REG_ADC2_EQ5           , 0x00 },
 138         { DA732X_REG_DAC1_HPF           , 0x00 },
 139         { DA732X_REG_DAC1_L_VOL         , 0x00 },
 140         { DA732X_REG_DAC1_R_VOL         , 0x00 },
 141         { DA732X_REG_DAC1_SEL           , 0x00 },
 142         { DA732X_REG_DAC1_SOFTMUTE      , 0x00 },
 143         { DA732X_REG_DAC1_EQ12          , 0x00 },
 144         { DA732X_REG_DAC1_EQ34          , 0x00 },
 145         { DA732X_REG_DAC1_EQ5           , 0x00 },
 146         { DA732X_REG_DAC2_HPF           , 0x00 },
 147         { DA732X_REG_DAC2_L_VOL         , 0x00 },
 148         { DA732X_REG_DAC2_R_VOL         , 0x00 },
 149         { DA732X_REG_DAC2_SEL           , 0x00 },
 150         { DA732X_REG_DAC2_SOFTMUTE      , 0x00 },
 151         { DA732X_REG_DAC2_EQ12          , 0x00 },
 152         { DA732X_REG_DAC2_EQ34          , 0x00 },
 153         { DA732X_REG_DAC2_EQ5           , 0x00 },
 154         { DA732X_REG_DAC3_HPF           , 0x00 },
 155         { DA732X_REG_DAC3_VOL           , 0x00 },
 156         { DA732X_REG_DAC3_SEL           , 0x00 },
 157         { DA732X_REG_DAC3_SOFTMUTE      , 0x00 },
 158         { DA732X_REG_DAC3_EQ12          , 0x00 },
 159         { DA732X_REG_DAC3_EQ34          , 0x00 },
 160         { DA732X_REG_DAC3_EQ5           , 0x00 },
 161         { DA732X_REG_BIQ_BYP            , 0x00 },
 162         { DA732X_REG_DMA_CMD            , 0x00 },
 163         { DA732X_REG_DMA_ADDR0          , 0x00 },
 164         { DA732X_REG_DMA_ADDR1          , 0x00 },
 165         { DA732X_REG_DMA_DATA0          , 0x00 },
 166         { DA732X_REG_DMA_DATA1          , 0x00 },
 167         { DA732X_REG_DMA_DATA2          , 0x00 },
 168         { DA732X_REG_DMA_DATA3          , 0x00 },
 169         { DA732X_REG_UNLOCK             , 0x00 },
 170 };
 171
 172 static inline int da732x_get_input_div(struct snd_soc_codec *codec, int sysclk)
 173 {
 174         int val;
 175         int ret;
 176
 177         if (sysclk < DA732X_MCLK_10MHZ) {
 178                 val = DA732X_MCLK_RET_0_10MHZ;
 179                 ret = DA732X_MCLK_VAL_0_10MHZ;
 180         } else if ((sysclk >= DA732X_MCLK_10MHZ) &&
 181             (sysclk < DA732X_MCLK_20MHZ)) {
 182                 val = DA732X_MCLK_RET_10_20MHZ;
 183                 ret = DA732X_MCLK_VAL_10_20MHZ;
 184         } else if ((sysclk >= DA732X_MCLK_20MHZ) &&
 185             (sysclk < DA732X_MCLK_40MHZ)) {
 186                 val = DA732X_MCLK_RET_20_40MHZ;
 187                 ret = DA732X_MCLK_VAL_20_40MHZ;
 188         } else if ((sysclk >= DA732X_MCLK_40MHZ) &&
 189             (sysclk <= DA732X_MCLK_54MHZ)) {
 190                 val = DA732X_MCLK_RET_40_54MHZ;
 191                 ret = DA732X_MCLK_VAL_40_54MHZ;
 192         } else {
 193                 return -EINVAL;
 194         }
 195
 196         snd_soc_write(codec, DA732X_REG_PLL_CTRL, val);
 197
 198         return ret;
 199 }
 200
 201 static void da732x_set_charge_pump(struct snd_soc_codec *codec, int state)
 202 {
 203         switch (state) {
 204         case DA732X_ENABLE_CP:
 205                 snd_soc_write(codec, DA732X_REG_CLK_EN2, DA732X_CP_CLK_EN);
 206                 snd_soc_write(codec, DA732X_REG_CP_HP2, DA732X_HP_CP_EN |
 207                               DA732X_HP_CP_REG | DA732X_HP_CP_PULSESKIP);
 208                 snd_soc_write(codec, DA732X_REG_CP_CTRL1, DA732X_CP_EN |
 209                               DA732X_CP_CTRL_CPVDD1);
 210                 snd_soc_write(codec, DA732X_REG_CP_CTRL2,
 211                               DA732X_CP_MANAGE_MAGNITUDE | DA732X_CP_BOOST);
 212                 snd_soc_write(codec, DA732X_REG_CP_CTRL3, DA732X_CP_1MHZ);
 213                 break;
 214         case DA732X_DISABLE_CP:
 215                 snd_soc_write(codec, DA732X_REG_CLK_EN2, DA732X_CP_CLK_DIS);
 216                 snd_soc_write(codec, DA732X_REG_CP_HP2, DA732X_HP_CP_DIS);
 217                 snd_soc_write(codec, DA732X_REG_CP_CTRL1, DA723X_CP_DIS);
 218                 break;
 219         default:
 220                 pr_err(KERN_ERR "Wrong charge pump state\n");
 221                 break;
 222         }
 223 }
 224
 225 static const DECLARE_TLV_DB_SCALE(mic_boost_tlv, DA732X_MIC_PRE_VOL_DB_MIN,
 226                                   DA732X_MIC_PRE_VOL_DB_INC, 0);
 227
 228 static const DECLARE_TLV_DB_SCALE(mic_pga_tlv, DA732X_MIC_VOL_DB_MIN,
 229                                   DA732X_MIC_VOL_DB_INC, 0);
 230
 231 static const DECLARE_TLV_DB_SCALE(aux_pga_tlv, DA732X_AUX_VOL_DB_MIN,
 232                                   DA732X_AUX_VOL_DB_INC, 0);
 233
 234 static const DECLARE_TLV_DB_SCALE(hp_pga_tlv, DA732X_HP_VOL_DB_MIN,
 235                                   DA732X_AUX_VOL_DB_INC, 0);
 236
 237 static const DECLARE_TLV_DB_SCALE(lin2_pga_tlv, DA732X_LIN2_VOL_DB_MIN,
 238                                   DA732X_LIN2_VOL_DB_INC, 0);
 239
 240 static const DECLARE_TLV_DB_SCALE(lin3_pga_tlv, DA732X_LIN3_VOL_DB_MIN,
 241                                   DA732X_LIN3_VOL_DB_INC, 0);
 242
 243 static const DECLARE_TLV_DB_SCALE(lin4_pga_tlv, DA732X_LIN4_VOL_DB_MIN,
 244                                   DA732X_LIN4_VOL_DB_INC, 0);
 245
 246 static const DECLARE_TLV_DB_SCALE(adc_pga_tlv, DA732X_ADC_VOL_DB_MIN,
 247                                   DA732X_ADC_VOL_DB_INC, 0);
 248
 249 static const DECLARE_TLV_DB_SCALE(dac_pga_tlv, DA732X_DAC_VOL_DB_MIN,
 250                                   DA732X_DAC_VOL_DB_INC, 0);
 251
 252 static const DECLARE_TLV_DB_SCALE(eq_band_pga_tlv, DA732X_EQ_BAND_VOL_DB_MIN,
 253                                   DA732X_EQ_BAND_VOL_DB_INC, 0);
 254
 255 static const DECLARE_TLV_DB_SCALE(eq_overall_tlv, DA732X_EQ_OVERALL_VOL_DB_MIN,
 256                                   DA732X_EQ_OVERALL_VOL_DB_INC, 0);
 257
 258 /* High Pass Filter */
 259 static const char *da732x_hpf_mode[] = {
 260         "Disable", "Music", "Voice",
 261 };
 262
 263 static const char *da732x_hpf_music[] = {
 264         "1.8Hz", "3.75Hz", "7.5Hz", "15Hz",
 265 };
 266
 267 static const char *da732x_hpf_voice[] = {
 268         "2.5Hz", "25Hz", "50Hz", "100Hz",
 269         "150Hz", "200Hz", "300Hz", "400Hz"
 270 };
 271
 272 static SOC_ENUM_SINGLE_DECL(da732x_dac1_hpf_mode_enum,
 273                             DA732X_REG_DAC1_HPF, DA732X_HPF_MODE_SHIFT,
 274                             da732x_hpf_mode);
 275
 276 static SOC_ENUM_SINGLE_DECL(da732x_dac2_hpf_mode_enum,
 277                             DA732X_REG_DAC2_HPF, DA732X_HPF_MODE_SHIFT,
 278                             da732x_hpf_mode);
 279
 280 static SOC_ENUM_SINGLE_DECL(da732x_dac3_hpf_mode_enum,
 281                             DA732X_REG_DAC3_HPF, DA732X_HPF_MODE_SHIFT,
 282                             da732x_hpf_mode);
 283
 284 static SOC_ENUM_SINGLE_DECL(da732x_adc1_hpf_mode_enum,
 285                             DA732X_REG_ADC1_HPF, DA732X_HPF_MODE_SHIFT,
 286                             da732x_hpf_mode);
 287
 288 static SOC_ENUM_SINGLE_DECL(da732x_adc2_hpf_mode_enum,
 289                             DA732X_REG_ADC2_HPF, DA732X_HPF_MODE_SHIFT,
 290                             da732x_hpf_mode);
 291
 292 static SOC_ENUM_SINGLE_DECL(da732x_dac1_hp_filter_enum,
 293                             DA732X_REG_DAC1_HPF, DA732X_HPF_MUSIC_SHIFT,
 294                             da732x_hpf_music);
 295
 296 static SOC_ENUM_SINGLE_DECL(da732x_dac2_hp_filter_enum,
 297                             DA732X_REG_DAC2_HPF, DA732X_HPF_MUSIC_SHIFT,
 298                             da732x_hpf_music);
 299
 300 static SOC_ENUM_SINGLE_DECL(da732x_dac3_hp_filter_enum,
 301                             DA732X_REG_DAC3_HPF, DA732X_HPF_MUSIC_SHIFT,
 302                             da732x_hpf_music);
 303
 304 static SOC_ENUM_SINGLE_DECL(da732x_adc1_hp_filter_enum,
 305                             DA732X_REG_ADC1_HPF, DA732X_HPF_MUSIC_SHIFT,
 306                             da732x_hpf_music);
 307
 308 static SOC_ENUM_SINGLE_DECL(da732x_adc2_hp_filter_enum,
 309                             DA732X_REG_ADC2_HPF, DA732X_HPF_MUSIC_SHIFT,
 310                             da732x_hpf_music);
 311
 312 static SOC_ENUM_SINGLE_DECL(da732x_dac1_voice_filter_enum,
 313                             DA732X_REG_DAC1_HPF, DA732X_HPF_VOICE_SHIFT,
 314                             da732x_hpf_voice);
 315
 316 static SOC_ENUM_SINGLE_DECL(da732x_dac2_voice_filter_enum,
 317                             DA732X_REG_DAC2_HPF, DA732X_HPF_VOICE_SHIFT,
 318                             da732x_hpf_voice);
 319
 320 static SOC_ENUM_SINGLE_DECL(da732x_dac3_voice_filter_enum,
 321                             DA732X_REG_DAC3_HPF, DA732X_HPF_VOICE_SHIFT,
 322                             da732x_hpf_voice);
 323
 324 static SOC_ENUM_SINGLE_DECL(da732x_adc1_voice_filter_enum,
 325                             DA732X_REG_ADC1_HPF, DA732X_HPF_VOICE_SHIFT,
 326                             da732x_hpf_voice);
 327
 328 static SOC_ENUM_SINGLE_DECL(da732x_adc2_voice_filter_enum,
 329                             DA732X_REG_ADC2_HPF, DA732X_HPF_VOICE_SHIFT,
 330                             da732x_hpf_voice);
 331
 332 static int da732x_hpf_set(struct snd_kcontrol *kcontrol,
 333                           struct snd_ctl_elem_value *ucontrol)
 334 {
 335         struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
 336         struct soc_enum *enum_ctrl = (struct soc_enum *)kcontrol->private_value;
 337         unsigned int reg = enum_ctrl->reg;
 338         unsigned int sel = ucontrol->value.integer.value[0];
 339         unsigned int bits;
 340
 341         switch (sel) {
 342         case DA732X_HPF_DISABLED:
 343                 bits = DA732X_HPF_DIS;
 344                 break;
 345         case DA732X_HPF_VOICE:
 346                 bits = DA732X_HPF_VOICE_EN;
 347                 break;
 348         case DA732X_HPF_MUSIC:
 349                 bits = DA732X_HPF_MUSIC_EN;
 350                 break;
 351         default:
 352                 return -EINVAL;
 353         }
 354
 355         snd_soc_update_bits(codec, reg, DA732X_HPF_MASK, bits);
 356
 357         return 0;
 358 }
 359
 360 static int da732x_hpf_get(struct snd_kcontrol *kcontrol,
 361                           struct snd_ctl_elem_value *ucontrol)
 362 {
 363         struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
 364         struct soc_enum *enum_ctrl = (struct soc_enum *)kcontrol->private_value;
 365         unsigned int reg = enum_ctrl->reg;
 366         int val;
 367
 368         val = snd_soc_read(codec, reg) & DA732X_HPF_MASK;
 369
 370         switch (val) {
 371         case DA732X_HPF_VOICE_EN:
 372                 ucontrol->value.integer.value[0] = DA732X_HPF_VOICE;
 373                 break;
 374         case DA732X_HPF_MUSIC_EN:
 375                 ucontrol->value.integer.value[0] = DA732X_HPF_MUSIC;
 376                 break;
 377         default:
 378                 ucontrol->value.integer.value[0] = DA732X_HPF_DISABLED;
 379                 break;
 380         }
 381
 382         return 0;
 383 }
 384
 385 static const struct snd_kcontrol_new da732x_snd_controls[] = {
 386         /* Input PGAs */
 387         SOC_SINGLE_RANGE_TLV("MIC1 Boost Volume", DA732X_REG_MIC1_PRE,
 388                              DA732X_MICBOOST_SHIFT, DA732X_MICBOOST_MIN,
 389                              DA732X_MICBOOST_MAX, 0, mic_boost_tlv),
 390         SOC_SINGLE_RANGE_TLV("MIC2 Boost Volume", DA732X_REG_MIC2_PRE,
 391                              DA732X_MICBOOST_SHIFT, DA732X_MICBOOST_MIN,
 392                              DA732X_MICBOOST_MAX, 0, mic_boost_tlv),
 393         SOC_SINGLE_RANGE_TLV("MIC3 Boost Volume", DA732X_REG_MIC3_PRE,
 394                              DA732X_MICBOOST_SHIFT, DA732X_MICBOOST_MIN,
 395                              DA732X_MICBOOST_MAX, 0, mic_boost_tlv),
 396
 397         /* MICs */
 398         SOC_SINGLE("MIC1 Switch", DA732X_REG_MIC1, DA732X_MIC_MUTE_SHIFT,
 399                    DA732X_SWITCH_MAX, DA732X_INVERT),
 400         SOC_SINGLE_RANGE_TLV("MIC1 Volume", DA732X_REG_MIC1,
 401                              DA732X_MIC_VOL_SHIFT, DA732X_MIC_VOL_VAL_MIN,
 402                              DA732X_MIC_VOL_VAL_MAX, 0, mic_pga_tlv),
 403         SOC_SINGLE("MIC2 Switch", DA732X_REG_MIC2, DA732X_MIC_MUTE_SHIFT,
 404                    DA732X_SWITCH_MAX, DA732X_INVERT),
 405         SOC_SINGLE_RANGE_TLV("MIC2 Volume", DA732X_REG_MIC2,
 406                              DA732X_MIC_VOL_SHIFT, DA732X_MIC_VOL_VAL_MIN,
 407                              DA732X_MIC_VOL_VAL_MAX, 0, mic_pga_tlv),
 408         SOC_SINGLE("MIC3 Switch", DA732X_REG_MIC3, DA732X_MIC_MUTE_SHIFT,
 409                    DA732X_SWITCH_MAX, DA732X_INVERT),
 410         SOC_SINGLE_RANGE_TLV("MIC3 Volume", DA732X_REG_MIC3,
 411                              DA732X_MIC_VOL_SHIFT, DA732X_MIC_VOL_VAL_MIN,
 412                              DA732X_MIC_VOL_VAL_MAX, 0, mic_pga_tlv),
 413
 414         /* AUXs */
 415         SOC_SINGLE("AUX1L Switch", DA732X_REG_AUX1L, DA732X_AUX_MUTE_SHIFT,
 416                    DA732X_SWITCH_MAX, DA732X_INVERT),
 417         SOC_SINGLE_TLV("AUX1L Volume", DA732X_REG_AUX1L,
 418                        DA732X_AUX_VOL_SHIFT, DA732X_AUX_VOL_VAL_MAX,
 419                        DA732X_NO_INVERT, aux_pga_tlv),
 420         SOC_SINGLE("AUX1R Switch", DA732X_REG_AUX1R, DA732X_AUX_MUTE_SHIFT,
 421                    DA732X_SWITCH_MAX, DA732X_INVERT),
 422         SOC_SINGLE_TLV("AUX1R Volume", DA732X_REG_AUX1R,
 423                        DA732X_AUX_VOL_SHIFT, DA732X_AUX_VOL_VAL_MAX,
 424                        DA732X_NO_INVERT, aux_pga_tlv),
 425
 426         /* ADCs */
 427         SOC_DOUBLE_TLV("ADC1 Volume", DA732X_REG_ADC1_SEL,
 428                        DA732X_ADCL_VOL_SHIFT, DA732X_ADCR_VOL_SHIFT,
 429                        DA732X_ADC_VOL_VAL_MAX, DA732X_INVERT, adc_pga_tlv),
 430
 431         SOC_DOUBLE_TLV("ADC2 Volume", DA732X_REG_ADC2_SEL,
 432                        DA732X_ADCL_VOL_SHIFT, DA732X_ADCR_VOL_SHIFT,
 433                        DA732X_ADC_VOL_VAL_MAX, DA732X_INVERT, adc_pga_tlv),
 434
 435         /* DACs */
 436         SOC_DOUBLE("Digital Playback DAC12 Switch", DA732X_REG_DAC1_SEL,
 437                    DA732X_DACL_MUTE_SHIFT, DA732X_DACR_MUTE_SHIFT,
 438                    DA732X_SWITCH_MAX, DA732X_INVERT),
 439         SOC_DOUBLE_R_TLV("Digital Playback DAC12 Volume", DA732X_REG_DAC1_L_VOL,
 440                          DA732X_REG_DAC1_R_VOL, DA732X_DAC_VOL_SHIFT,
 441                          DA732X_DAC_VOL_VAL_MAX, DA732X_INVERT, dac_pga_tlv),
 442         SOC_SINGLE("Digital Playback DAC3 Switch", DA732X_REG_DAC2_SEL,
 443                    DA732X_DACL_MUTE_SHIFT, DA732X_SWITCH_MAX, DA732X_INVERT),
 444         SOC_SINGLE_TLV("Digital Playback DAC3 Volume", DA732X_REG_DAC2_L_VOL,
 445                         DA732X_DAC_VOL_SHIFT, DA732X_DAC_VOL_VAL_MAX,
 446                         DA732X_INVERT, dac_pga_tlv),
 447         SOC_SINGLE("Digital Playback DAC4 Switch", DA732X_REG_DAC2_SEL,
 448                    DA732X_DACR_MUTE_SHIFT, DA732X_SWITCH_MAX, DA732X_INVERT),
 449         SOC_SINGLE_TLV("Digital Playback DAC4 Volume", DA732X_REG_DAC2_R_VOL,
 450                        DA732X_DAC_VOL_SHIFT, DA732X_DAC_VOL_VAL_MAX,
 451                        DA732X_INVERT, dac_pga_tlv),
 452         SOC_SINGLE("Digital Playback DAC5 Switch", DA732X_REG_DAC3_SEL,
 453                    DA732X_DACL_MUTE_SHIFT, DA732X_SWITCH_MAX, DA732X_INVERT),
 454         SOC_SINGLE_TLV("Digital Playback DAC5 Volume", DA732X_REG_DAC3_VOL,
 455                        DA732X_DAC_VOL_SHIFT, DA732X_DAC_VOL_VAL_MAX,
 456                        DA732X_INVERT, dac_pga_tlv),
 457
 458         /* High Pass Filters */
 459         SOC_ENUM_EXT("DAC1 High Pass Filter Mode",
 460                      da732x_dac1_hpf_mode_enum, da732x_hpf_get, da732x_hpf_set),
 461         SOC_ENUM("DAC1 High Pass Filter", da732x_dac1_hp_filter_enum),
 462         SOC_ENUM("DAC1 Voice Filter", da732x_dac1_voice_filter_enum),
 463
 464         SOC_ENUM_EXT("DAC2 High Pass Filter Mode",
 465                      da732x_dac2_hpf_mode_enum, da732x_hpf_get, da732x_hpf_set),
 466         SOC_ENUM("DAC2 High Pass Filter", da732x_dac2_hp_filter_enum),
 467         SOC_ENUM("DAC2 Voice Filter", da732x_dac2_voice_filter_enum),
 468
 469         SOC_ENUM_EXT("DAC3 High Pass Filter Mode",
 470                      da732x_dac3_hpf_mode_enum, da732x_hpf_get, da732x_hpf_set),
 471         SOC_ENUM("DAC3 High Pass Filter", da732x_dac3_hp_filter_enum),
 472         SOC_ENUM("DAC3 Filter Mode", da732x_dac3_voice_filter_enum),
 473
 474         SOC_ENUM_EXT("ADC1 High Pass Filter Mode",
 475                      da732x_adc1_hpf_mode_enum, da732x_hpf_get, da732x_hpf_set),
 476         SOC_ENUM("ADC1 High Pass Filter", da732x_adc1_hp_filter_enum),
 477         SOC_ENUM("ADC1 Voice Filter", da732x_adc1_voice_filter_enum),
 478
 479         SOC_ENUM_EXT("ADC2 High Pass Filter Mode",
 480                      da732x_adc2_hpf_mode_enum, da732x_hpf_get, da732x_hpf_set),
 481         SOC_ENUM("ADC2 High Pass Filter", da732x_adc2_hp_filter_enum),
 482         SOC_ENUM("ADC2 Voice Filter", da732x_adc2_voice_filter_enum),
 483
 484         /* Equalizers */
 485         SOC_SINGLE("ADC1 EQ Switch", DA732X_REG_ADC1_EQ5,
 486                    DA732X_EQ_EN_SHIFT, DA732X_EQ_EN_MAX, DA732X_NO_INVERT),
 487         SOC_SINGLE_TLV("ADC1 EQ Band 1 Volume", DA732X_REG_ADC1_EQ12,
 488                        DA732X_EQ_BAND1_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 489                        DA732X_INVERT, eq_band_pga_tlv),
 490         SOC_SINGLE_TLV("ADC1 EQ Band 2 Volume", DA732X_REG_ADC1_EQ12,
 491                        DA732X_EQ_BAND2_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 492                        DA732X_INVERT, eq_band_pga_tlv),
 493         SOC_SINGLE_TLV("ADC1 EQ Band 3 Volume", DA732X_REG_ADC1_EQ34,
 494                        DA732X_EQ_BAND3_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 495                        DA732X_INVERT, eq_band_pga_tlv),
 496         SOC_SINGLE_TLV("ADC1 EQ Band 4 Volume", DA732X_REG_ADC1_EQ34,
 497                        DA732X_EQ_BAND4_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 498                        DA732X_INVERT, eq_band_pga_tlv),
 499         SOC_SINGLE_TLV("ADC1 EQ Band 5 Volume", DA732X_REG_ADC1_EQ5,
 500                        DA732X_EQ_BAND5_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 501                        DA732X_INVERT, eq_band_pga_tlv),
 502         SOC_SINGLE_TLV("ADC1 EQ Overall Volume", DA732X_REG_ADC1_EQ5,
 503                        DA732X_EQ_OVERALL_SHIFT, DA732X_EQ_OVERALL_VOL_VAL_MAX,
 504                        DA732X_INVERT, eq_overall_tlv),
 505
 506         SOC_SINGLE("ADC2 EQ Switch", DA732X_REG_ADC2_EQ5,
 507                    DA732X_EQ_EN_SHIFT, DA732X_EQ_EN_MAX, DA732X_NO_INVERT),
 508         SOC_SINGLE_TLV("ADC2 EQ Band 1 Volume", DA732X_REG_ADC2_EQ12,
 509                        DA732X_EQ_BAND1_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 510                        DA732X_INVERT, eq_band_pga_tlv),
 511         SOC_SINGLE_TLV("ADC2 EQ Band 2 Volume", DA732X_REG_ADC2_EQ12,
 512                        DA732X_EQ_BAND2_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 513                        DA732X_INVERT, eq_band_pga_tlv),
 514         SOC_SINGLE_TLV("ADC2 EQ Band 3 Volume", DA732X_REG_ADC2_EQ34,
 515                        DA732X_EQ_BAND3_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 516                        DA732X_INVERT, eq_band_pga_tlv),
 517         SOC_SINGLE_TLV("ACD2 EQ Band 4 Volume", DA732X_REG_ADC2_EQ34,
 518                        DA732X_EQ_BAND4_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 519                        DA732X_INVERT, eq_band_pga_tlv),
 520         SOC_SINGLE_TLV("ACD2 EQ Band 5 Volume", DA732X_REG_ADC2_EQ5,
 521                        DA732X_EQ_BAND5_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 522                        DA732X_INVERT, eq_band_pga_tlv),
 523         SOC_SINGLE_TLV("ADC2 EQ Overall Volume", DA732X_REG_ADC1_EQ5,
 524                        DA732X_EQ_OVERALL_SHIFT, DA732X_EQ_OVERALL_VOL_VAL_MAX,
 525                        DA732X_INVERT, eq_overall_tlv),
 526
 527         SOC_SINGLE("DAC1 EQ Switch", DA732X_REG_DAC1_EQ5,
 528                    DA732X_EQ_EN_SHIFT, DA732X_EQ_EN_MAX, DA732X_NO_INVERT),
 529         SOC_SINGLE_TLV("DAC1 EQ Band 1 Volume", DA732X_REG_DAC1_EQ12,
 530                        DA732X_EQ_BAND1_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 531                        DA732X_INVERT, eq_band_pga_tlv),
 532         SOC_SINGLE_TLV("DAC1 EQ Band 2 Volume", DA732X_REG_DAC1_EQ12,
 533                        DA732X_EQ_BAND2_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 534                        DA732X_INVERT, eq_band_pga_tlv),
 535         SOC_SINGLE_TLV("DAC1 EQ Band 3 Volume", DA732X_REG_DAC1_EQ34,
 536                        DA732X_EQ_BAND3_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 537                        DA732X_INVERT, eq_band_pga_tlv),
 538         SOC_SINGLE_TLV("DAC1 EQ Band 4 Volume", DA732X_REG_DAC1_EQ34,
 539                        DA732X_EQ_BAND4_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 540                        DA732X_INVERT, eq_band_pga_tlv),
 541         SOC_SINGLE_TLV("DAC1 EQ Band 5 Volume", DA732X_REG_DAC1_EQ5,
 542                        DA732X_EQ_BAND5_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 543                        DA732X_INVERT, eq_band_pga_tlv),
 544
 545         SOC_SINGLE("DAC2 EQ Switch", DA732X_REG_DAC2_EQ5,
 546                    DA732X_EQ_EN_SHIFT, DA732X_EQ_EN_MAX, DA732X_NO_INVERT),
 547         SOC_SINGLE_TLV("DAC2 EQ Band 1 Volume", DA732X_REG_DAC2_EQ12,
 548                        DA732X_EQ_BAND1_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 549                        DA732X_INVERT, eq_band_pga_tlv),
 550         SOC_SINGLE_TLV("DAC2 EQ Band 2 Volume", DA732X_REG_DAC2_EQ12,
 551                        DA732X_EQ_BAND2_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 552                        DA732X_INVERT, eq_band_pga_tlv),
 553         SOC_SINGLE_TLV("DAC2 EQ Band 3 Volume", DA732X_REG_DAC2_EQ34,
 554                        DA732X_EQ_BAND3_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 555                        DA732X_INVERT, eq_band_pga_tlv),
 556         SOC_SINGLE_TLV("DAC2 EQ Band 4 Volume", DA732X_REG_DAC2_EQ34,
 557                        DA732X_EQ_BAND4_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 558                        DA732X_INVERT, eq_band_pga_tlv),
 559         SOC_SINGLE_TLV("DAC2 EQ Band 5 Volume", DA732X_REG_DAC2_EQ5,
 560                        DA732X_EQ_BAND5_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 561                        DA732X_INVERT, eq_band_pga_tlv),
 562
 563         SOC_SINGLE("DAC3 EQ Switch", DA732X_REG_DAC3_EQ5,
 564                    DA732X_EQ_EN_SHIFT, DA732X_EQ_EN_MAX, DA732X_NO_INVERT),
 565         SOC_SINGLE_TLV("DAC3 EQ Band 1 Volume", DA732X_REG_DAC3_EQ12,
 566                        DA732X_EQ_BAND1_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 567                        DA732X_INVERT, eq_band_pga_tlv),
 568         SOC_SINGLE_TLV("DAC3 EQ Band 2 Volume", DA732X_REG_DAC3_EQ12,
 569                        DA732X_EQ_BAND2_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 570                        DA732X_INVERT, eq_band_pga_tlv),
 571         SOC_SINGLE_TLV("DAC3 EQ Band 3 Volume", DA732X_REG_DAC3_EQ34,
 572                        DA732X_EQ_BAND3_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 573                        DA732X_INVERT, eq_band_pga_tlv),
 574         SOC_SINGLE_TLV("DAC3 EQ Band 4 Volume", DA732X_REG_DAC3_EQ34,
 575                        DA732X_EQ_BAND4_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 576                        DA732X_INVERT, eq_band_pga_tlv),
 577         SOC_SINGLE_TLV("DAC3 EQ Band 5 Volume", DA732X_REG_DAC3_EQ5,
 578                        DA732X_EQ_BAND5_SHIFT, DA732X_EQ_VOL_VAL_MAX,
 579                        DA732X_INVERT, eq_band_pga_tlv),
 580
 581         /* Lineout 2 Reciever*/
 582         SOC_SINGLE("Lineout 2 Switch", DA732X_REG_LIN2, DA732X_LOUT_MUTE_SHIFT,
 583                    DA732X_SWITCH_MAX, DA732X_INVERT),
 584         SOC_SINGLE_TLV("Lineout 2 Volume", DA732X_REG_LIN2,
 585                        DA732X_LOUT_VOL_SHIFT, DA732X_LOUT_VOL_VAL_MAX,
 586                        DA732X_NO_INVERT, lin2_pga_tlv),
 587
 588         /* Lineout 3 SPEAKER*/
 589         SOC_SINGLE("Lineout 3 Switch", DA732X_REG_LIN3, DA732X_LOUT_MUTE_SHIFT,
 590                    DA732X_SWITCH_MAX, DA732X_INVERT),
 591         SOC_SINGLE_TLV("Lineout 3 Volume", DA732X_REG_LIN3,
 592                        DA732X_LOUT_VOL_SHIFT, DA732X_LOUT_VOL_VAL_MAX,
 593                        DA732X_NO_INVERT, lin3_pga_tlv),
 594
 595         /* Lineout 4 */
 596         SOC_SINGLE("Lineout 4 Switch", DA732X_REG_LIN4, DA732X_LOUT_MUTE_SHIFT,
 597                    DA732X_SWITCH_MAX, DA732X_INVERT),
 598         SOC_SINGLE_TLV("Lineout 4 Volume", DA732X_REG_LIN4,
 599                        DA732X_LOUT_VOL_SHIFT, DA732X_LOUT_VOL_VAL_MAX,
 600                        DA732X_NO_INVERT, lin4_pga_tlv),
 601
 602         /* Headphones */
 603         SOC_DOUBLE_R("Headphone Switch", DA732X_REG_HPR, DA732X_REG_HPL,
 604                      DA732X_HP_MUTE_SHIFT, DA732X_SWITCH_MAX, DA732X_INVERT),
 605         SOC_DOUBLE_R_TLV("Headphone Volume", DA732X_REG_HPL_VOL,
 606                          DA732X_REG_HPR_VOL, DA732X_HP_VOL_SHIFT,
 607                          DA732X_HP_VOL_VAL_MAX, DA732X_NO_INVERT, hp_pga_tlv),
 608 };
 609
 610 static int da732x_adc_event(struct snd_soc_dapm_widget *w,
 611                             struct snd_kcontrol *kcontrol, int event)
 612 {
 613         struct snd_soc_codec *codec = w->codec;
 614
 615         switch (event) {
 616         case SND_SOC_DAPM_POST_PMU:
 617                 switch (w->reg) {
 618                 case DA732X_REG_ADC1_PD:
 619                         snd_soc_update_bits(codec, DA732X_REG_CLK_EN3,
 620                                             DA732X_ADCA_BB_CLK_EN,
 621                                             DA732X_ADCA_BB_CLK_EN);
 622                         break;
 623                 case DA732X_REG_ADC2_PD:
 624                         snd_soc_update_bits(codec, DA732X_REG_CLK_EN3,
 625                                             DA732X_ADCC_BB_CLK_EN,
 626                                             DA732X_ADCC_BB_CLK_EN);
 627                         break;
 628                 default:
 629                         return -EINVAL;
 630                 }
 631
 632                 snd_soc_update_bits(codec, w->reg, DA732X_ADC_RST_MASK,
 633                                     DA732X_ADC_SET_ACT);
 634                 snd_soc_update_bits(codec, w->reg, DA732X_ADC_PD_MASK,
 635                                     DA732X_ADC_ON);
 636                 break;
 637         case SND_SOC_DAPM_POST_PMD:
 638                 snd_soc_update_bits(codec, w->reg, DA732X_ADC_PD_MASK,
 639                                     DA732X_ADC_OFF);
 640                 snd_soc_update_bits(codec, w->reg, DA732X_ADC_RST_MASK,
 641                                     DA732X_ADC_SET_RST);
 642
 643                 switch (w->reg) {
 644                 case DA732X_REG_ADC1_PD:
 645                         snd_soc_update_bits(codec, DA732X_REG_CLK_EN3,
 646                                             DA732X_ADCA_BB_CLK_EN, 0);
 647                         break;
 648                 case DA732X_REG_ADC2_PD:
 649                         snd_soc_update_bits(codec, DA732X_REG_CLK_EN3,
 650                                             DA732X_ADCC_BB_CLK_EN, 0);
 651                         break;
 652                 default:
 653                         return -EINVAL;
 654                 }
 655
 656                 break;
 657         default:
 658                 return -EINVAL;
 659         }
 660
 661         return 0;
 662 }
 663
 664 static int da732x_out_pga_event(struct snd_soc_dapm_widget *w,
 665                                 struct snd_kcontrol *kcontrol, int event)
 666 {
 667         struct snd_soc_codec *codec = w->codec;
 668
 669         switch (event) {
 670         case SND_SOC_DAPM_POST_PMU:
 671                 snd_soc_update_bits(codec, w->reg,
 672                                     (1 << w->shift) | DA732X_OUT_HIZ_EN,
 673                                     (1 << w->shift) | DA732X_OUT_HIZ_EN);
 674                 break;
 675         case SND_SOC_DAPM_POST_PMD:
 676                 snd_soc_update_bits(codec, w->reg,
 677                                     (1 << w->shift) | DA732X_OUT_HIZ_EN,
 678                                     (1 << w->shift) | DA732X_OUT_HIZ_DIS);
 679                 break;
 680         default:
 681                 return -EINVAL;
 682         }
 683
 684         return 0;
 685 }
 686
 687 static const char *adcl_text[] = {
 688         "AUX1L", "MIC1"
 689 };
 690
 691 static const char *adcr_text[] = {
 692         "AUX1R", "MIC2", "MIC3"
 693 };
 694
 695 static const char *enable_text[] = {
 696         "Disabled",
 697         "Enabled"
 698 };
 699
 700 /* ADC1LMUX */
 701 static SOC_ENUM_SINGLE_DECL(adc1l_enum,
 702                             DA732X_REG_INP_MUX, DA732X_ADC1L_MUX_SEL_SHIFT,
 703                             adcl_text);
 704 static const struct snd_kcontrol_new adc1l_mux =
 705         SOC_DAPM_ENUM("ADC Route", adc1l_enum);
 706
 707 /* ADC1RMUX */
 708 static SOC_ENUM_SINGLE_DECL(adc1r_enum,
 709                             DA732X_REG_INP_MUX, DA732X_ADC1R_MUX_SEL_SHIFT,
 710                             adcr_text);
 711 static const struct snd_kcontrol_new adc1r_mux =
 712         SOC_DAPM_ENUM("ADC Route", adc1r_enum);
 713
 714 /* ADC2LMUX */
 715 static SOC_ENUM_SINGLE_DECL(adc2l_enum,
 716                             DA732X_REG_INP_MUX, DA732X_ADC2L_MUX_SEL_SHIFT,
 717                             adcl_text);
 718 static const struct snd_kcontrol_new adc2l_mux =
 719         SOC_DAPM_ENUM("ADC Route", adc2l_enum);
 720
 721 /* ADC2RMUX */
 722 static SOC_ENUM_SINGLE_DECL(adc2r_enum,
 723                             DA732X_REG_INP_MUX, DA732X_ADC2R_MUX_SEL_SHIFT,
 724                             adcr_text);
 725
 726 static const struct snd_kcontrol_new adc2r_mux =
 727         SOC_DAPM_ENUM("ADC Route", adc2r_enum);
 728
 729 static SOC_ENUM_SINGLE_DECL(da732x_hp_left_output,
 730                             DA732X_REG_HPL, DA732X_HP_OUT_DAC_EN_SHIFT,
 731                             enable_text);
 732
 733 static const struct snd_kcontrol_new hpl_mux =
 734         SOC_DAPM_ENUM("HPL Switch", da732x_hp_left_output);
 735
 736 static SOC_ENUM_SINGLE_DECL(da732x_hp_right_output,
 737                             DA732X_REG_HPR, DA732X_HP_OUT_DAC_EN_SHIFT,
 738                             enable_text);
 739
 740 static const struct snd_kcontrol_new hpr_mux =
 741         SOC_DAPM_ENUM("HPR Switch", da732x_hp_right_output);
 742
 743 static SOC_ENUM_SINGLE_DECL(da732x_speaker_output,
 744                             DA732X_REG_LIN3, DA732X_LOUT_DAC_EN_SHIFT,
 745                             enable_text);
 746
 747 static const struct snd_kcontrol_new spk_mux =
 748         SOC_DAPM_ENUM("SPK Switch", da732x_speaker_output);
 749
 750 static SOC_ENUM_SINGLE_DECL(da732x_lout4_output,
 751                             DA732X_REG_LIN4, DA732X_LOUT_DAC_EN_SHIFT,
 752                             enable_text);
 753
 754 static const struct snd_kcontrol_new lout4_mux =
 755         SOC_DAPM_ENUM("LOUT4 Switch", da732x_lout4_output);
 756
 757 static SOC_ENUM_SINGLE_DECL(da732x_lout2_output,
 758                             DA732X_REG_LIN2, DA732X_LOUT_DAC_EN_SHIFT,
 759                             enable_text);
 760
 761 static const struct snd_kcontrol_new lout2_mux =
 762         SOC_DAPM_ENUM("LOUT2 Switch", da732x_lout2_output);
 763
 764 static const struct snd_soc_dapm_widget da732x_dapm_widgets[] = {
 765         /* Supplies */
 766         SND_SOC_DAPM_SUPPLY("ADC1 Supply", DA732X_REG_ADC1_PD, 0,
 767                             DA732X_NO_INVERT, da732x_adc_event,
 768                             SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 769         SND_SOC_DAPM_SUPPLY("ADC2 Supply", DA732X_REG_ADC2_PD, 0,
 770                             DA732X_NO_INVERT, da732x_adc_event,
 771                             SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 772         SND_SOC_DAPM_SUPPLY("DAC1 CLK", DA732X_REG_CLK_EN4,
 773                             DA732X_DACA_BB_CLK_SHIFT, DA732X_NO_INVERT,
 774                             NULL, 0),
 775         SND_SOC_DAPM_SUPPLY("DAC2 CLK", DA732X_REG_CLK_EN4,
 776                             DA732X_DACC_BB_CLK_SHIFT, DA732X_NO_INVERT,
 777                             NULL, 0),
 778         SND_SOC_DAPM_SUPPLY("DAC3 CLK", DA732X_REG_CLK_EN5,
 779                             DA732X_DACE_BB_CLK_SHIFT, DA732X_NO_INVERT,
 780                             NULL, 0),
 781
 782         /* Micbias */
 783         SND_SOC_DAPM_SUPPLY("MICBIAS1", DA732X_REG_MICBIAS1,
 784                             DA732X_MICBIAS_EN_SHIFT,
 785                             DA732X_NO_INVERT, NULL, 0),
 786         SND_SOC_DAPM_SUPPLY("MICBIAS2", DA732X_REG_MICBIAS2,
 787                             DA732X_MICBIAS_EN_SHIFT,
 788                             DA732X_NO_INVERT, NULL, 0),
 789
 790         /* Inputs */
 791         SND_SOC_DAPM_INPUT("MIC1"),
 792         SND_SOC_DAPM_INPUT("MIC2"),
 793         SND_SOC_DAPM_INPUT("MIC3"),
 794         SND_SOC_DAPM_INPUT("AUX1L"),
 795         SND_SOC_DAPM_INPUT("AUX1R"),
 796
 797         /* Outputs */
 798         SND_SOC_DAPM_OUTPUT("HPL"),
 799         SND_SOC_DAPM_OUTPUT("HPR"),
 800         SND_SOC_DAPM_OUTPUT("LOUTL"),
 801         SND_SOC_DAPM_OUTPUT("LOUTR"),
 802         SND_SOC_DAPM_OUTPUT("ClassD"),
 803
 804         /* ADCs */
 805         SND_SOC_DAPM_ADC("ADC1L", NULL, DA732X_REG_ADC1_SEL,
 806                          DA732X_ADCL_EN_SHIFT, DA732X_NO_INVERT),
 807         SND_SOC_DAPM_ADC("ADC1R", NULL, DA732X_REG_ADC1_SEL,
 808                          DA732X_ADCR_EN_SHIFT, DA732X_NO_INVERT),
 809         SND_SOC_DAPM_ADC("ADC2L", NULL, DA732X_REG_ADC2_SEL,
 810                          DA732X_ADCL_EN_SHIFT, DA732X_NO_INVERT),
 811         SND_SOC_DAPM_ADC("ADC2R", NULL, DA732X_REG_ADC2_SEL,
 812                          DA732X_ADCR_EN_SHIFT, DA732X_NO_INVERT),
 813
 814         /* DACs */
 815         SND_SOC_DAPM_DAC("DAC1L", NULL, DA732X_REG_DAC1_SEL,
 816                          DA732X_DACL_EN_SHIFT, DA732X_NO_INVERT),
 817         SND_SOC_DAPM_DAC("DAC1R", NULL, DA732X_REG_DAC1_SEL,
 818                          DA732X_DACR_EN_SHIFT, DA732X_NO_INVERT),
 819         SND_SOC_DAPM_DAC("DAC2L", NULL, DA732X_REG_DAC2_SEL,
 820                          DA732X_DACL_EN_SHIFT, DA732X_NO_INVERT),
 821         SND_SOC_DAPM_DAC("DAC2R", NULL, DA732X_REG_DAC2_SEL,
 822                          DA732X_DACR_EN_SHIFT, DA732X_NO_INVERT),
 823         SND_SOC_DAPM_DAC("DAC3", NULL, DA732X_REG_DAC3_SEL,
 824                          DA732X_DACL_EN_SHIFT, DA732X_NO_INVERT),
 825
 826         /* Input Pgas */
 827         SND_SOC_DAPM_PGA("MIC1 PGA", DA732X_REG_MIC1, DA732X_MIC_EN_SHIFT,
 828                          0, NULL, 0),
 829         SND_SOC_DAPM_PGA("MIC2 PGA", DA732X_REG_MIC2, DA732X_MIC_EN_SHIFT,
 830                          0, NULL, 0),
 831         SND_SOC_DAPM_PGA("MIC3 PGA", DA732X_REG_MIC3, DA732X_MIC_EN_SHIFT,
 832                          0, NULL, 0),
 833         SND_SOC_DAPM_PGA("AUX1L PGA", DA732X_REG_AUX1L, DA732X_AUX_EN_SHIFT,
 834                          0, NULL, 0),
 835         SND_SOC_DAPM_PGA("AUX1R PGA", DA732X_REG_AUX1R, DA732X_AUX_EN_SHIFT,
 836                          0, NULL, 0),
 837
 838         SND_SOC_DAPM_PGA_E("HP Left", DA732X_REG_HPL, DA732X_HP_OUT_EN_SHIFT,
 839                            0, NULL, 0, da732x_out_pga_event,
 840                            SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
 841         SND_SOC_DAPM_PGA_E("HP Right", DA732X_REG_HPR, DA732X_HP_OUT_EN_SHIFT,
 842                            0, NULL, 0, da732x_out_pga_event,
 843                            SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
 844         SND_SOC_DAPM_PGA_E("LIN2", DA732X_REG_LIN2, DA732X_LIN_OUT_EN_SHIFT,
 845                            0, NULL, 0, da732x_out_pga_event,
 846                            SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
 847         SND_SOC_DAPM_PGA_E("LIN3", DA732X_REG_LIN3, DA732X_LIN_OUT_EN_SHIFT,
 848                            0, NULL, 0, da732x_out_pga_event,
 849                            SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
 850         SND_SOC_DAPM_PGA_E("LIN4", DA732X_REG_LIN4, DA732X_LIN_OUT_EN_SHIFT,
 851                            0, NULL, 0, da732x_out_pga_event,
 852                            SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_POST_PMD),
 853
 854         /* MUXs */
 855         SND_SOC_DAPM_MUX("ADC1 Left MUX", SND_SOC_NOPM, 0, 0, &adc1l_mux),
 856         SND_SOC_DAPM_MUX("ADC1 Right MUX", SND_SOC_NOPM, 0, 0, &adc1r_mux),
 857         SND_SOC_DAPM_MUX("ADC2 Left MUX", SND_SOC_NOPM, 0, 0, &adc2l_mux),
 858         SND_SOC_DAPM_MUX("ADC2 Right MUX", SND_SOC_NOPM, 0, 0, &adc2r_mux),
 859
 860         SND_SOC_DAPM_MUX("HP Left MUX", SND_SOC_NOPM, 0, 0, &hpl_mux),
 861         SND_SOC_DAPM_MUX("HP Right MUX", SND_SOC_NOPM, 0, 0, &hpr_mux),
 862         SND_SOC_DAPM_MUX("Speaker MUX", SND_SOC_NOPM, 0, 0, &spk_mux),
 863         SND_SOC_DAPM_MUX("LOUT2 MUX", SND_SOC_NOPM, 0, 0, &lout2_mux),
 864         SND_SOC_DAPM_MUX("LOUT4 MUX", SND_SOC_NOPM, 0, 0, &lout4_mux),
 865
 866         /* AIF interfaces */
 867         SND_SOC_DAPM_AIF_OUT("AIFA Output", "AIFA Capture", 0, DA732X_REG_AIFA3,
 868                              DA732X_AIF_EN_SHIFT, 0),
 869         SND_SOC_DAPM_AIF_IN("AIFA Input", "AIFA Playback", 0, DA732X_REG_AIFA3,
 870                             DA732X_AIF_EN_SHIFT, 0),
 871
 872         SND_SOC_DAPM_AIF_OUT("AIFB Output", "AIFB Capture", 0, DA732X_REG_AIFB3,
 873                              DA732X_AIF_EN_SHIFT, 0),
 874         SND_SOC_DAPM_AIF_IN("AIFB Input", "AIFB Playback", 0, DA732X_REG_AIFB3,
 875                             DA732X_AIF_EN_SHIFT, 0),
 876 };
 877
 878 static const struct snd_soc_dapm_route da732x_dapm_routes[] = {
 879         /* Inputs */
 880         {"AUX1L PGA", NULL, "AUX1L"},
 881         {"AUX1R PGA", NULL, "AUX1R"},
 882         {"MIC1 PGA", NULL, "MIC1"},
 883         {"MIC2 PGA", NULL, "MIC2"},
 884         {"MIC3 PGA", NULL, "MIC3"},
 885
 886         /* Capture Path */
 887         {"ADC1 Left MUX", "MIC1", "MIC1 PGA"},
 888         {"ADC1 Left MUX", "AUX1L", "AUX1L PGA"},
 889
 890         {"ADC1 Right MUX", "AUX1R", "AUX1R PGA"},
 891         {"ADC1 Right MUX", "MIC2", "MIC2 PGA"},
 892         {"ADC1 Right MUX", "MIC3", "MIC3 PGA"},
 893
 894         {"ADC2 Left MUX", "AUX1L", "AUX1L PGA"},
 895         {"ADC2 Left MUX", "MIC1", "MIC1 PGA"},
 896
 897         {"ADC2 Right MUX", "AUX1R", "AUX1R PGA"},
 898         {"ADC2 Right MUX", "MIC2", "MIC2 PGA"},
 899         {"ADC2 Right MUX", "MIC3", "MIC3 PGA"},
 900
 901         {"ADC1L", NULL, "ADC1 Supply"},
 902         {"ADC1R", NULL, "ADC1 Supply"},
 903         {"ADC2L", NULL, "ADC2 Supply"},
 904         {"ADC2R", NULL, "ADC2 Supply"},
 905
 906         {"ADC1L", NULL, "ADC1 Left MUX"},
 907         {"ADC1R", NULL, "ADC1 Right MUX"},
 908         {"ADC2L", NULL, "ADC2 Left MUX"},
 909         {"ADC2R", NULL, "ADC2 Right MUX"},
 910
 911         {"AIFA Output", NULL, "ADC1L"},
 912         {"AIFA Output", NULL, "ADC1R"},
 913         {"AIFB Output", NULL, "ADC2L"},
 914         {"AIFB Output", NULL, "ADC2R"},
 915
 916         {"HP Left MUX", "Enabled", "AIFA Input"},
 917         {"HP Right MUX", "Enabled", "AIFA Input"},
 918         {"Speaker MUX", "Enabled", "AIFB Input"},
 919         {"LOUT2 MUX", "Enabled", "AIFB Input"},
 920         {"LOUT4 MUX", "Enabled", "AIFB Input"},
 921
 922         {"DAC1L", NULL, "DAC1 CLK"},
 923         {"DAC1R", NULL, "DAC1 CLK"},
 924         {"DAC2L", NULL, "DAC2 CLK"},
 925         {"DAC2R", NULL, "DAC2 CLK"},
 926         {"DAC3", NULL, "DAC3 CLK"},
 927
 928         {"DAC1L", NULL, "HP Left MUX"},
 929         {"DAC1R", NULL, "HP Right MUX"},
 930         {"DAC2L", NULL, "Speaker MUX"},
 931         {"DAC2R", NULL, "LOUT4 MUX"},
 932         {"DAC3", NULL, "LOUT2 MUX"},
 933
 934         /* Output Pgas */
 935         {"HP Left", NULL, "DAC1L"},
 936         {"HP Right", NULL, "DAC1R"},
 937         {"LIN3", NULL, "DAC2L"},
 938         {"LIN4", NULL, "DAC2R"},
 939         {"LIN2", NULL, "DAC3"},
 940
 941         /* Outputs */
 942         {"ClassD", NULL, "LIN3"},
 943         {"LOUTL", NULL, "LIN2"},
 944         {"LOUTR", NULL, "LIN4"},
 945         {"HPL", NULL, "HP Left"},
 946         {"HPR", NULL, "HP Right"},
 947 };
 948
 949 static int da732x_hw_params(struct snd_pcm_substream *substream,
 950                             struct snd_pcm_hw_params *params,
 951                             struct snd_soc_dai *dai)
 952 {
 953         struct snd_soc_codec *codec = dai->codec;
 954         u32 aif = 0;
 955         u32 reg_aif;
 956         u32 fs;
 957
 958         reg_aif = dai->driver->base;
 959
 960         switch (params_width(params)) {
 961         case 16:
 962                 aif |= DA732X_AIF_WORD_16;
 963                 break;
 964         case 20:
 965                 aif |= DA732X_AIF_WORD_20;
 966                 break;
 967         case 24:
 968                 aif |= DA732X_AIF_WORD_24;
 969                 break;
 970         case 32:
 971                 aif |= DA732X_AIF_WORD_32;
 972                 break;
 973         default:
 974                 return -EINVAL;
 975         }
 976
 977         switch (params_rate(params)) {
 978         case 8000:
 979                 fs = DA732X_SR_8KHZ;
 980                 break;
 981         case 11025:
 982                 fs = DA732X_SR_11_025KHZ;
 983                 break;
 984         case 12000:
 985                 fs = DA732X_SR_12KHZ;
 986                 break;
 987         case 16000:
 988                 fs = DA732X_SR_16KHZ;
 989                 break;
 990         case 22050:
 991                 fs = DA732X_SR_22_05KHZ;
 992                 break;
 993         case 24000:
 994                 fs = DA732X_SR_24KHZ;
 995                 break;
 996         case 32000:
 997                 fs = DA732X_SR_32KHZ;
 998                 break;
 999         case 44100:
1000                 fs = DA732X_SR_44_1KHZ;
1001                 break;
1002         case 48000:
1003                 fs = DA732X_SR_48KHZ;
1004                 break;
1005         case 88100:
1006                 fs = DA732X_SR_88_1KHZ;
1007                 break;
1008         case 96000:
1009                 fs = DA732X_SR_96KHZ;
1010                 break;
1011         default:
1012                 return -EINVAL;
1013         }
1014
1015         snd_soc_update_bits(codec, reg_aif, DA732X_AIF_WORD_MASK, aif);
1016         snd_soc_update_bits(codec, DA732X_REG_CLK_CTRL, DA732X_SR1_MASK, fs);
1017
1018         return 0;
1019 }
1020
1021 static int da732x_set_dai_fmt(struct snd_soc_dai *dai, u32 fmt)
1022 {
1023         struct snd_soc_codec *codec = dai->codec;
1024         u32 aif_mclk, pc_count;
1025         u32 reg_aif1, aif1;
1026         u32 reg_aif3, aif3;
1027
1028         switch (dai->id) {
1029         case DA732X_DAI_ID1:
1030                 reg_aif1 = DA732X_REG_AIFA1;
1031                 reg_aif3 = DA732X_REG_AIFA3;
1032                 pc_count = DA732X_PC_PULSE_AIFA | DA732X_PC_RESYNC_NOT_AUT |
1033                            DA732X_PC_SAME;
1034                 break;
1035         case DA732X_DAI_ID2:
1036                 reg_aif1 = DA732X_REG_AIFB1;
1037                 reg_aif3 = DA732X_REG_AIFB3;
1038                 pc_count = DA732X_PC_PULSE_AIFB | DA732X_PC_RESYNC_NOT_AUT |
1039                            DA732X_PC_SAME;
1040                 break;
1041         default:
1042                 return -EINVAL;
1043         }
1044
1045         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1046         case SND_SOC_DAIFMT_CBS_CFS:
1047                 aif1 = DA732X_AIF_SLAVE;
1048                 aif_mclk = DA732X_AIFM_FRAME_64 | DA732X_AIFM_SRC_SEL_AIFA;
1049                 break;
1050         case SND_SOC_DAIFMT_CBM_CFM:
1051                 aif1 = DA732X_AIF_CLK_FROM_SRC;
1052                 aif_mclk = DA732X_CLK_GENERATION_AIF_A;
1053                 break;
1054         default:
1055                 return -EINVAL;
1056         }
1057
1058         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1059         case SND_SOC_DAIFMT_I2S:
1060                 aif3 = DA732X_AIF_I2S_MODE;
1061                 break;
1062         case SND_SOC_DAIFMT_RIGHT_J:
1063                 aif3 = DA732X_AIF_RIGHT_J_MODE;
1064                 break;
1065         case SND_SOC_DAIFMT_LEFT_J:
1066                 aif3 = DA732X_AIF_LEFT_J_MODE;
1067                 break;
1068         case SND_SOC_DAIFMT_DSP_B:
1069                 aif3 = DA732X_AIF_DSP_MODE;
1070                 break;
1071         default:
1072                 return -EINVAL;
1073         }
1074
1075         /* Clock inversion */
1076         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1077         case SND_SOC_DAIFMT_DSP_B:
1078                 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1079                 case SND_SOC_DAIFMT_NB_NF:
1080                         break;
1081                 case SND_SOC_DAIFMT_IB_NF:
1082                         aif3 |= DA732X_AIF_BCLK_INV;
1083                         break;
1084                 default:
1085                         return -EINVAL;
1086                 }
1087                 break;
1088         case SND_SOC_DAIFMT_I2S:
1089         case SND_SOC_DAIFMT_RIGHT_J:
1090         case SND_SOC_DAIFMT_LEFT_J:
1091                 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1092                 case SND_SOC_DAIFMT_NB_NF:
1093                         break;
1094                 case SND_SOC_DAIFMT_IB_IF:
1095                         aif3 |= DA732X_AIF_BCLK_INV | DA732X_AIF_WCLK_INV;
1096                         break;
1097                 case SND_SOC_DAIFMT_IB_NF:
1098                         aif3 |= DA732X_AIF_BCLK_INV;
1099                         break;
1100                 case SND_SOC_DAIFMT_NB_IF:
1101                         aif3 |= DA732X_AIF_WCLK_INV;
1102                         break;
1103                 default:
1104                         return -EINVAL;
1105                 }
1106                 break;
1107         default:
1108                 return -EINVAL;
1109         }
1110
1111         snd_soc_write(codec, DA732X_REG_AIF_MCLK, aif_mclk);
1112         snd_soc_update_bits(codec, reg_aif1, DA732X_AIF1_CLK_MASK, aif1);
1113         snd_soc_update_bits(codec, reg_aif3, DA732X_AIF_BCLK_INV |
1114                             DA732X_AIF_WCLK_INV | DA732X_AIF_MODE_MASK, aif3);
1115         snd_soc_write(codec, DA732X_REG_PC_CTRL, pc_count);
1116
1117         return 0;
1118 }
1119
1120
1121
1122 static int da732x_set_dai_pll(struct snd_soc_codec *codec, int pll_id,
1123                               int source, unsigned int freq_in,
1124                               unsigned int freq_out)
1125 {
1126         struct da732x_priv *da732x = snd_soc_codec_get_drvdata(codec);
1127         int fref, indiv;
1128         u8 div_lo, div_mid, div_hi;
1129         u64 frac_div;
1130
1131         /* Disable PLL */
1132         if (freq_out == 0) {
1133                 snd_soc_update_bits(codec, DA732X_REG_PLL_CTRL,
1134                                     DA732X_PLL_EN, 0);
1135                 da732x->pll_en = false;
1136                 return 0;
1137         }
1138
1139         if (da732x->pll_en)
1140                 return -EBUSY;
1141
1142         if (source == DA732X_SRCCLK_MCLK) {
1143                 /* Validate Sysclk rate */
1144                 switch (da732x->sysclk) {
1145                 case 11290000:
1146                 case 12288000:
1147                 case 22580000:
1148                 case 24576000:
1149                 case 45160000:
1150                 case 49152000:
1151                         snd_soc_write(codec, DA732X_REG_PLL_CTRL,
1152                                       DA732X_PLL_BYPASS);
1153                         return 0;
1154                 default:
1155                         dev_err(codec->dev,
1156                                 "Cannot use PLL Bypass, invalid SYSCLK rate\n");
1157                         return -EINVAL;
1158                 }
1159         }
1160
1161         indiv = da732x_get_input_div(codec, da732x->sysclk);
1162         if (indiv < 0)
1163                 return indiv;
1164
1165         fref = (da732x->sysclk / indiv);
1166         div_hi = freq_out / fref;
1167         frac_div = (u64)(freq_out % fref) * 8192ULL;
1168         do_div(frac_div, fref);
1169         div_mid = (frac_div >> DA732X_1BYTE_SHIFT) & DA732X_U8_MASK;
1170         div_lo = (frac_div) & DA732X_U8_MASK;
1171
1172         snd_soc_write(codec, DA732X_REG_PLL_DIV_LO, div_lo);
1173         snd_soc_write(codec, DA732X_REG_PLL_DIV_MID, div_mid);
1174         snd_soc_write(codec, DA732X_REG_PLL_DIV_HI, div_hi);
1175
1176         snd_soc_update_bits(codec, DA732X_REG_PLL_CTRL, DA732X_PLL_EN,
1177                             DA732X_PLL_EN);
1178
1179         da732x->pll_en = true;
1180
1181         return 0;
1182 }
1183
1184 static int da732x_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
1185                                  unsigned int freq, int dir)
1186 {
1187         struct snd_soc_codec *codec = dai->codec;
1188         struct da732x_priv *da732x = snd_soc_codec_get_drvdata(codec);
1189
1190         da732x->sysclk = freq;
1191
1192         return 0;
1193 }
1194
1195 #define DA732X_RATES    SNDRV_PCM_RATE_8000_96000
1196
1197 #define DA732X_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1198                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1199
1200 static struct snd_soc_dai_ops da732x_dai1_ops = {
1201         .hw_params      = da732x_hw_params,
1202         .set_fmt        = da732x_set_dai_fmt,
1203         .set_sysclk     = da732x_set_dai_sysclk,
1204 };
1205
1206 static struct snd_soc_dai_ops da732x_dai2_ops = {
1207         .hw_params      = da732x_hw_params,
1208         .set_fmt        = da732x_set_dai_fmt,
1209         .set_sysclk     = da732x_set_dai_sysclk,
1210 };
1211
1212 static struct snd_soc_dai_driver da732x_dai[] = {
1213         {
1214                 .name   = "DA732X_AIFA",
1215                 .id     = DA732X_DAI_ID1,
1216                 .base   = DA732X_REG_AIFA1,
1217                 .playback = {
1218                         .stream_name = "AIFA Playback",
1219                         .channels_min = 1,
1220                         .channels_max = 2,
1221                         .rates = DA732X_RATES,
1222                         .formats = DA732X_FORMATS,
1223                 },
1224                 .capture = {
1225                         .stream_name = "AIFA Capture",
1226                         .channels_min = 1,
1227                         .channels_max = 2,
1228                         .rates = DA732X_RATES,
1229                         .formats = DA732X_FORMATS,
1230                 },
1231                 .ops = &da732x_dai1_ops,
1232         },
1233         {
1234                 .name   = "DA732X_AIFB",
1235                 .id     = DA732X_DAI_ID2,
1236                 .base   = DA732X_REG_AIFB1,
1237                 .playback = {
1238                         .stream_name = "AIFB Playback",
1239                         .channels_min = 1,
1240                         .channels_max = 2,
1241                         .rates = DA732X_RATES,
1242                         .formats = DA732X_FORMATS,
1243                 },
1244                 .capture = {
1245                         .stream_name = "AIFB Capture",
1246                         .channels_min = 1,
1247                         .channels_max = 2,
1248                         .rates = DA732X_RATES,
1249                         .formats = DA732X_FORMATS,
1250                 },
1251                 .ops = &da732x_dai2_ops,
1252         },
1253 };
1254
1255 static bool da732x_volatile(struct device *dev, unsigned int reg)
1256 {
1257         switch (reg) {
1258         case DA732X_REG_HPL_DAC_OFF_CNTL:
1259         case DA732X_REG_HPR_DAC_OFF_CNTL:
1260                 return true;
1261         default:
1262                 return false;
1263         }
1264 }
1265
1266 static const struct regmap_config da732x_regmap = {
1267         .reg_bits               = 8,
1268         .val_bits               = 8,
1269
1270         .max_register           = DA732X_MAX_REG,
1271         .volatile_reg           = da732x_volatile,
1272         .reg_defaults           = da732x_reg_cache,
1273         .num_reg_defaults       = ARRAY_SIZE(da732x_reg_cache),
1274         .cache_type             = REGCACHE_RBTREE,
1275 };
1276
1277
1278 static void da732x_dac_offset_adjust(struct snd_soc_codec *codec)
1279 {
1280         u8 offset[DA732X_HP_DACS];
1281         u8 sign[DA732X_HP_DACS];
1282         u8 step = DA732X_DAC_OFFSET_STEP;
1283
1284         /* Initialize DAC offset calibration circuits and registers */
1285         snd_soc_write(codec, DA732X_REG_HPL_DAC_OFFSET,
1286                       DA732X_HP_DAC_OFFSET_TRIM_VAL);
1287         snd_soc_write(codec, DA732X_REG_HPR_DAC_OFFSET,
1288                       DA732X_HP_DAC_OFFSET_TRIM_VAL);
1289         snd_soc_write(codec, DA732X_REG_HPL_DAC_OFF_CNTL,
1290                       DA732X_HP_DAC_OFF_CALIBRATION |
1291                       DA732X_HP_DAC_OFF_SCALE_STEPS);
1292         snd_soc_write(codec, DA732X_REG_HPR_DAC_OFF_CNTL,
1293                       DA732X_HP_DAC_OFF_CALIBRATION |
1294                       DA732X_HP_DAC_OFF_SCALE_STEPS);
1295
1296         /* Wait for voltage stabilization */
1297         msleep(DA732X_WAIT_FOR_STABILIZATION);
1298
1299         /* Check DAC offset sign */
1300         sign[DA732X_HPL_DAC] = (snd_soc_read(codec, DA732X_REG_HPL_DAC_OFF_CNTL) &
1301                                 DA732X_HP_DAC_OFF_CNTL_COMPO);
1302         sign[DA732X_HPR_DAC] = (snd_soc_read(codec, DA732X_REG_HPR_DAC_OFF_CNTL) &
1303                                 DA732X_HP_DAC_OFF_CNTL_COMPO);
1304
1305         /* Binary search DAC offset values (both channels at once) */
1306         offset[DA732X_HPL_DAC] = sign[DA732X_HPL_DAC] << DA732X_HP_DAC_COMPO_SHIFT;
1307         offset[DA732X_HPR_DAC] = sign[DA732X_HPR_DAC] << DA732X_HP_DAC_COMPO_SHIFT;
1308
1309         do {
1310                 offset[DA732X_HPL_DAC] |= step;
1311                 offset[DA732X_HPR_DAC] |= step;
1312                 snd_soc_write(codec, DA732X_REG_HPL_DAC_OFFSET,
1313                               ~offset[DA732X_HPL_DAC] & DA732X_HP_DAC_OFF_MASK);
1314                 snd_soc_write(codec, DA732X_REG_HPR_DAC_OFFSET,
1315                               ~offset[DA732X_HPR_DAC] & DA732X_HP_DAC_OFF_MASK);
1316
1317                 msleep(DA732X_WAIT_FOR_STABILIZATION);
1318
1319                 if ((snd_soc_read(codec, DA732X_REG_HPL_DAC_OFF_CNTL) &
1320                      DA732X_HP_DAC_OFF_CNTL_COMPO) ^ sign[DA732X_HPL_DAC])
1321                         offset[DA732X_HPL_DAC] &= ~step;
1322                 if ((snd_soc_read(codec, DA732X_REG_HPR_DAC_OFF_CNTL) &
1323                      DA732X_HP_DAC_OFF_CNTL_COMPO) ^ sign[DA732X_HPR_DAC])
1324                         offset[DA732X_HPR_DAC] &= ~step;
1325
1326                 step >>= 1;
1327         } while (step);
1328
1329         /* Write final DAC offsets to registers */
1330         snd_soc_write(codec, DA732X_REG_HPL_DAC_OFFSET,
1331                       ~offset[DA732X_HPL_DAC] & DA732X_HP_DAC_OFF_MASK);
1332         snd_soc_write(codec, DA732X_REG_HPR_DAC_OFFSET,
1333                       ~offset[DA732X_HPR_DAC] & DA732X_HP_DAC_OFF_MASK);
1334
1335         /* End DAC calibration mode */
1336         snd_soc_write(codec, DA732X_REG_HPL_DAC_OFF_CNTL,
1337                 DA732X_HP_DAC_OFF_SCALE_STEPS);
1338         snd_soc_write(codec, DA732X_REG_HPR_DAC_OFF_CNTL,
1339                 DA732X_HP_DAC_OFF_SCALE_STEPS);
1340 }
1341
1342 static void da732x_output_offset_adjust(struct snd_soc_codec *codec)
1343 {
1344         u8 offset[DA732X_HP_AMPS];
1345         u8 sign[DA732X_HP_AMPS];
1346         u8 step = DA732X_OUTPUT_OFFSET_STEP;
1347
1348         offset[DA732X_HPL_AMP] = DA732X_HP_OUT_TRIM_VAL;
1349         offset[DA732X_HPR_AMP] = DA732X_HP_OUT_TRIM_VAL;
1350
1351         /* Initialize output offset calibration circuits and registers  */
1352         snd_soc_write(codec, DA732X_REG_HPL_OUT_OFFSET, DA732X_HP_OUT_TRIM_VAL);
1353         snd_soc_write(codec, DA732X_REG_HPR_OUT_OFFSET, DA732X_HP_OUT_TRIM_VAL);
1354         snd_soc_write(codec, DA732X_REG_HPL,
1355                       DA732X_HP_OUT_COMP | DA732X_HP_OUT_EN);
1356         snd_soc_write(codec, DA732X_REG_HPR,
1357                       DA732X_HP_OUT_COMP | DA732X_HP_OUT_EN);
1358
1359         /* Wait for voltage stabilization */
1360         msleep(DA732X_WAIT_FOR_STABILIZATION);
1361
1362         /* Check output offset sign */
1363         sign[DA732X_HPL_AMP] = snd_soc_read(codec, DA732X_REG_HPL) &
1364                                DA732X_HP_OUT_COMPO;
1365         sign[DA732X_HPR_AMP] = snd_soc_read(codec, DA732X_REG_HPR) &
1366                                DA732X_HP_OUT_COMPO;
1367
1368         snd_soc_write(codec, DA732X_REG_HPL, DA732X_HP_OUT_COMP |
1369                       (sign[DA732X_HPL_AMP] >> DA732X_HP_OUT_COMPO_SHIFT) |
1370                       DA732X_HP_OUT_EN);
1371         snd_soc_write(codec, DA732X_REG_HPR, DA732X_HP_OUT_COMP |
1372                       (sign[DA732X_HPR_AMP] >> DA732X_HP_OUT_COMPO_SHIFT) |
1373                       DA732X_HP_OUT_EN);
1374
1375         /* Binary search output offset values (both channels at once) */
1376         do {
1377                 offset[DA732X_HPL_AMP] |= step;
1378                 offset[DA732X_HPR_AMP] |= step;
1379                 snd_soc_write(codec, DA732X_REG_HPL_OUT_OFFSET,
1380                               offset[DA732X_HPL_AMP]);
1381                 snd_soc_write(codec, DA732X_REG_HPR_OUT_OFFSET,
1382                               offset[DA732X_HPR_AMP]);
1383
1384                 msleep(DA732X_WAIT_FOR_STABILIZATION);
1385
1386                 if ((snd_soc_read(codec, DA732X_REG_HPL) &
1387                      DA732X_HP_OUT_COMPO) ^ sign[DA732X_HPL_AMP])
1388                         offset[DA732X_HPL_AMP] &= ~step;
1389                 if ((snd_soc_read(codec, DA732X_REG_HPR) &
1390                      DA732X_HP_OUT_COMPO) ^ sign[DA732X_HPR_AMP])
1391                         offset[DA732X_HPR_AMP] &= ~step;
1392
1393                 step >>= 1;
1394         } while (step);
1395
1396         /* Write final DAC offsets to registers */
1397         snd_soc_write(codec, DA732X_REG_HPL_OUT_OFFSET, offset[DA732X_HPL_AMP]);
1398         snd_soc_write(codec, DA732X_REG_HPR_OUT_OFFSET, offset[DA732X_HPR_AMP]);
1399 }
1400
1401 static void da732x_hp_dc_offset_cancellation(struct snd_soc_codec *codec)
1402 {
1403         /* Make sure that we have Soft Mute enabled */
1404         snd_soc_write(codec, DA732X_REG_DAC1_SOFTMUTE, DA732X_SOFTMUTE_EN |
1405                       DA732X_GAIN_RAMPED | DA732X_16_SAMPLES);
1406         snd_soc_write(codec, DA732X_REG_DAC1_SEL, DA732X_DACL_EN |
1407                       DA732X_DACR_EN | DA732X_DACL_SDM | DA732X_DACR_SDM |
1408                       DA732X_DACL_MUTE | DA732X_DACR_MUTE);
1409         snd_soc_write(codec, DA732X_REG_HPL, DA732X_HP_OUT_DAC_EN |
1410                       DA732X_HP_OUT_MUTE | DA732X_HP_OUT_EN);
1411         snd_soc_write(codec, DA732X_REG_HPR, DA732X_HP_OUT_EN |
1412                       DA732X_HP_OUT_MUTE | DA732X_HP_OUT_DAC_EN);
1413
1414         da732x_dac_offset_adjust(codec);
1415         da732x_output_offset_adjust(codec);
1416
1417         snd_soc_write(codec, DA732X_REG_DAC1_SEL, DA732X_DACS_DIS);
1418         snd_soc_write(codec, DA732X_REG_HPL, DA732X_HP_DIS);
1419         snd_soc_write(codec, DA732X_REG_HPR, DA732X_HP_DIS);
1420 }
1421
1422 static int da732x_set_bias_level(struct snd_soc_codec *codec,
1423                                  enum snd_soc_bias_level level)
1424 {
1425         struct da732x_priv *da732x = snd_soc_codec_get_drvdata(codec);
1426
1427         switch (level) {
1428         case SND_SOC_BIAS_ON:
1429                 snd_soc_update_bits(codec, DA732X_REG_BIAS_EN,
1430                                     DA732X_BIAS_BOOST_MASK,
1431                                     DA732X_BIAS_BOOST_100PC);
1432                 break;
1433         case SND_SOC_BIAS_PREPARE:
1434                 break;
1435         case SND_SOC_BIAS_STANDBY:
1436                 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
1437                         /* Init Codec */
1438                         snd_soc_write(codec, DA732X_REG_REF1,
1439                                       DA732X_VMID_FASTCHG);
1440                         snd_soc_write(codec, DA732X_REG_BIAS_EN,
1441                                       DA732X_BIAS_EN);
1442
1443                         mdelay(DA732X_STARTUP_DELAY);
1444
1445                         /* Disable Fast Charge and enable DAC ref voltage */
1446                         snd_soc_write(codec, DA732X_REG_REF1,
1447                                       DA732X_REFBUFX2_EN);
1448
1449                         /* Enable bypass DSP routing */
1450                         snd_soc_write(codec, DA732X_REG_DATA_ROUTE,
1451                                       DA732X_BYPASS_DSP);
1452
1453                         /* Enable Digital subsystem */
1454                         snd_soc_write(codec, DA732X_REG_DSP_CTRL,
1455                                       DA732X_DIGITAL_EN);
1456
1457                         snd_soc_write(codec, DA732X_REG_SPARE1_OUT,
1458                                       DA732X_HP_DRIVER_EN |
1459                                       DA732X_HP_GATE_LOW |
1460                                       DA732X_HP_LOOP_GAIN_CTRL);
1461                         snd_soc_write(codec, DA732X_REG_HP_LIN1_GNDSEL,
1462                                       DA732X_HP_OUT_GNDSEL);
1463
1464                         da732x_set_charge_pump(codec, DA732X_ENABLE_CP);
1465
1466                         snd_soc_write(codec, DA732X_REG_CLK_EN1,
1467                               DA732X_SYS3_CLK_EN | DA732X_PC_CLK_EN);
1468
1469                         /* Enable Zero Crossing */
1470                         snd_soc_write(codec, DA732X_REG_INP_ZC_EN,
1471                                       DA732X_MIC1_PRE_ZC_EN |
1472                                       DA732X_MIC1_ZC_EN |
1473                                       DA732X_MIC2_PRE_ZC_EN |
1474                                       DA732X_MIC2_ZC_EN |
1475                                       DA732X_AUXL_ZC_EN |
1476                                       DA732X_AUXR_ZC_EN |
1477                                       DA732X_MIC3_PRE_ZC_EN |
1478                                       DA732X_MIC3_ZC_EN);
1479                         snd_soc_write(codec, DA732X_REG_OUT_ZC_EN,
1480                                       DA732X_HPL_ZC_EN | DA732X_HPR_ZC_EN |
1481                                       DA732X_LIN2_ZC_EN | DA732X_LIN3_ZC_EN |
1482                                       DA732X_LIN4_ZC_EN);
1483
1484                         da732x_hp_dc_offset_cancellation(codec);
1485
1486                         regcache_cache_only(da732x->regmap, false);
1487                         regcache_sync(da732x->regmap);
1488                 } else {
1489                         snd_soc_update_bits(codec, DA732X_REG_BIAS_EN,
1490                                             DA732X_BIAS_BOOST_MASK,
1491                                             DA732X_BIAS_BOOST_50PC);
1492                         snd_soc_update_bits(codec, DA732X_REG_PLL_CTRL,
1493                                             DA732X_PLL_EN, 0);
1494                         da732x->pll_en = false;
1495                 }
1496                 break;
1497         case SND_SOC_BIAS_OFF:
1498                 regcache_cache_only(da732x->regmap, true);
1499                 da732x_set_charge_pump(codec, DA732X_DISABLE_CP);
1500                 snd_soc_update_bits(codec, DA732X_REG_BIAS_EN, DA732X_BIAS_EN,
1501                                     DA732X_BIAS_DIS);
1502                 da732x->pll_en = false;
1503                 break;
1504         }
1505
1506         codec->dapm.bias_level = level;
1507
1508         return 0;
1509 }
1510
1511 static int da732x_probe(struct snd_soc_codec *codec)
1512 {
1513         struct da732x_priv *da732x = snd_soc_codec_get_drvdata(codec);
1514         struct snd_soc_dapm_context *dapm = &codec->dapm;
1515
1516         da732x->codec = codec;
1517
1518         dapm->idle_bias_off = false;
1519
1520         da732x_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1521
1522         return 0;
1523 }
1524
1525 static int da732x_remove(struct snd_soc_codec *codec)
1526 {
1527
1528         da732x_set_bias_level(codec, SND_SOC_BIAS_OFF);
1529
1530         return 0;
1531 }
1532
1533 static struct snd_soc_codec_driver soc_codec_dev_da732x = {
1534         .probe                  = da732x_probe,
1535         .remove                 = da732x_remove,
1536         .set_bias_level         = da732x_set_bias_level,
1537         .controls               = da732x_snd_controls,
1538         .num_controls           = ARRAY_SIZE(da732x_snd_controls),
1539         .dapm_widgets           = da732x_dapm_widgets,
1540         .num_dapm_widgets       = ARRAY_SIZE(da732x_dapm_widgets),
1541         .dapm_routes            = da732x_dapm_routes,
1542         .num_dapm_routes        = ARRAY_SIZE(da732x_dapm_routes),
1543         .set_pll                = da732x_set_dai_pll,
1544 };
1545
1546 static int da732x_i2c_probe(struct i2c_client *i2c,
1547                             const struct i2c_device_id *id)
1548 {
1549         struct da732x_priv *da732x;
1550         unsigned int reg;
1551         int ret;
1552
1553         da732x = devm_kzalloc(&i2c->dev, sizeof(struct da732x_priv),
1554                               GFP_KERNEL);
1555         if (!da732x)
1556                 return -ENOMEM;
1557
1558         i2c_set_clientdata(i2c, da732x);
1559
1560         da732x->regmap = devm_regmap_init_i2c(i2c, &da732x_regmap);
1561         if (IS_ERR(da732x->regmap)) {
1562                 ret = PTR_ERR(da732x->regmap);
1563                 dev_err(&i2c->dev, "Failed to initialize regmap\n");
1564                 goto err;
1565         }
1566
1567         ret = regmap_read(da732x->regmap, DA732X_REG_ID, &reg);
1568         if (ret < 0) {
1569                 dev_err(&i2c->dev, "Failed to read ID register: %d\n", ret);
1570                 goto err;
1571         }
1572
1573         dev_info(&i2c->dev, "Revision: %d.%d\n",
1574                  (reg & DA732X_ID_MAJOR_MASK) >> 4,
1575                  (reg & DA732X_ID_MINOR_MASK));
1576
1577         ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_da732x,
1578                                      da732x_dai, ARRAY_SIZE(da732x_dai));
1579         if (ret != 0)
1580                 dev_err(&i2c->dev, "Failed to register codec.\n");
1581
1582 err:
1583         return ret;
1584 }
1585
1586 static int da732x_i2c_remove(struct i2c_client *client)
1587 {
1588         snd_soc_unregister_codec(&client->dev);
1589
1590         return 0;
1591 }
1592
1593 static const struct i2c_device_id da732x_i2c_id[] = {
1594         { "da7320", 0},
1595         { }
1596 };
1597 MODULE_DEVICE_TABLE(i2c, da732x_i2c_id);
1598
1599 static struct i2c_driver da732x_i2c_driver = {
1600         .driver         = {
1601                 .name   = "da7320",
1602                 .owner  = THIS_MODULE,
1603         },
1604         .probe          = da732x_i2c_probe,
1605         .remove         = da732x_i2c_remove,
1606         .id_table       = da732x_i2c_id,
1607 };
1608
1609 module_i2c_driver(da732x_i2c_driver);
1610
1611
1612 MODULE_DESCRIPTION("ASoC DA732X driver");
1613 MODULE_AUTHOR("Michal Hajduk <michal.hajduk@diasemi.com>");
1614 MODULE_LICENSE("GPL");