Linux-libre 5.7.6-gnu
[librecmc/linux-libre.git] / sound / pci / hda / hda_tegra.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *
4  * Implementation of primary ALSA driver code base for NVIDIA Tegra HDA.
5  */
6
7 #include <linux/clk.h>
8 #include <linux/clocksource.h>
9 #include <linux/completion.h>
10 #include <linux/delay.h>
11 #include <linux/dma-mapping.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/io.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <linux/mutex.h>
19 #include <linux/of_device.h>
20 #include <linux/slab.h>
21 #include <linux/time.h>
22 #include <linux/string.h>
23 #include <linux/pm_runtime.h>
24
25 #include <sound/core.h>
26 #include <sound/initval.h>
27
28 #include <sound/hda_codec.h>
29 #include "hda_controller.h"
30
31 /* Defines for Nvidia Tegra HDA support */
32 #define HDA_BAR0           0x8000
33
34 #define HDA_CFG_CMD        0x1004
35 #define HDA_CFG_BAR0       0x1010
36
37 #define HDA_ENABLE_IO_SPACE       (1 << 0)
38 #define HDA_ENABLE_MEM_SPACE      (1 << 1)
39 #define HDA_ENABLE_BUS_MASTER     (1 << 2)
40 #define HDA_ENABLE_SERR           (1 << 8)
41 #define HDA_DISABLE_INTR          (1 << 10)
42 #define HDA_BAR0_INIT_PROGRAM     0xFFFFFFFF
43 #define HDA_BAR0_FINAL_PROGRAM    (1 << 14)
44
45 /* IPFS */
46 #define HDA_IPFS_CONFIG           0x180
47 #define HDA_IPFS_EN_FPCI          0x1
48
49 #define HDA_IPFS_FPCI_BAR0        0x80
50 #define HDA_FPCI_BAR0_START       0x40
51
52 #define HDA_IPFS_INTR_MASK        0x188
53 #define HDA_IPFS_EN_INTR          (1 << 16)
54
55 /* max number of SDs */
56 #define NUM_CAPTURE_SD 1
57 #define NUM_PLAYBACK_SD 1
58
59 struct hda_tegra {
60         struct azx chip;
61         struct device *dev;
62         struct clk *hda_clk;
63         struct clk *hda2codec_2x_clk;
64         struct clk *hda2hdmi_clk;
65         void __iomem *regs;
66         struct work_struct probe_work;
67 };
68
69 #ifdef CONFIG_PM
70 static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
71 module_param(power_save, bint, 0644);
72 MODULE_PARM_DESC(power_save,
73                  "Automatic power-saving timeout (in seconds, 0 = disable).");
74 #else
75 #define power_save      0
76 #endif
77
78 static const struct hda_controller_ops hda_tegra_ops; /* nothing special */
79
80 static void hda_tegra_init(struct hda_tegra *hda)
81 {
82         u32 v;
83
84         /* Enable PCI access */
85         v = readl(hda->regs + HDA_IPFS_CONFIG);
86         v |= HDA_IPFS_EN_FPCI;
87         writel(v, hda->regs + HDA_IPFS_CONFIG);
88
89         /* Enable MEM/IO space and bus master */
90         v = readl(hda->regs + HDA_CFG_CMD);
91         v &= ~HDA_DISABLE_INTR;
92         v |= HDA_ENABLE_MEM_SPACE | HDA_ENABLE_IO_SPACE |
93                 HDA_ENABLE_BUS_MASTER | HDA_ENABLE_SERR;
94         writel(v, hda->regs + HDA_CFG_CMD);
95
96         writel(HDA_BAR0_INIT_PROGRAM, hda->regs + HDA_CFG_BAR0);
97         writel(HDA_BAR0_FINAL_PROGRAM, hda->regs + HDA_CFG_BAR0);
98         writel(HDA_FPCI_BAR0_START, hda->regs + HDA_IPFS_FPCI_BAR0);
99
100         v = readl(hda->regs + HDA_IPFS_INTR_MASK);
101         v |= HDA_IPFS_EN_INTR;
102         writel(v, hda->regs + HDA_IPFS_INTR_MASK);
103 }
104
105 static int hda_tegra_enable_clocks(struct hda_tegra *data)
106 {
107         int rc;
108
109         rc = clk_prepare_enable(data->hda_clk);
110         if (rc)
111                 return rc;
112         rc = clk_prepare_enable(data->hda2codec_2x_clk);
113         if (rc)
114                 goto disable_hda;
115         rc = clk_prepare_enable(data->hda2hdmi_clk);
116         if (rc)
117                 goto disable_codec_2x;
118
119         return 0;
120
121 disable_codec_2x:
122         clk_disable_unprepare(data->hda2codec_2x_clk);
123 disable_hda:
124         clk_disable_unprepare(data->hda_clk);
125         return rc;
126 }
127
128 static void hda_tegra_disable_clocks(struct hda_tegra *data)
129 {
130         clk_disable_unprepare(data->hda2hdmi_clk);
131         clk_disable_unprepare(data->hda2codec_2x_clk);
132         clk_disable_unprepare(data->hda_clk);
133 }
134
135 /*
136  * power management
137  */
138 static int __maybe_unused hda_tegra_suspend(struct device *dev)
139 {
140         struct snd_card *card = dev_get_drvdata(dev);
141         int rc;
142
143         rc = pm_runtime_force_suspend(dev);
144         if (rc < 0)
145                 return rc;
146         snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
147
148         return 0;
149 }
150
151 static int __maybe_unused hda_tegra_resume(struct device *dev)
152 {
153         struct snd_card *card = dev_get_drvdata(dev);
154         int rc;
155
156         rc = pm_runtime_force_resume(dev);
157         if (rc < 0)
158                 return rc;
159         snd_power_change_state(card, SNDRV_CTL_POWER_D0);
160
161         return 0;
162 }
163
164 static int __maybe_unused hda_tegra_runtime_suspend(struct device *dev)
165 {
166         struct snd_card *card = dev_get_drvdata(dev);
167         struct azx *chip = card->private_data;
168         struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
169
170         if (chip && chip->running) {
171                 azx_stop_chip(chip);
172                 azx_enter_link_reset(chip);
173         }
174         hda_tegra_disable_clocks(hda);
175
176         return 0;
177 }
178
179 static int __maybe_unused hda_tegra_runtime_resume(struct device *dev)
180 {
181         struct snd_card *card = dev_get_drvdata(dev);
182         struct azx *chip = card->private_data;
183         struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
184         int rc;
185
186         rc = hda_tegra_enable_clocks(hda);
187         if (rc != 0)
188                 return rc;
189         if (chip && chip->running) {
190                 hda_tegra_init(hda);
191                 azx_init_chip(chip, 1);
192         }
193
194         return 0;
195 }
196
197 static const struct dev_pm_ops hda_tegra_pm = {
198         SET_SYSTEM_SLEEP_PM_OPS(hda_tegra_suspend, hda_tegra_resume)
199         SET_RUNTIME_PM_OPS(hda_tegra_runtime_suspend,
200                            hda_tegra_runtime_resume,
201                            NULL)
202 };
203
204 static int hda_tegra_dev_disconnect(struct snd_device *device)
205 {
206         struct azx *chip = device->device_data;
207
208         chip->bus.shutdown = 1;
209         return 0;
210 }
211
212 /*
213  * destructor
214  */
215 static int hda_tegra_dev_free(struct snd_device *device)
216 {
217         struct azx *chip = device->device_data;
218         struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
219
220         cancel_work_sync(&hda->probe_work);
221         if (azx_bus(chip)->chip_init) {
222                 azx_stop_all_streams(chip);
223                 azx_stop_chip(chip);
224         }
225
226         azx_free_stream_pages(chip);
227         azx_free_streams(chip);
228         snd_hdac_bus_exit(azx_bus(chip));
229
230         return 0;
231 }
232
233 static int hda_tegra_init_chip(struct azx *chip, struct platform_device *pdev)
234 {
235         struct hda_tegra *hda = container_of(chip, struct hda_tegra, chip);
236         struct hdac_bus *bus = azx_bus(chip);
237         struct device *dev = hda->dev;
238         struct resource *res;
239
240         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
241         hda->regs = devm_ioremap_resource(dev, res);
242         if (IS_ERR(hda->regs))
243                 return PTR_ERR(hda->regs);
244
245         bus->remap_addr = hda->regs + HDA_BAR0;
246         bus->addr = res->start + HDA_BAR0;
247
248         hda_tegra_init(hda);
249
250         return 0;
251 }
252
253 static int hda_tegra_init_clk(struct hda_tegra *hda)
254 {
255         struct device *dev = hda->dev;
256
257         hda->hda_clk = devm_clk_get(dev, "hda");
258         if (IS_ERR(hda->hda_clk)) {
259                 dev_err(dev, "failed to get hda clock\n");
260                 return PTR_ERR(hda->hda_clk);
261         }
262         hda->hda2codec_2x_clk = devm_clk_get(dev, "hda2codec_2x");
263         if (IS_ERR(hda->hda2codec_2x_clk)) {
264                 dev_err(dev, "failed to get hda2codec_2x clock\n");
265                 return PTR_ERR(hda->hda2codec_2x_clk);
266         }
267         hda->hda2hdmi_clk = devm_clk_get(dev, "hda2hdmi");
268         if (IS_ERR(hda->hda2hdmi_clk)) {
269                 dev_err(dev, "failed to get hda2hdmi clock\n");
270                 return PTR_ERR(hda->hda2hdmi_clk);
271         }
272
273         return 0;
274 }
275
276 static int hda_tegra_first_init(struct azx *chip, struct platform_device *pdev)
277 {
278         struct hdac_bus *bus = azx_bus(chip);
279         struct snd_card *card = chip->card;
280         int err;
281         unsigned short gcap;
282         int irq_id = platform_get_irq(pdev, 0);
283         const char *sname, *drv_name = "tegra-hda";
284         struct device_node *np = pdev->dev.of_node;
285
286         err = hda_tegra_init_chip(chip, pdev);
287         if (err)
288                 return err;
289
290         err = devm_request_irq(chip->card->dev, irq_id, azx_interrupt,
291                              IRQF_SHARED, KBUILD_MODNAME, chip);
292         if (err) {
293                 dev_err(chip->card->dev,
294                         "unable to request IRQ %d, disabling device\n",
295                         irq_id);
296                 return err;
297         }
298         bus->irq = irq_id;
299         card->sync_irq = bus->irq;
300
301         gcap = azx_readw(chip, GCAP);
302         dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
303
304         /* read number of streams from GCAP register instead of using
305          * hardcoded value
306          */
307         chip->capture_streams = (gcap >> 8) & 0x0f;
308         chip->playback_streams = (gcap >> 12) & 0x0f;
309         if (!chip->playback_streams && !chip->capture_streams) {
310                 /* gcap didn't give any info, switching to old method */
311                 chip->playback_streams = NUM_PLAYBACK_SD;
312                 chip->capture_streams = NUM_CAPTURE_SD;
313         }
314         chip->capture_index_offset = 0;
315         chip->playback_index_offset = chip->capture_streams;
316         chip->num_streams = chip->playback_streams + chip->capture_streams;
317
318         /* initialize streams */
319         err = azx_init_streams(chip);
320         if (err < 0) {
321                 dev_err(card->dev, "failed to initialize streams: %d\n", err);
322                 return err;
323         }
324
325         err = azx_alloc_stream_pages(chip);
326         if (err < 0) {
327                 dev_err(card->dev, "failed to allocate stream pages: %d\n",
328                         err);
329                 return err;
330         }
331
332         /* initialize chip */
333         azx_init_chip(chip, 1);
334
335         /* codec detection */
336         if (!bus->codec_mask) {
337                 dev_err(card->dev, "no codecs found!\n");
338                 return -ENODEV;
339         }
340
341         /* driver name */
342         strncpy(card->driver, drv_name, sizeof(card->driver));
343         /* shortname for card */
344         sname = of_get_property(np, "nvidia,model", NULL);
345         if (!sname)
346                 sname = drv_name;
347         if (strlen(sname) > sizeof(card->shortname))
348                 dev_info(card->dev, "truncating shortname for card\n");
349         strncpy(card->shortname, sname, sizeof(card->shortname));
350
351         /* longname for card */
352         snprintf(card->longname, sizeof(card->longname),
353                  "%s at 0x%lx irq %i",
354                  card->shortname, bus->addr, bus->irq);
355
356         return 0;
357 }
358
359 /*
360  * constructor
361  */
362
363 static void hda_tegra_probe_work(struct work_struct *work);
364
365 static int hda_tegra_create(struct snd_card *card,
366                             unsigned int driver_caps,
367                             struct hda_tegra *hda)
368 {
369         static const struct snd_device_ops ops = {
370                 .dev_disconnect = hda_tegra_dev_disconnect,
371                 .dev_free = hda_tegra_dev_free,
372         };
373         struct azx *chip;
374         int err;
375
376         chip = &hda->chip;
377
378         mutex_init(&chip->open_mutex);
379         chip->card = card;
380         chip->ops = &hda_tegra_ops;
381         chip->driver_caps = driver_caps;
382         chip->driver_type = driver_caps & 0xff;
383         chip->dev_index = 0;
384         INIT_LIST_HEAD(&chip->pcm_list);
385
386         chip->codec_probe_mask = -1;
387
388         chip->single_cmd = false;
389         chip->snoop = true;
390
391         INIT_WORK(&hda->probe_work, hda_tegra_probe_work);
392
393         err = azx_bus_init(chip, NULL);
394         if (err < 0)
395                 return err;
396
397         chip->bus.core.needs_damn_long_delay = 1;
398         chip->bus.core.aligned_mmio = 1;
399
400         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
401         if (err < 0) {
402                 dev_err(card->dev, "Error creating device\n");
403                 return err;
404         }
405
406         return 0;
407 }
408
409 static const struct of_device_id hda_tegra_match[] = {
410         { .compatible = "nvidia,tegra30-hda" },
411         {},
412 };
413 MODULE_DEVICE_TABLE(of, hda_tegra_match);
414
415 static int hda_tegra_probe(struct platform_device *pdev)
416 {
417         const unsigned int driver_flags = AZX_DCAPS_CORBRP_SELF_CLEAR |
418                                           AZX_DCAPS_PM_RUNTIME;
419         struct snd_card *card;
420         struct azx *chip;
421         struct hda_tegra *hda;
422         int err;
423
424         hda = devm_kzalloc(&pdev->dev, sizeof(*hda), GFP_KERNEL);
425         if (!hda)
426                 return -ENOMEM;
427         hda->dev = &pdev->dev;
428         chip = &hda->chip;
429
430         err = snd_card_new(&pdev->dev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
431                            THIS_MODULE, 0, &card);
432         if (err < 0) {
433                 dev_err(&pdev->dev, "Error creating card!\n");
434                 return err;
435         }
436
437         err = hda_tegra_init_clk(hda);
438         if (err < 0)
439                 goto out_free;
440
441         err = hda_tegra_create(card, driver_flags, hda);
442         if (err < 0)
443                 goto out_free;
444         card->private_data = chip;
445
446         dev_set_drvdata(&pdev->dev, card);
447
448         pm_runtime_enable(hda->dev);
449         if (!azx_has_pm_runtime(chip))
450                 pm_runtime_forbid(hda->dev);
451
452         schedule_work(&hda->probe_work);
453
454         return 0;
455
456 out_free:
457         snd_card_free(card);
458         return err;
459 }
460
461 static void hda_tegra_probe_work(struct work_struct *work)
462 {
463         struct hda_tegra *hda = container_of(work, struct hda_tegra, probe_work);
464         struct azx *chip = &hda->chip;
465         struct platform_device *pdev = to_platform_device(hda->dev);
466         int err;
467
468         pm_runtime_get_sync(hda->dev);
469         err = hda_tegra_first_init(chip, pdev);
470         if (err < 0)
471                 goto out_free;
472
473         /* create codec instances */
474         err = azx_probe_codecs(chip, 8);
475         if (err < 0)
476                 goto out_free;
477
478         err = azx_codec_configure(chip);
479         if (err < 0)
480                 goto out_free;
481
482         err = snd_card_register(chip->card);
483         if (err < 0)
484                 goto out_free;
485
486         chip->running = 1;
487         snd_hda_set_power_save(&chip->bus, power_save * 1000);
488
489  out_free:
490         pm_runtime_put(hda->dev);
491         return; /* no error return from async probe */
492 }
493
494 static int hda_tegra_remove(struct platform_device *pdev)
495 {
496         int ret;
497
498         ret = snd_card_free(dev_get_drvdata(&pdev->dev));
499         pm_runtime_disable(&pdev->dev);
500
501         return ret;
502 }
503
504 static void hda_tegra_shutdown(struct platform_device *pdev)
505 {
506         struct snd_card *card = dev_get_drvdata(&pdev->dev);
507         struct azx *chip;
508
509         if (!card)
510                 return;
511         chip = card->private_data;
512         if (chip && chip->running)
513                 azx_stop_chip(chip);
514 }
515
516 static struct platform_driver tegra_platform_hda = {
517         .driver = {
518                 .name = "tegra-hda",
519                 .pm = &hda_tegra_pm,
520                 .of_match_table = hda_tegra_match,
521         },
522         .probe = hda_tegra_probe,
523         .remove = hda_tegra_remove,
524         .shutdown = hda_tegra_shutdown,
525 };
526 module_platform_driver(tegra_platform_hda);
527
528 MODULE_DESCRIPTION("Tegra HDA bus driver");
529 MODULE_LICENSE("GPL v2");