2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4 * Routines for control of EMU10K1 chips
6 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
7 * Added support for Audigy 2 Value.
8 * Added EMU 1010 support.
9 * General bug fixes and enhancements.
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
34 #include <linux/sched.h>
35 #include <linux/kthread.h>
36 #include <linux/delay.h>
37 #include <linux/init.h>
38 #include <linux/interrupt.h>
39 #include <linux/pci.h>
40 #include <linux/slab.h>
41 #include <linux/vmalloc.h>
42 #include <linux/mutex.h>
45 #include <sound/core.h>
46 #include <sound/emu10k1.h>
47 #include <linux/firmware.h>
53 #define HANA_FILENAME "/*(DEBLOBBED)*/"
54 #define DOCK_FILENAME "/*(DEBLOBBED)*/"
55 #define EMU1010B_FILENAME "/*(DEBLOBBED)*/"
56 #define MICRO_DOCK_FILENAME "/*(DEBLOBBED)*/"
57 #define EMU0404_FILENAME "/*(DEBLOBBED)*/"
58 #define EMU1010_NOTEBOOK_FILENAME "/*(DEBLOBBED)*/"
63 /*************************************************************************
65 *************************************************************************/
67 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
69 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
70 snd_emu10k1_ptr_write(emu, IP, ch, 0);
71 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
72 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
73 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
74 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
75 snd_emu10k1_ptr_write(emu, CCR, ch, 0);
77 snd_emu10k1_ptr_write(emu, PSST, ch, 0);
78 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
79 snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
80 snd_emu10k1_ptr_write(emu, Z1, ch, 0);
81 snd_emu10k1_ptr_write(emu, Z2, ch, 0);
82 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
84 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
85 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
86 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
87 snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
88 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
89 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
90 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
91 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
93 /*** these are last so OFF prevents writing ***/
94 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
95 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
96 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
97 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
98 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
100 /* Audigy extra stuffs */
102 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
103 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
104 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
105 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
106 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
107 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
108 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
112 static unsigned int spi_dac_init[] = {
136 static unsigned int i2c_adc_init[][2] = {
137 { 0x17, 0x00 }, /* Reset */
138 { 0x07, 0x00 }, /* Timeout */
139 { 0x0b, 0x22 }, /* Interface control */
140 { 0x0c, 0x22 }, /* Master mode control */
141 { 0x0d, 0x08 }, /* Powerdown control */
142 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
143 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
144 { 0x10, 0x7b }, /* ALC Control 1 */
145 { 0x11, 0x00 }, /* ALC Control 2 */
146 { 0x12, 0x32 }, /* ALC Control 3 */
147 { 0x13, 0x00 }, /* Noise gate control */
148 { 0x14, 0xa6 }, /* Limiter control */
149 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */
152 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
154 unsigned int silent_page;
158 /* disable audio and lock cache */
159 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
160 HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
162 /* reset recording buffers */
163 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
164 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
165 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
166 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
167 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
168 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
170 /* disable channel interrupt */
171 outl(0, emu->port + INTE);
172 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
173 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
174 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
175 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
178 /* set SPDIF bypass mode */
179 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
180 /* enable rear left + rear right AC97 slots */
181 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
185 /* init envelope engine */
186 for (ch = 0; ch < NUM_G; ch++)
187 snd_emu10k1_voice_init(emu, ch);
189 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
190 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
191 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
193 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
194 /* Hacks for Alice3 to work independent of haP16V driver */
195 /* Setup SRCMulti_I2S SamplingRate */
196 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
199 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
201 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
202 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
203 /* Setup SRCMulti Input Audio Enable */
204 /* Use 0xFFFFFFFF to enable P16V sounds. */
205 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
207 /* Enabled Phased (8-channel) P16V playback */
208 outl(0x0201, emu->port + HCFG2);
209 /* Set playback routing. */
210 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
212 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
213 /* Hacks for Alice3 to work independent of haP16V driver */
214 snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
215 /* Setup SRCMulti_I2S SamplingRate */
216 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
219 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
221 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
222 outl(0x600000, emu->port + 0x20);
223 outl(0x14, emu->port + 0x24);
225 /* Setup SRCMulti Input Audio Enable */
226 outl(0x7b0000, emu->port + 0x20);
227 outl(0xFF000000, emu->port + 0x24);
229 /* Setup SPDIF Out Audio Enable */
230 /* The Audigy 2 Value has a separate SPDIF out,
231 * so no need for a mixer switch
233 outl(0x7a0000, emu->port + 0x20);
234 outl(0xFF000000, emu->port + 0x24);
235 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
236 outl(tmp, emu->port + A_IOCFG);
238 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
241 size = ARRAY_SIZE(spi_dac_init);
242 for (n = 0; n < size; n++)
243 snd_emu10k1_spi_write(emu, spi_dac_init[n]);
245 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
248 * GPIO1: Speakers-enabled.
251 * GPIO4: IEC958 Output on.
256 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
258 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
261 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
262 tmp = inl(emu->port + A_IOCFG);
263 outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */
264 tmp = inl(emu->port + A_IOCFG);
265 size = ARRAY_SIZE(i2c_adc_init);
266 for (n = 0; n < size; n++)
267 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
268 for (n = 0; n < 4; n++) {
269 emu->i2c_capture_volume[n][0] = 0xcf;
270 emu->i2c_capture_volume[n][1] = 0xcf;
275 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
276 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
277 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
279 silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
280 for (ch = 0; ch < NUM_G; ch++) {
281 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
282 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
285 if (emu->card_capabilities->emu_model) {
286 outl(HCFG_AUTOMUTE_ASYNC |
288 HCFG_AUDIOENABLE, emu->port + HCFG);
291 * Mute Disable Audio = 0
292 * Lock Tank Memory = 1
293 * Lock Sound Memory = 0
296 } else if (emu->audigy) {
297 if (emu->revision == 4) /* audigy2 */
298 outl(HCFG_AUDIOENABLE |
299 HCFG_AC3ENABLE_CDSPDIF |
300 HCFG_AC3ENABLE_GPSPDIF |
301 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
303 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
304 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
305 * e.g. card_capabilities->joystick */
306 } else if (emu->model == 0x20 ||
307 emu->model == 0xc400 ||
308 (emu->model == 0x21 && emu->revision < 6))
309 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
311 /* With on-chip joystick */
312 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
314 if (enable_ir) { /* enable IR for SB Live */
315 if (emu->card_capabilities->emu_model) {
316 ; /* Disable all access to A_IOCFG for the emu1010 */
317 } else if (emu->card_capabilities->i2c_adc) {
318 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
319 } else if (emu->audigy) {
320 unsigned int reg = inl(emu->port + A_IOCFG);
321 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
323 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
325 outl(reg, emu->port + A_IOCFG);
327 unsigned int reg = inl(emu->port + HCFG);
328 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
330 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
332 outl(reg, emu->port + HCFG);
336 if (emu->card_capabilities->emu_model) {
337 ; /* Disable all access to A_IOCFG for the emu1010 */
338 } else if (emu->card_capabilities->i2c_adc) {
339 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
340 } else if (emu->audigy) { /* enable analog output */
341 unsigned int reg = inl(emu->port + A_IOCFG);
342 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
348 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
351 * Enable the audio bit
353 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
355 /* Enable analog/digital outs on audigy */
356 if (emu->card_capabilities->emu_model) {
357 ; /* Disable all access to A_IOCFG for the emu1010 */
358 } else if (emu->card_capabilities->i2c_adc) {
359 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
360 } else if (emu->audigy) {
361 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
363 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
364 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
365 * This has to be done after init ALice3 I2SOut beyond 48KHz.
366 * So, sequence is important. */
367 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
368 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
369 /* Unmute Analog now. */
370 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
372 /* Disable routing from AC97 line out to Front speakers */
373 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
380 /* FIXME: the following routine disables LiveDrive-II !! */
381 /* TOSLink detection */
383 tmp = inl(emu->port + HCFG);
384 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
385 outl(tmp|0x800, emu->port + HCFG);
387 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
389 outl(tmp, emu->port + HCFG);
395 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
398 int snd_emu10k1_done(struct snd_emu10k1 *emu)
402 outl(0, emu->port + INTE);
407 for (ch = 0; ch < NUM_G; ch++)
408 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
409 for (ch = 0; ch < NUM_G; ch++) {
410 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
411 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
412 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
413 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
416 /* reset recording buffers */
417 snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
418 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
419 snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
420 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
421 snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
422 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
423 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
424 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
425 snd_emu10k1_ptr_write(emu, TCB, 0, 0);
427 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
429 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
431 /* disable channel interrupt */
432 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
433 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
434 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
435 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
437 /* disable audio and lock cache */
438 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
439 snd_emu10k1_ptr_write(emu, PTB, 0, 0);
444 /*************************************************************************
445 * ECARD functional implementation
446 *************************************************************************/
448 /* In A1 Silicon, these bits are in the HC register */
449 #define HOOKN_BIT (1L << 12)
450 #define HANDN_BIT (1L << 11)
451 #define PULSEN_BIT (1L << 10)
453 #define EC_GDI1 (1 << 13)
454 #define EC_GDI0 (1 << 14)
456 #define EC_NUM_CONTROL_BITS 20
458 #define EC_AC3_DATA_SELN 0x0001L
459 #define EC_EE_DATA_SEL 0x0002L
460 #define EC_EE_CNTRL_SELN 0x0004L
461 #define EC_EECLK 0x0008L
462 #define EC_EECS 0x0010L
463 #define EC_EESDO 0x0020L
464 #define EC_TRIM_CSN 0x0040L
465 #define EC_TRIM_SCLK 0x0080L
466 #define EC_TRIM_SDATA 0x0100L
467 #define EC_TRIM_MUTEN 0x0200L
468 #define EC_ADCCAL 0x0400L
469 #define EC_ADCRSTN 0x0800L
470 #define EC_DACCAL 0x1000L
471 #define EC_DACMUTEN 0x2000L
472 #define EC_LEDN 0x4000L
474 #define EC_SPDIF0_SEL_SHIFT 15
475 #define EC_SPDIF1_SEL_SHIFT 17
476 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
477 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
478 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
479 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
480 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
481 * be incremented any time the EEPROM's
482 * format is changed. */
484 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
486 /* Addresses for special values stored in to EEPROM */
487 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
488 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
489 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
491 #define EC_LAST_PROMFILE_ADDR 0x2f
493 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
494 * can be up to 30 characters in length
495 * and is stored as a NULL-terminated
496 * ASCII string. Any unused bytes must be
497 * filled with zeros */
498 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
501 /* Most of this stuff is pretty self-evident. According to the hardware
502 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
503 * offset problem. Weird.
505 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
509 #define EC_DEFAULT_ADC_GAIN 0xC4C4
510 #define EC_DEFAULT_SPDIF0_SEL 0x0
511 #define EC_DEFAULT_SPDIF1_SEL 0x4
513 /**************************************************************************
514 * @func Clock bits into the Ecard's control latch. The Ecard uses a
515 * control latch will is loaded bit-serially by toggling the Modem control
516 * lines from function 2 on the E8010. This function hides these details
517 * and presents the illusion that we are actually writing to a distinct
521 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
523 unsigned short count;
525 unsigned long hc_port;
526 unsigned int hc_value;
528 hc_port = emu->port + HCFG;
529 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
530 outl(hc_value, hc_port);
532 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
534 /* Set up the value */
535 data = ((value & 0x1) ? PULSEN_BIT : 0);
538 outl(hc_value | data, hc_port);
540 /* Clock the shift register */
541 outl(hc_value | data | HANDN_BIT, hc_port);
542 outl(hc_value | data, hc_port);
546 outl(hc_value | HOOKN_BIT, hc_port);
547 outl(hc_value, hc_port);
550 /**************************************************************************
551 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
552 * trim value consists of a 16bit value which is composed of two
553 * 8 bit gain/trim values, one for the left channel and one for the
554 * right channel. The following table maps from the Gain/Attenuation
555 * value in decibels into the corresponding bit pattern for a single
559 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
564 /* Enable writing to the TRIM registers */
565 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
567 /* Do it again to insure that we meet hold time requirements */
568 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
570 for (bit = (1 << 15); bit; bit >>= 1) {
573 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
576 value |= EC_TRIM_SDATA;
579 snd_emu10k1_ecard_write(emu, value);
580 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
581 snd_emu10k1_ecard_write(emu, value);
584 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
587 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
589 unsigned int hc_value;
591 /* Set up the initial settings */
592 emu->ecard_ctrl = EC_RAW_RUN_MODE |
593 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
594 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
596 /* Step 0: Set the codec type in the hardware control register
597 * and enable audio output */
598 hc_value = inl(emu->port + HCFG);
599 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
600 inl(emu->port + HCFG);
602 /* Step 1: Turn off the led and deassert TRIM_CS */
603 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
605 /* Step 2: Calibrate the ADC and DAC */
606 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
608 /* Step 3: Wait for awhile; XXX We can't get away with this
609 * under a real operating system; we'll need to block and wait that
611 snd_emu10k1_wait(emu, 48000);
613 /* Step 4: Switch off the DAC and ADC calibration. Note
614 * That ADC_CAL is actually an inverted signal, so we assert
615 * it here to stop calibration. */
616 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
618 /* Step 4: Switch into run mode */
619 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
621 /* Step 5: Set the analog input gain */
622 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
627 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
629 unsigned long special_port;
632 /* Special initialisation routine
633 * before the rest of the IO-Ports become active.
635 special_port = emu->port + 0x38;
636 value = inl(special_port);
637 outl(0x00d00000, special_port);
638 value = inl(special_port);
639 outl(0x00d00001, special_port);
640 value = inl(special_port);
641 outl(0x00d0005f, special_port);
642 value = inl(special_port);
643 outl(0x00d0007f, special_port);
644 value = inl(special_port);
645 outl(0x0090007f, special_port);
646 value = inl(special_port);
648 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
649 /* Delay to give time for ADC chip to switch on. It needs 113ms */
654 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, const char *filename)
660 unsigned int write_post;
662 const struct firmware *fw_entry;
664 err = reject_firmware(&fw_entry, filename, &emu->pci->dev);
666 snd_printk(KERN_ERR "firmware: %s not found. Err = %d\n", filename, err);
669 snd_printk(KERN_INFO "firmware size = 0x%zx\n", fw_entry->size);
671 /* The FPGA is a Xilinx Spartan IIE XC2S50E */
672 /* GPIO7 -> FPGA PGMN
675 * FPGA CONFIG OFF -> FPGA PGMN
677 spin_lock_irqsave(&emu->emu_lock, flags);
678 outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
679 write_post = inl(emu->port + A_IOCFG);
681 outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
682 write_post = inl(emu->port + A_IOCFG);
683 udelay(100); /* Allow FPGA memory to clean */
684 for (n = 0; n < fw_entry->size; n++) {
685 value = fw_entry->data[n];
686 for (i = 0; i < 8; i++) {
691 outl(reg, emu->port + A_IOCFG);
692 write_post = inl(emu->port + A_IOCFG);
693 outl(reg | 0x40, emu->port + A_IOCFG);
694 write_post = inl(emu->port + A_IOCFG);
697 /* After programming, set GPIO bit 4 high again. */
698 outl(0x10, emu->port + A_IOCFG);
699 write_post = inl(emu->port + A_IOCFG);
700 spin_unlock_irqrestore(&emu->emu_lock, flags);
702 release_firmware(fw_entry);
706 static int emu1010_firmware_thread(void *data)
708 struct snd_emu10k1 *emu = data;
713 /* Delay to allow Audio Dock to settle */
714 msleep_interruptible(1000);
715 if (kthread_should_stop())
717 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */
718 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); /* OPTIONS: Which cards are attached to the EMU */
719 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
720 /* Audio Dock attached */
721 /* Return to Audio Dock programming mode */
722 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n");
723 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK);
724 if (emu->card_capabilities->emu_model ==
726 err = snd_emu1010_load_firmware(emu, DOCK_FILENAME);
729 } else if (emu->card_capabilities->emu_model ==
730 EMU_MODEL_EMU1010B) {
731 err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME);
734 } else if (emu->card_capabilities->emu_model ==
736 err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME);
741 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
742 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, ®);
743 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n", reg);
744 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
745 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
746 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", reg);
747 if ((reg & 0x1f) != 0x15) {
748 /* FPGA failed to be programmed */
749 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n", reg);
752 snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n");
753 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
754 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
755 snd_printk(KERN_INFO "Audio Dock ver: %u.%u\n",
757 /* Sync clocking between 1010 and Dock */
758 /* Allow DLL to settle */
760 /* Unmute all. Default is muted after a firmware load */
761 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
764 snd_printk(KERN_INFO "emu1010: firmware thread stopping\n");
769 * EMU-1010 - details found out from this driver, official MS Win drivers,
772 * Audigy2 (aka Alice2):
773 * ---------------------
774 * * communication over PCI
775 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA
776 * to 2 x 16-bit, using internal DSP instructions
777 * * slave mode, clock supplied by HANA
778 * * linked to HANA using:
779 * 32 x 32-bit serial EMU32 output channels
780 * 16 x EMU32 input channels
781 * (?) x I2S I/O channels (?)
785 * * provides all (?) physical inputs and outputs of the card
786 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
787 * * provides clock signal for the card and Alice2
788 * * two crystals - for 44.1kHz and 48kHz multiples
789 * * provides internal routing of signal sources to signal destinations
790 * * inputs/outputs to Alice2 - see above
792 * Current status of the driver:
793 * ----------------------------
794 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
795 * * PCM device nb. 2:
796 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
797 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
799 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
804 const char *filename = NULL;
806 snd_printk(KERN_INFO "emu1010: Special config.\n");
807 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
808 * Lock Sound Memory Cache, Lock Tank Memory Cache,
811 outl(0x0005a00c, emu->port + HCFG);
812 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
813 * Lock Tank Memory Cache,
816 outl(0x0005a004, emu->port + HCFG);
817 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
820 outl(0x0005a000, emu->port + HCFG);
821 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
824 outl(0x0005a000, emu->port + HCFG);
826 /* Disable 48Volt power to Audio Dock */
827 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
829 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
830 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
831 snd_printdd("reg1 = 0x%x\n", reg);
832 if ((reg & 0x3f) == 0x15) {
833 /* FPGA netlist already present so clear it */
834 /* Return to programming mode */
836 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02);
838 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
839 snd_printdd("reg2 = 0x%x\n", reg);
840 if ((reg & 0x3f) == 0x15) {
841 /* FPGA failed to return to programming mode */
842 snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n");
845 snd_printk(KERN_INFO "emu1010: EMU_HANA_ID = 0x%x\n", reg);
846 switch (emu->card_capabilities->emu_model) {
847 case EMU_MODEL_EMU1010:
848 filename = HANA_FILENAME;
850 case EMU_MODEL_EMU1010B:
851 filename = EMU1010B_FILENAME;
853 case EMU_MODEL_EMU1616:
854 filename = EMU1010_NOTEBOOK_FILENAME;
856 case EMU_MODEL_EMU0404:
857 filename = EMU0404_FILENAME;
864 snd_printk(KERN_INFO "emu1010: filename %s testing\n", filename);
865 err = snd_emu1010_load_firmware(emu, filename);
868 KERN_INFO "emu1010: Loading Firmware file %s failed\n",
873 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
874 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®);
875 if ((reg & 0x3f) != 0x15) {
876 /* FPGA failed to be programmed */
877 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n", reg);
881 snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n");
882 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
883 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
884 snd_printk(KERN_INFO "emu1010: Hana version: %u.%u\n", tmp, tmp2);
885 /* Enable 48Volt power to Audio Dock */
886 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
888 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®);
889 snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg);
890 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®);
891 snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg);
892 snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp);
893 /* Optical -> ADAT I/O */
897 emu->emu1010.optical_in = 1; /* IN_ADAT */
898 emu->emu1010.optical_out = 1; /* IN_ADAT */
900 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
901 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
902 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
903 snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp);
904 /* Set no attenuation on Audio Dock pads. */
905 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00);
906 emu->emu1010.adc_pads = 0x00;
907 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
908 /* Unmute Audio dock DACs, Headphone source DAC-4. */
909 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
910 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
911 snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp);
913 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f);
914 emu->emu1010.dac_pads = 0x0f;
915 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
916 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
917 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
918 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
919 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10);
921 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19);
923 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c);
924 /* IRQ Enable: Alll on */
925 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */
926 /* IRQ Enable: All off */
927 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00);
929 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®);
930 snd_printk(KERN_INFO "emu1010: Card options3 = 0x%x\n", reg);
931 /* Default WCLK set to 48kHz. */
932 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00);
933 /* Word Clock source, Internal 48kHz x1 */
934 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
935 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
936 /* Audio Dock LEDs. */
937 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
941 snd_emu1010_fpga_link_dst_src_write(emu,
942 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
943 snd_emu1010_fpga_link_dst_src_write(emu,
944 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
945 snd_emu1010_fpga_link_dst_src_write(emu,
946 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
947 snd_emu1010_fpga_link_dst_src_write(emu,
948 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
952 snd_emu1010_fpga_link_dst_src_write(emu,
953 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
954 snd_emu1010_fpga_link_dst_src_write(emu,
955 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
956 snd_emu1010_fpga_link_dst_src_write(emu,
957 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
958 snd_emu1010_fpga_link_dst_src_write(emu,
959 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
960 snd_emu1010_fpga_link_dst_src_write(emu,
961 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
962 snd_emu1010_fpga_link_dst_src_write(emu,
963 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
964 snd_emu1010_fpga_link_dst_src_write(emu,
965 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
966 snd_emu1010_fpga_link_dst_src_write(emu,
967 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
971 snd_emu1010_fpga_link_dst_src_write(emu,
972 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
973 snd_emu1010_fpga_link_dst_src_write(emu,
974 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
975 snd_emu1010_fpga_link_dst_src_write(emu,
976 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
977 snd_emu1010_fpga_link_dst_src_write(emu,
978 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
979 snd_emu1010_fpga_link_dst_src_write(emu,
980 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
981 snd_emu1010_fpga_link_dst_src_write(emu,
982 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
983 snd_emu1010_fpga_link_dst_src_write(emu,
984 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
985 snd_emu1010_fpga_link_dst_src_write(emu,
986 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
987 /* Pavel Hofman - setting defaults for 8 more capture channels
988 * Defaults only, users will set their own values anyways, let's
992 snd_emu1010_fpga_link_dst_src_write(emu,
993 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
994 snd_emu1010_fpga_link_dst_src_write(emu,
995 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
996 snd_emu1010_fpga_link_dst_src_write(emu,
997 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
998 snd_emu1010_fpga_link_dst_src_write(emu,
999 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1000 snd_emu1010_fpga_link_dst_src_write(emu,
1001 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1002 snd_emu1010_fpga_link_dst_src_write(emu,
1003 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1004 snd_emu1010_fpga_link_dst_src_write(emu,
1005 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1006 snd_emu1010_fpga_link_dst_src_write(emu,
1007 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
1011 snd_emu1010_fpga_link_dst_src_write(emu,
1012 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1013 snd_emu1010_fpga_link_dst_src_write(emu,
1014 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1015 snd_emu1010_fpga_link_dst_src_write(emu,
1016 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1017 snd_emu1010_fpga_link_dst_src_write(emu,
1018 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1019 snd_emu1010_fpga_link_dst_src_write(emu,
1020 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1021 snd_emu1010_fpga_link_dst_src_write(emu,
1022 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1023 snd_emu1010_fpga_link_dst_src_write(emu,
1024 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1025 snd_emu1010_fpga_link_dst_src_write(emu,
1026 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1027 snd_emu1010_fpga_link_dst_src_write(emu,
1028 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1029 snd_emu1010_fpga_link_dst_src_write(emu,
1030 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1031 snd_emu1010_fpga_link_dst_src_write(emu,
1032 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1033 snd_emu1010_fpga_link_dst_src_write(emu,
1034 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1036 for (i = 0; i < 0x20; i++) {
1037 /* AudioDock Elink <- Silence */
1038 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100 + i, EMU_SRC_SILENCE);
1040 for (i = 0; i < 4; i++) {
1041 /* Hana SPDIF Out <- Silence */
1042 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200 + i, EMU_SRC_SILENCE);
1044 for (i = 0; i < 7; i++) {
1045 /* Hamoa DAC <- Silence */
1046 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300 + i, EMU_SRC_SILENCE);
1048 for (i = 0; i < 7; i++) {
1049 /* Hana ADAT Out <- Silence */
1050 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1052 snd_emu1010_fpga_link_dst_src_write(emu,
1053 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1054 snd_emu1010_fpga_link_dst_src_write(emu,
1055 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1056 snd_emu1010_fpga_link_dst_src_write(emu,
1057 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1058 snd_emu1010_fpga_link_dst_src_write(emu,
1059 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1060 snd_emu1010_fpga_link_dst_src_write(emu,
1061 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1062 snd_emu1010_fpga_link_dst_src_write(emu,
1063 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1064 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */
1066 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1068 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1069 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1072 outl(0x0000a000, emu->port + HCFG);
1073 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1074 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1075 * Un-Mute all codecs.
1077 outl(0x0000a001, emu->port + HCFG);
1079 /* Initial boot complete. Now patches */
1081 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1082 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1083 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1084 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1085 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1086 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
1087 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); /* SPDIF Format spdif (or 0x11 for aes/ebu) */
1089 /* Start Micro/Audio Dock firmware loader thread */
1090 if (!emu->emu1010.firmware_thread) {
1091 emu->emu1010.firmware_thread =
1092 kthread_create(emu1010_firmware_thread, emu,
1093 "emu1010_firmware");
1094 wake_up_process(emu->emu1010.firmware_thread);
1098 snd_emu1010_fpga_link_dst_src_write(emu,
1099 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1100 snd_emu1010_fpga_link_dst_src_write(emu,
1101 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1102 snd_emu1010_fpga_link_dst_src_write(emu,
1103 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1104 snd_emu1010_fpga_link_dst_src_write(emu,
1105 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1107 /* Default outputs */
1108 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1109 /* 1616(M) cardbus default outputs */
1110 /* ALICE2 bus 0xa0 */
1111 snd_emu1010_fpga_link_dst_src_write(emu,
1112 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1113 emu->emu1010.output_source[0] = 17;
1114 snd_emu1010_fpga_link_dst_src_write(emu,
1115 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1116 emu->emu1010.output_source[1] = 18;
1117 snd_emu1010_fpga_link_dst_src_write(emu,
1118 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1119 emu->emu1010.output_source[2] = 19;
1120 snd_emu1010_fpga_link_dst_src_write(emu,
1121 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1122 emu->emu1010.output_source[3] = 20;
1123 snd_emu1010_fpga_link_dst_src_write(emu,
1124 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1125 emu->emu1010.output_source[4] = 21;
1126 snd_emu1010_fpga_link_dst_src_write(emu,
1127 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1128 emu->emu1010.output_source[5] = 22;
1129 /* ALICE2 bus 0xa0 */
1130 snd_emu1010_fpga_link_dst_src_write(emu,
1131 EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1132 emu->emu1010.output_source[16] = 17;
1133 snd_emu1010_fpga_link_dst_src_write(emu,
1134 EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1135 emu->emu1010.output_source[17] = 18;
1137 /* ALICE2 bus 0xa0 */
1138 snd_emu1010_fpga_link_dst_src_write(emu,
1139 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1140 emu->emu1010.output_source[0] = 21;
1141 snd_emu1010_fpga_link_dst_src_write(emu,
1142 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1143 emu->emu1010.output_source[1] = 22;
1144 snd_emu1010_fpga_link_dst_src_write(emu,
1145 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1146 emu->emu1010.output_source[2] = 23;
1147 snd_emu1010_fpga_link_dst_src_write(emu,
1148 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1149 emu->emu1010.output_source[3] = 24;
1150 snd_emu1010_fpga_link_dst_src_write(emu,
1151 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1152 emu->emu1010.output_source[4] = 25;
1153 snd_emu1010_fpga_link_dst_src_write(emu,
1154 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1155 emu->emu1010.output_source[5] = 26;
1156 snd_emu1010_fpga_link_dst_src_write(emu,
1157 EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1158 emu->emu1010.output_source[6] = 27;
1159 snd_emu1010_fpga_link_dst_src_write(emu,
1160 EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1161 emu->emu1010.output_source[7] = 28;
1162 /* ALICE2 bus 0xa0 */
1163 snd_emu1010_fpga_link_dst_src_write(emu,
1164 EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1165 emu->emu1010.output_source[8] = 21;
1166 snd_emu1010_fpga_link_dst_src_write(emu,
1167 EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1168 emu->emu1010.output_source[9] = 22;
1169 /* ALICE2 bus 0xa0 */
1170 snd_emu1010_fpga_link_dst_src_write(emu,
1171 EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1172 emu->emu1010.output_source[10] = 21;
1173 snd_emu1010_fpga_link_dst_src_write(emu,
1174 EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1175 emu->emu1010.output_source[11] = 22;
1176 /* ALICE2 bus 0xa0 */
1177 snd_emu1010_fpga_link_dst_src_write(emu,
1178 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1179 emu->emu1010.output_source[12] = 21;
1180 snd_emu1010_fpga_link_dst_src_write(emu,
1181 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1182 emu->emu1010.output_source[13] = 22;
1183 /* ALICE2 bus 0xa0 */
1184 snd_emu1010_fpga_link_dst_src_write(emu,
1185 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1186 emu->emu1010.output_source[14] = 21;
1187 snd_emu1010_fpga_link_dst_src_write(emu,
1188 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1189 emu->emu1010.output_source[15] = 22;
1190 /* ALICE2 bus 0xa0 */
1191 snd_emu1010_fpga_link_dst_src_write(emu,
1192 EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1193 emu->emu1010.output_source[16] = 21;
1194 snd_emu1010_fpga_link_dst_src_write(emu,
1195 EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1196 emu->emu1010.output_source[17] = 22;
1197 snd_emu1010_fpga_link_dst_src_write(emu,
1198 EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1199 emu->emu1010.output_source[18] = 23;
1200 snd_emu1010_fpga_link_dst_src_write(emu,
1201 EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1202 emu->emu1010.output_source[19] = 24;
1203 snd_emu1010_fpga_link_dst_src_write(emu,
1204 EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1205 emu->emu1010.output_source[20] = 25;
1206 snd_emu1010_fpga_link_dst_src_write(emu,
1207 EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1208 emu->emu1010.output_source[21] = 26;
1209 snd_emu1010_fpga_link_dst_src_write(emu,
1210 EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1211 emu->emu1010.output_source[22] = 27;
1212 snd_emu1010_fpga_link_dst_src_write(emu,
1213 EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1214 emu->emu1010.output_source[23] = 28;
1216 /* TEMP: Select SPDIF in/out */
1217 /* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */
1219 /* TEMP: Select 48kHz SPDIF out */
1220 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1221 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1222 /* Word Clock source, Internal 48kHz x1 */
1223 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
1224 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
1225 emu->emu1010.internal_clock = 1; /* 48000 */
1226 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); /* Set LEDs on Audio Dock */
1227 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1228 /* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */
1229 /* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */
1230 /* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */
1235 * Create the EMU10K1 instance
1239 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1240 static void free_pm_buffer(struct snd_emu10k1 *emu);
1243 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1245 if (emu->port) { /* avoid access to already used hardware */
1246 snd_emu10k1_fx8010_tram_setup(emu, 0);
1247 snd_emu10k1_done(emu);
1248 snd_emu10k1_free_efx(emu);
1250 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
1251 /* Disable 48Volt power to Audio Dock */
1252 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
1254 if (emu->emu1010.firmware_thread)
1255 kthread_stop(emu->emu1010.firmware_thread);
1257 free_irq(emu->irq, emu);
1258 /* remove reserved page */
1259 if (emu->reserved_page) {
1260 snd_emu10k1_synth_free(emu,
1261 (struct snd_util_memblk *)emu->reserved_page);
1262 emu->reserved_page = NULL;
1265 snd_util_memhdr_free(emu->memhdr);
1266 if (emu->silent_page.area)
1267 snd_dma_free_pages(&emu->silent_page);
1268 if (emu->ptb_pages.area)
1269 snd_dma_free_pages(&emu->ptb_pages);
1270 vfree(emu->page_ptr_table);
1271 vfree(emu->page_addr_table);
1273 free_pm_buffer(emu);
1276 pci_release_regions(emu->pci);
1277 if (emu->card_capabilities->ca0151_chip) /* P16V */
1279 pci_disable_device(emu->pci);
1284 static int snd_emu10k1_dev_free(struct snd_device *device)
1286 struct snd_emu10k1 *emu = device->device_data;
1287 return snd_emu10k1_free(emu);
1290 static struct snd_emu_chip_details emu_chip_details[] = {
1291 /* Audigy4 (Not PRO) SB0610 */
1292 /* Tested by James@superbug.co.uk 4th April 2006 */
1298 * 3: 0 - Digital Out, 1 - Line in
1306 * A: Green jack sense (Front)
1308 * C: Black jack sense (Rear/Side Right)
1309 * D: Yellow jack sense (Center/LFE/Side Left)
1313 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1317 /* Mic input not tested.
1318 * Analog CD input not tested
1319 * Digital Out not tested.
1321 * Audio output 5.1 working. Side outputs not working.
1323 /* DSP: CA10300-IAT LF
1324 * DAC: Cirrus Logic CS4382-KQZ
1325 * ADC: Philips 1361T
1326 * AC97: Sigmatel STAC9750
1329 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1330 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
1335 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1337 /* Audigy 2 Value AC3 out does not work yet.
1338 * Need to find out how to turn off interpolators.
1340 /* Tested by James@superbug.co.uk 3rd July 2005 */
1343 * ADC: Philips 1361T
1347 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1348 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1354 /* Audigy 2 ZS Notebook Cardbus card.*/
1355 /* Tested by James@superbug.co.uk 6th November 2006 */
1356 /* Audio output 7.1/Headphones working.
1357 * Digital output working. (AC3 not checked, only PCM)
1358 * Audio Mic/Line inputs working.
1359 * Digital input not tested.
1362 * DAC: Wolfson WM8768/WM8568
1363 * ADC: Wolfson WM8775
1367 /* Tested by James@superbug.co.uk 4th April 2006 */
1371 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1372 * 2: Analog input 0 = line in, 1 = mic in
1374 * 4: Digital output 0 = off, 1 = on.
1379 * All bits 1 (0x3fxx) means nothing plugged in.
1380 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1381 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1382 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1386 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1387 .driver = "Audigy2", .name = "SB Audigy 2 ZS Notebook [SB0530]",
1391 .ca_cardbus_chip = 1,
1395 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1396 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1397 .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1401 .ca_cardbus_chip = 1,
1403 .emu_model = EMU_MODEL_EMU1616},
1404 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1405 /* This is MAEM8960, 0202 is MAEM 8980 */
1406 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1407 .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]",
1412 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
1413 /* Tested by James@superbug.co.uk 8th July 2005. */
1414 /* This is MAEM8810, 0202 is MAEM8820 */
1415 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1416 .driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]",
1421 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
1423 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1424 .driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]",
1429 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
1430 /* Tested by James@superbug.co.uk 20-3-2007. */
1431 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1432 .driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]",
1437 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1438 /* Note that all E-mu cards require kernel 2.6 or newer. */
1439 {.vendor = 0x1102, .device = 0x0008,
1440 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
1445 /* Tested by James@superbug.co.uk 3rd July 2005 */
1446 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1447 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
1455 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1456 /* The 0x20061102 does have SB0350 written on it
1457 * Just like 0x20021102
1459 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1460 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
1467 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1469 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1470 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
1477 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1479 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1480 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
1487 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1490 /* Tested by James@superbug.co.uk 3rd July 2005 */
1493 * ADC: Philips 1361T
1497 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1498 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
1505 .adc_1361t = 1, /* 24 bit capture instead of 16bit */
1507 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1508 .driver = "Audigy2", .name = "SB Audigy 2 Platinum EX [SB0280]",
1515 /* Dell OEM/Creative Labs Audigy 2 ZS */
1516 /* See ALSA bug#1365 */
1517 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1518 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
1525 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1527 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1528 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
1535 .invert_shared_spdif = 1, /* digital/analog switch swapped */
1536 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1538 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1539 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
1546 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1547 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
1552 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1553 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
1559 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1560 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
1565 {.vendor = 0x1102, .device = 0x0004,
1566 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1571 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1572 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1577 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1578 .driver = "EMU10K1", .name = "SB Live! [SB0105]",
1583 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1584 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
1589 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1590 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
1595 /* Tested by ALSA bug#1680 26th December 2005 */
1596 /* note: It really has SB0220 written on the card, */
1597 /* but it's SB0228 according to kx.inf */
1598 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1599 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
1604 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1605 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1606 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1611 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1612 .driver = "EMU10K1", .name = "SB Live! 5.1",
1617 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1618 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1619 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
1622 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1623 * share the same IDs!
1626 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1627 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
1632 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1633 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
1637 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1638 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
1643 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1644 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
1649 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1650 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
1655 /* Tested by James@superbug.co.uk 3rd July 2005 */
1656 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1657 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
1662 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1663 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
1668 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1669 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1674 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1675 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
1680 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1681 .driver = "EMU10K1", .name = "E-mu APS [PC545]",
1685 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1686 .driver = "EMU10K1", .name = "SB Live! [CT4620]",
1691 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1692 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
1697 {.vendor = 0x1102, .device = 0x0002,
1698 .driver = "EMU10K1", .name = "SB Live! [Unknown]",
1703 { } /* terminator */
1706 int __devinit snd_emu10k1_create(struct snd_card *card,
1707 struct pci_dev *pci,
1708 unsigned short extin_mask,
1709 unsigned short extout_mask,
1710 long max_cache_bytes,
1713 struct snd_emu10k1 **remu)
1715 struct snd_emu10k1 *emu;
1718 unsigned int silent_page;
1719 const struct snd_emu_chip_details *c;
1720 static struct snd_device_ops ops = {
1721 .dev_free = snd_emu10k1_dev_free,
1726 /* enable PCI device */
1727 err = pci_enable_device(pci);
1731 emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1733 pci_disable_device(pci);
1737 spin_lock_init(&emu->reg_lock);
1738 spin_lock_init(&emu->emu_lock);
1739 spin_lock_init(&emu->spi_lock);
1740 spin_lock_init(&emu->i2c_lock);
1741 spin_lock_init(&emu->voice_lock);
1742 spin_lock_init(&emu->synth_lock);
1743 spin_lock_init(&emu->memblk_lock);
1744 mutex_init(&emu->fx8010.lock);
1745 INIT_LIST_HEAD(&emu->mapped_link_head);
1746 INIT_LIST_HEAD(&emu->mapped_order_link_head);
1750 emu->get_synth_voice = NULL;
1751 /* read revision & serial */
1752 emu->revision = pci->revision;
1753 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1754 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1755 snd_printdd("vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n", pci->vendor, pci->device, emu->serial, emu->model);
1757 for (c = emu_chip_details; c->vendor; c++) {
1758 if (c->vendor == pci->vendor && c->device == pci->device) {
1760 if (c->subsystem && (c->subsystem == subsystem))
1765 if (c->subsystem && (c->subsystem != emu->serial))
1767 if (c->revision && c->revision != emu->revision)
1773 if (c->vendor == 0) {
1774 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1776 pci_disable_device(pci);
1779 emu->card_capabilities = c;
1780 if (c->subsystem && !subsystem)
1781 snd_printdd("Sound card name = %s\n", c->name);
1783 snd_printdd("Sound card name = %s, "
1784 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1785 "Forced to subsytem = 0x%x\n", c->name,
1786 pci->vendor, pci->device, emu->serial, c->subsystem);
1788 snd_printdd("Sound card name = %s, "
1789 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1790 c->name, pci->vendor, pci->device,
1793 if (!*card->id && c->id) {
1795 strlcpy(card->id, c->id, sizeof(card->id));
1797 for (i = 0; i < snd_ecards_limit; i++) {
1798 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1801 if (i >= snd_ecards_limit)
1804 if (n >= SNDRV_CARDS)
1806 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1810 is_audigy = emu->audigy = c->emu10k2_chip;
1812 /* set the DMA transfer mask */
1813 emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1814 if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1815 pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1816 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1818 pci_disable_device(pci);
1822 emu->gpr_base = A_FXGPREGBASE;
1824 emu->gpr_base = FXGPREGBASE;
1826 err = pci_request_regions(pci, "EMU10K1");
1829 pci_disable_device(pci);
1832 emu->port = pci_resource_start(pci, 0);
1834 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1835 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1836 32 * 1024, &emu->ptb_pages) < 0) {
1841 emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1842 emu->page_addr_table = vmalloc(emu->max_cache_pages *
1843 sizeof(unsigned long));
1844 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1849 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1850 EMUPAGESIZE, &emu->silent_page) < 0) {
1854 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1855 if (emu->memhdr == NULL) {
1859 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1860 sizeof(struct snd_util_memblk);
1862 pci_set_master(pci);
1864 emu->fx8010.fxbus_mask = 0x303f;
1865 if (extin_mask == 0)
1866 extin_mask = 0x3fcf;
1867 if (extout_mask == 0)
1868 extout_mask = 0x7fff;
1869 emu->fx8010.extin_mask = extin_mask;
1870 emu->fx8010.extout_mask = extout_mask;
1871 emu->enable_ir = enable_ir;
1873 if (emu->card_capabilities->ca_cardbus_chip) {
1874 err = snd_emu10k1_cardbus_init(emu);
1878 if (emu->card_capabilities->ecard) {
1879 err = snd_emu10k1_ecard_init(emu);
1882 } else if (emu->card_capabilities->emu_model) {
1883 err = snd_emu10k1_emu1010_init(emu);
1885 snd_emu10k1_free(emu);
1889 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1890 does not support this, it shouldn't do any harm */
1891 snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1892 AC97SLOT_CNTR|AC97SLOT_LFE);
1895 /* initialize TRAM setup */
1896 emu->fx8010.itram_size = (16 * 1024)/2;
1897 emu->fx8010.etram_pages.area = NULL;
1898 emu->fx8010.etram_pages.bytes = 0;
1900 /* irq handler must be registered after I/O ports are activated */
1901 if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
1906 emu->irq = pci->irq;
1909 * Init to 0x02109204 :
1910 * Clock accuracy = 0 (1000ppm)
1911 * Sample Rate = 2 (48kHz)
1912 * Audio Channel = 1 (Left of 2)
1913 * Source Number = 0 (Unspecified)
1914 * Generation Status = 1 (Original for Cat Code 12)
1915 * Cat Code = 12 (Digital Signal Mixer)
1917 * Emphasis = 0 (None)
1918 * CP = 1 (Copyright unasserted)
1919 * AN = 0 (Audio data)
1922 emu->spdif_bits[0] = emu->spdif_bits[1] =
1923 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1924 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1925 SPCS_GENERATIONSTATUS | 0x00001200 |
1926 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1928 emu->reserved_page = (struct snd_emu10k1_memblk *)
1929 snd_emu10k1_synth_alloc(emu, 4096);
1930 if (emu->reserved_page)
1931 emu->reserved_page->map_locked = 1;
1933 /* Clear silent pages and set up pointers */
1934 memset(emu->silent_page.area, 0, PAGE_SIZE);
1935 silent_page = emu->silent_page.addr << 1;
1936 for (idx = 0; idx < MAXPAGES; idx++)
1937 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1939 /* set up voice indices */
1940 for (idx = 0; idx < NUM_G; idx++) {
1941 emu->voices[idx].emu = emu;
1942 emu->voices[idx].number = idx;
1945 err = snd_emu10k1_init(emu, enable_ir, 0);
1949 err = alloc_pm_buffer(emu);
1954 /* Initialize the effect engine */
1955 err = snd_emu10k1_init_efx(emu);
1958 snd_emu10k1_audio_enable(emu);
1960 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops);
1964 #ifdef CONFIG_PROC_FS
1965 snd_emu10k1_proc_init(emu);
1968 snd_card_set_dev(card, &pci->dev);
1973 snd_emu10k1_free(emu);
1978 static unsigned char saved_regs[] = {
1979 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1980 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1981 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1982 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1983 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1984 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1987 static unsigned char saved_regs_audigy[] = {
1988 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
1989 A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1993 static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu)
1997 size = ARRAY_SIZE(saved_regs);
1999 size += ARRAY_SIZE(saved_regs_audigy);
2000 emu->saved_ptr = vmalloc(4 * NUM_G * size);
2001 if (!emu->saved_ptr)
2003 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
2005 if (emu->card_capabilities->ca0151_chip &&
2006 snd_p16v_alloc_pm_buffer(emu) < 0)
2011 static void free_pm_buffer(struct snd_emu10k1 *emu)
2013 vfree(emu->saved_ptr);
2014 snd_emu10k1_efx_free_pm_buffer(emu);
2015 if (emu->card_capabilities->ca0151_chip)
2016 snd_p16v_free_pm_buffer(emu);
2019 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
2025 val = emu->saved_ptr;
2026 for (reg = saved_regs; *reg != 0xff; reg++)
2027 for (i = 0; i < NUM_G; i++, val++)
2028 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2030 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2031 for (i = 0; i < NUM_G; i++, val++)
2032 *val = snd_emu10k1_ptr_read(emu, *reg, i);
2035 emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2036 emu->saved_hcfg = inl(emu->port + HCFG);
2039 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2041 if (emu->card_capabilities->ca_cardbus_chip)
2042 snd_emu10k1_cardbus_init(emu);
2043 if (emu->card_capabilities->ecard)
2044 snd_emu10k1_ecard_init(emu);
2045 else if (emu->card_capabilities->emu_model)
2046 snd_emu10k1_emu1010_init(emu);
2048 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2049 snd_emu10k1_init(emu, emu->enable_ir, 1);
2052 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2058 snd_emu10k1_audio_enable(emu);
2060 /* resore for spdif */
2062 outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2063 outl(emu->saved_hcfg, emu->port + HCFG);
2065 val = emu->saved_ptr;
2066 for (reg = saved_regs; *reg != 0xff; reg++)
2067 for (i = 0; i < NUM_G; i++, val++)
2068 snd_emu10k1_ptr_write(emu, *reg, i, *val);
2070 for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2071 for (i = 0; i < NUM_G; i++, val++)
2072 snd_emu10k1_ptr_write(emu, *reg, i, *val);