2 * Copyright 2014 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #ifndef KFD_IOCTL_H_INCLUDED
24 #define KFD_IOCTL_H_INCLUDED
27 #include <linux/ioctl.h>
29 #define KFD_IOCTL_MAJOR_VERSION 1
30 #define KFD_IOCTL_MINOR_VERSION 1
32 struct kfd_ioctl_get_version_args {
33 __u32 major_version; /* from KFD */
34 __u32 minor_version; /* from KFD */
37 /* For kfd_ioctl_create_queue_args.queue_type. */
38 #define KFD_IOC_QUEUE_TYPE_COMPUTE 0
39 #define KFD_IOC_QUEUE_TYPE_SDMA 1
40 #define KFD_IOC_QUEUE_TYPE_COMPUTE_AQL 2
42 #define KFD_MAX_QUEUE_PERCENTAGE 100
43 #define KFD_MAX_QUEUE_PRIORITY 15
45 struct kfd_ioctl_create_queue_args {
46 __u64 ring_base_address; /* to KFD */
47 __u64 write_pointer_address; /* from KFD */
48 __u64 read_pointer_address; /* from KFD */
49 __u64 doorbell_offset; /* from KFD */
51 __u32 ring_size; /* to KFD */
52 __u32 gpu_id; /* to KFD */
53 __u32 queue_type; /* to KFD */
54 __u32 queue_percentage; /* to KFD */
55 __u32 queue_priority; /* to KFD */
56 __u32 queue_id; /* from KFD */
58 __u64 eop_buffer_address; /* to KFD */
59 __u64 eop_buffer_size; /* to KFD */
60 __u64 ctx_save_restore_address; /* to KFD */
61 __u32 ctx_save_restore_size; /* to KFD */
62 __u32 ctl_stack_size; /* to KFD */
65 struct kfd_ioctl_destroy_queue_args {
66 __u32 queue_id; /* to KFD */
70 struct kfd_ioctl_update_queue_args {
71 __u64 ring_base_address; /* to KFD */
73 __u32 queue_id; /* to KFD */
74 __u32 ring_size; /* to KFD */
75 __u32 queue_percentage; /* to KFD */
76 __u32 queue_priority; /* to KFD */
79 struct kfd_ioctl_set_cu_mask_args {
80 __u32 queue_id; /* to KFD */
81 __u32 num_cu_mask; /* to KFD */
82 __u64 cu_mask_ptr; /* to KFD */
85 /* For kfd_ioctl_set_memory_policy_args.default_policy and alternate_policy */
86 #define KFD_IOC_CACHE_POLICY_COHERENT 0
87 #define KFD_IOC_CACHE_POLICY_NONCOHERENT 1
89 struct kfd_ioctl_set_memory_policy_args {
90 __u64 alternate_aperture_base; /* to KFD */
91 __u64 alternate_aperture_size; /* to KFD */
93 __u32 gpu_id; /* to KFD */
94 __u32 default_policy; /* to KFD */
95 __u32 alternate_policy; /* to KFD */
100 * All counters are monotonic. They are used for profiling of compute jobs.
101 * The profiling is done by userspace.
103 * In case of GPU reset, the counter should not be affected.
106 struct kfd_ioctl_get_clock_counters_args {
107 __u64 gpu_clock_counter; /* from KFD */
108 __u64 cpu_clock_counter; /* from KFD */
109 __u64 system_clock_counter; /* from KFD */
110 __u64 system_clock_freq; /* from KFD */
112 __u32 gpu_id; /* to KFD */
116 struct kfd_process_device_apertures {
117 __u64 lds_base; /* from KFD */
118 __u64 lds_limit; /* from KFD */
119 __u64 scratch_base; /* from KFD */
120 __u64 scratch_limit; /* from KFD */
121 __u64 gpuvm_base; /* from KFD */
122 __u64 gpuvm_limit; /* from KFD */
123 __u32 gpu_id; /* from KFD */
128 * AMDKFD_IOC_GET_PROCESS_APERTURES is deprecated. Use
129 * AMDKFD_IOC_GET_PROCESS_APERTURES_NEW instead, which supports an
130 * unlimited number of GPUs.
132 #define NUM_OF_SUPPORTED_GPUS 7
133 struct kfd_ioctl_get_process_apertures_args {
134 struct kfd_process_device_apertures
135 process_apertures[NUM_OF_SUPPORTED_GPUS];/* from KFD */
137 /* from KFD, should be in the range [1 - NUM_OF_SUPPORTED_GPUS] */
142 struct kfd_ioctl_get_process_apertures_new_args {
143 /* User allocated. Pointer to struct kfd_process_device_apertures
144 * filled in by Kernel
146 __u64 kfd_process_device_apertures_ptr;
147 /* to KFD - indicates amount of memory present in
148 * kfd_process_device_apertures_ptr
149 * from KFD - Number of entries filled by KFD.
155 #define MAX_ALLOWED_NUM_POINTS 100
156 #define MAX_ALLOWED_AW_BUFF_SIZE 4096
157 #define MAX_ALLOWED_WAC_BUFF_SIZE 128
159 struct kfd_ioctl_dbg_register_args {
160 __u32 gpu_id; /* to KFD */
164 struct kfd_ioctl_dbg_unregister_args {
165 __u32 gpu_id; /* to KFD */
169 struct kfd_ioctl_dbg_address_watch_args {
170 __u64 content_ptr; /* a pointer to the actual content */
171 __u32 gpu_id; /* to KFD */
172 __u32 buf_size_in_bytes; /*including gpu_id and buf_size */
175 struct kfd_ioctl_dbg_wave_control_args {
176 __u64 content_ptr; /* a pointer to the actual content */
177 __u32 gpu_id; /* to KFD */
178 __u32 buf_size_in_bytes; /*including gpu_id and buf_size */
181 /* Matching HSA_EVENTTYPE */
182 #define KFD_IOC_EVENT_SIGNAL 0
183 #define KFD_IOC_EVENT_NODECHANGE 1
184 #define KFD_IOC_EVENT_DEVICESTATECHANGE 2
185 #define KFD_IOC_EVENT_HW_EXCEPTION 3
186 #define KFD_IOC_EVENT_SYSTEM_EVENT 4
187 #define KFD_IOC_EVENT_DEBUG_EVENT 5
188 #define KFD_IOC_EVENT_PROFILE_EVENT 6
189 #define KFD_IOC_EVENT_QUEUE_EVENT 7
190 #define KFD_IOC_EVENT_MEMORY 8
192 #define KFD_IOC_WAIT_RESULT_COMPLETE 0
193 #define KFD_IOC_WAIT_RESULT_TIMEOUT 1
194 #define KFD_IOC_WAIT_RESULT_FAIL 2
196 #define KFD_SIGNAL_EVENT_LIMIT 4096
198 /* For kfd_event_data.hw_exception_data.reset_type. */
199 #define KFD_HW_EXCEPTION_WHOLE_GPU_RESET 0
200 #define KFD_HW_EXCEPTION_PER_ENGINE_RESET 1
202 /* For kfd_event_data.hw_exception_data.reset_cause. */
203 #define KFD_HW_EXCEPTION_GPU_HANG 0
204 #define KFD_HW_EXCEPTION_ECC 1
207 struct kfd_ioctl_create_event_args {
208 __u64 event_page_offset; /* from KFD */
209 __u32 event_trigger_data; /* from KFD - signal events only */
210 __u32 event_type; /* to KFD */
211 __u32 auto_reset; /* to KFD */
212 __u32 node_id; /* to KFD - only valid for certain
214 __u32 event_id; /* from KFD */
215 __u32 event_slot_index; /* from KFD */
218 struct kfd_ioctl_destroy_event_args {
219 __u32 event_id; /* to KFD */
223 struct kfd_ioctl_set_event_args {
224 __u32 event_id; /* to KFD */
228 struct kfd_ioctl_reset_event_args {
229 __u32 event_id; /* to KFD */
233 struct kfd_memory_exception_failure {
234 __u32 NotPresent; /* Page not present or supervisor privilege */
235 __u32 ReadOnly; /* Write access to a read-only page */
236 __u32 NoExecute; /* Execute access to a page marked NX */
237 __u32 imprecise; /* Can't determine the exact fault address */
240 /* memory exception data*/
241 struct kfd_hsa_memory_exception_data {
242 struct kfd_memory_exception_failure failure;
248 /* hw exception data */
249 struct kfd_hsa_hw_exception_data {
257 struct kfd_event_data {
259 struct kfd_hsa_memory_exception_data memory_exception_data;
260 struct kfd_hsa_hw_exception_data hw_exception_data;
262 __u64 kfd_event_data_ext; /* pointer to an extension structure
263 for future exception types */
264 __u32 event_id; /* to KFD */
268 struct kfd_ioctl_wait_events_args {
269 __u64 events_ptr; /* pointed to struct
270 kfd_event_data array, to KFD */
271 __u32 num_events; /* to KFD */
272 __u32 wait_for_all; /* to KFD */
273 __u32 timeout; /* to KFD */
274 __u32 wait_result; /* from KFD */
277 struct kfd_ioctl_set_scratch_backing_va_args {
278 __u64 va_addr; /* to KFD */
279 __u32 gpu_id; /* to KFD */
283 struct kfd_ioctl_get_tile_config_args {
284 /* to KFD: pointer to tile array */
285 __u64 tile_config_ptr;
286 /* to KFD: pointer to macro tile array */
287 __u64 macro_tile_config_ptr;
288 /* to KFD: array size allocated by user mode
289 * from KFD: array size filled by kernel
291 __u32 num_tile_configs;
292 /* to KFD: array size allocated by user mode
293 * from KFD: array size filled by kernel
295 __u32 num_macro_tile_configs;
297 __u32 gpu_id; /* to KFD */
298 __u32 gb_addr_config; /* from KFD */
299 __u32 num_banks; /* from KFD */
300 __u32 num_ranks; /* from KFD */
301 /* struct size can be extended later if needed
302 * without breaking ABI compatibility
306 struct kfd_ioctl_set_trap_handler_args {
307 __u64 tba_addr; /* to KFD */
308 __u64 tma_addr; /* to KFD */
309 __u32 gpu_id; /* to KFD */
313 struct kfd_ioctl_acquire_vm_args {
314 __u32 drm_fd; /* to KFD */
315 __u32 gpu_id; /* to KFD */
318 /* Allocation flags: memory types */
319 #define KFD_IOC_ALLOC_MEM_FLAGS_VRAM (1 << 0)
320 #define KFD_IOC_ALLOC_MEM_FLAGS_GTT (1 << 1)
321 #define KFD_IOC_ALLOC_MEM_FLAGS_USERPTR (1 << 2)
322 #define KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL (1 << 3)
323 /* Allocation flags: attributes/access options */
324 #define KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE (1 << 31)
325 #define KFD_IOC_ALLOC_MEM_FLAGS_EXECUTABLE (1 << 30)
326 #define KFD_IOC_ALLOC_MEM_FLAGS_PUBLIC (1 << 29)
327 #define KFD_IOC_ALLOC_MEM_FLAGS_NO_SUBSTITUTE (1 << 28)
328 #define KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM (1 << 27)
329 #define KFD_IOC_ALLOC_MEM_FLAGS_COHERENT (1 << 26)
331 /* Allocate memory for later SVM (shared virtual memory) mapping.
333 * @va_addr: virtual address of the memory to be allocated
334 * all later mappings on all GPUs will use this address
335 * @size: size in bytes
336 * @handle: buffer handle returned to user mode, used to refer to
337 * this allocation for mapping, unmapping and freeing
338 * @mmap_offset: for CPU-mapping the allocation by mmapping a render node
339 * for userptrs this is overloaded to specify the CPU address
340 * @gpu_id: device identifier
341 * @flags: memory type and attributes. See KFD_IOC_ALLOC_MEM_FLAGS above
343 struct kfd_ioctl_alloc_memory_of_gpu_args {
344 __u64 va_addr; /* to KFD */
345 __u64 size; /* to KFD */
346 __u64 handle; /* from KFD */
347 __u64 mmap_offset; /* to KFD (userptr), from KFD (mmap offset) */
348 __u32 gpu_id; /* to KFD */
352 /* Free memory allocated with kfd_ioctl_alloc_memory_of_gpu
354 * @handle: memory handle returned by alloc
356 struct kfd_ioctl_free_memory_of_gpu_args {
357 __u64 handle; /* to KFD */
360 /* Map memory to one or more GPUs
362 * @handle: memory handle returned by alloc
363 * @device_ids_array_ptr: array of gpu_ids (__u32 per device)
364 * @n_devices: number of devices in the array
365 * @n_success: number of devices mapped successfully
367 * @n_success returns information to the caller how many devices from
368 * the start of the array have mapped the buffer successfully. It can
369 * be passed into a subsequent retry call to skip those devices. For
370 * the first call the caller should initialize it to 0.
372 * If the ioctl completes with return code 0 (success), n_success ==
375 struct kfd_ioctl_map_memory_to_gpu_args {
376 __u64 handle; /* to KFD */
377 __u64 device_ids_array_ptr; /* to KFD */
378 __u32 n_devices; /* to KFD */
379 __u32 n_success; /* to/from KFD */
382 /* Unmap memory from one or more GPUs
384 * same arguments as for mapping
386 struct kfd_ioctl_unmap_memory_from_gpu_args {
387 __u64 handle; /* to KFD */
388 __u64 device_ids_array_ptr; /* to KFD */
389 __u32 n_devices; /* to KFD */
390 __u32 n_success; /* to/from KFD */
393 #define AMDKFD_IOCTL_BASE 'K'
394 #define AMDKFD_IO(nr) _IO(AMDKFD_IOCTL_BASE, nr)
395 #define AMDKFD_IOR(nr, type) _IOR(AMDKFD_IOCTL_BASE, nr, type)
396 #define AMDKFD_IOW(nr, type) _IOW(AMDKFD_IOCTL_BASE, nr, type)
397 #define AMDKFD_IOWR(nr, type) _IOWR(AMDKFD_IOCTL_BASE, nr, type)
399 #define AMDKFD_IOC_GET_VERSION \
400 AMDKFD_IOR(0x01, struct kfd_ioctl_get_version_args)
402 #define AMDKFD_IOC_CREATE_QUEUE \
403 AMDKFD_IOWR(0x02, struct kfd_ioctl_create_queue_args)
405 #define AMDKFD_IOC_DESTROY_QUEUE \
406 AMDKFD_IOWR(0x03, struct kfd_ioctl_destroy_queue_args)
408 #define AMDKFD_IOC_SET_MEMORY_POLICY \
409 AMDKFD_IOW(0x04, struct kfd_ioctl_set_memory_policy_args)
411 #define AMDKFD_IOC_GET_CLOCK_COUNTERS \
412 AMDKFD_IOWR(0x05, struct kfd_ioctl_get_clock_counters_args)
414 #define AMDKFD_IOC_GET_PROCESS_APERTURES \
415 AMDKFD_IOR(0x06, struct kfd_ioctl_get_process_apertures_args)
417 #define AMDKFD_IOC_UPDATE_QUEUE \
418 AMDKFD_IOW(0x07, struct kfd_ioctl_update_queue_args)
420 #define AMDKFD_IOC_CREATE_EVENT \
421 AMDKFD_IOWR(0x08, struct kfd_ioctl_create_event_args)
423 #define AMDKFD_IOC_DESTROY_EVENT \
424 AMDKFD_IOW(0x09, struct kfd_ioctl_destroy_event_args)
426 #define AMDKFD_IOC_SET_EVENT \
427 AMDKFD_IOW(0x0A, struct kfd_ioctl_set_event_args)
429 #define AMDKFD_IOC_RESET_EVENT \
430 AMDKFD_IOW(0x0B, struct kfd_ioctl_reset_event_args)
432 #define AMDKFD_IOC_WAIT_EVENTS \
433 AMDKFD_IOWR(0x0C, struct kfd_ioctl_wait_events_args)
435 #define AMDKFD_IOC_DBG_REGISTER \
436 AMDKFD_IOW(0x0D, struct kfd_ioctl_dbg_register_args)
438 #define AMDKFD_IOC_DBG_UNREGISTER \
439 AMDKFD_IOW(0x0E, struct kfd_ioctl_dbg_unregister_args)
441 #define AMDKFD_IOC_DBG_ADDRESS_WATCH \
442 AMDKFD_IOW(0x0F, struct kfd_ioctl_dbg_address_watch_args)
444 #define AMDKFD_IOC_DBG_WAVE_CONTROL \
445 AMDKFD_IOW(0x10, struct kfd_ioctl_dbg_wave_control_args)
447 #define AMDKFD_IOC_SET_SCRATCH_BACKING_VA \
448 AMDKFD_IOWR(0x11, struct kfd_ioctl_set_scratch_backing_va_args)
450 #define AMDKFD_IOC_GET_TILE_CONFIG \
451 AMDKFD_IOWR(0x12, struct kfd_ioctl_get_tile_config_args)
453 #define AMDKFD_IOC_SET_TRAP_HANDLER \
454 AMDKFD_IOW(0x13, struct kfd_ioctl_set_trap_handler_args)
456 #define AMDKFD_IOC_GET_PROCESS_APERTURES_NEW \
458 struct kfd_ioctl_get_process_apertures_new_args)
460 #define AMDKFD_IOC_ACQUIRE_VM \
461 AMDKFD_IOW(0x15, struct kfd_ioctl_acquire_vm_args)
463 #define AMDKFD_IOC_ALLOC_MEMORY_OF_GPU \
464 AMDKFD_IOWR(0x16, struct kfd_ioctl_alloc_memory_of_gpu_args)
466 #define AMDKFD_IOC_FREE_MEMORY_OF_GPU \
467 AMDKFD_IOW(0x17, struct kfd_ioctl_free_memory_of_gpu_args)
469 #define AMDKFD_IOC_MAP_MEMORY_TO_GPU \
470 AMDKFD_IOWR(0x18, struct kfd_ioctl_map_memory_to_gpu_args)
472 #define AMDKFD_IOC_UNMAP_MEMORY_FROM_GPU \
473 AMDKFD_IOWR(0x19, struct kfd_ioctl_unmap_memory_from_gpu_args)
475 #define AMDKFD_IOC_SET_CU_MASK \
476 AMDKFD_IOW(0x1A, struct kfd_ioctl_set_cu_mask_args)
478 #define AMDKFD_COMMAND_START 0x01
479 #define AMDKFD_COMMAND_END 0x1B