Linux-libre 4.19.123-gnu
[librecmc/linux-libre.git] / include / dt-bindings / clock / omap4.h
1 /*
2  * Copyright 2017 Texas Instruments, Inc.
3  *
4  * This software is licensed under the terms of the GNU General Public
5  * License version 2, as published by the Free Software Foundation, and
6  * may be copied, distributed, and modified under those terms.
7  *
8  * This program is distributed in the hope that it will be useful,
9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11  * GNU General Public License for more details.
12  */
13 #ifndef __DT_BINDINGS_CLK_OMAP4_H
14 #define __DT_BINDINGS_CLK_OMAP4_H
15
16 #define OMAP4_CLKCTRL_OFFSET    0x20
17 #define OMAP4_CLKCTRL_INDEX(offset)     ((offset) - OMAP4_CLKCTRL_OFFSET)
18
19 /* mpuss clocks */
20 #define OMAP4_MPU_CLKCTRL       OMAP4_CLKCTRL_INDEX(0x20)
21
22 /* tesla clocks */
23 #define OMAP4_DSP_CLKCTRL       OMAP4_CLKCTRL_INDEX(0x20)
24
25 /* abe clocks */
26 #define OMAP4_L4_ABE_CLKCTRL    OMAP4_CLKCTRL_INDEX(0x20)
27 #define OMAP4_AESS_CLKCTRL      OMAP4_CLKCTRL_INDEX(0x28)
28 #define OMAP4_MCPDM_CLKCTRL     OMAP4_CLKCTRL_INDEX(0x30)
29 #define OMAP4_DMIC_CLKCTRL      OMAP4_CLKCTRL_INDEX(0x38)
30 #define OMAP4_MCASP_CLKCTRL     OMAP4_CLKCTRL_INDEX(0x40)
31 #define OMAP4_MCBSP1_CLKCTRL    OMAP4_CLKCTRL_INDEX(0x48)
32 #define OMAP4_MCBSP2_CLKCTRL    OMAP4_CLKCTRL_INDEX(0x50)
33 #define OMAP4_MCBSP3_CLKCTRL    OMAP4_CLKCTRL_INDEX(0x58)
34 #define OMAP4_SLIMBUS1_CLKCTRL  OMAP4_CLKCTRL_INDEX(0x60)
35 #define OMAP4_TIMER5_CLKCTRL    OMAP4_CLKCTRL_INDEX(0x68)
36 #define OMAP4_TIMER6_CLKCTRL    OMAP4_CLKCTRL_INDEX(0x70)
37 #define OMAP4_TIMER7_CLKCTRL    OMAP4_CLKCTRL_INDEX(0x78)
38 #define OMAP4_TIMER8_CLKCTRL    OMAP4_CLKCTRL_INDEX(0x80)
39 #define OMAP4_WD_TIMER3_CLKCTRL OMAP4_CLKCTRL_INDEX(0x88)
40
41 /* l4_ao clocks */
42 #define OMAP4_SMARTREFLEX_MPU_CLKCTRL   OMAP4_CLKCTRL_INDEX(0x28)
43 #define OMAP4_SMARTREFLEX_IVA_CLKCTRL   OMAP4_CLKCTRL_INDEX(0x30)
44 #define OMAP4_SMARTREFLEX_CORE_CLKCTRL  OMAP4_CLKCTRL_INDEX(0x38)
45
46 /* l3_1 clocks */
47 #define OMAP4_L3_MAIN_1_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20)
48
49 /* l3_2 clocks */
50 #define OMAP4_L3_MAIN_2_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20)
51 #define OMAP4_GPMC_CLKCTRL      OMAP4_CLKCTRL_INDEX(0x28)
52 #define OMAP4_OCMC_RAM_CLKCTRL  OMAP4_CLKCTRL_INDEX(0x30)
53
54 /* ducati clocks */
55 #define OMAP4_IPU_CLKCTRL       OMAP4_CLKCTRL_INDEX(0x20)
56
57 /* l3_dma clocks */
58 #define OMAP4_DMA_SYSTEM_CLKCTRL        OMAP4_CLKCTRL_INDEX(0x20)
59
60 /* l3_emif clocks */
61 #define OMAP4_DMM_CLKCTRL       OMAP4_CLKCTRL_INDEX(0x20)
62 #define OMAP4_EMIF1_CLKCTRL     OMAP4_CLKCTRL_INDEX(0x30)
63 #define OMAP4_EMIF2_CLKCTRL     OMAP4_CLKCTRL_INDEX(0x38)
64
65 /* d2d clocks */
66 #define OMAP4_C2C_CLKCTRL       OMAP4_CLKCTRL_INDEX(0x20)
67
68 /* l4_cfg clocks */
69 #define OMAP4_L4_CFG_CLKCTRL    OMAP4_CLKCTRL_INDEX(0x20)
70 #define OMAP4_SPINLOCK_CLKCTRL  OMAP4_CLKCTRL_INDEX(0x28)
71 #define OMAP4_MAILBOX_CLKCTRL   OMAP4_CLKCTRL_INDEX(0x30)
72
73 /* l3_instr clocks */
74 #define OMAP4_L3_MAIN_3_CLKCTRL OMAP4_CLKCTRL_INDEX(0x20)
75 #define OMAP4_L3_INSTR_CLKCTRL  OMAP4_CLKCTRL_INDEX(0x28)
76 #define OMAP4_OCP_WP_NOC_CLKCTRL        OMAP4_CLKCTRL_INDEX(0x40)
77
78 /* ivahd clocks */
79 #define OMAP4_IVA_CLKCTRL       OMAP4_CLKCTRL_INDEX(0x20)
80 #define OMAP4_SL2IF_CLKCTRL     OMAP4_CLKCTRL_INDEX(0x28)
81
82 /* iss clocks */
83 #define OMAP4_ISS_CLKCTRL       OMAP4_CLKCTRL_INDEX(0x20)
84 #define OMAP4_FDIF_CLKCTRL      OMAP4_CLKCTRL_INDEX(0x28)
85
86 /* l3_dss clocks */
87 #define OMAP4_DSS_CORE_CLKCTRL  OMAP4_CLKCTRL_INDEX(0x20)
88
89 /* l3_gfx clocks */
90 #define OMAP4_GPU_CLKCTRL       OMAP4_CLKCTRL_INDEX(0x20)
91
92 /* l3_init clocks */
93 #define OMAP4_MMC1_CLKCTRL      OMAP4_CLKCTRL_INDEX(0x28)
94 #define OMAP4_MMC2_CLKCTRL      OMAP4_CLKCTRL_INDEX(0x30)
95 #define OMAP4_HSI_CLKCTRL       OMAP4_CLKCTRL_INDEX(0x38)
96 #define OMAP4_USB_HOST_HS_CLKCTRL       OMAP4_CLKCTRL_INDEX(0x58)
97 #define OMAP4_USB_OTG_HS_CLKCTRL        OMAP4_CLKCTRL_INDEX(0x60)
98 #define OMAP4_USB_TLL_HS_CLKCTRL        OMAP4_CLKCTRL_INDEX(0x68)
99 #define OMAP4_USB_HOST_FS_CLKCTRL       OMAP4_CLKCTRL_INDEX(0xd0)
100 #define OMAP4_OCP2SCP_USB_PHY_CLKCTRL   OMAP4_CLKCTRL_INDEX(0xe0)
101
102 /* l4_per clocks */
103 #define OMAP4_TIMER10_CLKCTRL   OMAP4_CLKCTRL_INDEX(0x28)
104 #define OMAP4_TIMER11_CLKCTRL   OMAP4_CLKCTRL_INDEX(0x30)
105 #define OMAP4_TIMER2_CLKCTRL    OMAP4_CLKCTRL_INDEX(0x38)
106 #define OMAP4_TIMER3_CLKCTRL    OMAP4_CLKCTRL_INDEX(0x40)
107 #define OMAP4_TIMER4_CLKCTRL    OMAP4_CLKCTRL_INDEX(0x48)
108 #define OMAP4_TIMER9_CLKCTRL    OMAP4_CLKCTRL_INDEX(0x50)
109 #define OMAP4_ELM_CLKCTRL       OMAP4_CLKCTRL_INDEX(0x58)
110 #define OMAP4_GPIO2_CLKCTRL     OMAP4_CLKCTRL_INDEX(0x60)
111 #define OMAP4_GPIO3_CLKCTRL     OMAP4_CLKCTRL_INDEX(0x68)
112 #define OMAP4_GPIO4_CLKCTRL     OMAP4_CLKCTRL_INDEX(0x70)
113 #define OMAP4_GPIO5_CLKCTRL     OMAP4_CLKCTRL_INDEX(0x78)
114 #define OMAP4_GPIO6_CLKCTRL     OMAP4_CLKCTRL_INDEX(0x80)
115 #define OMAP4_HDQ1W_CLKCTRL     OMAP4_CLKCTRL_INDEX(0x88)
116 #define OMAP4_I2C1_CLKCTRL      OMAP4_CLKCTRL_INDEX(0xa0)
117 #define OMAP4_I2C2_CLKCTRL      OMAP4_CLKCTRL_INDEX(0xa8)
118 #define OMAP4_I2C3_CLKCTRL      OMAP4_CLKCTRL_INDEX(0xb0)
119 #define OMAP4_I2C4_CLKCTRL      OMAP4_CLKCTRL_INDEX(0xb8)
120 #define OMAP4_L4_PER_CLKCTRL    OMAP4_CLKCTRL_INDEX(0xc0)
121 #define OMAP4_MCBSP4_CLKCTRL    OMAP4_CLKCTRL_INDEX(0xe0)
122 #define OMAP4_MCSPI1_CLKCTRL    OMAP4_CLKCTRL_INDEX(0xf0)
123 #define OMAP4_MCSPI2_CLKCTRL    OMAP4_CLKCTRL_INDEX(0xf8)
124 #define OMAP4_MCSPI3_CLKCTRL    OMAP4_CLKCTRL_INDEX(0x100)
125 #define OMAP4_MCSPI4_CLKCTRL    OMAP4_CLKCTRL_INDEX(0x108)
126 #define OMAP4_MMC3_CLKCTRL      OMAP4_CLKCTRL_INDEX(0x120)
127 #define OMAP4_MMC4_CLKCTRL      OMAP4_CLKCTRL_INDEX(0x128)
128 #define OMAP4_SLIMBUS2_CLKCTRL  OMAP4_CLKCTRL_INDEX(0x138)
129 #define OMAP4_UART1_CLKCTRL     OMAP4_CLKCTRL_INDEX(0x140)
130 #define OMAP4_UART2_CLKCTRL     OMAP4_CLKCTRL_INDEX(0x148)
131 #define OMAP4_UART3_CLKCTRL     OMAP4_CLKCTRL_INDEX(0x150)
132 #define OMAP4_UART4_CLKCTRL     OMAP4_CLKCTRL_INDEX(0x158)
133 #define OMAP4_MMC5_CLKCTRL      OMAP4_CLKCTRL_INDEX(0x160)
134
135 /* l4_wkup clocks */
136 #define OMAP4_L4_WKUP_CLKCTRL   OMAP4_CLKCTRL_INDEX(0x20)
137 #define OMAP4_WD_TIMER2_CLKCTRL OMAP4_CLKCTRL_INDEX(0x30)
138 #define OMAP4_GPIO1_CLKCTRL     OMAP4_CLKCTRL_INDEX(0x38)
139 #define OMAP4_TIMER1_CLKCTRL    OMAP4_CLKCTRL_INDEX(0x40)
140 #define OMAP4_COUNTER_32K_CLKCTRL       OMAP4_CLKCTRL_INDEX(0x50)
141 #define OMAP4_KBD_CLKCTRL       OMAP4_CLKCTRL_INDEX(0x78)
142
143 /* emu_sys clocks */
144 #define OMAP4_DEBUGSS_CLKCTRL   OMAP4_CLKCTRL_INDEX(0x20)
145
146 #endif