2 * xHCI host controller driver PCI Bus Glue.
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/slab.h>
28 /* Device for a quirk */
29 #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
30 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
31 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400 0x1400
33 #define PCI_VENDOR_ID_ETRON 0x1b6f
34 #define PCI_DEVICE_ID_ASROCK_P67 0x7023
36 static const char hcd_name[] = "xhci_hcd";
38 /* called after powerup, by probe or system-pm "wakeup" */
39 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
42 * TODO: Implement finding debug ports later.
43 * TODO: see if there are any quirks that need to be added to handle
44 * new extended capabilities.
47 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
48 if (!pci_set_mwi(pdev))
49 xhci_dbg(xhci, "MWI active\n");
51 xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
55 /* called during probe() after chip reset completes */
56 static int xhci_pci_setup(struct usb_hcd *hcd)
58 struct xhci_hcd *xhci;
59 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
63 hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;
65 if (usb_hcd_is_primary_hcd(hcd)) {
66 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
69 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
71 /* Mark the first roothub as being USB 2.0.
72 * The xHCI driver will register the USB 3.0 roothub.
74 hcd->speed = HCD_USB2;
75 hcd->self.root_hub->speed = USB_SPEED_HIGH;
77 * USB 2.0 roothub under xHCI has an integrated TT,
78 * (rate matching hub) as opposed to having an OHCI/UHCI
79 * companion controller.
83 /* xHCI private pointer was set in xhci_pci_probe for the second
86 xhci = hcd_to_xhci(hcd);
87 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
88 if (HCC_64BIT_ADDR(temp)) {
89 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
90 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
92 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
97 xhci->cap_regs = hcd->regs;
98 xhci->op_regs = hcd->regs +
99 HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));
100 xhci->run_regs = hcd->regs +
101 (xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
102 /* Cache read-only capability registers */
103 xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);
104 xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);
105 xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);
106 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);
107 xhci->hci_version = HC_VERSION(xhci->hcc_params);
108 xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
109 xhci_print_registers(xhci);
111 /* Look for vendor-specific quirks */
112 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
113 (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||
114 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {
115 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
116 pdev->revision == 0x0) {
117 xhci->quirks |= XHCI_RESET_EP_QUIRK;
118 xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
119 " endpoint cmd after reset endpoint\n");
121 /* Fresco Logic confirms: all revisions of this chip do not
122 * support MSI, even though some of them claim to in their PCI
125 xhci->quirks |= XHCI_BROKEN_MSI;
126 xhci_dbg(xhci, "QUIRK: Fresco Logic revision %u "
127 "has broken MSI implementation\n",
129 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
132 if (pdev->vendor == PCI_VENDOR_ID_NEC)
133 xhci->quirks |= XHCI_NEC_HOST;
135 if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
136 xhci->quirks |= XHCI_AMD_0x96_HOST;
139 if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
140 xhci->quirks |= XHCI_AMD_PLL_FIX;
141 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
142 pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
143 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
144 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
145 xhci->limit_active_eps = 64;
147 * PPT desktop boards DH77EB and DH77DF will power back on after
148 * a few seconds of being shutdown. The fix for this is to
149 * switch the ports from xHCI to EHCI on shutdown. We can't use
150 * DMI information to find those particular boards (since each
151 * vendor will change the board name), so we have to key off all
154 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
155 xhci->quirks |= XHCI_AVOID_BEI;
157 if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
158 pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
159 xhci->quirks |= XHCI_RESET_ON_RESUME;
160 xhci_dbg(xhci, "QUIRK: Resetting on resume\n");
161 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
163 if (pdev->vendor == PCI_VENDOR_ID_VIA)
164 xhci->quirks |= XHCI_RESET_ON_RESUME;
166 /* Make sure the HC is halted. */
167 retval = xhci_halt(xhci);
171 xhci_dbg(xhci, "Resetting HCD\n");
172 /* Reset the internal HC memory state and registers. */
173 retval = xhci_reset(xhci);
176 xhci_dbg(xhci, "Reset complete\n");
178 temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);
179 if (HCC_64BIT_ADDR(temp)) {
180 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
181 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));
183 dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));
186 xhci_dbg(xhci, "Calling HCD init\n");
187 /* Initialize HCD and host controller data structures. */
188 retval = xhci_init(hcd);
191 xhci_dbg(xhci, "Called HCD init\n");
193 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
194 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
196 /* Find any debug ports */
197 retval = xhci_pci_reinit(xhci, pdev);
207 * We need to register our own PCI probe function (instead of the USB core's
208 * function) in order to create a second roothub under xHCI.
210 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
213 struct xhci_hcd *xhci;
214 struct hc_driver *driver;
217 driver = (struct hc_driver *)id->driver_data;
218 /* Register the USB 2.0 roothub.
219 * FIXME: USB core must know to register the USB 2.0 roothub first.
220 * This is sort of silly, because we could just set the HCD driver flags
221 * to say USB 2.0, but I'm not sure what the implications would be in
222 * the other parts of the HCD code.
224 retval = usb_hcd_pci_probe(dev, id);
229 /* USB 2.0 roothub is stored in the PCI device now. */
230 hcd = dev_get_drvdata(&dev->dev);
231 xhci = hcd_to_xhci(hcd);
232 xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
234 if (!xhci->shared_hcd) {
236 goto dealloc_usb2_hcd;
239 /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
240 * is called by usb_add_hcd().
242 *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
244 retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
245 IRQF_DISABLED | IRQF_SHARED);
248 /* Roothub already marked as USB 3.0 speed */
252 usb_put_hcd(xhci->shared_hcd);
254 usb_hcd_pci_remove(dev);
258 static void xhci_pci_remove(struct pci_dev *dev)
260 struct xhci_hcd *xhci;
262 xhci = hcd_to_xhci(pci_get_drvdata(dev));
263 if (xhci->shared_hcd) {
264 usb_remove_hcd(xhci->shared_hcd);
265 usb_put_hcd(xhci->shared_hcd);
267 usb_hcd_pci_remove(dev);
272 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
274 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
277 if (hcd->state != HC_STATE_SUSPENDED ||
278 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
281 retval = xhci_suspend(xhci);
286 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
288 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
289 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
292 /* The BIOS on systems with the Intel Panther Point chipset may or may
293 * not support xHCI natively. That means that during system resume, it
294 * may switch the ports back to EHCI so that users can use their
295 * keyboard to select a kernel from GRUB after resume from hibernate.
297 * The BIOS is supposed to remember whether the OS had xHCI ports
298 * enabled before resume, and switch the ports back to xHCI when the
299 * BIOS/OS semaphore is written, but we all know we can't trust BIOS
302 * Unconditionally switch the ports back to xHCI after a system resume.
303 * We can't tell whether the EHCI or xHCI controller will be resumed
304 * first, so we have to do the port switchover in both drivers. Writing
305 * a '1' to the port switchover registers should have no effect if the
306 * port was already switched over.
308 if (usb_is_intel_switchable_xhci(pdev))
309 usb_enable_xhci_ports(pdev);
311 retval = xhci_resume(xhci, hibernated);
314 #endif /* CONFIG_PM */
316 static const struct hc_driver xhci_pci_hc_driver = {
317 .description = hcd_name,
318 .product_desc = "xHCI Host Controller",
319 .hcd_priv_size = sizeof(struct xhci_hcd *),
322 * generic hardware linkage
325 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
328 * basic lifecycle operations
330 .reset = xhci_pci_setup,
333 .pci_suspend = xhci_pci_suspend,
334 .pci_resume = xhci_pci_resume,
337 .shutdown = xhci_shutdown,
340 * managing i/o requests and associated device resources
342 .urb_enqueue = xhci_urb_enqueue,
343 .urb_dequeue = xhci_urb_dequeue,
344 .alloc_dev = xhci_alloc_dev,
345 .free_dev = xhci_free_dev,
346 .alloc_streams = xhci_alloc_streams,
347 .free_streams = xhci_free_streams,
348 .add_endpoint = xhci_add_endpoint,
349 .drop_endpoint = xhci_drop_endpoint,
350 .endpoint_reset = xhci_endpoint_reset,
351 .check_bandwidth = xhci_check_bandwidth,
352 .reset_bandwidth = xhci_reset_bandwidth,
353 .address_device = xhci_address_device,
354 .update_hub_device = xhci_update_hub_device,
355 .reset_device = xhci_discover_or_reset_device,
360 .get_frame_number = xhci_get_frame,
362 /* Root hub support */
363 .hub_control = xhci_hub_control,
364 .hub_status_data = xhci_hub_status_data,
365 .bus_suspend = xhci_bus_suspend,
366 .bus_resume = xhci_bus_resume,
369 /*-------------------------------------------------------------------------*/
371 /* PCI driver selection metadata; PCI hotplugging uses this */
372 static const struct pci_device_id pci_ids[] = { {
373 /* handle any USB 3.0 xHCI controller */
374 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
375 .driver_data = (unsigned long) &xhci_pci_hc_driver,
377 { /* end: all zeroes */ }
379 MODULE_DEVICE_TABLE(pci, pci_ids);
381 /* pci driver glue; this is a "new style" PCI driver module */
382 static struct pci_driver xhci_pci_driver = {
383 .name = (char *) hcd_name,
386 .probe = xhci_pci_probe,
387 .remove = xhci_pci_remove,
388 /* suspend and resume implemented later */
390 .shutdown = usb_hcd_pci_shutdown,
391 #ifdef CONFIG_PM_SLEEP
393 .pm = &usb_hcd_pci_pm_ops
398 int xhci_register_pci(void)
400 return pci_register_driver(&xhci_pci_driver);
403 void xhci_unregister_pci(void)
405 pci_unregister_driver(&xhci_pci_driver);