2 * xHCI host controller driver PCI Bus Glue.
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/slab.h>
25 #include <linux/module.h>
29 /* Device for a quirk */
30 #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73
31 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000
32 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400 0x1400
34 #define PCI_VENDOR_ID_ETRON 0x1b6f
35 #define PCI_DEVICE_ID_ASROCK_P67 0x7023
37 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI 0x8c31
38 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI 0x9c31
39 #define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI 0x22b5
40 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI 0xa12f
41 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI 0x9d2f
43 static const char hcd_name[] = "xhci_hcd";
45 /* called after powerup, by probe or system-pm "wakeup" */
46 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
49 * TODO: Implement finding debug ports later.
50 * TODO: see if there are any quirks that need to be added to handle
51 * new extended capabilities.
54 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
55 if (!pci_set_mwi(pdev))
56 xhci_dbg(xhci, "MWI active\n");
58 xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
62 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
64 struct pci_dev *pdev = to_pci_dev(dev);
66 /* Look for vendor-specific quirks */
67 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
68 (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||
69 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {
70 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
71 pdev->revision == 0x0) {
72 xhci->quirks |= XHCI_RESET_EP_QUIRK;
73 xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure"
74 " endpoint cmd after reset endpoint\n");
76 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
77 pdev->revision == 0x4) {
78 xhci->quirks |= XHCI_SLOW_SUSPEND;
80 "QUIRK: Fresco Logic xHC revision %u"
81 "must be suspended extra slowly",
84 /* Fresco Logic confirms: all revisions of this chip do not
85 * support MSI, even though some of them claim to in their PCI
88 xhci->quirks |= XHCI_BROKEN_MSI;
89 xhci_dbg(xhci, "QUIRK: Fresco Logic revision %u "
90 "has broken MSI implementation\n",
92 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
95 if (pdev->vendor == PCI_VENDOR_ID_NEC)
96 xhci->quirks |= XHCI_NEC_HOST;
98 if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
99 xhci->quirks |= XHCI_AMD_0x96_HOST;
102 if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
103 xhci->quirks |= XHCI_AMD_PLL_FIX;
105 if (pdev->vendor == PCI_VENDOR_ID_AMD)
106 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
108 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
109 xhci->quirks |= XHCI_INTEL_HOST;
110 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
111 xhci->quirks |= XHCI_AVOID_BEI;
112 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
113 pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
114 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
115 xhci->limit_active_eps = 64;
116 xhci->quirks |= XHCI_SW_BW_CHECKING;
118 * PPT desktop boards DH77EB and DH77DF will power back on after
119 * a few seconds of being shutdown. The fix for this is to
120 * switch the ports from xHCI to EHCI on shutdown. We can't use
121 * DMI information to find those particular boards (since each
122 * vendor will change the board name), so we have to key off all
125 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
127 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
128 pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI) {
129 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
130 xhci->quirks |= XHCI_SPURIOUS_WAKEUP;
132 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
133 (pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||
134 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI ||
135 pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI)) {
136 xhci->quirks |= XHCI_PME_STUCK_QUIRK;
138 if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
139 pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
140 xhci->quirks |= XHCI_RESET_ON_RESUME;
141 xhci_dbg(xhci, "QUIRK: Resetting on resume\n");
142 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
144 if (pdev->vendor == PCI_VENDOR_ID_VIA)
145 xhci->quirks |= XHCI_RESET_ON_RESUME;
149 * Make sure PME works on some Intel xHCI controllers by writing 1 to clear
150 * the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
152 static void xhci_pme_quirk(struct xhci_hcd *xhci)
157 reg = (void __iomem *) xhci->cap_regs + 0x80a4;
159 writel(val | BIT(28), reg);
163 /* called during probe() after chip reset completes */
164 static int xhci_pci_setup(struct usb_hcd *hcd)
166 struct xhci_hcd *xhci;
167 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
170 retval = xhci_gen_setup(hcd, xhci_pci_quirks);
174 xhci = hcd_to_xhci(hcd);
175 if (!usb_hcd_is_primary_hcd(hcd))
178 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
179 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
181 /* Find any debug ports */
182 retval = xhci_pci_reinit(xhci, pdev);
191 * We need to register our own PCI probe function (instead of the USB core's
192 * function) in order to create a second roothub under xHCI.
194 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
197 struct xhci_hcd *xhci;
198 struct hc_driver *driver;
201 driver = (struct hc_driver *)id->driver_data;
202 /* Register the USB 2.0 roothub.
203 * FIXME: USB core must know to register the USB 2.0 roothub first.
204 * This is sort of silly, because we could just set the HCD driver flags
205 * to say USB 2.0, but I'm not sure what the implications would be in
206 * the other parts of the HCD code.
208 retval = usb_hcd_pci_probe(dev, id);
213 /* USB 2.0 roothub is stored in the PCI device now. */
214 hcd = dev_get_drvdata(&dev->dev);
215 xhci = hcd_to_xhci(hcd);
216 xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
218 if (!xhci->shared_hcd) {
220 goto dealloc_usb2_hcd;
223 /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
224 * is called by usb_add_hcd().
226 *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
228 retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
232 /* Roothub already marked as USB 3.0 speed */
236 usb_put_hcd(xhci->shared_hcd);
238 usb_hcd_pci_remove(dev);
242 static void xhci_pci_remove(struct pci_dev *dev)
244 struct xhci_hcd *xhci;
246 xhci = hcd_to_xhci(pci_get_drvdata(dev));
247 if (xhci->shared_hcd) {
248 usb_remove_hcd(xhci->shared_hcd);
249 usb_put_hcd(xhci->shared_hcd);
251 usb_hcd_pci_remove(dev);
253 /* Workaround for spurious wakeups at shutdown with HSW */
254 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
255 pci_set_power_state(dev, PCI_D3hot);
261 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
263 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
266 if (hcd->state != HC_STATE_SUSPENDED ||
267 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
270 if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
271 xhci_pme_quirk(xhci);
273 retval = xhci_suspend(xhci, do_wakeup);
278 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
280 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
281 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
284 /* The BIOS on systems with the Intel Panther Point chipset may or may
285 * not support xHCI natively. That means that during system resume, it
286 * may switch the ports back to EHCI so that users can use their
287 * keyboard to select a kernel from GRUB after resume from hibernate.
289 * The BIOS is supposed to remember whether the OS had xHCI ports
290 * enabled before resume, and switch the ports back to xHCI when the
291 * BIOS/OS semaphore is written, but we all know we can't trust BIOS
294 * Unconditionally switch the ports back to xHCI after a system resume.
295 * We can't tell whether the EHCI or xHCI controller will be resumed
296 * first, so we have to do the port switchover in both drivers. Writing
297 * a '1' to the port switchover registers should have no effect if the
298 * port was already switched over.
300 if (usb_is_intel_switchable_xhci(pdev))
301 usb_enable_xhci_ports(pdev);
303 if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
304 xhci_pme_quirk(xhci);
306 retval = xhci_resume(xhci, hibernated);
309 #endif /* CONFIG_PM */
311 static const struct hc_driver xhci_pci_hc_driver = {
312 .description = hcd_name,
313 .product_desc = "xHCI Host Controller",
314 .hcd_priv_size = sizeof(struct xhci_hcd *),
317 * generic hardware linkage
320 .flags = HCD_MEMORY | HCD_USB3 | HCD_SHARED,
323 * basic lifecycle operations
325 .reset = xhci_pci_setup,
328 .pci_suspend = xhci_pci_suspend,
329 .pci_resume = xhci_pci_resume,
332 .shutdown = xhci_shutdown,
335 * managing i/o requests and associated device resources
337 .urb_enqueue = xhci_urb_enqueue,
338 .urb_dequeue = xhci_urb_dequeue,
339 .alloc_dev = xhci_alloc_dev,
340 .free_dev = xhci_free_dev,
341 .alloc_streams = xhci_alloc_streams,
342 .free_streams = xhci_free_streams,
343 .add_endpoint = xhci_add_endpoint,
344 .drop_endpoint = xhci_drop_endpoint,
345 .endpoint_reset = xhci_endpoint_reset,
346 .check_bandwidth = xhci_check_bandwidth,
347 .reset_bandwidth = xhci_reset_bandwidth,
348 .address_device = xhci_address_device,
349 .update_hub_device = xhci_update_hub_device,
350 .reset_device = xhci_discover_or_reset_device,
355 .get_frame_number = xhci_get_frame,
357 /* Root hub support */
358 .hub_control = xhci_hub_control,
359 .hub_status_data = xhci_hub_status_data,
360 .bus_suspend = xhci_bus_suspend,
361 .bus_resume = xhci_bus_resume,
363 * call back when device connected and addressed
365 .update_device = xhci_update_device,
366 .set_usb2_hw_lpm = xhci_set_usb2_hardware_lpm,
369 /*-------------------------------------------------------------------------*/
371 /* PCI driver selection metadata; PCI hotplugging uses this */
372 static const struct pci_device_id pci_ids[] = { {
373 /* handle any USB 3.0 xHCI controller */
374 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
375 .driver_data = (unsigned long) &xhci_pci_hc_driver,
377 { /* end: all zeroes */ }
379 MODULE_DEVICE_TABLE(pci, pci_ids);
381 /* pci driver glue; this is a "new style" PCI driver module */
382 static struct pci_driver xhci_pci_driver = {
383 .name = (char *) hcd_name,
386 .probe = xhci_pci_probe,
387 .remove = xhci_pci_remove,
388 /* suspend and resume implemented later */
390 .shutdown = usb_hcd_pci_shutdown,
393 .pm = &usb_hcd_pci_pm_ops
398 int __init xhci_register_pci(void)
400 return pci_register_driver(&xhci_pci_driver);
403 void __exit xhci_unregister_pci(void)
405 pci_unregister_driver(&xhci_pci_driver);