drivers/tty/serial/sunsu.c

   1 /*
   2  * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
   3  *
   4  * Copyright (C) 1997  Eddie C. Dost  (ecd@skynet.be)
   5  * Copyright (C) 1998-1999  Pete Zaitcev   (zaitcev@yahoo.com)
   6  *
   7  * This is mainly a variation of 8250.c, credits go to authors mentioned
   8  * therein.  In fact this driver should be merged into the generic 8250.c
   9  * infrastructure perhaps using a 8250_sparc.c module.
  10  *
  11  * Fixed to use tty_get_baud_rate().
  12  *   Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
  13  *
  14  * Converted to new 2.5.x UART layer.
  15  *   David S. Miller (davem@davemloft.net), 2002-Jul-29
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/kernel.h>
  20 #include <linux/spinlock.h>
  21 #include <linux/errno.h>
  22 #include <linux/tty.h>
  23 #include <linux/tty_flip.h>
  24 #include <linux/major.h>
  25 #include <linux/string.h>
  26 #include <linux/ptrace.h>
  27 #include <linux/ioport.h>
  28 #include <linux/circ_buf.h>
  29 #include <linux/serial.h>
  30 #include <linux/sysrq.h>
  31 #include <linux/console.h>
  32 #include <linux/slab.h>
  33 #ifdef CONFIG_SERIO
  34 #include <linux/serio.h>
  35 #endif
  36 #include <linux/serial_reg.h>
  37 #include <linux/init.h>
  38 #include <linux/delay.h>
  39 #include <linux/of_device.h>
  40
  41 #include <asm/io.h>
  42 #include <asm/irq.h>
  43 #include <asm/prom.h>
  44 #include <asm/setup.h>
  45
  46 #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  47 #define SUPPORT_SYSRQ
  48 #endif
  49
  50 #include <linux/serial_core.h>
  51 #include <linux/sunserialcore.h>
  52
  53 /* We are on a NS PC87303 clocked with 24.0 MHz, which results
  54  * in a UART clock of 1.8462 MHz.
  55  */
  56 #define SU_BASE_BAUD    (1846200 / 16)
  57
  58 enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
  59 static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
  60
  61 struct serial_uart_config {
  62         char    *name;
  63         int     dfl_xmit_fifo_size;
  64         int     flags;
  65 };
  66
  67 /*
  68  * Here we define the default xmit fifo size used for each type of UART.
  69  */
  70 static const struct serial_uart_config uart_config[] = {
  71         { "unknown",    1,      0 },
  72         { "8250",       1,      0 },
  73         { "16450",      1,      0 },
  74         { "16550",      1,      0 },
  75         { "16550A",     16,     UART_CLEAR_FIFO | UART_USE_FIFO },
  76         { "Cirrus",     1,      0 },
  77         { "ST16650",    1,      UART_CLEAR_FIFO | UART_STARTECH },
  78         { "ST16650V2",  32,     UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  79         { "TI16750",    64,     UART_CLEAR_FIFO | UART_USE_FIFO },
  80         { "Startech",   1,      0 },
  81         { "16C950/954", 128,    UART_CLEAR_FIFO | UART_USE_FIFO },
  82         { "ST16654",    64,     UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  83         { "XR16850",    128,    UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  84         { "RSA",        2048,   UART_CLEAR_FIFO | UART_USE_FIFO }
  85 };
  86
  87 struct uart_sunsu_port {
  88         struct uart_port        port;
  89         unsigned char           acr;
  90         unsigned char           ier;
  91         unsigned short          rev;
  92         unsigned char           lcr;
  93         unsigned int            lsr_break_flag;
  94         unsigned int            cflag;
  95
  96         /* Probing information.  */
  97         enum su_type            su_type;
  98         unsigned int            type_probed;    /* XXX Stupid */
  99         unsigned long           reg_size;
 100
 101 #ifdef CONFIG_SERIO
 102         struct serio            serio;
 103         int                     serio_open;
 104 #endif
 105 };
 106
 107 static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
 108 {
 109         offset <<= up->port.regshift;
 110
 111         switch (up->port.iotype) {
 112         case UPIO_HUB6:
 113                 outb(up->port.hub6 - 1 + offset, up->port.iobase);
 114                 return inb(up->port.iobase + 1);
 115
 116         case UPIO_MEM:
 117                 return readb(up->port.membase + offset);
 118
 119         default:
 120                 return inb(up->port.iobase + offset);
 121         }
 122 }
 123
 124 static void serial_out(struct uart_sunsu_port *up, int offset, int value)
 125 {
 126 #ifndef CONFIG_SPARC64
 127         /*
 128          * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
 129          * connected with a gate then go to SlavIO. When IRQ4 goes tristated
 130          * gate outputs a logical one. Since we use level triggered interrupts
 131          * we have lockup and watchdog reset. We cannot mask IRQ because
 132          * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
 133          * This problem is similar to what Alpha people suffer, see serial.c.
 134          */
 135         if (offset == UART_MCR)
 136                 value |= UART_MCR_OUT2;
 137 #endif
 138         offset <<= up->port.regshift;
 139
 140         switch (up->port.iotype) {
 141         case UPIO_HUB6:
 142                 outb(up->port.hub6 - 1 + offset, up->port.iobase);
 143                 outb(value, up->port.iobase + 1);
 144                 break;
 145
 146         case UPIO_MEM:
 147                 writeb(value, up->port.membase + offset);
 148                 break;
 149
 150         default:
 151                 outb(value, up->port.iobase + offset);
 152         }
 153 }
 154
 155 /*
 156  * We used to support using pause I/O for certain machines.  We
 157  * haven't supported this for a while, but just in case it's badly
 158  * needed for certain old 386 machines, I've left these #define's
 159  * in....
 160  */
 161 #define serial_inp(up, offset)          serial_in(up, offset)
 162 #define serial_outp(up, offset, value)  serial_out(up, offset, value)
 163
 164
 165 /*
 166  * For the 16C950
 167  */
 168 static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
 169 {
 170         serial_out(up, UART_SCR, offset);
 171         serial_out(up, UART_ICR, value);
 172 }
 173
 174 #if 0 /* Unused currently */
 175 static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
 176 {
 177         unsigned int value;
 178
 179         serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
 180         serial_out(up, UART_SCR, offset);
 181         value = serial_in(up, UART_ICR);
 182         serial_icr_write(up, UART_ACR, up->acr);
 183
 184         return value;
 185 }
 186 #endif
 187
 188 #ifdef CONFIG_SERIAL_8250_RSA
 189 /*
 190  * Attempts to turn on the RSA FIFO.  Returns zero on failure.
 191  * We set the port uart clock rate if we succeed.
 192  */
 193 static int __enable_rsa(struct uart_sunsu_port *up)
 194 {
 195         unsigned char mode;
 196         int result;
 197
 198         mode = serial_inp(up, UART_RSA_MSR);
 199         result = mode & UART_RSA_MSR_FIFO;
 200
 201         if (!result) {
 202                 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
 203                 mode = serial_inp(up, UART_RSA_MSR);
 204                 result = mode & UART_RSA_MSR_FIFO;
 205         }
 206
 207         if (result)
 208                 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
 209
 210         return result;
 211 }
 212
 213 static void enable_rsa(struct uart_sunsu_port *up)
 214 {
 215         if (up->port.type == PORT_RSA) {
 216                 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
 217                         spin_lock_irq(&up->port.lock);
 218                         __enable_rsa(up);
 219                         spin_unlock_irq(&up->port.lock);
 220                 }
 221                 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
 222                         serial_outp(up, UART_RSA_FRR, 0);
 223         }
 224 }
 225
 226 /*
 227  * Attempts to turn off the RSA FIFO.  Returns zero on failure.
 228  * It is unknown why interrupts were disabled in here.  However,
 229  * the caller is expected to preserve this behaviour by grabbing
 230  * the spinlock before calling this function.
 231  */
 232 static void disable_rsa(struct uart_sunsu_port *up)
 233 {
 234         unsigned char mode;
 235         int result;
 236
 237         if (up->port.type == PORT_RSA &&
 238             up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
 239                 spin_lock_irq(&up->port.lock);
 240
 241                 mode = serial_inp(up, UART_RSA_MSR);
 242                 result = !(mode & UART_RSA_MSR_FIFO);
 243
 244                 if (!result) {
 245                         serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
 246                         mode = serial_inp(up, UART_RSA_MSR);
 247                         result = !(mode & UART_RSA_MSR_FIFO);
 248                 }
 249
 250                 if (result)
 251                         up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
 252                 spin_unlock_irq(&up->port.lock);
 253         }
 254 }
 255 #endif /* CONFIG_SERIAL_8250_RSA */
 256
 257 static inline void __stop_tx(struct uart_sunsu_port *p)
 258 {
 259         if (p->ier & UART_IER_THRI) {
 260                 p->ier &= ~UART_IER_THRI;
 261                 serial_out(p, UART_IER, p->ier);
 262         }
 263 }
 264
 265 static void sunsu_stop_tx(struct uart_port *port)
 266 {
 267         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 268
 269         __stop_tx(up);
 270
 271         /*
 272          * We really want to stop the transmitter from sending.
 273          */
 274         if (up->port.type == PORT_16C950) {
 275                 up->acr |= UART_ACR_TXDIS;
 276                 serial_icr_write(up, UART_ACR, up->acr);
 277         }
 278 }
 279
 280 static void sunsu_start_tx(struct uart_port *port)
 281 {
 282         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 283
 284         if (!(up->ier & UART_IER_THRI)) {
 285                 up->ier |= UART_IER_THRI;
 286                 serial_out(up, UART_IER, up->ier);
 287         }
 288
 289         /*
 290          * Re-enable the transmitter if we disabled it.
 291          */
 292         if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
 293                 up->acr &= ~UART_ACR_TXDIS;
 294                 serial_icr_write(up, UART_ACR, up->acr);
 295         }
 296 }
 297
 298 static void sunsu_stop_rx(struct uart_port *port)
 299 {
 300         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 301
 302         up->ier &= ~UART_IER_RLSI;
 303         up->port.read_status_mask &= ~UART_LSR_DR;
 304         serial_out(up, UART_IER, up->ier);
 305 }
 306
 307 static void sunsu_enable_ms(struct uart_port *port)
 308 {
 309         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 310         unsigned long flags;
 311
 312         spin_lock_irqsave(&up->port.lock, flags);
 313         up->ier |= UART_IER_MSI;
 314         serial_out(up, UART_IER, up->ier);
 315         spin_unlock_irqrestore(&up->port.lock, flags);
 316 }
 317
 318 static void
 319 receive_chars(struct uart_sunsu_port *up, unsigned char *status)
 320 {
 321         struct tty_port *port = &up->port.state->port;
 322         unsigned char ch, flag;
 323         int max_count = 256;
 324         int saw_console_brk = 0;
 325
 326         do {
 327                 ch = serial_inp(up, UART_RX);
 328                 flag = TTY_NORMAL;
 329                 up->port.icount.rx++;
 330
 331                 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
 332                                        UART_LSR_FE | UART_LSR_OE))) {
 333                         /*
 334                          * For statistics only
 335                          */
 336                         if (*status & UART_LSR_BI) {
 337                                 *status &= ~(UART_LSR_FE | UART_LSR_PE);
 338                                 up->port.icount.brk++;
 339                                 if (up->port.cons != NULL &&
 340                                     up->port.line == up->port.cons->index)
 341                                         saw_console_brk = 1;
 342                                 /*
 343                                  * We do the SysRQ and SAK checking
 344                                  * here because otherwise the break
 345                                  * may get masked by ignore_status_mask
 346                                  * or read_status_mask.
 347                                  */
 348                                 if (uart_handle_break(&up->port))
 349                                         goto ignore_char;
 350                         } else if (*status & UART_LSR_PE)
 351                                 up->port.icount.parity++;
 352                         else if (*status & UART_LSR_FE)
 353                                 up->port.icount.frame++;
 354                         if (*status & UART_LSR_OE)
 355                                 up->port.icount.overrun++;
 356
 357                         /*
 358                          * Mask off conditions which should be ingored.
 359                          */
 360                         *status &= up->port.read_status_mask;
 361
 362                         if (up->port.cons != NULL &&
 363                             up->port.line == up->port.cons->index) {
 364                                 /* Recover the break flag from console xmit */
 365                                 *status |= up->lsr_break_flag;
 366                                 up->lsr_break_flag = 0;
 367                         }
 368
 369                         if (*status & UART_LSR_BI) {
 370                                 flag = TTY_BREAK;
 371                         } else if (*status & UART_LSR_PE)
 372                                 flag = TTY_PARITY;
 373                         else if (*status & UART_LSR_FE)
 374                                 flag = TTY_FRAME;
 375                 }
 376                 if (uart_handle_sysrq_char(&up->port, ch))
 377                         goto ignore_char;
 378                 if ((*status & up->port.ignore_status_mask) == 0)
 379                         tty_insert_flip_char(port, ch, flag);
 380                 if (*status & UART_LSR_OE)
 381                         /*
 382                          * Overrun is special, since it's reported
 383                          * immediately, and doesn't affect the current
 384                          * character.
 385                          */
 386                          tty_insert_flip_char(port, 0, TTY_OVERRUN);
 387         ignore_char:
 388                 *status = serial_inp(up, UART_LSR);
 389         } while ((*status & UART_LSR_DR) && (max_count-- > 0));
 390
 391         if (saw_console_brk)
 392                 sun_do_break();
 393 }
 394
 395 static void transmit_chars(struct uart_sunsu_port *up)
 396 {
 397         struct circ_buf *xmit = &up->port.state->xmit;
 398         int count;
 399
 400         if (up->port.x_char) {
 401                 serial_outp(up, UART_TX, up->port.x_char);
 402                 up->port.icount.tx++;
 403                 up->port.x_char = 0;
 404                 return;
 405         }
 406         if (uart_tx_stopped(&up->port)) {
 407                 sunsu_stop_tx(&up->port);
 408                 return;
 409         }
 410         if (uart_circ_empty(xmit)) {
 411                 __stop_tx(up);
 412                 return;
 413         }
 414
 415         count = up->port.fifosize;
 416         do {
 417                 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
 418                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 419                 up->port.icount.tx++;
 420                 if (uart_circ_empty(xmit))
 421                         break;
 422         } while (--count > 0);
 423
 424         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 425                 uart_write_wakeup(&up->port);
 426
 427         if (uart_circ_empty(xmit))
 428                 __stop_tx(up);
 429 }
 430
 431 static void check_modem_status(struct uart_sunsu_port *up)
 432 {
 433         int status;
 434
 435         status = serial_in(up, UART_MSR);
 436
 437         if ((status & UART_MSR_ANY_DELTA) == 0)
 438                 return;
 439
 440         if (status & UART_MSR_TERI)
 441                 up->port.icount.rng++;
 442         if (status & UART_MSR_DDSR)
 443                 up->port.icount.dsr++;
 444         if (status & UART_MSR_DDCD)
 445                 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
 446         if (status & UART_MSR_DCTS)
 447                 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
 448
 449         wake_up_interruptible(&up->port.state->port.delta_msr_wait);
 450 }
 451
 452 static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)
 453 {
 454         struct uart_sunsu_port *up = dev_id;
 455         unsigned long flags;
 456         unsigned char status;
 457
 458         spin_lock_irqsave(&up->port.lock, flags);
 459
 460         do {
 461                 status = serial_inp(up, UART_LSR);
 462                 if (status & UART_LSR_DR)
 463                         receive_chars(up, &status);
 464                 check_modem_status(up);
 465                 if (status & UART_LSR_THRE)
 466                         transmit_chars(up);
 467
 468                 spin_unlock_irqrestore(&up->port.lock, flags);
 469
 470                 tty_flip_buffer_push(&up->port.state->port);
 471
 472                 spin_lock_irqsave(&up->port.lock, flags);
 473
 474         } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
 475
 476         spin_unlock_irqrestore(&up->port.lock, flags);
 477
 478         return IRQ_HANDLED;
 479 }
 480
 481 /* Separate interrupt handling path for keyboard/mouse ports.  */
 482
 483 static void
 484 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
 485                    unsigned int iflag, unsigned int quot);
 486
 487 static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
 488 {
 489         unsigned int cur_cflag = up->cflag;
 490         int quot, new_baud;
 491
 492         up->cflag &= ~CBAUD;
 493         up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
 494
 495         quot = up->port.uartclk / (16 * new_baud);
 496
 497         sunsu_change_speed(&up->port, up->cflag, 0, quot);
 498 }
 499
 500 static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
 501 {
 502         do {
 503                 unsigned char ch = serial_inp(up, UART_RX);
 504
 505                 /* Stop-A is handled by drivers/char/keyboard.c now. */
 506                 if (up->su_type == SU_PORT_KBD) {
 507 #ifdef CONFIG_SERIO
 508                         serio_interrupt(&up->serio, ch, 0);
 509 #endif
 510                 } else if (up->su_type == SU_PORT_MS) {
 511                         int ret = suncore_mouse_baud_detection(ch, is_break);
 512
 513                         switch (ret) {
 514                         case 2:
 515                                 sunsu_change_mouse_baud(up);
 516                                 /* fallthru */
 517                         case 1:
 518                                 break;
 519
 520                         case 0:
 521 #ifdef CONFIG_SERIO
 522                                 serio_interrupt(&up->serio, ch, 0);
 523 #endif
 524                                 break;
 525                         }
 526                 }
 527         } while (serial_in(up, UART_LSR) & UART_LSR_DR);
 528 }
 529
 530 static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)
 531 {
 532         struct uart_sunsu_port *up = dev_id;
 533
 534         if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
 535                 unsigned char status = serial_inp(up, UART_LSR);
 536
 537                 if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
 538                         receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
 539         }
 540
 541         return IRQ_HANDLED;
 542 }
 543
 544 static unsigned int sunsu_tx_empty(struct uart_port *port)
 545 {
 546         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 547         unsigned long flags;
 548         unsigned int ret;
 549
 550         spin_lock_irqsave(&up->port.lock, flags);
 551         ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
 552         spin_unlock_irqrestore(&up->port.lock, flags);
 553
 554         return ret;
 555 }
 556
 557 static unsigned int sunsu_get_mctrl(struct uart_port *port)
 558 {
 559         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 560         unsigned char status;
 561         unsigned int ret;
 562
 563         status = serial_in(up, UART_MSR);
 564
 565         ret = 0;
 566         if (status & UART_MSR_DCD)
 567                 ret |= TIOCM_CAR;
 568         if (status & UART_MSR_RI)
 569                 ret |= TIOCM_RNG;
 570         if (status & UART_MSR_DSR)
 571                 ret |= TIOCM_DSR;
 572         if (status & UART_MSR_CTS)
 573                 ret |= TIOCM_CTS;
 574         return ret;
 575 }
 576
 577 static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
 578 {
 579         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 580         unsigned char mcr = 0;
 581
 582         if (mctrl & TIOCM_RTS)
 583                 mcr |= UART_MCR_RTS;
 584         if (mctrl & TIOCM_DTR)
 585                 mcr |= UART_MCR_DTR;
 586         if (mctrl & TIOCM_OUT1)
 587                 mcr |= UART_MCR_OUT1;
 588         if (mctrl & TIOCM_OUT2)
 589                 mcr |= UART_MCR_OUT2;
 590         if (mctrl & TIOCM_LOOP)
 591                 mcr |= UART_MCR_LOOP;
 592
 593         serial_out(up, UART_MCR, mcr);
 594 }
 595
 596 static void sunsu_break_ctl(struct uart_port *port, int break_state)
 597 {
 598         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 599         unsigned long flags;
 600
 601         spin_lock_irqsave(&up->port.lock, flags);
 602         if (break_state == -1)
 603                 up->lcr |= UART_LCR_SBC;
 604         else
 605                 up->lcr &= ~UART_LCR_SBC;
 606         serial_out(up, UART_LCR, up->lcr);
 607         spin_unlock_irqrestore(&up->port.lock, flags);
 608 }
 609
 610 static int sunsu_startup(struct uart_port *port)
 611 {
 612         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 613         unsigned long flags;
 614         int retval;
 615
 616         if (up->port.type == PORT_16C950) {
 617                 /* Wake up and initialize UART */
 618                 up->acr = 0;
 619                 serial_outp(up, UART_LCR, 0xBF);
 620                 serial_outp(up, UART_EFR, UART_EFR_ECB);
 621                 serial_outp(up, UART_IER, 0);
 622                 serial_outp(up, UART_LCR, 0);
 623                 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
 624                 serial_outp(up, UART_LCR, 0xBF);
 625                 serial_outp(up, UART_EFR, UART_EFR_ECB);
 626                 serial_outp(up, UART_LCR, 0);
 627         }
 628
 629 #ifdef CONFIG_SERIAL_8250_RSA
 630         /*
 631          * If this is an RSA port, see if we can kick it up to the
 632          * higher speed clock.
 633          */
 634         enable_rsa(up);
 635 #endif
 636
 637         /*
 638          * Clear the FIFO buffers and disable them.
 639          * (they will be reenabled in set_termios())
 640          */
 641         if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
 642                 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 643                 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
 644                                 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
 645                 serial_outp(up, UART_FCR, 0);
 646         }
 647
 648         /*
 649          * Clear the interrupt registers.
 650          */
 651         (void) serial_inp(up, UART_LSR);
 652         (void) serial_inp(up, UART_RX);
 653         (void) serial_inp(up, UART_IIR);
 654         (void) serial_inp(up, UART_MSR);
 655
 656         /*
 657          * At this point, there's no way the LSR could still be 0xff;
 658          * if it is, then bail out, because there's likely no UART
 659          * here.
 660          */
 661         if (!(up->port.flags & UPF_BUGGY_UART) &&
 662             (serial_inp(up, UART_LSR) == 0xff)) {
 663                 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
 664                 return -ENODEV;
 665         }
 666
 667         if (up->su_type != SU_PORT_PORT) {
 668                 retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
 669                                      IRQF_SHARED, su_typev[up->su_type], up);
 670         } else {
 671                 retval = request_irq(up->port.irq, sunsu_serial_interrupt,
 672                                      IRQF_SHARED, su_typev[up->su_type], up);
 673         }
 674         if (retval) {
 675                 printk("su: Cannot register IRQ %d\n", up->port.irq);
 676                 return retval;
 677         }
 678
 679         /*
 680          * Now, initialize the UART
 681          */
 682         serial_outp(up, UART_LCR, UART_LCR_WLEN8);
 683
 684         spin_lock_irqsave(&up->port.lock, flags);
 685
 686         up->port.mctrl |= TIOCM_OUT2;
 687
 688         sunsu_set_mctrl(&up->port, up->port.mctrl);
 689         spin_unlock_irqrestore(&up->port.lock, flags);
 690
 691         /*
 692          * Finally, enable interrupts.  Note: Modem status interrupts
 693          * are set via set_termios(), which will be occurring imminently
 694          * anyway, so we don't enable them here.
 695          */
 696         up->ier = UART_IER_RLSI | UART_IER_RDI;
 697         serial_outp(up, UART_IER, up->ier);
 698
 699         if (up->port.flags & UPF_FOURPORT) {
 700                 unsigned int icp;
 701                 /*
 702                  * Enable interrupts on the AST Fourport board
 703                  */
 704                 icp = (up->port.iobase & 0xfe0) | 0x01f;
 705                 outb_p(0x80, icp);
 706                 (void) inb_p(icp);
 707         }
 708
 709         /*
 710          * And clear the interrupt registers again for luck.
 711          */
 712         (void) serial_inp(up, UART_LSR);
 713         (void) serial_inp(up, UART_RX);
 714         (void) serial_inp(up, UART_IIR);
 715         (void) serial_inp(up, UART_MSR);
 716
 717         return 0;
 718 }
 719
 720 static void sunsu_shutdown(struct uart_port *port)
 721 {
 722         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 723         unsigned long flags;
 724
 725         /*
 726          * Disable interrupts from this port
 727          */
 728         up->ier = 0;
 729         serial_outp(up, UART_IER, 0);
 730
 731         spin_lock_irqsave(&up->port.lock, flags);
 732         if (up->port.flags & UPF_FOURPORT) {
 733                 /* reset interrupts on the AST Fourport board */
 734                 inb((up->port.iobase & 0xfe0) | 0x1f);
 735                 up->port.mctrl |= TIOCM_OUT1;
 736         } else
 737                 up->port.mctrl &= ~TIOCM_OUT2;
 738
 739         sunsu_set_mctrl(&up->port, up->port.mctrl);
 740         spin_unlock_irqrestore(&up->port.lock, flags);
 741
 742         /*
 743          * Disable break condition and FIFOs
 744          */
 745         serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
 746         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
 747                                   UART_FCR_CLEAR_RCVR |
 748                                   UART_FCR_CLEAR_XMIT);
 749         serial_outp(up, UART_FCR, 0);
 750
 751 #ifdef CONFIG_SERIAL_8250_RSA
 752         /*
 753          * Reset the RSA board back to 115kbps compat mode.
 754          */
 755         disable_rsa(up);
 756 #endif
 757
 758         /*
 759          * Read data port to reset things.
 760          */
 761         (void) serial_in(up, UART_RX);
 762
 763         free_irq(up->port.irq, up);
 764 }
 765
 766 static void
 767 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
 768                    unsigned int iflag, unsigned int quot)
 769 {
 770         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 771         unsigned char cval, fcr = 0;
 772         unsigned long flags;
 773
 774         switch (cflag & CSIZE) {
 775         case CS5:
 776                 cval = 0x00;
 777                 break;
 778         case CS6:
 779                 cval = 0x01;
 780                 break;
 781         case CS7:
 782                 cval = 0x02;
 783                 break;
 784         default:
 785         case CS8:
 786                 cval = 0x03;
 787                 break;
 788         }
 789
 790         if (cflag & CSTOPB)
 791                 cval |= 0x04;
 792         if (cflag & PARENB)
 793                 cval |= UART_LCR_PARITY;
 794         if (!(cflag & PARODD))
 795                 cval |= UART_LCR_EPAR;
 796 #ifdef CMSPAR
 797         if (cflag & CMSPAR)
 798                 cval |= UART_LCR_SPAR;
 799 #endif
 800
 801         /*
 802          * Work around a bug in the Oxford Semiconductor 952 rev B
 803          * chip which causes it to seriously miscalculate baud rates
 804          * when DLL is 0.
 805          */
 806         if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
 807             up->rev == 0x5201)
 808                 quot ++;
 809
 810         if (uart_config[up->port.type].flags & UART_USE_FIFO) {
 811                 if ((up->port.uartclk / quot) < (2400 * 16))
 812                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
 813 #ifdef CONFIG_SERIAL_8250_RSA
 814                 else if (up->port.type == PORT_RSA)
 815                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
 816 #endif
 817                 else
 818                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
 819         }
 820         if (up->port.type == PORT_16750)
 821                 fcr |= UART_FCR7_64BYTE;
 822
 823         /*
 824          * Ok, we're now changing the port state.  Do it with
 825          * interrupts disabled.
 826          */
 827         spin_lock_irqsave(&up->port.lock, flags);
 828
 829         /*
 830          * Update the per-port timeout.
 831          */
 832         uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
 833
 834         up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
 835         if (iflag & INPCK)
 836                 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
 837         if (iflag & (IGNBRK | BRKINT | PARMRK))
 838                 up->port.read_status_mask |= UART_LSR_BI;
 839
 840         /*
 841          * Characteres to ignore
 842          */
 843         up->port.ignore_status_mask = 0;
 844         if (iflag & IGNPAR)
 845                 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
 846         if (iflag & IGNBRK) {
 847                 up->port.ignore_status_mask |= UART_LSR_BI;
 848                 /*
 849                  * If we're ignoring parity and break indicators,
 850                  * ignore overruns too (for real raw support).
 851                  */
 852                 if (iflag & IGNPAR)
 853                         up->port.ignore_status_mask |= UART_LSR_OE;
 854         }
 855
 856         /*
 857          * ignore all characters if CREAD is not set
 858          */
 859         if ((cflag & CREAD) == 0)
 860                 up->port.ignore_status_mask |= UART_LSR_DR;
 861
 862         /*
 863          * CTS flow control flag and modem status interrupts
 864          */
 865         up->ier &= ~UART_IER_MSI;
 866         if (UART_ENABLE_MS(&up->port, cflag))
 867                 up->ier |= UART_IER_MSI;
 868
 869         serial_out(up, UART_IER, up->ier);
 870
 871         if (uart_config[up->port.type].flags & UART_STARTECH) {
 872                 serial_outp(up, UART_LCR, 0xBF);
 873                 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
 874         }
 875         serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
 876         serial_outp(up, UART_DLL, quot & 0xff);         /* LS of divisor */
 877         serial_outp(up, UART_DLM, quot >> 8);           /* MS of divisor */
 878         if (up->port.type == PORT_16750)
 879                 serial_outp(up, UART_FCR, fcr);         /* set fcr */
 880         serial_outp(up, UART_LCR, cval);                /* reset DLAB */
 881         up->lcr = cval;                                 /* Save LCR */
 882         if (up->port.type != PORT_16750) {
 883                 if (fcr & UART_FCR_ENABLE_FIFO) {
 884                         /* emulated UARTs (Lucent Venus 167x) need two steps */
 885                         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 886                 }
 887                 serial_outp(up, UART_FCR, fcr);         /* set fcr */
 888         }
 889
 890         up->cflag = cflag;
 891
 892         spin_unlock_irqrestore(&up->port.lock, flags);
 893 }
 894
 895 static void
 896 sunsu_set_termios(struct uart_port *port, struct ktermios *termios,
 897                   struct ktermios *old)
 898 {
 899         unsigned int baud, quot;
 900
 901         /*
 902          * Ask the core to calculate the divisor for us.
 903          */
 904         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 905         quot = uart_get_divisor(port, baud);
 906
 907         sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
 908 }
 909
 910 static void sunsu_release_port(struct uart_port *port)
 911 {
 912 }
 913
 914 static int sunsu_request_port(struct uart_port *port)
 915 {
 916         return 0;
 917 }
 918
 919 static void sunsu_config_port(struct uart_port *port, int flags)
 920 {
 921         struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
 922
 923         if (flags & UART_CONFIG_TYPE) {
 924                 /*
 925                  * We are supposed to call autoconfig here, but this requires
 926                  * splitting all the OBP probing crap from the UART probing.
 927                  * We'll do it when we kill sunsu.c altogether.
 928                  */
 929                 port->type = up->type_probed;   /* XXX */
 930         }
 931 }
 932
 933 static int
 934 sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
 935 {
 936         return -EINVAL;
 937 }
 938
 939 static const char *
 940 sunsu_type(struct uart_port *port)
 941 {
 942         int type = port->type;
 943
 944         if (type >= ARRAY_SIZE(uart_config))
 945                 type = 0;
 946         return uart_config[type].name;
 947 }
 948
 949 static struct uart_ops sunsu_pops = {
 950         .tx_empty       = sunsu_tx_empty,
 951         .set_mctrl      = sunsu_set_mctrl,
 952         .get_mctrl      = sunsu_get_mctrl,
 953         .stop_tx        = sunsu_stop_tx,
 954         .start_tx       = sunsu_start_tx,
 955         .stop_rx        = sunsu_stop_rx,
 956         .enable_ms      = sunsu_enable_ms,
 957         .break_ctl      = sunsu_break_ctl,
 958         .startup        = sunsu_startup,
 959         .shutdown       = sunsu_shutdown,
 960         .set_termios    = sunsu_set_termios,
 961         .type           = sunsu_type,
 962         .release_port   = sunsu_release_port,
 963         .request_port   = sunsu_request_port,
 964         .config_port    = sunsu_config_port,
 965         .verify_port    = sunsu_verify_port,
 966 };
 967
 968 #define UART_NR 4
 969
 970 static struct uart_sunsu_port sunsu_ports[UART_NR];
 971 static int nr_inst; /* Number of already registered ports */
 972
 973 #ifdef CONFIG_SERIO
 974
 975 static DEFINE_SPINLOCK(sunsu_serio_lock);
 976
 977 static int sunsu_serio_write(struct serio *serio, unsigned char ch)
 978 {
 979         struct uart_sunsu_port *up = serio->port_data;
 980         unsigned long flags;
 981         int lsr;
 982
 983         spin_lock_irqsave(&sunsu_serio_lock, flags);
 984
 985         do {
 986                 lsr = serial_in(up, UART_LSR);
 987         } while (!(lsr & UART_LSR_THRE));
 988
 989         /* Send the character out. */
 990         serial_out(up, UART_TX, ch);
 991
 992         spin_unlock_irqrestore(&sunsu_serio_lock, flags);
 993
 994         return 0;
 995 }
 996
 997 static int sunsu_serio_open(struct serio *serio)
 998 {
 999         struct uart_sunsu_port *up = serio->port_data;
1000         unsigned long flags;
1001         int ret;
1002
1003         spin_lock_irqsave(&sunsu_serio_lock, flags);
1004         if (!up->serio_open) {
1005                 up->serio_open = 1;
1006                 ret = 0;
1007         } else
1008                 ret = -EBUSY;
1009         spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1010
1011         return ret;
1012 }
1013
1014 static void sunsu_serio_close(struct serio *serio)
1015 {
1016         struct uart_sunsu_port *up = serio->port_data;
1017         unsigned long flags;
1018
1019         spin_lock_irqsave(&sunsu_serio_lock, flags);
1020         up->serio_open = 0;
1021         spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1022 }
1023
1024 #endif /* CONFIG_SERIO */
1025
1026 static void sunsu_autoconfig(struct uart_sunsu_port *up)
1027 {
1028         unsigned char status1, status2, scratch, scratch2, scratch3;
1029         unsigned char save_lcr, save_mcr;
1030         unsigned long flags;
1031
1032         if (up->su_type == SU_PORT_NONE)
1033                 return;
1034
1035         up->type_probed = PORT_UNKNOWN;
1036         up->port.iotype = UPIO_MEM;
1037
1038         spin_lock_irqsave(&up->port.lock, flags);
1039
1040         if (!(up->port.flags & UPF_BUGGY_UART)) {
1041                 /*
1042                  * Do a simple existence test first; if we fail this, there's
1043                  * no point trying anything else.
1044                  *
1045                  * 0x80 is used as a nonsense port to prevent against false
1046                  * positives due to ISA bus float.  The assumption is that
1047                  * 0x80 is a non-existent port; which should be safe since
1048                  * include/asm/io.h also makes this assumption.
1049                  */
1050                 scratch = serial_inp(up, UART_IER);
1051                 serial_outp(up, UART_IER, 0);
1052 #ifdef __i386__
1053                 outb(0xff, 0x080);
1054 #endif
1055                 scratch2 = serial_inp(up, UART_IER);
1056                 serial_outp(up, UART_IER, 0x0f);
1057 #ifdef __i386__
1058                 outb(0, 0x080);
1059 #endif
1060                 scratch3 = serial_inp(up, UART_IER);
1061                 serial_outp(up, UART_IER, scratch);
1062                 if (scratch2 != 0 || scratch3 != 0x0F)
1063                         goto out;       /* We failed; there's nothing here */
1064         }
1065
1066         save_mcr = serial_in(up, UART_MCR);
1067         save_lcr = serial_in(up, UART_LCR);
1068
1069         /*
1070          * Check to see if a UART is really there.  Certain broken
1071          * internal modems based on the Rockwell chipset fail this
1072          * test, because they apparently don't implement the loopback
1073          * test mode.  So this test is skipped on the COM 1 through
1074          * COM 4 ports.  This *should* be safe, since no board
1075          * manufacturer would be stupid enough to design a board
1076          * that conflicts with COM 1-4 --- we hope!
1077          */
1078         if (!(up->port.flags & UPF_SKIP_TEST)) {
1079                 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1080                 status1 = serial_inp(up, UART_MSR) & 0xF0;
1081                 serial_outp(up, UART_MCR, save_mcr);
1082                 if (status1 != 0x90)
1083                         goto out;       /* We failed loopback test */
1084         }
1085         serial_outp(up, UART_LCR, 0xBF);        /* set up for StarTech test */
1086         serial_outp(up, UART_EFR, 0);           /* EFR is the same as FCR */
1087         serial_outp(up, UART_LCR, 0);
1088         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1089         scratch = serial_in(up, UART_IIR) >> 6;
1090         switch (scratch) {
1091                 case 0:
1092                         up->port.type = PORT_16450;
1093                         break;
1094                 case 1:
1095                         up->port.type = PORT_UNKNOWN;
1096                         break;
1097                 case 2:
1098                         up->port.type = PORT_16550;
1099                         break;
1100                 case 3:
1101                         up->port.type = PORT_16550A;
1102                         break;
1103         }
1104         if (up->port.type == PORT_16550A) {
1105                 /* Check for Startech UART's */
1106                 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1107                 if (serial_in(up, UART_EFR) == 0) {
1108                         up->port.type = PORT_16650;
1109                 } else {
1110                         serial_outp(up, UART_LCR, 0xBF);
1111                         if (serial_in(up, UART_EFR) == 0)
1112                                 up->port.type = PORT_16650V2;
1113                 }
1114         }
1115         if (up->port.type == PORT_16550A) {
1116                 /* Check for TI 16750 */
1117                 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1118                 serial_outp(up, UART_FCR,
1119                             UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1120                 scratch = serial_in(up, UART_IIR) >> 5;
1121                 if (scratch == 7) {
1122                         /*
1123                          * If this is a 16750, and not a cheap UART
1124                          * clone, then it should only go into 64 byte
1125                          * mode if the UART_FCR7_64BYTE bit was set
1126                          * while UART_LCR_DLAB was latched.
1127                          */
1128                         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1129                         serial_outp(up, UART_LCR, 0);
1130                         serial_outp(up, UART_FCR,
1131                                     UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1132                         scratch = serial_in(up, UART_IIR) >> 5;
1133                         if (scratch == 6)
1134                                 up->port.type = PORT_16750;
1135                 }
1136                 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1137         }
1138         serial_outp(up, UART_LCR, save_lcr);
1139         if (up->port.type == PORT_16450) {
1140                 scratch = serial_in(up, UART_SCR);
1141                 serial_outp(up, UART_SCR, 0xa5);
1142                 status1 = serial_in(up, UART_SCR);
1143                 serial_outp(up, UART_SCR, 0x5a);
1144                 status2 = serial_in(up, UART_SCR);
1145                 serial_outp(up, UART_SCR, scratch);
1146
1147                 if ((status1 != 0xa5) || (status2 != 0x5a))
1148                         up->port.type = PORT_8250;
1149         }
1150
1151         up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1152
1153         if (up->port.type == PORT_UNKNOWN)
1154                 goto out;
1155         up->type_probed = up->port.type;        /* XXX */
1156
1157         /*
1158          * Reset the UART.
1159          */
1160 #ifdef CONFIG_SERIAL_8250_RSA
1161         if (up->port.type == PORT_RSA)
1162                 serial_outp(up, UART_RSA_FRR, 0);
1163 #endif
1164         serial_outp(up, UART_MCR, save_mcr);
1165         serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1166                                      UART_FCR_CLEAR_RCVR |
1167                                      UART_FCR_CLEAR_XMIT));
1168         serial_outp(up, UART_FCR, 0);
1169         (void)serial_in(up, UART_RX);
1170         serial_outp(up, UART_IER, 0);
1171
1172 out:
1173         spin_unlock_irqrestore(&up->port.lock, flags);
1174 }
1175
1176 static struct uart_driver sunsu_reg = {
1177         .owner                  = THIS_MODULE,
1178         .driver_name            = "sunsu",
1179         .dev_name               = "ttyS",
1180         .major                  = TTY_MAJOR,
1181 };
1182
1183 static int sunsu_kbd_ms_init(struct uart_sunsu_port *up)
1184 {
1185         int quot, baud;
1186 #ifdef CONFIG_SERIO
1187         struct serio *serio;
1188 #endif
1189
1190         if (up->su_type == SU_PORT_KBD) {
1191                 up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1192                 baud = 1200;
1193         } else {
1194                 up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1195                 baud = 4800;
1196         }
1197         quot = up->port.uartclk / (16 * baud);
1198
1199         sunsu_autoconfig(up);
1200         if (up->port.type == PORT_UNKNOWN)
1201                 return -ENODEV;
1202
1203         printk("%s: %s port at %llx, irq %u\n",
1204                up->port.dev->of_node->full_name,
1205                (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
1206                (unsigned long long) up->port.mapbase,
1207                up->port.irq);
1208
1209 #ifdef CONFIG_SERIO
1210         serio = &up->serio;
1211         serio->port_data = up;
1212
1213         serio->id.type = SERIO_RS232;
1214         if (up->su_type == SU_PORT_KBD) {
1215                 serio->id.proto = SERIO_SUNKBD;
1216                 strlcpy(serio->name, "sukbd", sizeof(serio->name));
1217         } else {
1218                 serio->id.proto = SERIO_SUN;
1219                 serio->id.extra = 1;
1220                 strlcpy(serio->name, "sums", sizeof(serio->name));
1221         }
1222         strlcpy(serio->phys,
1223                 (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
1224                 sizeof(serio->phys));
1225
1226         serio->write = sunsu_serio_write;
1227         serio->open = sunsu_serio_open;
1228         serio->close = sunsu_serio_close;
1229         serio->dev.parent = up->port.dev;
1230
1231         serio_register_port(serio);
1232 #endif
1233
1234         sunsu_change_speed(&up->port, up->cflag, 0, quot);
1235
1236         sunsu_startup(&up->port);
1237         return 0;
1238 }
1239
1240 /*
1241  * ------------------------------------------------------------
1242  * Serial console driver
1243  * ------------------------------------------------------------
1244  */
1245
1246 #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
1247
1248 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1249
1250 /*
1251  *      Wait for transmitter & holding register to empty
1252  */
1253 static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
1254 {
1255         unsigned int status, tmout = 10000;
1256
1257         /* Wait up to 10ms for the character(s) to be sent. */
1258         do {
1259                 status = serial_in(up, UART_LSR);
1260
1261                 if (status & UART_LSR_BI)
1262                         up->lsr_break_flag = UART_LSR_BI;
1263
1264                 if (--tmout == 0)
1265                         break;
1266                 udelay(1);
1267         } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1268
1269         /* Wait up to 1s for flow control if necessary */
1270         if (up->port.flags & UPF_CONS_FLOW) {
1271                 tmout = 1000000;
1272                 while (--tmout &&
1273                        ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1274                         udelay(1);
1275         }
1276 }
1277
1278 static void sunsu_console_putchar(struct uart_port *port, int ch)
1279 {
1280         struct uart_sunsu_port *up = (struct uart_sunsu_port *)port;
1281
1282         wait_for_xmitr(up);
1283         serial_out(up, UART_TX, ch);
1284 }
1285
1286 /*
1287  *      Print a string to the serial port trying not to disturb
1288  *      any possible real use of the port...
1289  */
1290 static void sunsu_console_write(struct console *co, const char *s,
1291                                 unsigned int count)
1292 {
1293         struct uart_sunsu_port *up = &sunsu_ports[co->index];
1294         unsigned long flags;
1295         unsigned int ier;
1296         int locked = 1;
1297
1298         if (up->port.sysrq || oops_in_progress)
1299                 locked = spin_trylock_irqsave(&up->port.lock, flags);
1300         else
1301                 spin_lock_irqsave(&up->port.lock, flags);
1302
1303         /*
1304          *      First save the UER then disable the interrupts
1305          */
1306         ier = serial_in(up, UART_IER);
1307         serial_out(up, UART_IER, 0);
1308
1309         uart_console_write(&up->port, s, count, sunsu_console_putchar);
1310
1311         /*
1312          *      Finally, wait for transmitter to become empty
1313          *      and restore the IER
1314          */
1315         wait_for_xmitr(up);
1316         serial_out(up, UART_IER, ier);
1317
1318         if (locked)
1319                 spin_unlock_irqrestore(&up->port.lock, flags);
1320 }
1321
1322 /*
1323  *      Setup initial baud/bits/parity. We do two things here:
1324  *      - construct a cflag setting for the first su_open()
1325  *      - initialize the serial port
1326  *      Return non-zero if we didn't find a serial port.
1327  */
1328 static int __init sunsu_console_setup(struct console *co, char *options)
1329 {
1330         static struct ktermios dummy;
1331         struct ktermios termios;
1332         struct uart_port *port;
1333
1334         printk("Console: ttyS%d (SU)\n",
1335                (sunsu_reg.minor - 64) + co->index);
1336
1337         if (co->index > nr_inst)
1338                 return -ENODEV;
1339         port = &sunsu_ports[co->index].port;
1340
1341         /*
1342          * Temporary fix.
1343          */
1344         spin_lock_init(&port->lock);
1345
1346         /* Get firmware console settings.  */
1347         sunserial_console_termios(co, port->dev->of_node);
1348
1349         memset(&termios, 0, sizeof(struct ktermios));
1350         termios.c_cflag = co->cflag;
1351         port->mctrl |= TIOCM_DTR;
1352         port->ops->set_termios(port, &termios, &dummy);
1353
1354         return 0;
1355 }
1356
1357 static struct console sunsu_console = {
1358         .name   =       "ttyS",
1359         .write  =       sunsu_console_write,
1360         .device =       uart_console_device,
1361         .setup  =       sunsu_console_setup,
1362         .flags  =       CON_PRINTBUFFER,
1363         .index  =       -1,
1364         .data   =       &sunsu_reg,
1365 };
1366
1367 /*
1368  *      Register console.
1369  */
1370
1371 static inline struct console *SUNSU_CONSOLE(void)
1372 {
1373         return &sunsu_console;
1374 }
1375 #else
1376 #define SUNSU_CONSOLE()                 (NULL)
1377 #define sunsu_serial_console_init()     do { } while (0)
1378 #endif
1379
1380 static enum su_type su_get_type(struct device_node *dp)
1381 {
1382         struct device_node *ap = of_find_node_by_path("/aliases");
1383
1384         if (ap) {
1385                 const char *keyb = of_get_property(ap, "keyboard", NULL);
1386                 const char *ms = of_get_property(ap, "mouse", NULL);
1387
1388                 if (keyb) {
1389                         if (dp == of_find_node_by_path(keyb))
1390                                 return SU_PORT_KBD;
1391                 }
1392                 if (ms) {
1393                         if (dp == of_find_node_by_path(ms))
1394                                 return SU_PORT_MS;
1395                 }
1396         }
1397
1398         return SU_PORT_PORT;
1399 }
1400
1401 static int su_probe(struct platform_device *op)
1402 {
1403         struct device_node *dp = op->dev.of_node;
1404         struct uart_sunsu_port *up;
1405         struct resource *rp;
1406         enum su_type type;
1407         bool ignore_line;
1408         int err;
1409
1410         type = su_get_type(dp);
1411         if (type == SU_PORT_PORT) {
1412                 if (nr_inst >= UART_NR)
1413                         return -EINVAL;
1414                 up = &sunsu_ports[nr_inst];
1415         } else {
1416                 up = kzalloc(sizeof(*up), GFP_KERNEL);
1417                 if (!up)
1418                         return -ENOMEM;
1419         }
1420
1421         up->port.line = nr_inst;
1422
1423         spin_lock_init(&up->port.lock);
1424
1425         up->su_type = type;
1426
1427         rp = &op->resource[0];
1428         up->port.mapbase = rp->start;
1429         up->reg_size = resource_size(rp);
1430         up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
1431         if (!up->port.membase) {
1432                 if (type != SU_PORT_PORT)
1433                         kfree(up);
1434                 return -ENOMEM;
1435         }
1436
1437         up->port.irq = op->archdata.irqs[0];
1438
1439         up->port.dev = &op->dev;
1440
1441         up->port.type = PORT_UNKNOWN;
1442         up->port.uartclk = (SU_BASE_BAUD * 16);
1443
1444         err = 0;
1445         if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
1446                 err = sunsu_kbd_ms_init(up);
1447                 if (err) {
1448                         of_iounmap(&op->resource[0],
1449                                    up->port.membase, up->reg_size);
1450                         kfree(up);
1451                         return err;
1452                 }
1453                 platform_set_drvdata(op, up);
1454
1455                 nr_inst++;
1456
1457                 return 0;
1458         }
1459
1460         up->port.flags |= UPF_BOOT_AUTOCONF;
1461
1462         sunsu_autoconfig(up);
1463
1464         err = -ENODEV;
1465         if (up->port.type == PORT_UNKNOWN)
1466                 goto out_unmap;
1467
1468         up->port.ops = &sunsu_pops;
1469
1470         ignore_line = false;
1471         if (!strcmp(dp->name, "rsc-console") ||
1472             !strcmp(dp->name, "lom-console"))
1473                 ignore_line = true;
1474
1475         sunserial_console_match(SUNSU_CONSOLE(), dp,
1476                                 &sunsu_reg, up->port.line,
1477                                 ignore_line);
1478         err = uart_add_one_port(&sunsu_reg, &up->port);
1479         if (err)
1480                 goto out_unmap;
1481
1482         platform_set_drvdata(op, up);
1483
1484         nr_inst++;
1485
1486         return 0;
1487
1488 out_unmap:
1489         of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1490         return err;
1491 }
1492
1493 static int su_remove(struct platform_device *op)
1494 {
1495         struct uart_sunsu_port *up = platform_get_drvdata(op);
1496         bool kbdms = false;
1497
1498         if (up->su_type == SU_PORT_MS ||
1499             up->su_type == SU_PORT_KBD)
1500                 kbdms = true;
1501
1502         if (kbdms) {
1503 #ifdef CONFIG_SERIO
1504                 serio_unregister_port(&up->serio);
1505 #endif
1506         } else if (up->port.type != PORT_UNKNOWN)
1507                 uart_remove_one_port(&sunsu_reg, &up->port);
1508
1509         if (up->port.membase)
1510                 of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1511
1512         if (kbdms)
1513                 kfree(up);
1514
1515         return 0;
1516 }
1517
1518 static const struct of_device_id su_match[] = {
1519         {
1520                 .name = "su",
1521         },
1522         {
1523                 .name = "su_pnp",
1524         },
1525         {
1526                 .name = "serial",
1527                 .compatible = "su",
1528         },
1529         {
1530                 .type = "serial",
1531                 .compatible = "su",
1532         },
1533         {},
1534 };
1535 MODULE_DEVICE_TABLE(of, su_match);
1536
1537 static struct platform_driver su_driver = {
1538         .driver = {
1539                 .name = "su",
1540                 .owner = THIS_MODULE,
1541                 .of_match_table = su_match,
1542         },
1543         .probe          = su_probe,
1544         .remove         = su_remove,
1545 };
1546
1547 static int __init sunsu_init(void)
1548 {
1549         struct device_node *dp;
1550         int err;
1551         int num_uart = 0;
1552
1553         for_each_node_by_name(dp, "su") {
1554                 if (su_get_type(dp) == SU_PORT_PORT)
1555                         num_uart++;
1556         }
1557         for_each_node_by_name(dp, "su_pnp") {
1558                 if (su_get_type(dp) == SU_PORT_PORT)
1559                         num_uart++;
1560         }
1561         for_each_node_by_name(dp, "serial") {
1562                 if (of_device_is_compatible(dp, "su")) {
1563                         if (su_get_type(dp) == SU_PORT_PORT)
1564                                 num_uart++;
1565                 }
1566         }
1567         for_each_node_by_type(dp, "serial") {
1568                 if (of_device_is_compatible(dp, "su")) {
1569                         if (su_get_type(dp) == SU_PORT_PORT)
1570                                 num_uart++;
1571                 }
1572         }
1573
1574         if (num_uart) {
1575                 err = sunserial_register_minors(&sunsu_reg, num_uart);
1576                 if (err)
1577                         return err;
1578         }
1579
1580         err = platform_driver_register(&su_driver);
1581         if (err && num_uart)
1582                 sunserial_unregister_minors(&sunsu_reg, num_uart);
1583
1584         return err;
1585 }
1586
1587 static void __exit sunsu_exit(void)
1588 {
1589         platform_driver_unregister(&su_driver);
1590         if (sunsu_reg.nr)
1591                 sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);
1592 }
1593
1594 module_init(sunsu_init);
1595 module_exit(sunsu_exit);
1596
1597 MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
1598 MODULE_DESCRIPTION("Sun SU serial port driver");
1599 MODULE_VERSION("2.0");
1600 MODULE_LICENSE("GPL");