drivers/staging/rts5208/rtsx_card.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Driver for Realtek PCI-Express card reader
   4  *
   5  * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
   6  *
   7  * Author:
   8  *   Wei WANG (wei_wang@realsil.com.cn)
   9  *   Micky Ching (micky_ching@realsil.com.cn)
  10  */
  11
  12 #include <linux/blkdev.h>
  13 #include <linux/kthread.h>
  14 #include <linux/sched.h>
  15 #include <linux/workqueue.h>
  16 #include <linux/kernel.h>
  17
  18 #include "rtsx.h"
  19 #include "sd.h"
  20 #include "xd.h"
  21 #include "ms.h"
  22
  23 void do_remaining_work(struct rtsx_chip *chip)
  24 {
  25         struct sd_info *sd_card = &chip->sd_card;
  26 #ifdef XD_DELAY_WRITE
  27         struct xd_info *xd_card = &chip->xd_card;
  28 #endif
  29         struct ms_info *ms_card = &chip->ms_card;
  30
  31         if (chip->card_ready & SD_CARD) {
  32                 if (sd_card->seq_mode) {
  33                         rtsx_set_stat(chip, RTSX_STAT_RUN);
  34                         sd_card->cleanup_counter++;
  35                 } else {
  36                         sd_card->cleanup_counter = 0;
  37                 }
  38         }
  39
  40 #ifdef XD_DELAY_WRITE
  41         if (chip->card_ready & XD_CARD) {
  42                 if (xd_card->delay_write.delay_write_flag) {
  43                         rtsx_set_stat(chip, RTSX_STAT_RUN);
  44                         xd_card->cleanup_counter++;
  45                 } else {
  46                         xd_card->cleanup_counter = 0;
  47                 }
  48         }
  49 #endif
  50
  51         if (chip->card_ready & MS_CARD) {
  52                 if (CHK_MSPRO(ms_card)) {
  53                         if (ms_card->seq_mode) {
  54                                 rtsx_set_stat(chip, RTSX_STAT_RUN);
  55                                 ms_card->cleanup_counter++;
  56                         } else {
  57                                 ms_card->cleanup_counter = 0;
  58                         }
  59                 } else {
  60 #ifdef MS_DELAY_WRITE
  61                         if (ms_card->delay_write.delay_write_flag) {
  62                                 rtsx_set_stat(chip, RTSX_STAT_RUN);
  63                                 ms_card->cleanup_counter++;
  64                         } else {
  65                                 ms_card->cleanup_counter = 0;
  66                         }
  67 #endif
  68                 }
  69         }
  70
  71         if (sd_card->cleanup_counter > POLLING_WAIT_CNT)
  72                 sd_cleanup_work(chip);
  73
  74         if (xd_card->cleanup_counter > POLLING_WAIT_CNT)
  75                 xd_cleanup_work(chip);
  76
  77         if (ms_card->cleanup_counter > POLLING_WAIT_CNT)
  78                 ms_cleanup_work(chip);
  79 }
  80
  81 void try_to_switch_sdio_ctrl(struct rtsx_chip *chip)
  82 {
  83         u8 reg1 = 0, reg2 = 0;
  84
  85         rtsx_read_register(chip, 0xFF34, &reg1);
  86         rtsx_read_register(chip, 0xFF38, &reg2);
  87         dev_dbg(rtsx_dev(chip), "reg 0xFF34: 0x%x, reg 0xFF38: 0x%x\n",
  88                 reg1, reg2);
  89         if ((reg1 & 0xC0) && (reg2 & 0xC0)) {
  90                 chip->sd_int = 1;
  91                 rtsx_write_register(chip, SDIO_CTRL, 0xFF,
  92                                     SDIO_BUS_CTRL | SDIO_CD_CTRL);
  93                 rtsx_write_register(chip, PWR_GATE_CTRL,
  94                                     LDO3318_PWR_MASK, LDO_ON);
  95         }
  96 }
  97
  98 #ifdef SUPPORT_SDIO_ASPM
  99 void dynamic_configure_sdio_aspm(struct rtsx_chip *chip)
 100 {
 101         u8 buf[12], reg;
 102         int i;
 103
 104         for (i = 0; i < 12; i++)
 105                 rtsx_read_register(chip, 0xFF08 + i, &buf[i]);
 106         rtsx_read_register(chip, 0xFF25, &reg);
 107         if ((memcmp(buf, chip->sdio_raw_data, 12) != 0) || (reg & 0x03)) {
 108                 chip->sdio_counter = 0;
 109                 chip->sdio_idle = 0;
 110         } else {
 111                 if (!chip->sdio_idle) {
 112                         chip->sdio_counter++;
 113                         if (chip->sdio_counter >= SDIO_IDLE_COUNT) {
 114                                 chip->sdio_counter = 0;
 115                                 chip->sdio_idle = 1;
 116                         }
 117                 }
 118         }
 119         memcpy(chip->sdio_raw_data, buf, 12);
 120
 121         if (chip->sdio_idle) {
 122                 if (!chip->sdio_aspm) {
 123                         dev_dbg(rtsx_dev(chip), "SDIO enter ASPM!\n");
 124                         rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFC,
 125                                             0x30 | (chip->aspm_level[1] << 2));
 126                         chip->sdio_aspm = 1;
 127                 }
 128         } else {
 129                 if (chip->sdio_aspm) {
 130                         dev_dbg(rtsx_dev(chip), "SDIO exit ASPM!\n");
 131                         rtsx_write_register(chip, ASPM_FORCE_CTL, 0xFC, 0x30);
 132                         chip->sdio_aspm = 0;
 133                 }
 134         }
 135 }
 136 #endif
 137
 138 void do_reset_sd_card(struct rtsx_chip *chip)
 139 {
 140         int retval;
 141
 142         dev_dbg(rtsx_dev(chip), "%s: %d, card2lun = 0x%x\n", __func__,
 143                 chip->sd_reset_counter, chip->card2lun[SD_CARD]);
 144
 145         if (chip->card2lun[SD_CARD] >= MAX_ALLOWED_LUN_CNT) {
 146                 clear_bit(SD_NR, &chip->need_reset);
 147                 chip->sd_reset_counter = 0;
 148                 chip->sd_show_cnt = 0;
 149                 return;
 150         }
 151
 152         chip->rw_fail_cnt[chip->card2lun[SD_CARD]] = 0;
 153
 154         rtsx_set_stat(chip, RTSX_STAT_RUN);
 155         rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0);
 156
 157         retval = reset_sd_card(chip);
 158         if (chip->need_release & SD_CARD)
 159                 return;
 160         if (retval == STATUS_SUCCESS) {
 161                 clear_bit(SD_NR, &chip->need_reset);
 162                 chip->sd_reset_counter = 0;
 163                 chip->sd_show_cnt = 0;
 164                 chip->card_ready |= SD_CARD;
 165                 chip->card_fail &= ~SD_CARD;
 166                 chip->rw_card[chip->card2lun[SD_CARD]] = sd_rw;
 167         } else {
 168                 if (chip->sd_io || (chip->sd_reset_counter >= MAX_RESET_CNT)) {
 169                         clear_bit(SD_NR, &chip->need_reset);
 170                         chip->sd_reset_counter = 0;
 171                         chip->sd_show_cnt = 0;
 172                 } else {
 173                         chip->sd_reset_counter++;
 174                 }
 175                 chip->card_ready &= ~SD_CARD;
 176                 chip->card_fail |= SD_CARD;
 177                 chip->capacity[chip->card2lun[SD_CARD]] = 0;
 178                 chip->rw_card[chip->card2lun[SD_CARD]] = NULL;
 179
 180                 rtsx_write_register(chip, CARD_OE, SD_OUTPUT_EN, 0);
 181                 if (!chip->ft2_fast_mode)
 182                         card_power_off(chip, SD_CARD);
 183                 if (chip->sd_io) {
 184                         chip->sd_int = 0;
 185                         try_to_switch_sdio_ctrl(chip);
 186                 } else {
 187                         disable_card_clock(chip, SD_CARD);
 188                 }
 189         }
 190 }
 191
 192 void do_reset_xd_card(struct rtsx_chip *chip)
 193 {
 194         int retval;
 195
 196         dev_dbg(rtsx_dev(chip), "%s: %d, card2lun = 0x%x\n", __func__,
 197                 chip->xd_reset_counter, chip->card2lun[XD_CARD]);
 198
 199         if (chip->card2lun[XD_CARD] >= MAX_ALLOWED_LUN_CNT) {
 200                 clear_bit(XD_NR, &chip->need_reset);
 201                 chip->xd_reset_counter = 0;
 202                 chip->xd_show_cnt = 0;
 203                 return;
 204         }
 205
 206         chip->rw_fail_cnt[chip->card2lun[XD_CARD]] = 0;
 207
 208         rtsx_set_stat(chip, RTSX_STAT_RUN);
 209         rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0);
 210
 211         retval = reset_xd_card(chip);
 212         if (chip->need_release & XD_CARD)
 213                 return;
 214         if (retval == STATUS_SUCCESS) {
 215                 clear_bit(XD_NR, &chip->need_reset);
 216                 chip->xd_reset_counter = 0;
 217                 chip->card_ready |= XD_CARD;
 218                 chip->card_fail &= ~XD_CARD;
 219                 chip->rw_card[chip->card2lun[XD_CARD]] = xd_rw;
 220         } else {
 221                 if (chip->xd_reset_counter >= MAX_RESET_CNT) {
 222                         clear_bit(XD_NR, &chip->need_reset);
 223                         chip->xd_reset_counter = 0;
 224                         chip->xd_show_cnt = 0;
 225                 } else {
 226                         chip->xd_reset_counter++;
 227                 }
 228                 chip->card_ready &= ~XD_CARD;
 229                 chip->card_fail |= XD_CARD;
 230                 chip->capacity[chip->card2lun[XD_CARD]] = 0;
 231                 chip->rw_card[chip->card2lun[XD_CARD]] = NULL;
 232
 233                 rtsx_write_register(chip, CARD_OE, XD_OUTPUT_EN, 0);
 234                 if (!chip->ft2_fast_mode)
 235                         card_power_off(chip, XD_CARD);
 236                 disable_card_clock(chip, XD_CARD);
 237         }
 238 }
 239
 240 void do_reset_ms_card(struct rtsx_chip *chip)
 241 {
 242         int retval;
 243
 244         dev_dbg(rtsx_dev(chip), "%s: %d, card2lun = 0x%x\n", __func__,
 245                 chip->ms_reset_counter, chip->card2lun[MS_CARD]);
 246
 247         if (chip->card2lun[MS_CARD] >= MAX_ALLOWED_LUN_CNT) {
 248                 clear_bit(MS_NR, &chip->need_reset);
 249                 chip->ms_reset_counter = 0;
 250                 chip->ms_show_cnt = 0;
 251                 return;
 252         }
 253
 254         chip->rw_fail_cnt[chip->card2lun[MS_CARD]] = 0;
 255
 256         rtsx_set_stat(chip, RTSX_STAT_RUN);
 257         rtsx_write_register(chip, SDIO_CTRL, 0xFF, 0);
 258
 259         retval = reset_ms_card(chip);
 260         if (chip->need_release & MS_CARD)
 261                 return;
 262         if (retval == STATUS_SUCCESS) {
 263                 clear_bit(MS_NR, &chip->need_reset);
 264                 chip->ms_reset_counter = 0;
 265                 chip->card_ready |= MS_CARD;
 266                 chip->card_fail &= ~MS_CARD;
 267                 chip->rw_card[chip->card2lun[MS_CARD]] = ms_rw;
 268         } else {
 269                 if (chip->ms_reset_counter >= MAX_RESET_CNT) {
 270                         clear_bit(MS_NR, &chip->need_reset);
 271                         chip->ms_reset_counter = 0;
 272                         chip->ms_show_cnt = 0;
 273                 } else {
 274                         chip->ms_reset_counter++;
 275                 }
 276                 chip->card_ready &= ~MS_CARD;
 277                 chip->card_fail |= MS_CARD;
 278                 chip->capacity[chip->card2lun[MS_CARD]] = 0;
 279                 chip->rw_card[chip->card2lun[MS_CARD]] = NULL;
 280
 281                 rtsx_write_register(chip, CARD_OE, MS_OUTPUT_EN, 0);
 282                 if (!chip->ft2_fast_mode)
 283                         card_power_off(chip, MS_CARD);
 284                 disable_card_clock(chip, MS_CARD);
 285         }
 286 }
 287
 288 static void release_sdio(struct rtsx_chip *chip)
 289 {
 290         if (chip->sd_io) {
 291                 rtsx_write_register(chip, CARD_STOP, SD_STOP | SD_CLR_ERR,
 292                                     SD_STOP | SD_CLR_ERR);
 293
 294                 if (chip->chip_insert_with_sdio) {
 295                         chip->chip_insert_with_sdio = 0;
 296
 297                         if (CHECK_PID(chip, 0x5288))
 298                                 rtsx_write_register(chip, 0xFE5A, 0x08, 0x00);
 299                         else
 300                                 rtsx_write_register(chip, 0xFE70, 0x80, 0x00);
 301                 }
 302
 303                 rtsx_write_register(chip, SDIO_CTRL, SDIO_CD_CTRL, 0);
 304                 chip->sd_io = 0;
 305         }
 306 }
 307
 308 void rtsx_power_off_card(struct rtsx_chip *chip)
 309 {
 310         if ((chip->card_ready & SD_CARD) || chip->sd_io) {
 311                 sd_cleanup_work(chip);
 312                 sd_power_off_card3v3(chip);
 313         }
 314
 315         if (chip->card_ready & XD_CARD) {
 316                 xd_cleanup_work(chip);
 317                 xd_power_off_card3v3(chip);
 318         }
 319
 320         if (chip->card_ready & MS_CARD) {
 321                 ms_cleanup_work(chip);
 322                 ms_power_off_card3v3(chip);
 323         }
 324 }
 325
 326 void rtsx_release_cards(struct rtsx_chip *chip)
 327 {
 328         chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
 329
 330         if ((chip->card_ready & SD_CARD) || chip->sd_io) {
 331                 if (chip->int_reg & SD_EXIST)
 332                         sd_cleanup_work(chip);
 333                 release_sd_card(chip);
 334         }
 335
 336         if (chip->card_ready & XD_CARD) {
 337                 if (chip->int_reg & XD_EXIST)
 338                         xd_cleanup_work(chip);
 339                 release_xd_card(chip);
 340         }
 341
 342         if (chip->card_ready & MS_CARD) {
 343                 if (chip->int_reg & MS_EXIST)
 344                         ms_cleanup_work(chip);
 345                 release_ms_card(chip);
 346         }
 347 }
 348
 349 void rtsx_reset_cards(struct rtsx_chip *chip)
 350 {
 351         if (!chip->need_reset)
 352                 return;
 353
 354         rtsx_set_stat(chip, RTSX_STAT_RUN);
 355
 356         rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL);
 357
 358         rtsx_disable_aspm(chip);
 359
 360         if ((chip->need_reset & SD_CARD) && chip->chip_insert_with_sdio)
 361                 clear_bit(SD_NR, &chip->need_reset);
 362
 363         if (chip->need_reset & XD_CARD) {
 364                 chip->card_exist |= XD_CARD;
 365
 366                 if (chip->xd_show_cnt >= MAX_SHOW_CNT)
 367                         do_reset_xd_card(chip);
 368                 else
 369                         chip->xd_show_cnt++;
 370         }
 371         if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN)) {
 372                 if (chip->card_exist & XD_CARD) {
 373                         clear_bit(SD_NR, &chip->need_reset);
 374                         clear_bit(MS_NR, &chip->need_reset);
 375                 }
 376         }
 377         if (chip->need_reset & SD_CARD) {
 378                 chip->card_exist |= SD_CARD;
 379
 380                 if (chip->sd_show_cnt >= MAX_SHOW_CNT) {
 381                         rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
 382                         do_reset_sd_card(chip);
 383                 } else {
 384                         chip->sd_show_cnt++;
 385                 }
 386         }
 387         if (chip->need_reset & MS_CARD) {
 388                 chip->card_exist |= MS_CARD;
 389
 390                 if (chip->ms_show_cnt >= MAX_SHOW_CNT)
 391                         do_reset_ms_card(chip);
 392                 else
 393                         chip->ms_show_cnt++;
 394         }
 395 }
 396
 397 void rtsx_reinit_cards(struct rtsx_chip *chip, int reset_chip)
 398 {
 399         rtsx_set_stat(chip, RTSX_STAT_RUN);
 400
 401         rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL);
 402
 403         if (reset_chip)
 404                 rtsx_reset_chip(chip);
 405
 406         chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
 407
 408         if ((chip->int_reg & SD_EXIST) && (chip->need_reinit & SD_CARD)) {
 409                 release_sdio(chip);
 410                 release_sd_card(chip);
 411
 412                 wait_timeout(100);
 413
 414                 chip->card_exist |= SD_CARD;
 415                 do_reset_sd_card(chip);
 416         }
 417
 418         if ((chip->int_reg & XD_EXIST) && (chip->need_reinit & XD_CARD)) {
 419                 release_xd_card(chip);
 420
 421                 wait_timeout(100);
 422
 423                 chip->card_exist |= XD_CARD;
 424                 do_reset_xd_card(chip);
 425         }
 426
 427         if ((chip->int_reg & MS_EXIST) && (chip->need_reinit & MS_CARD)) {
 428                 release_ms_card(chip);
 429
 430                 wait_timeout(100);
 431
 432                 chip->card_exist |= MS_CARD;
 433                 do_reset_ms_card(chip);
 434         }
 435
 436         chip->need_reinit = 0;
 437 }
 438
 439 #ifdef DISABLE_CARD_INT
 440 void card_cd_debounce(struct rtsx_chip *chip, unsigned long *need_reset,
 441                       unsigned long *need_release)
 442 {
 443         u8 release_map = 0, reset_map = 0;
 444
 445         chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
 446
 447         if (chip->card_exist) {
 448                 if (chip->card_exist & XD_CARD) {
 449                         if (!(chip->int_reg & XD_EXIST))
 450                                 release_map |= XD_CARD;
 451                 } else if (chip->card_exist & SD_CARD) {
 452                         if (!(chip->int_reg & SD_EXIST))
 453                                 release_map |= SD_CARD;
 454                 } else if (chip->card_exist & MS_CARD) {
 455                         if (!(chip->int_reg & MS_EXIST))
 456                                 release_map |= MS_CARD;
 457                 }
 458         } else {
 459                 if (chip->int_reg & XD_EXIST)
 460                         reset_map |= XD_CARD;
 461                 else if (chip->int_reg & SD_EXIST)
 462                         reset_map |= SD_CARD;
 463                 else if (chip->int_reg & MS_EXIST)
 464                         reset_map |= MS_CARD;
 465         }
 466
 467         if (reset_map) {
 468                 int xd_cnt = 0, sd_cnt = 0, ms_cnt = 0;
 469                 int i;
 470
 471                 for (i = 0; i < (DEBOUNCE_CNT); i++) {
 472                         chip->int_reg = rtsx_readl(chip, RTSX_BIPR);
 473
 474                         if (chip->int_reg & XD_EXIST)
 475                                 xd_cnt++;
 476                         else
 477                                 xd_cnt = 0;
 478
 479                         if (chip->int_reg & SD_EXIST)
 480                                 sd_cnt++;
 481                         else
 482                                 sd_cnt = 0;
 483
 484                         if (chip->int_reg & MS_EXIST)
 485                                 ms_cnt++;
 486                         else
 487                                 ms_cnt = 0;
 488
 489                         wait_timeout(30);
 490                 }
 491
 492                 reset_map = 0;
 493                 if (!(chip->card_exist & XD_CARD) &&
 494                     (xd_cnt > (DEBOUNCE_CNT - 1)))
 495                         reset_map |= XD_CARD;
 496                 if (!(chip->card_exist & SD_CARD) &&
 497                     (sd_cnt > (DEBOUNCE_CNT - 1)))
 498                         reset_map |= SD_CARD;
 499                 if (!(chip->card_exist & MS_CARD) &&
 500                     (ms_cnt > (DEBOUNCE_CNT - 1)))
 501                         reset_map |= MS_CARD;
 502         }
 503
 504         if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN))
 505                 rtsx_write_register(chip, HOST_SLEEP_STATE, 0xC0, 0x00);
 506
 507         if (need_reset)
 508                 *need_reset = reset_map;
 509         if (need_release)
 510                 *need_release = release_map;
 511 }
 512 #endif
 513
 514 void rtsx_init_cards(struct rtsx_chip *chip)
 515 {
 516         if (RTSX_TST_DELINK(chip) && (rtsx_get_stat(chip) != RTSX_STAT_SS)) {
 517                 dev_dbg(rtsx_dev(chip), "Reset chip in polling thread!\n");
 518                 rtsx_reset_chip(chip);
 519                 RTSX_CLR_DELINK(chip);
 520         }
 521
 522 #ifdef DISABLE_CARD_INT
 523         card_cd_debounce(chip, &chip->need_reset, &chip->need_release);
 524 #endif
 525
 526         if (chip->need_release) {
 527                 if (CHECK_PID(chip, 0x5288) && CHECK_BARO_PKG(chip, QFN)) {
 528                         if (chip->int_reg & XD_EXIST) {
 529                                 clear_bit(SD_NR, &chip->need_release);
 530                                 clear_bit(MS_NR, &chip->need_release);
 531                         }
 532                 }
 533
 534                 if (!(chip->card_exist & SD_CARD) && !chip->sd_io)
 535                         clear_bit(SD_NR, &chip->need_release);
 536                 if (!(chip->card_exist & XD_CARD))
 537                         clear_bit(XD_NR, &chip->need_release);
 538                 if (!(chip->card_exist & MS_CARD))
 539                         clear_bit(MS_NR, &chip->need_release);
 540
 541                 dev_dbg(rtsx_dev(chip), "chip->need_release = 0x%x\n",
 542                         (unsigned int)(chip->need_release));
 543
 544 #ifdef SUPPORT_OCP
 545                 if (chip->need_release) {
 546                         if (chip->ocp_stat & (CARD_OC_NOW | CARD_OC_EVER))
 547                                 rtsx_write_register(chip, OCPCLR,
 548                                                     CARD_OC_INT_CLR |
 549                                                     CARD_OC_CLR,
 550                                                     CARD_OC_INT_CLR |
 551                                                     CARD_OC_CLR);
 552                         chip->ocp_stat = 0;
 553                 }
 554 #endif
 555                 if (chip->need_release) {
 556                         rtsx_set_stat(chip, RTSX_STAT_RUN);
 557                         rtsx_force_power_on(chip, SSC_PDCTL | OC_PDCTL);
 558                 }
 559
 560                 if (chip->need_release & SD_CARD) {
 561                         clear_bit(SD_NR, &chip->need_release);
 562                         chip->card_exist &= ~SD_CARD;
 563                         chip->card_ejected &= ~SD_CARD;
 564                         chip->card_fail &= ~SD_CARD;
 565                         CLR_BIT(chip->lun_mc, chip->card2lun[SD_CARD]);
 566                         chip->rw_fail_cnt[chip->card2lun[SD_CARD]] = 0;
 567                         rtsx_write_register(chip, RBCTL, RB_FLUSH, RB_FLUSH);
 568
 569                         release_sdio(chip);
 570                         release_sd_card(chip);
 571                 }
 572
 573                 if (chip->need_release & XD_CARD) {
 574                         clear_bit(XD_NR, &chip->need_release);
 575                         chip->card_exist &= ~XD_CARD;
 576                         chip->card_ejected &= ~XD_CARD;
 577                         chip->card_fail &= ~XD_CARD;
 578                         CLR_BIT(chip->lun_mc, chip->card2lun[XD_CARD]);
 579                         chip->rw_fail_cnt[chip->card2lun[XD_CARD]] = 0;
 580
 581                         release_xd_card(chip);
 582
 583                         if (CHECK_PID(chip, 0x5288) &&
 584                             CHECK_BARO_PKG(chip, QFN))
 585                                 rtsx_write_register(chip, HOST_SLEEP_STATE,
 586                                                     0xC0, 0xC0);
 587                 }
 588
 589                 if (chip->need_release & MS_CARD) {
 590                         clear_bit(MS_NR, &chip->need_release);
 591                         chip->card_exist &= ~MS_CARD;
 592                         chip->card_ejected &= ~MS_CARD;
 593                         chip->card_fail &= ~MS_CARD;
 594                         CLR_BIT(chip->lun_mc, chip->card2lun[MS_CARD]);
 595                         chip->rw_fail_cnt[chip->card2lun[MS_CARD]] = 0;
 596
 597                         release_ms_card(chip);
 598                 }
 599
 600                 dev_dbg(rtsx_dev(chip), "chip->card_exist = 0x%x\n",
 601                         chip->card_exist);
 602
 603                 if (!chip->card_exist)
 604                         turn_off_led(chip, LED_GPIO);
 605         }
 606
 607         if (chip->need_reset) {
 608                 dev_dbg(rtsx_dev(chip), "chip->need_reset = 0x%x\n",
 609                         (unsigned int)(chip->need_reset));
 610
 611                 rtsx_reset_cards(chip);
 612         }
 613
 614         if (chip->need_reinit) {
 615                 dev_dbg(rtsx_dev(chip), "chip->need_reinit = 0x%x\n",
 616                         (unsigned int)(chip->need_reinit));
 617
 618                 rtsx_reinit_cards(chip, 0);
 619         }
 620 }
 621
 622 int switch_ssc_clock(struct rtsx_chip *chip, int clk)
 623 {
 624         int retval;
 625         u8 n = (u8)(clk - 2), min_n, max_n;
 626         u8 mcu_cnt, div, max_div, ssc_depth, ssc_depth_mask;
 627         int sd_vpclk_phase_reset = 0;
 628
 629         if (chip->cur_clk == clk)
 630                 return STATUS_SUCCESS;
 631
 632         min_n = 60;
 633         max_n = 120;
 634         max_div = CLK_DIV_4;
 635
 636         dev_dbg(rtsx_dev(chip), "Switch SSC clock to %dMHz (cur_clk = %d)\n",
 637                 clk, chip->cur_clk);
 638
 639         if ((clk <= 2) || (n > max_n))
 640                 return STATUS_FAIL;
 641
 642         mcu_cnt = (u8)(125 / clk + 3);
 643         if (mcu_cnt > 7)
 644                 mcu_cnt = 7;
 645
 646         div = CLK_DIV_1;
 647         while ((n < min_n) && (div < max_div)) {
 648                 n = (n + 2) * 2 - 2;
 649                 div++;
 650         }
 651         dev_dbg(rtsx_dev(chip), "n = %d, div = %d\n", n, div);
 652
 653         if (chip->ssc_en) {
 654                 ssc_depth = 0x01;
 655                 n -= 2;
 656         } else {
 657                 ssc_depth = 0;
 658         }
 659
 660         ssc_depth_mask = 0x03;
 661
 662         dev_dbg(rtsx_dev(chip), "ssc_depth = %d\n", ssc_depth);
 663
 664         rtsx_init_cmd(chip);
 665         rtsx_add_cmd(chip, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ);
 666         rtsx_add_cmd(chip, WRITE_REG_CMD, CLK_DIV, 0xFF, (div << 4) | mcu_cnt);
 667         rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0);
 668         rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL2, ssc_depth_mask, ssc_depth);
 669         rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, n);
 670         rtsx_add_cmd(chip, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB);
 671         if (sd_vpclk_phase_reset) {
 672                 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL,
 673                              PHASE_NOT_RESET, 0);
 674                 rtsx_add_cmd(chip, WRITE_REG_CMD, SD_VPCLK0_CTL,
 675                              PHASE_NOT_RESET, PHASE_NOT_RESET);
 676         }
 677
 678         retval = rtsx_send_cmd(chip, 0, WAIT_TIME);
 679         if (retval < 0)
 680                 return STATUS_ERROR;
 681
 682         udelay(10);
 683         retval = rtsx_write_register(chip, CLK_CTL, CLK_LOW_FREQ, 0);
 684         if (retval)
 685                 return retval;
 686
 687         chip->cur_clk = clk;
 688
 689         return STATUS_SUCCESS;
 690 }
 691
 692 int switch_normal_clock(struct rtsx_chip *chip, int clk)
 693 {
 694         int retval;
 695         u8 sel, div, mcu_cnt;
 696         int sd_vpclk_phase_reset = 0;
 697
 698         if (chip->cur_clk == clk)
 699                 return STATUS_SUCCESS;
 700
 701         switch (clk) {
 702         case CLK_20:
 703                 dev_dbg(rtsx_dev(chip), "Switch clock to 20MHz\n");
 704                 sel = SSC_80;
 705                 div = CLK_DIV_4;
 706                 mcu_cnt = 7;
 707                 break;
 708
 709         case CLK_30:
 710                 dev_dbg(rtsx_dev(chip), "Switch clock to 30MHz\n");
 711                 sel = SSC_120;
 712                 div = CLK_DIV_4;
 713                 mcu_cnt = 7;
 714                 break;
 715
 716         case CLK_40:
 717                 dev_dbg(rtsx_dev(chip), "Switch clock to 40MHz\n");
 718                 sel = SSC_80;
 719                 div = CLK_DIV_2;
 720                 mcu_cnt = 7;
 721                 break;
 722
 723         case CLK_50:
 724                 dev_dbg(rtsx_dev(chip), "Switch clock to 50MHz\n");
 725                 sel = SSC_100;
 726                 div = CLK_DIV_2;
 727                 mcu_cnt = 6;
 728                 break;
 729
 730         case CLK_60:
 731                 dev_dbg(rtsx_dev(chip), "Switch clock to 60MHz\n");
 732                 sel = SSC_120;
 733                 div = CLK_DIV_2;
 734                 mcu_cnt = 6;
 735                 break;
 736
 737         case CLK_80:
 738                 dev_dbg(rtsx_dev(chip), "Switch clock to 80MHz\n");
 739                 sel = SSC_80;
 740                 div = CLK_DIV_1;
 741                 mcu_cnt = 5;
 742                 break;
 743
 744         case CLK_100:
 745                 dev_dbg(rtsx_dev(chip), "Switch clock to 100MHz\n");
 746                 sel = SSC_100;
 747                 div = CLK_DIV_1;
 748                 mcu_cnt = 5;
 749                 break;
 750
 751         case CLK_120:
 752                 dev_dbg(rtsx_dev(chip), "Switch clock to 120MHz\n");
 753                 sel = SSC_120;
 754                 div = CLK_DIV_1;
 755                 mcu_cnt = 5;
 756                 break;
 757
 758         case CLK_150:
 759                 dev_dbg(rtsx_dev(chip), "Switch clock to 150MHz\n");
 760                 sel = SSC_150;
 761                 div = CLK_DIV_1;
 762                 mcu_cnt = 4;
 763                 break;
 764
 765         case CLK_200:
 766                 dev_dbg(rtsx_dev(chip), "Switch clock to 200MHz\n");
 767                 sel = SSC_200;
 768                 div = CLK_DIV_1;
 769                 mcu_cnt = 4;
 770                 break;
 771
 772         default:
 773                 dev_dbg(rtsx_dev(chip), "Try to switch to an illegal clock (%d)\n",
 774                         clk);
 775                 return STATUS_FAIL;
 776         }
 777
 778         retval = rtsx_write_register(chip, CLK_CTL, 0xFF, CLK_LOW_FREQ);
 779         if (retval)
 780                 return retval;
 781         if (sd_vpclk_phase_reset) {
 782                 retval = rtsx_write_register(chip, SD_VPCLK0_CTL,
 783                                              PHASE_NOT_RESET, 0);
 784                 if (retval)
 785                         return retval;
 786                 retval = rtsx_write_register(chip, SD_VPCLK1_CTL,
 787                                              PHASE_NOT_RESET, 0);
 788                 if (retval)
 789                         return retval;
 790         }
 791         retval = rtsx_write_register(chip, CLK_DIV, 0xFF,
 792                                      (div << 4) | mcu_cnt);
 793         if (retval)
 794                 return retval;
 795         retval = rtsx_write_register(chip, CLK_SEL, 0xFF, sel);
 796         if (retval)
 797                 return retval;
 798
 799         if (sd_vpclk_phase_reset) {
 800                 udelay(200);
 801                 retval = rtsx_write_register(chip, SD_VPCLK0_CTL,
 802                                              PHASE_NOT_RESET, PHASE_NOT_RESET);
 803                 if (retval)
 804                         return retval;
 805                 retval = rtsx_write_register(chip, SD_VPCLK1_CTL,
 806                                              PHASE_NOT_RESET, PHASE_NOT_RESET);
 807                 if (retval)
 808                         return retval;
 809                 udelay(200);
 810         }
 811         retval = rtsx_write_register(chip, CLK_CTL, 0xFF, 0);
 812         if (retval)
 813                 return retval;
 814
 815         chip->cur_clk = clk;
 816
 817         return STATUS_SUCCESS;
 818 }
 819
 820 void trans_dma_enable(enum dma_data_direction dir, struct rtsx_chip *chip,
 821                       u32 byte_cnt, u8 pack_size)
 822 {
 823         if (pack_size > DMA_1024)
 824                 pack_size = DMA_512;
 825
 826         rtsx_add_cmd(chip, WRITE_REG_CMD, IRQSTAT0, DMA_DONE_INT, DMA_DONE_INT);
 827
 828         rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC3, 0xFF, (u8)(byte_cnt >> 24));
 829         rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC2, 0xFF, (u8)(byte_cnt >> 16));
 830         rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC1, 0xFF, (u8)(byte_cnt >> 8));
 831         rtsx_add_cmd(chip, WRITE_REG_CMD, DMATC0, 0xFF, (u8)byte_cnt);
 832
 833         if (dir == DMA_FROM_DEVICE) {
 834                 rtsx_add_cmd(chip, WRITE_REG_CMD, DMACTL,
 835                              0x03 | DMA_PACK_SIZE_MASK,
 836                              DMA_DIR_FROM_CARD | DMA_EN | pack_size);
 837         } else {
 838                 rtsx_add_cmd(chip, WRITE_REG_CMD, DMACTL,
 839                              0x03 | DMA_PACK_SIZE_MASK,
 840                              DMA_DIR_TO_CARD | DMA_EN | pack_size);
 841         }
 842
 843         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_DATA_SOURCE, 0x01, RING_BUFFER);
 844 }
 845
 846 int enable_card_clock(struct rtsx_chip *chip, u8 card)
 847 {
 848         int retval;
 849         u8 clk_en = 0;
 850
 851         if (card & XD_CARD)
 852                 clk_en |= XD_CLK_EN;
 853         if (card & SD_CARD)
 854                 clk_en |= SD_CLK_EN;
 855         if (card & MS_CARD)
 856                 clk_en |= MS_CLK_EN;
 857
 858         retval = rtsx_write_register(chip, CARD_CLK_EN, clk_en, clk_en);
 859         if (retval)
 860                 return retval;
 861
 862         return STATUS_SUCCESS;
 863 }
 864
 865 int disable_card_clock(struct rtsx_chip *chip, u8 card)
 866 {
 867         int retval;
 868         u8 clk_en = 0;
 869
 870         if (card & XD_CARD)
 871                 clk_en |= XD_CLK_EN;
 872         if (card & SD_CARD)
 873                 clk_en |= SD_CLK_EN;
 874         if (card & MS_CARD)
 875                 clk_en |= MS_CLK_EN;
 876
 877         retval = rtsx_write_register(chip, CARD_CLK_EN, clk_en, 0);
 878         if (retval)
 879                 return retval;
 880
 881         return STATUS_SUCCESS;
 882 }
 883
 884 int card_power_on(struct rtsx_chip *chip, u8 card)
 885 {
 886         int retval;
 887         u8 mask, val1, val2;
 888
 889         if (CHECK_LUN_MODE(chip, SD_MS_2LUN) && (card == MS_CARD)) {
 890                 mask = MS_POWER_MASK;
 891                 val1 = MS_PARTIAL_POWER_ON;
 892                 val2 = MS_POWER_ON;
 893         } else {
 894                 mask = SD_POWER_MASK;
 895                 val1 = SD_PARTIAL_POWER_ON;
 896                 val2 = SD_POWER_ON;
 897         }
 898
 899         rtsx_init_cmd(chip);
 900         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, mask, val1);
 901
 902         retval = rtsx_send_cmd(chip, 0, 100);
 903         if (retval != STATUS_SUCCESS)
 904                 return STATUS_FAIL;
 905
 906         udelay(chip->pmos_pwr_on_interval);
 907
 908         rtsx_init_cmd(chip);
 909         rtsx_add_cmd(chip, WRITE_REG_CMD, CARD_PWR_CTL, mask, val2);
 910
 911         retval = rtsx_send_cmd(chip, 0, 100);
 912         if (retval != STATUS_SUCCESS)
 913                 return STATUS_FAIL;
 914
 915         return STATUS_SUCCESS;
 916 }
 917
 918 int card_power_off(struct rtsx_chip *chip, u8 card)
 919 {
 920         int retval;
 921         u8 mask, val;
 922
 923         if (CHECK_LUN_MODE(chip, SD_MS_2LUN) && (card == MS_CARD)) {
 924                 mask = MS_POWER_MASK;
 925                 val = MS_POWER_OFF;
 926         } else {
 927                 mask = SD_POWER_MASK;
 928                 val = SD_POWER_OFF;
 929         }
 930
 931         retval = rtsx_write_register(chip, CARD_PWR_CTL, mask, val);
 932         if (retval)
 933                 return retval;
 934
 935         return STATUS_SUCCESS;
 936 }
 937
 938 int card_rw(struct scsi_cmnd *srb, struct rtsx_chip *chip,
 939             u32 sec_addr, u16 sec_cnt)
 940 {
 941         int retval;
 942         unsigned int lun = SCSI_LUN(srb);
 943         int i;
 944
 945         if (!chip->rw_card[lun])
 946                 return STATUS_FAIL;
 947
 948         for (i = 0; i < 3; i++) {
 949                 chip->rw_need_retry = 0;
 950
 951                 retval = chip->rw_card[lun](srb, chip, sec_addr, sec_cnt);
 952                 if (retval != STATUS_SUCCESS) {
 953                         if (rtsx_check_chip_exist(chip) != STATUS_SUCCESS) {
 954                                 rtsx_release_chip(chip);
 955                                 return STATUS_FAIL;
 956                         }
 957                         if (detect_card_cd(chip, chip->cur_card) !=
 958                                                         STATUS_SUCCESS) {
 959                                 return STATUS_FAIL;
 960                         }
 961
 962                         if (!chip->rw_need_retry) {
 963                                 dev_dbg(rtsx_dev(chip), "RW fail, but no need to retry\n");
 964                                 break;
 965                         }
 966                 } else {
 967                         chip->rw_need_retry = 0;
 968                         break;
 969                 }
 970
 971                 dev_dbg(rtsx_dev(chip), "Retry RW, (i = %d)\n", i);
 972         }
 973
 974         return retval;
 975 }
 976
 977 int card_share_mode(struct rtsx_chip *chip, int card)
 978 {
 979         int retval;
 980         u8 mask, value;
 981
 982         if (CHECK_PID(chip, 0x5208)) {
 983                 mask = CARD_SHARE_MASK;
 984                 if (card == SD_CARD)
 985                         value = CARD_SHARE_48_SD;
 986                 else if (card == MS_CARD)
 987                         value = CARD_SHARE_48_MS;
 988                 else if (card == XD_CARD)
 989                         value = CARD_SHARE_48_XD;
 990                 else
 991                         return STATUS_FAIL;
 992
 993         } else if (CHECK_PID(chip, 0x5288)) {
 994                 mask = 0x03;
 995                 if (card == SD_CARD)
 996                         value = CARD_SHARE_BAROSSA_SD;
 997                 else if (card == MS_CARD)
 998                         value = CARD_SHARE_BAROSSA_MS;
 999                 else if (card == XD_CARD)
1000                         value = CARD_SHARE_BAROSSA_XD;
1001                 else
1002                         return STATUS_FAIL;
1003
1004         } else {
1005                 return STATUS_FAIL;
1006         }
1007
1008         retval = rtsx_write_register(chip, CARD_SHARE_MODE, mask, value);
1009         if (retval)
1010                 return retval;
1011
1012         return STATUS_SUCCESS;
1013 }
1014
1015 int select_card(struct rtsx_chip *chip, int card)
1016 {
1017         int retval;
1018
1019         if (chip->cur_card != card) {
1020                 u8 mod;
1021
1022                 if (card == SD_CARD)
1023                         mod = SD_MOD_SEL;
1024                 else if (card == MS_CARD)
1025                         mod = MS_MOD_SEL;
1026                 else if (card == XD_CARD)
1027                         mod = XD_MOD_SEL;
1028                 else if (card == SPI_CARD)
1029                         mod = SPI_MOD_SEL;
1030                 else
1031                         return STATUS_FAIL;
1032
1033                 retval = rtsx_write_register(chip, CARD_SELECT, 0x07, mod);
1034                 if (retval)
1035                         return retval;
1036                 chip->cur_card = card;
1037
1038                 retval =  card_share_mode(chip, card);
1039                 if (retval != STATUS_SUCCESS)
1040                         return STATUS_FAIL;
1041         }
1042
1043         return STATUS_SUCCESS;
1044 }
1045
1046 void toggle_gpio(struct rtsx_chip *chip, u8 gpio)
1047 {
1048         u8 temp_reg;
1049
1050         rtsx_read_register(chip, CARD_GPIO, &temp_reg);
1051         temp_reg ^= (0x01 << gpio);
1052         rtsx_write_register(chip, CARD_GPIO, 0xFF, temp_reg);
1053 }
1054
1055 void turn_on_led(struct rtsx_chip *chip, u8 gpio)
1056 {
1057         if (CHECK_PID(chip, 0x5288))
1058                 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio),
1059                                     (u8)(1 << gpio));
1060         else
1061                 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio), 0);
1062 }
1063
1064 void turn_off_led(struct rtsx_chip *chip, u8 gpio)
1065 {
1066         if (CHECK_PID(chip, 0x5288))
1067                 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio), 0);
1068         else
1069                 rtsx_write_register(chip, CARD_GPIO, (u8)(1 << gpio),
1070                                     (u8)(1 << gpio));
1071 }
1072
1073 int detect_card_cd(struct rtsx_chip *chip, int card)
1074 {
1075         u32 card_cd, status;
1076
1077         if (card == SD_CARD) {
1078                 card_cd = SD_EXIST;
1079         } else if (card == MS_CARD) {
1080                 card_cd = MS_EXIST;
1081         } else if (card == XD_CARD) {
1082                 card_cd = XD_EXIST;
1083         } else {
1084                 dev_dbg(rtsx_dev(chip), "Wrong card type: 0x%x\n", card);
1085                 return STATUS_FAIL;
1086         }
1087
1088         status = rtsx_readl(chip, RTSX_BIPR);
1089         if (!(status & card_cd))
1090                 return STATUS_FAIL;
1091
1092         return STATUS_SUCCESS;
1093 }
1094
1095 int check_card_exist(struct rtsx_chip *chip, unsigned int lun)
1096 {
1097         if (chip->card_exist & chip->lun2card[lun])
1098                 return 1;
1099
1100         return 0;
1101 }
1102
1103 int check_card_ready(struct rtsx_chip *chip, unsigned int lun)
1104 {
1105         if (chip->card_ready & chip->lun2card[lun])
1106                 return 1;
1107
1108         return 0;
1109 }
1110
1111 int check_card_wp(struct rtsx_chip *chip, unsigned int lun)
1112 {
1113         if (chip->card_wp & chip->lun2card[lun])
1114                 return 1;
1115
1116         return 0;
1117 }
1118
1119 u8 get_lun_card(struct rtsx_chip *chip, unsigned int lun)
1120 {
1121         if ((chip->card_ready & chip->lun2card[lun]) == XD_CARD)
1122                 return (u8)XD_CARD;
1123         else if ((chip->card_ready & chip->lun2card[lun]) == SD_CARD)
1124                 return (u8)SD_CARD;
1125         else if ((chip->card_ready & chip->lun2card[lun]) == MS_CARD)
1126                 return (u8)MS_CARD;
1127
1128         return 0;
1129 }
1130
1131 void eject_card(struct rtsx_chip *chip, unsigned int lun)
1132 {
1133         do_remaining_work(chip);
1134
1135         if ((chip->card_ready & chip->lun2card[lun]) == SD_CARD) {
1136                 release_sd_card(chip);
1137                 chip->card_ejected |= SD_CARD;
1138                 chip->card_ready &= ~SD_CARD;
1139                 chip->capacity[lun] = 0;
1140         } else if ((chip->card_ready & chip->lun2card[lun]) == XD_CARD) {
1141                 release_xd_card(chip);
1142                 chip->card_ejected |= XD_CARD;
1143                 chip->card_ready &= ~XD_CARD;
1144                 chip->capacity[lun] = 0;
1145         } else if ((chip->card_ready & chip->lun2card[lun]) == MS_CARD) {
1146                 release_ms_card(chip);
1147                 chip->card_ejected |= MS_CARD;
1148                 chip->card_ready &= ~MS_CARD;
1149                 chip->capacity[lun] = 0;
1150         }
1151 }