drivers/staging/rtlwifi/phydm/phydm_rainfo.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2007 - 2016  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * The full GNU General Public License is included in this distribution in the
  15  * file called LICENSE.
  16  *
  17  * Contact Information:
  18  * wlanfae <wlanfae@realtek.com>
  19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20  * Hsinchu 300, Taiwan.
  21  *
  22  * Larry Finger <Larry.Finger@lwfinger.net>
  23  *
  24  *****************************************************************************/
  25
  26 /* ************************************************************
  27  * include files
  28  * *************************************************************/
  29 #include "mp_precomp.h"
  30 #include "phydm_precomp.h"
  31
  32 void phydm_h2C_debug(void *dm_void, u32 *const dm_value, u32 *_used,
  33                      char *output, u32 *_out_len)
  34 {
  35         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
  36         u8 h2c_parameter[H2C_MAX_LENGTH] = {0};
  37         u8 phydm_h2c_id = (u8)dm_value[0];
  38         u8 i;
  39         u32 used = *_used;
  40         u32 out_len = *_out_len;
  41
  42         PHYDM_SNPRINTF(output + used, out_len - used,
  43                        "Phydm Send H2C_ID (( 0x%x))\n", phydm_h2c_id);
  44         for (i = 0; i < H2C_MAX_LENGTH; i++) {
  45                 h2c_parameter[i] = (u8)dm_value[i + 1];
  46                 PHYDM_SNPRINTF(output + used, out_len - used,
  47                                "H2C: Byte[%d] = ((0x%x))\n", i,
  48                                h2c_parameter[i]);
  49         }
  50
  51         odm_fill_h2c_cmd(dm, phydm_h2c_id, H2C_MAX_LENGTH, h2c_parameter);
  52 }
  53
  54 void phydm_RA_debug_PCR(void *dm_void, u32 *const dm_value, u32 *_used,
  55                         char *output, u32 *_out_len)
  56 {
  57         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
  58         struct ra_table *ra_tab = &dm->dm_ra_table;
  59         u32 used = *_used;
  60         u32 out_len = *_out_len;
  61
  62         if (dm_value[0] == 100) {
  63                 PHYDM_SNPRINTF(
  64                         output + used, out_len - used,
  65                         "[Get] PCR RA_threshold_offset = (( %s%d ))\n",
  66                         ((ra_tab->RA_threshold_offset == 0) ?
  67                                  " " :
  68                                  ((ra_tab->RA_offset_direction) ? "+" : "-")),
  69                         ra_tab->RA_threshold_offset);
  70                 /**/
  71         } else if (dm_value[0] == 0) {
  72                 ra_tab->RA_offset_direction = 0;
  73                 ra_tab->RA_threshold_offset = (u8)dm_value[1];
  74                 PHYDM_SNPRINTF(output + used, out_len - used,
  75                                "[Set] PCR RA_threshold_offset = (( -%d ))\n",
  76                                ra_tab->RA_threshold_offset);
  77         } else if (dm_value[0] == 1) {
  78                 ra_tab->RA_offset_direction = 1;
  79                 ra_tab->RA_threshold_offset = (u8)dm_value[1];
  80                 PHYDM_SNPRINTF(output + used, out_len - used,
  81                                "[Set] PCR RA_threshold_offset = (( +%d ))\n",
  82                                ra_tab->RA_threshold_offset);
  83         } else {
  84                 PHYDM_SNPRINTF(output + used, out_len - used, "[Set] Error\n");
  85                 /**/
  86         }
  87 }
  88
  89 void odm_c2h_ra_para_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len)
  90 {
  91         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
  92
  93         u8 para_idx = cmd_buf[0]; /*Retry Penalty, NH, NL*/
  94         u8 i;
  95
  96         ODM_RT_TRACE(dm, PHYDM_COMP_RA_DBG,
  97                      "[ From FW C2H RA Para ]  cmd_buf[0]= (( %d ))\n",
  98                      cmd_buf[0]);
  99
 100         if (para_idx == RADBG_DEBUG_MONITOR1) {
 101                 ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE,
 102                              "-------------------------------\n");
 103                 if (dm->support_ic_type & PHYDM_IC_3081_SERIES) {
 104                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  %d\n",
 105                                      "RSSI =", cmd_buf[1]);
 106                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  0x%x\n",
 107                                      "rate =", cmd_buf[2] & 0x7f);
 108                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  %d\n",
 109                                      "SGI =", (cmd_buf[2] & 0x80) >> 7);
 110                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  %d\n",
 111                                      "BW =", cmd_buf[3]);
 112                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  %d\n",
 113                                      "BW_max =", cmd_buf[4]);
 114                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  0x%x\n",
 115                                      "multi_rate0 =", cmd_buf[5]);
 116                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  0x%x\n",
 117                                      "multi_rate1 =", cmd_buf[6]);
 118                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  %d\n",
 119                                      "DISRA =", cmd_buf[7]);
 120                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  %d\n",
 121                                      "VHT_EN =", cmd_buf[8]);
 122                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  %d\n",
 123                                      "SGI_support =", cmd_buf[9]);
 124                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  %d\n",
 125                                      "try_ness =", cmd_buf[10]);
 126                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  0x%x\n",
 127                                      "pre_rate =", cmd_buf[11]);
 128                 } else {
 129                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  %d\n",
 130                                      "RSSI =", cmd_buf[1]);
 131                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  %x\n",
 132                                      "BW =", cmd_buf[2]);
 133                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  %d\n",
 134                                      "DISRA =", cmd_buf[3]);
 135                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  %d\n",
 136                                      "VHT_EN =", cmd_buf[4]);
 137                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  %d\n",
 138                                      "Hightest rate =", cmd_buf[5]);
 139                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  0x%x\n",
 140                                      "Lowest rate =", cmd_buf[6]);
 141                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  0x%x\n",
 142                                      "SGI_support =", cmd_buf[7]);
 143                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  %d\n",
 144                                      "Rate_ID =", cmd_buf[8]);
 145                         ;
 146                 }
 147                 ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE,
 148                              "-------------------------------\n");
 149         } else if (para_idx == RADBG_DEBUG_MONITOR2) {
 150                 ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE,
 151                              "-------------------------------\n");
 152                 if (dm->support_ic_type & PHYDM_IC_3081_SERIES) {
 153                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  %d\n",
 154                                      "rate_id =", cmd_buf[1]);
 155                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  0x%x\n",
 156                                      "highest_rate =", cmd_buf[2]);
 157                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  0x%x\n",
 158                                      "lowest_rate =", cmd_buf[3]);
 159
 160                         for (i = 4; i <= 11; i++)
 161                                 ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE,
 162                                              "RAMASK =  0x%x\n", cmd_buf[i]);
 163                 } else {
 164                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE,
 165                                      "%5s  %x%x  %x%x  %x%x  %x%x\n",
 166                                      "RA Mask:", cmd_buf[8], cmd_buf[7],
 167                                      cmd_buf[6], cmd_buf[5], cmd_buf[4],
 168                                      cmd_buf[3], cmd_buf[2], cmd_buf[1]);
 169                 }
 170                 ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE,
 171                              "-------------------------------\n");
 172         } else if (para_idx == RADBG_DEBUG_MONITOR3) {
 173                 for (i = 0; i < (cmd_len - 1); i++)
 174                         ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE,
 175                                      "content[%d] = %d\n", i, cmd_buf[1 + i]);
 176         } else if (para_idx == RADBG_DEBUG_MONITOR4) {
 177                 ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  {%d.%d}\n",
 178                              "RA version =", cmd_buf[1], cmd_buf[2]);
 179         } else if (para_idx == RADBG_DEBUG_MONITOR5) {
 180                 ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  0x%x\n",
 181                              "Current rate =", cmd_buf[1]);
 182                 ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  %d\n",
 183                              "Retry ratio =", cmd_buf[2]);
 184                 ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  %d\n",
 185                              "rate down ratio =", cmd_buf[3]);
 186                 ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  0x%x\n",
 187                              "highest rate =", cmd_buf[4]);
 188                 ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  {0x%x 0x%x}\n",
 189                              "Muti-try =", cmd_buf[5], cmd_buf[6]);
 190                 ODM_RT_TRACE(dm, ODM_FW_DEBUG_TRACE, "%5s  0x%x%x%x%x%x\n",
 191                              "RA mask =", cmd_buf[11], cmd_buf[10], cmd_buf[9],
 192                              cmd_buf[8], cmd_buf[7]);
 193         }
 194 }
 195
 196 void phydm_ra_dynamic_retry_count(void *dm_void)
 197 {
 198         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
 199
 200         if (!(dm->support_ability & ODM_BB_DYNAMIC_ARFR))
 201                 return;
 202
 203         if (dm->pre_b_noisy != dm->noisy_decision) {
 204                 if (dm->noisy_decision) {
 205                         ODM_RT_TRACE(dm, ODM_COMP_RATE_ADAPTIVE,
 206                                      "->Noisy Env. RA fallback value\n");
 207                         odm_set_mac_reg(dm, 0x430, MASKDWORD, 0x0);
 208                         odm_set_mac_reg(dm, 0x434, MASKDWORD, 0x04030201);
 209                 } else {
 210                         ODM_RT_TRACE(dm, ODM_COMP_RATE_ADAPTIVE,
 211                                      "->Clean Env. RA fallback value\n");
 212                         odm_set_mac_reg(dm, 0x430, MASKDWORD, 0x01000000);
 213                         odm_set_mac_reg(dm, 0x434, MASKDWORD, 0x06050402);
 214                 }
 215                 dm->pre_b_noisy = dm->noisy_decision;
 216         }
 217 }
 218
 219 void phydm_ra_dynamic_retry_limit(void *dm_void) {}
 220
 221 void phydm_print_rate(void *dm_void, u8 rate, u32 dbg_component)
 222 {
 223         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
 224         u8 legacy_table[12] = {1, 2, 5, 11, 6, 9, 12, 18, 24, 36, 48, 54};
 225         u8 rate_idx = rate & 0x7f; /*remove bit7 SGI*/
 226         u8 vht_en = (rate_idx >= ODM_RATEVHTSS1MCS0) ? 1 : 0;
 227         u8 b_sgi = (rate & 0x80) >> 7;
 228
 229         ODM_RT_TRACE(dm, dbg_component, "( %s%s%s%s%d%s%s)\n",
 230                      ((rate_idx >= ODM_RATEVHTSS1MCS0) &&
 231                       (rate_idx <= ODM_RATEVHTSS1MCS9)) ?
 232                              "VHT 1ss  " :
 233                              "",
 234                      ((rate_idx >= ODM_RATEVHTSS2MCS0) &&
 235                       (rate_idx <= ODM_RATEVHTSS2MCS9)) ?
 236                              "VHT 2ss " :
 237                              "",
 238                      ((rate_idx >= ODM_RATEVHTSS3MCS0) &&
 239                       (rate_idx <= ODM_RATEVHTSS3MCS9)) ?
 240                              "VHT 3ss " :
 241                              "",
 242                      (rate_idx >= ODM_RATEMCS0) ? "MCS " : "",
 243                      (vht_en) ? ((rate_idx - ODM_RATEVHTSS1MCS0) % 10) :
 244                                 ((rate_idx >= ODM_RATEMCS0) ?
 245                                          (rate_idx - ODM_RATEMCS0) :
 246                                          ((rate_idx <= ODM_RATE54M) ?
 247                                                   legacy_table[rate_idx] :
 248                                                   0)),
 249                      (b_sgi) ? "-S" : "  ",
 250                      (rate_idx >= ODM_RATEMCS0) ? "" : "M");
 251 }
 252
 253 void phydm_c2h_ra_report_handler(void *dm_void, u8 *cmd_buf, u8 cmd_len)
 254 {
 255         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
 256         struct ra_table *ra_tab = &dm->dm_ra_table;
 257         u8 macid = cmd_buf[1];
 258         u8 rate = cmd_buf[0];
 259         u8 rate_idx = rate & 0x7f; /*remove bit7 SGI*/
 260         u8 rate_order;
 261
 262         if (cmd_len >= 4) {
 263                 if (cmd_buf[3] == 0) {
 264                         ODM_RT_TRACE(dm, ODM_COMP_RATE_ADAPTIVE,
 265                                      "TX Init-rate Update[%d]:", macid);
 266                         /**/
 267                 } else if (cmd_buf[3] == 0xff) {
 268                         ODM_RT_TRACE(dm, ODM_COMP_RATE_ADAPTIVE,
 269                                      "FW Level: Fix rate[%d]:", macid);
 270                         /**/
 271                 } else if (cmd_buf[3] == 1) {
 272                         ODM_RT_TRACE(dm, ODM_COMP_RATE_ADAPTIVE,
 273                                      "Try Success[%d]:", macid);
 274                         /**/
 275                 } else if (cmd_buf[3] == 2) {
 276                         ODM_RT_TRACE(dm, ODM_COMP_RATE_ADAPTIVE,
 277                                      "Try Fail & Try Again[%d]:", macid);
 278                         /**/
 279                 } else if (cmd_buf[3] == 3) {
 280                         ODM_RT_TRACE(dm, ODM_COMP_RATE_ADAPTIVE,
 281                                      "rate Back[%d]:", macid);
 282                         /**/
 283                 } else if (cmd_buf[3] == 4) {
 284                         ODM_RT_TRACE(dm, ODM_COMP_RATE_ADAPTIVE,
 285                                      "start rate by RSSI[%d]:", macid);
 286                         /**/
 287                 } else if (cmd_buf[3] == 5) {
 288                         ODM_RT_TRACE(dm, ODM_COMP_RATE_ADAPTIVE,
 289                                      "Try rate[%d]:", macid);
 290                         /**/
 291                 }
 292         } else {
 293                 ODM_RT_TRACE(dm, ODM_COMP_RATE_ADAPTIVE, "Tx rate Update[%d]:",
 294                              macid);
 295                 /**/
 296         }
 297
 298         phydm_print_rate(dm, rate, ODM_COMP_RATE_ADAPTIVE);
 299
 300         ra_tab->link_tx_rate[macid] = rate;
 301
 302         /*trigger power training*/
 303
 304         rate_order = phydm_rate_order_compute(dm, rate_idx);
 305
 306         if ((dm->is_one_entry_only) ||
 307             ((rate_order > ra_tab->highest_client_tx_order) &&
 308              (ra_tab->power_tracking_flag == 1))) {
 309                 phydm_update_pwr_track(dm, rate_idx);
 310                 ra_tab->power_tracking_flag = 0;
 311         }
 312
 313         /*trigger dynamic rate ID*/
 314 }
 315
 316 void odm_rssi_monitor_init(void *dm_void)
 317 {
 318         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
 319         struct ra_table *ra_tab = &dm->dm_ra_table;
 320
 321         ra_tab->firstconnect = false;
 322 }
 323
 324 void odm_ra_post_action_on_assoc(void *dm_void) {}
 325
 326 void phydm_init_ra_info(void *dm_void)
 327 {
 328         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
 329
 330         if (dm->support_ic_type == ODM_RTL8822B) {
 331                 u32 ret_value;
 332
 333                 ret_value = odm_get_bb_reg(dm, 0x4c8, MASKBYTE2);
 334                 odm_set_bb_reg(dm, 0x4cc, MASKBYTE3, (ret_value - 1));
 335         }
 336 }
 337
 338 void phydm_modify_RA_PCR_threshold(void *dm_void, u8 RA_offset_direction,
 339                                    u8 RA_threshold_offset
 340
 341                                    )
 342 {
 343         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
 344         struct ra_table *ra_tab = &dm->dm_ra_table;
 345
 346         ra_tab->RA_offset_direction = RA_offset_direction;
 347         ra_tab->RA_threshold_offset = RA_threshold_offset;
 348         ODM_RT_TRACE(dm, ODM_COMP_RA_MASK,
 349                      "Set RA_threshold_offset = (( %s%d ))\n",
 350                      ((RA_threshold_offset == 0) ?
 351                               " " :
 352                               ((RA_offset_direction) ? "+" : "-")),
 353                      RA_threshold_offset);
 354 }
 355
 356 static void odm_rssi_monitor_check_mp(void *dm_void) {}
 357
 358 static void odm_rssi_monitor_check_ce(void *dm_void)
 359 {
 360         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
 361         struct ra_table *ra_tab = &dm->dm_ra_table;
 362         struct rtl_priv *rtlpriv = (struct rtl_priv *)dm->adapter;
 363         struct rtl_mac *mac = rtl_mac(rtlpriv);
 364         struct rtl_sta_info *entry;
 365         int i;
 366         int tmp_entry_min_pwdb = 0xff;
 367         unsigned long cur_tx_ok_cnt = 0, cur_rx_ok_cnt = 0;
 368         u8 UL_DL_STATE = 0, STBC_TX = 0, tx_bf_en = 0;
 369         u8 h2c_parameter[H2C_0X42_LENGTH] = {0};
 370         u8 cmdlen = H2C_0X42_LENGTH;
 371         u8 macid = 0;
 372
 373         if (!dm->is_linked)
 374                 return;
 375
 376         for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
 377                 entry = (struct rtl_sta_info *)dm->odm_sta_info[i];
 378                 if (!IS_STA_VALID(entry))
 379                         continue;
 380
 381                 if (is_multicast_ether_addr(entry->mac_addr) ||
 382                     is_broadcast_ether_addr(entry->mac_addr))
 383                         continue;
 384
 385                 if (entry->rssi_stat.undecorated_smoothed_pwdb == (-1))
 386                         continue;
 387
 388                 /* calculate min_pwdb */
 389                 if (entry->rssi_stat.undecorated_smoothed_pwdb <
 390                     tmp_entry_min_pwdb)
 391                         tmp_entry_min_pwdb =
 392                                 entry->rssi_stat.undecorated_smoothed_pwdb;
 393
 394                 /* report RSSI */
 395                 cur_tx_ok_cnt = rtlpriv->stats.txbytesunicast_inperiod;
 396                 cur_rx_ok_cnt = rtlpriv->stats.rxbytesunicast_inperiod;
 397
 398                 if (cur_rx_ok_cnt > (cur_tx_ok_cnt * 6))
 399                         UL_DL_STATE = 1;
 400                 else
 401                         UL_DL_STATE = 0;
 402
 403                 if (mac->opmode == NL80211_IFTYPE_AP ||
 404                     mac->opmode == NL80211_IFTYPE_ADHOC) {
 405                         struct ieee80211_sta *sta = container_of(
 406                                 (void *)entry, struct ieee80211_sta, drv_priv);
 407                         macid = sta->aid + 1;
 408                 }
 409
 410                 h2c_parameter[0] = macid;
 411                 h2c_parameter[2] =
 412                         entry->rssi_stat.undecorated_smoothed_pwdb & 0x7F;
 413
 414                 if (UL_DL_STATE)
 415                         h2c_parameter[3] |= RAINFO_BE_RX_STATE;
 416
 417                 if (tx_bf_en)
 418                         h2c_parameter[3] |= RAINFO_BF_STATE;
 419                 if (STBC_TX)
 420                         h2c_parameter[3] |= RAINFO_STBC_STATE;
 421                 if (dm->noisy_decision)
 422                         h2c_parameter[3] |= RAINFO_NOISY_STATE;
 423
 424                 if (entry->rssi_stat.is_send_rssi == RA_RSSI_STATE_SEND) {
 425                         h2c_parameter[3] |= RAINFO_INIT_RSSI_RATE_STATE;
 426                         entry->rssi_stat.is_send_rssi = RA_RSSI_STATE_HOLD;
 427                 }
 428
 429                 h2c_parameter[4] = (ra_tab->RA_threshold_offset & 0x7f) |
 430                                    (ra_tab->RA_offset_direction << 7);
 431
 432                 odm_fill_h2c_cmd(dm, ODM_H2C_RSSI_REPORT, cmdlen,
 433                                  h2c_parameter);
 434         }
 435
 436         if (tmp_entry_min_pwdb != 0xff)
 437                 dm->rssi_min = tmp_entry_min_pwdb;
 438 }
 439
 440 static void odm_rssi_monitor_check_ap(void *dm_void) {}
 441
 442 void odm_rssi_monitor_check(void *dm_void)
 443 {
 444         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
 445
 446         if (!(dm->support_ability & ODM_BB_RSSI_MONITOR))
 447                 return;
 448
 449         switch (dm->support_platform) {
 450         case ODM_WIN:
 451                 odm_rssi_monitor_check_mp(dm);
 452                 break;
 453
 454         case ODM_CE:
 455                 odm_rssi_monitor_check_ce(dm);
 456                 break;
 457
 458         case ODM_AP:
 459                 odm_rssi_monitor_check_ap(dm);
 460                 break;
 461
 462         default:
 463                 break;
 464         }
 465 }
 466
 467 void odm_rate_adaptive_mask_init(void *dm_void)
 468 {
 469         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
 470         struct odm_rate_adaptive *odm_ra = &dm->rate_adaptive;
 471
 472         odm_ra->type = dm_type_by_driver;
 473         if (odm_ra->type == dm_type_by_driver)
 474                 dm->is_use_ra_mask = true;
 475         else
 476                 dm->is_use_ra_mask = false;
 477
 478         odm_ra->ratr_state = DM_RATR_STA_INIT;
 479
 480         odm_ra->ldpc_thres = 35;
 481         odm_ra->is_use_ldpc = false;
 482
 483         odm_ra->high_rssi_thresh = 50;
 484         odm_ra->low_rssi_thresh = 20;
 485 }
 486
 487 /*-----------------------------------------------------------------------------
 488  * Function:    odm_refresh_rate_adaptive_mask()
 489  *
 490  * Overview:    Update rate table mask according to rssi
 491  *
 492  * Input:               NONE
 493  *
 494  * Output:              NONE
 495  *
 496  * Return:              NONE
 497  *
 498  * Revised History:
 499  *      When            Who             Remark
 500  *      05/27/2009      hpfan   Create version 0.
 501  *
 502  *---------------------------------------------------------------------------
 503  */
 504 void odm_refresh_rate_adaptive_mask(void *dm_void)
 505 {
 506         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
 507         struct ra_table *ra_tab = &dm->dm_ra_table;
 508
 509         if (!dm->is_linked)
 510                 return;
 511
 512         if (!(dm->support_ability & ODM_BB_RA_MASK)) {
 513                 ODM_RT_TRACE(dm, ODM_COMP_RA_MASK,
 514                              "%s(): Return cos not supported\n", __func__);
 515                 return;
 516         }
 517
 518         ra_tab->force_update_ra_mask_count++;
 519         /* 2011/09/29 MH In HW integration first stage, we provide 4 different
 520          * handle to operate at the same time.
 521          * In the stage2/3, we need to prive universal interface and merge all
 522          * HW dynamic mechanism.
 523          */
 524         switch (dm->support_platform) {
 525         case ODM_WIN:
 526                 odm_refresh_rate_adaptive_mask_mp(dm);
 527                 break;
 528
 529         case ODM_CE:
 530                 odm_refresh_rate_adaptive_mask_ce(dm);
 531                 break;
 532
 533         case ODM_AP:
 534                 odm_refresh_rate_adaptive_mask_apadsl(dm);
 535                 break;
 536         }
 537 }
 538
 539 static u8 phydm_trans_platform_bw(void *dm_void, u8 BW)
 540 {
 541         if (BW == HT_CHANNEL_WIDTH_20)
 542                 BW = PHYDM_BW_20;
 543
 544         else if (BW == HT_CHANNEL_WIDTH_20_40)
 545                 BW = PHYDM_BW_40;
 546
 547         else if (BW == HT_CHANNEL_WIDTH_80)
 548                 BW = PHYDM_BW_80;
 549
 550         return BW;
 551 }
 552
 553 static u8 phydm_trans_platform_rf_type(void *dm_void, u8 rf_type)
 554 {
 555         if (rf_type == RF_1T2R)
 556                 rf_type = PHYDM_RF_1T2R;
 557
 558         else if (rf_type == RF_2T4R)
 559                 rf_type = PHYDM_RF_2T4R;
 560
 561         else if (rf_type == RF_2T2R)
 562                 rf_type = PHYDM_RF_2T2R;
 563
 564         else if (rf_type == RF_1T1R)
 565                 rf_type = PHYDM_RF_1T1R;
 566
 567         else if (rf_type == RF_2T2R_GREEN)
 568                 rf_type = PHYDM_RF_2T2R_GREEN;
 569
 570         else if (rf_type == RF_3T3R)
 571                 rf_type = PHYDM_RF_3T3R;
 572
 573         else if (rf_type == RF_4T4R)
 574                 rf_type = PHYDM_RF_4T4R;
 575
 576         else if (rf_type == RF_2T3R)
 577                 rf_type = PHYDM_RF_1T2R;
 578
 579         else if (rf_type == RF_3T4R)
 580                 rf_type = PHYDM_RF_3T4R;
 581
 582         return rf_type;
 583 }
 584
 585 static u32 phydm_trans_platform_wireless_mode(void *dm_void, u32 wireless_mode)
 586 {
 587         return wireless_mode;
 588 }
 589
 590 u8 phydm_vht_en_mapping(void *dm_void, u32 wireless_mode)
 591 {
 592         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
 593         u8 vht_en_out = 0;
 594
 595         if ((wireless_mode == PHYDM_WIRELESS_MODE_AC_5G) ||
 596             (wireless_mode == PHYDM_WIRELESS_MODE_AC_24G) ||
 597             (wireless_mode == PHYDM_WIRELESS_MODE_AC_ONLY)) {
 598                 vht_en_out = 1;
 599                 /**/
 600         }
 601
 602         ODM_RT_TRACE(dm, ODM_COMP_RA_MASK,
 603                      "wireless_mode= (( 0x%x )), VHT_EN= (( %d ))\n",
 604                      wireless_mode, vht_en_out);
 605         return vht_en_out;
 606 }
 607
 608 u8 phydm_rate_id_mapping(void *dm_void, u32 wireless_mode, u8 rf_type, u8 bw)
 609 {
 610         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
 611         u8 rate_id_idx = 0;
 612         u8 phydm_BW;
 613         u8 phydm_rf_type;
 614
 615         phydm_BW = phydm_trans_platform_bw(dm, bw);
 616         phydm_rf_type = phydm_trans_platform_rf_type(dm, rf_type);
 617         wireless_mode = phydm_trans_platform_wireless_mode(dm, wireless_mode);
 618
 619         ODM_RT_TRACE(
 620                 dm, ODM_COMP_RA_MASK,
 621                 "wireless_mode= (( 0x%x )), rf_type = (( 0x%x )), BW = (( 0x%x ))\n",
 622                 wireless_mode, phydm_rf_type, phydm_BW);
 623
 624         switch (wireless_mode) {
 625         case PHYDM_WIRELESS_MODE_N_24G: {
 626                 if (phydm_BW == PHYDM_BW_40) {
 627                         if (phydm_rf_type == PHYDM_RF_1T1R)
 628                                 rate_id_idx = PHYDM_BGN_40M_1SS;
 629                         else if (phydm_rf_type == PHYDM_RF_2T2R)
 630                                 rate_id_idx = PHYDM_BGN_40M_2SS;
 631                         else
 632                                 rate_id_idx = PHYDM_ARFR5_N_3SS;
 633
 634                 } else {
 635                         if (phydm_rf_type == PHYDM_RF_1T1R)
 636                                 rate_id_idx = PHYDM_BGN_20M_1SS;
 637                         else if (phydm_rf_type == PHYDM_RF_2T2R)
 638                                 rate_id_idx = PHYDM_BGN_20M_2SS;
 639                         else
 640                                 rate_id_idx = PHYDM_ARFR5_N_3SS;
 641                 }
 642         } break;
 643
 644         case PHYDM_WIRELESS_MODE_N_5G: {
 645                 if (phydm_rf_type == PHYDM_RF_1T1R)
 646                         rate_id_idx = PHYDM_GN_N1SS;
 647                 else if (phydm_rf_type == PHYDM_RF_2T2R)
 648                         rate_id_idx = PHYDM_GN_N2SS;
 649                 else
 650                         rate_id_idx = PHYDM_ARFR5_N_3SS;
 651         }
 652
 653         break;
 654
 655         case PHYDM_WIRELESS_MODE_G:
 656                 rate_id_idx = PHYDM_BG;
 657                 break;
 658
 659         case PHYDM_WIRELESS_MODE_A:
 660                 rate_id_idx = PHYDM_G;
 661                 break;
 662
 663         case PHYDM_WIRELESS_MODE_B:
 664                 rate_id_idx = PHYDM_B_20M;
 665                 break;
 666
 667         case PHYDM_WIRELESS_MODE_AC_5G:
 668         case PHYDM_WIRELESS_MODE_AC_ONLY: {
 669                 if (phydm_rf_type == PHYDM_RF_1T1R)
 670                         rate_id_idx = PHYDM_ARFR1_AC_1SS;
 671                 else if (phydm_rf_type == PHYDM_RF_2T2R)
 672                         rate_id_idx = PHYDM_ARFR0_AC_2SS;
 673                 else
 674                         rate_id_idx = PHYDM_ARFR4_AC_3SS;
 675         } break;
 676
 677         case PHYDM_WIRELESS_MODE_AC_24G: {
 678                 /*Becareful to set "Lowest rate" while using PHYDM_ARFR4_AC_3SS
 679                  *in 2.4G/5G
 680                  */
 681                 if (phydm_BW >= PHYDM_BW_80) {
 682                         if (phydm_rf_type == PHYDM_RF_1T1R)
 683                                 rate_id_idx = PHYDM_ARFR1_AC_1SS;
 684                         else if (phydm_rf_type == PHYDM_RF_2T2R)
 685                                 rate_id_idx = PHYDM_ARFR0_AC_2SS;
 686                         else
 687                                 rate_id_idx = PHYDM_ARFR4_AC_3SS;
 688                 } else {
 689                         if (phydm_rf_type == PHYDM_RF_1T1R)
 690                                 rate_id_idx = PHYDM_ARFR2_AC_2G_1SS;
 691                         else if (phydm_rf_type == PHYDM_RF_2T2R)
 692                                 rate_id_idx = PHYDM_ARFR3_AC_2G_2SS;
 693                         else
 694                                 rate_id_idx = PHYDM_ARFR4_AC_3SS;
 695                 }
 696         } break;
 697
 698         default:
 699                 rate_id_idx = 0;
 700                 break;
 701         }
 702
 703         ODM_RT_TRACE(dm, ODM_COMP_RA_MASK, "RA rate ID = (( 0x%x ))\n",
 704                      rate_id_idx);
 705
 706         return rate_id_idx;
 707 }
 708
 709 void phydm_update_hal_ra_mask(void *dm_void, u32 wireless_mode, u8 rf_type,
 710                               u8 BW, u8 mimo_ps_enable, u8 disable_cck_rate,
 711                               u32 *ratr_bitmap_msb_in, u32 *ratr_bitmap_lsb_in,
 712                               u8 tx_rate_level)
 713 {
 714         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
 715         u8 phydm_rf_type;
 716         u8 phydm_BW;
 717         u32 ratr_bitmap = *ratr_bitmap_lsb_in,
 718             ratr_bitmap_msb = *ratr_bitmap_msb_in;
 719
 720         wireless_mode = phydm_trans_platform_wireless_mode(dm, wireless_mode);
 721
 722         phydm_rf_type = phydm_trans_platform_rf_type(dm, rf_type);
 723         phydm_BW = phydm_trans_platform_bw(dm, BW);
 724
 725         ODM_RT_TRACE(dm, ODM_COMP_RA_MASK,
 726                      "Platfoem original RA Mask = (( 0x %x | %x ))\n",
 727                      ratr_bitmap_msb, ratr_bitmap);
 728
 729         switch (wireless_mode) {
 730         case PHYDM_WIRELESS_MODE_B: {
 731                 ratr_bitmap &= 0x0000000f;
 732         } break;
 733
 734         case PHYDM_WIRELESS_MODE_G: {
 735                 ratr_bitmap &= 0x00000ff5;
 736         } break;
 737
 738         case PHYDM_WIRELESS_MODE_A: {
 739                 ratr_bitmap &= 0x00000ff0;
 740         } break;
 741
 742         case PHYDM_WIRELESS_MODE_N_24G:
 743         case PHYDM_WIRELESS_MODE_N_5G: {
 744                 if (mimo_ps_enable)
 745                         phydm_rf_type = PHYDM_RF_1T1R;
 746
 747                 if (phydm_rf_type == PHYDM_RF_1T1R) {
 748                         if (phydm_BW == PHYDM_BW_40)
 749                                 ratr_bitmap &= 0x000ff015;
 750                         else
 751                                 ratr_bitmap &= 0x000ff005;
 752                 } else if (phydm_rf_type == PHYDM_RF_2T2R ||
 753                            phydm_rf_type == PHYDM_RF_2T4R ||
 754                            phydm_rf_type == PHYDM_RF_2T3R) {
 755                         if (phydm_BW == PHYDM_BW_40)
 756                                 ratr_bitmap &= 0x0ffff015;
 757                         else
 758                                 ratr_bitmap &= 0x0ffff005;
 759                 } else { /*3T*/
 760
 761                         ratr_bitmap &= 0xfffff015;
 762                         ratr_bitmap_msb &= 0xf;
 763                 }
 764         } break;
 765
 766         case PHYDM_WIRELESS_MODE_AC_24G: {
 767                 if (phydm_rf_type == PHYDM_RF_1T1R) {
 768                         ratr_bitmap &= 0x003ff015;
 769                 } else if (phydm_rf_type == PHYDM_RF_2T2R ||
 770                            phydm_rf_type == PHYDM_RF_2T4R ||
 771                            phydm_rf_type == PHYDM_RF_2T3R) {
 772                         ratr_bitmap &= 0xfffff015;
 773                 } else { /*3T*/
 774
 775                         ratr_bitmap &= 0xfffff010;
 776                         ratr_bitmap_msb &= 0x3ff;
 777                 }
 778
 779                 if (phydm_BW ==
 780                     PHYDM_BW_20) { /* AC 20MHz doesn't support MCS9 */
 781                         ratr_bitmap &= 0x7fdfffff;
 782                         ratr_bitmap_msb &= 0x1ff;
 783                 }
 784         } break;
 785
 786         case PHYDM_WIRELESS_MODE_AC_5G: {
 787                 if (phydm_rf_type == PHYDM_RF_1T1R) {
 788                         ratr_bitmap &= 0x003ff010;
 789                 } else if (phydm_rf_type == PHYDM_RF_2T2R ||
 790                            phydm_rf_type == PHYDM_RF_2T4R ||
 791                            phydm_rf_type == PHYDM_RF_2T3R) {
 792                         ratr_bitmap &= 0xfffff010;
 793                 } else { /*3T*/
 794
 795                         ratr_bitmap &= 0xfffff010;
 796                         ratr_bitmap_msb &= 0x3ff;
 797                 }
 798
 799                 if (phydm_BW ==
 800                     PHYDM_BW_20) { /* AC 20MHz doesn't support MCS9 */
 801                         ratr_bitmap &= 0x7fdfffff;
 802                         ratr_bitmap_msb &= 0x1ff;
 803                 }
 804         } break;
 805
 806         default:
 807                 break;
 808         }
 809
 810         if (wireless_mode != PHYDM_WIRELESS_MODE_B) {
 811                 if (tx_rate_level == 0)
 812                         ratr_bitmap &= 0xffffffff;
 813                 else if (tx_rate_level == 1)
 814                         ratr_bitmap &= 0xfffffff0;
 815                 else if (tx_rate_level == 2)
 816                         ratr_bitmap &= 0xffffefe0;
 817                 else if (tx_rate_level == 3)
 818                         ratr_bitmap &= 0xffffcfc0;
 819                 else if (tx_rate_level == 4)
 820                         ratr_bitmap &= 0xffff8f80;
 821                 else if (tx_rate_level >= 5)
 822                         ratr_bitmap &= 0xffff0f00;
 823         }
 824
 825         if (disable_cck_rate)
 826                 ratr_bitmap &= 0xfffffff0;
 827
 828         ODM_RT_TRACE(
 829                 dm, ODM_COMP_RA_MASK,
 830                 "wireless_mode= (( 0x%x )), rf_type = (( 0x%x )), BW = (( 0x%x )), MimoPs_en = (( %d )), tx_rate_level= (( 0x%x ))\n",
 831                 wireless_mode, phydm_rf_type, phydm_BW, mimo_ps_enable,
 832                 tx_rate_level);
 833
 834         *ratr_bitmap_lsb_in = ratr_bitmap;
 835         *ratr_bitmap_msb_in = ratr_bitmap_msb;
 836         ODM_RT_TRACE(dm, ODM_COMP_RA_MASK,
 837                      "Phydm modified RA Mask = (( 0x %x | %x ))\n",
 838                      *ratr_bitmap_msb_in, *ratr_bitmap_lsb_in);
 839 }
 840
 841 u8 phydm_RA_level_decision(void *dm_void, u32 rssi, u8 ratr_state)
 842 {
 843         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
 844         u8 ra_rate_floor_table[RA_FLOOR_TABLE_SIZE] = {
 845                 20, 34, 38, 42,
 846                 46, 50, 100}; /*MCS0 ~ MCS4 , VHT1SS MCS0 ~ MCS4 , G 6M~24M*/
 847         u8 new_ratr_state = 0;
 848         u8 i;
 849
 850         ODM_RT_TRACE(
 851                 dm, ODM_COMP_RA_MASK,
 852                 "curr RA level = ((%d)), Rate_floor_table ori [ %d , %d, %d , %d, %d, %d]\n",
 853                 ratr_state, ra_rate_floor_table[0], ra_rate_floor_table[1],
 854                 ra_rate_floor_table[2], ra_rate_floor_table[3],
 855                 ra_rate_floor_table[4], ra_rate_floor_table[5]);
 856
 857         for (i = 0; i < RA_FLOOR_TABLE_SIZE; i++) {
 858                 if (i >= (ratr_state))
 859                         ra_rate_floor_table[i] += RA_FLOOR_UP_GAP;
 860         }
 861
 862         ODM_RT_TRACE(
 863                 dm, ODM_COMP_RA_MASK,
 864                 "RSSI = ((%d)), Rate_floor_table_mod [ %d , %d, %d , %d, %d, %d]\n",
 865                 rssi, ra_rate_floor_table[0], ra_rate_floor_table[1],
 866                 ra_rate_floor_table[2], ra_rate_floor_table[3],
 867                 ra_rate_floor_table[4], ra_rate_floor_table[5]);
 868
 869         for (i = 0; i < RA_FLOOR_TABLE_SIZE; i++) {
 870                 if (rssi < ra_rate_floor_table[i]) {
 871                         new_ratr_state = i;
 872                         break;
 873                 }
 874         }
 875
 876         return new_ratr_state;
 877 }
 878
 879 void odm_refresh_rate_adaptive_mask_mp(void *dm_void) {}
 880
 881 void odm_refresh_rate_adaptive_mask_ce(void *dm_void)
 882 {
 883         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
 884         struct ra_table *ra_tab = &dm->dm_ra_table;
 885         void *adapter = dm->adapter;
 886         u32 i;
 887         struct rtl_sta_info *entry;
 888         u8 ratr_state_new;
 889
 890         if (!dm->is_use_ra_mask) {
 891                 ODM_RT_TRACE(
 892                         dm, ODM_COMP_RA_MASK,
 893                         "<---- %s(): driver does not control rate adaptive mask\n",
 894                         __func__);
 895                 return;
 896         }
 897
 898         for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) {
 899                 entry = dm->odm_sta_info[i];
 900
 901                 if (!IS_STA_VALID(entry))
 902                         continue;
 903
 904                 if (is_multicast_ether_addr(entry->mac_addr))
 905                         continue;
 906                 else if (is_broadcast_ether_addr(entry->mac_addr))
 907                         continue;
 908
 909                 ratr_state_new = phydm_RA_level_decision(
 910                         dm, entry->rssi_stat.undecorated_smoothed_pwdb,
 911                         entry->rssi_level);
 912
 913                 if ((entry->rssi_level != ratr_state_new) ||
 914                     (ra_tab->force_update_ra_mask_count >=
 915                      FORCED_UPDATE_RAMASK_PERIOD)) {
 916                         ra_tab->force_update_ra_mask_count = 0;
 917                         ODM_RT_TRACE(
 918                                 dm, ODM_COMP_RA_MASK,
 919                                 "Update Tx RA Level: ((%x)) -> ((%x)),  RSSI = ((%d))\n",
 920                                 entry->rssi_level, ratr_state_new,
 921                                 entry->rssi_stat.undecorated_smoothed_pwdb);
 922
 923                         entry->rssi_level = ratr_state_new;
 924                         rtl_hal_update_ra_mask(adapter, entry,
 925                                                entry->rssi_level);
 926                 } else {
 927                         ODM_RT_TRACE(dm, ODM_COMP_RA_MASK,
 928                                      "Stay in RA level  = (( %d ))\n\n",
 929                                      ratr_state_new);
 930                         /**/
 931                 }
 932         }
 933 }
 934
 935 void odm_refresh_rate_adaptive_mask_apadsl(void *dm_void) {}
 936
 937 void odm_refresh_basic_rate_mask(void *dm_void) {}
 938
 939 u8 phydm_rate_order_compute(void *dm_void, u8 rate_idx)
 940 {
 941         u8 rate_order = 0;
 942
 943         if (rate_idx >= ODM_RATEVHTSS4MCS0) {
 944                 rate_idx -= ODM_RATEVHTSS4MCS0;
 945                 /**/
 946         } else if (rate_idx >= ODM_RATEVHTSS3MCS0) {
 947                 rate_idx -= ODM_RATEVHTSS3MCS0;
 948                 /**/
 949         } else if (rate_idx >= ODM_RATEVHTSS2MCS0) {
 950                 rate_idx -= ODM_RATEVHTSS2MCS0;
 951                 /**/
 952         } else if (rate_idx >= ODM_RATEVHTSS1MCS0) {
 953                 rate_idx -= ODM_RATEVHTSS1MCS0;
 954                 /**/
 955         } else if (rate_idx >= ODM_RATEMCS24) {
 956                 rate_idx -= ODM_RATEMCS24;
 957                 /**/
 958         } else if (rate_idx >= ODM_RATEMCS16) {
 959                 rate_idx -= ODM_RATEMCS16;
 960                 /**/
 961         } else if (rate_idx >= ODM_RATEMCS8) {
 962                 rate_idx -= ODM_RATEMCS8;
 963                 /**/
 964         }
 965         rate_order = rate_idx;
 966
 967         return rate_order;
 968 }
 969
 970 static void phydm_ra_common_info_update(void *dm_void)
 971 {
 972         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
 973         struct ra_table *ra_tab = &dm->dm_ra_table;
 974         u16 macid;
 975         u8 rate_order_tmp;
 976         u8 cnt = 0;
 977
 978         ra_tab->highest_client_tx_order = 0;
 979         ra_tab->power_tracking_flag = 1;
 980
 981         if (dm->number_linked_client != 0) {
 982                 for (macid = 0; macid < ODM_ASSOCIATE_ENTRY_NUM; macid++) {
 983                         rate_order_tmp = phydm_rate_order_compute(
 984                                 dm, ((ra_tab->link_tx_rate[macid]) & 0x7f));
 985
 986                         if (rate_order_tmp >=
 987                             (ra_tab->highest_client_tx_order)) {
 988                                 ra_tab->highest_client_tx_order =
 989                                         rate_order_tmp;
 990                                 ra_tab->highest_client_tx_rate_order = macid;
 991                         }
 992
 993                         cnt++;
 994
 995                         if (cnt == dm->number_linked_client)
 996                                 break;
 997                 }
 998                 ODM_RT_TRACE(
 999                         dm, ODM_COMP_RATE_ADAPTIVE,
1000                         "MACID[%d], Highest Tx order Update for power traking: %d\n",
1001                         (ra_tab->highest_client_tx_rate_order),
1002                         (ra_tab->highest_client_tx_order));
1003         }
1004 }
1005
1006 void phydm_ra_info_watchdog(void *dm_void)
1007 {
1008         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
1009
1010         phydm_ra_common_info_update(dm);
1011         phydm_ra_dynamic_retry_limit(dm);
1012         phydm_ra_dynamic_retry_count(dm);
1013         odm_refresh_rate_adaptive_mask(dm);
1014         odm_refresh_basic_rate_mask(dm);
1015 }
1016
1017 void phydm_ra_info_init(void *dm_void)
1018 {
1019         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
1020         struct ra_table *ra_tab = &dm->dm_ra_table;
1021
1022         ra_tab->highest_client_tx_rate_order = 0;
1023         ra_tab->highest_client_tx_order = 0;
1024         ra_tab->RA_threshold_offset = 0;
1025         ra_tab->RA_offset_direction = 0;
1026 }
1027
1028 u8 odm_find_rts_rate(void *dm_void, u8 tx_rate, bool is_erp_protect)
1029 {
1030         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
1031         u8 rts_ini_rate = ODM_RATE6M;
1032
1033         if (is_erp_protect) { /* use CCK rate as RTS*/
1034                 rts_ini_rate = ODM_RATE1M;
1035         } else {
1036                 switch (tx_rate) {
1037                 case ODM_RATEVHTSS3MCS9:
1038                 case ODM_RATEVHTSS3MCS8:
1039                 case ODM_RATEVHTSS3MCS7:
1040                 case ODM_RATEVHTSS3MCS6:
1041                 case ODM_RATEVHTSS3MCS5:
1042                 case ODM_RATEVHTSS3MCS4:
1043                 case ODM_RATEVHTSS3MCS3:
1044                 case ODM_RATEVHTSS2MCS9:
1045                 case ODM_RATEVHTSS2MCS8:
1046                 case ODM_RATEVHTSS2MCS7:
1047                 case ODM_RATEVHTSS2MCS6:
1048                 case ODM_RATEVHTSS2MCS5:
1049                 case ODM_RATEVHTSS2MCS4:
1050                 case ODM_RATEVHTSS2MCS3:
1051                 case ODM_RATEVHTSS1MCS9:
1052                 case ODM_RATEVHTSS1MCS8:
1053                 case ODM_RATEVHTSS1MCS7:
1054                 case ODM_RATEVHTSS1MCS6:
1055                 case ODM_RATEVHTSS1MCS5:
1056                 case ODM_RATEVHTSS1MCS4:
1057                 case ODM_RATEVHTSS1MCS3:
1058                 case ODM_RATEMCS15:
1059                 case ODM_RATEMCS14:
1060                 case ODM_RATEMCS13:
1061                 case ODM_RATEMCS12:
1062                 case ODM_RATEMCS11:
1063                 case ODM_RATEMCS7:
1064                 case ODM_RATEMCS6:
1065                 case ODM_RATEMCS5:
1066                 case ODM_RATEMCS4:
1067                 case ODM_RATEMCS3:
1068                 case ODM_RATE54M:
1069                 case ODM_RATE48M:
1070                 case ODM_RATE36M:
1071                 case ODM_RATE24M:
1072                         rts_ini_rate = ODM_RATE24M;
1073                         break;
1074                 case ODM_RATEVHTSS3MCS2:
1075                 case ODM_RATEVHTSS3MCS1:
1076                 case ODM_RATEVHTSS2MCS2:
1077                 case ODM_RATEVHTSS2MCS1:
1078                 case ODM_RATEVHTSS1MCS2:
1079                 case ODM_RATEVHTSS1MCS1:
1080                 case ODM_RATEMCS10:
1081                 case ODM_RATEMCS9:
1082                 case ODM_RATEMCS2:
1083                 case ODM_RATEMCS1:
1084                 case ODM_RATE18M:
1085                 case ODM_RATE12M:
1086                         rts_ini_rate = ODM_RATE12M;
1087                         break;
1088                 case ODM_RATEVHTSS3MCS0:
1089                 case ODM_RATEVHTSS2MCS0:
1090                 case ODM_RATEVHTSS1MCS0:
1091                 case ODM_RATEMCS8:
1092                 case ODM_RATEMCS0:
1093                 case ODM_RATE9M:
1094                 case ODM_RATE6M:
1095                         rts_ini_rate = ODM_RATE6M;
1096                         break;
1097                 case ODM_RATE11M:
1098                 case ODM_RATE5_5M:
1099                 case ODM_RATE2M:
1100                 case ODM_RATE1M:
1101                         rts_ini_rate = ODM_RATE1M;
1102                         break;
1103                 default:
1104                         rts_ini_rate = ODM_RATE6M;
1105                         break;
1106                 }
1107         }
1108
1109         if (*dm->band_type == 1) {
1110                 if (rts_ini_rate < ODM_RATE6M)
1111                         rts_ini_rate = ODM_RATE6M;
1112         }
1113         return rts_ini_rate;
1114 }
1115
1116 static void odm_set_ra_dm_arfb_by_noisy(struct phy_dm_struct *dm) {}
1117
1118 void odm_update_noisy_state(void *dm_void, bool is_noisy_state_from_c2h)
1119 {
1120         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
1121
1122         /* JJ ADD 20161014 */
1123         if (dm->support_ic_type == ODM_RTL8821 ||
1124             dm->support_ic_type == ODM_RTL8812 ||
1125             dm->support_ic_type == ODM_RTL8723B ||
1126             dm->support_ic_type == ODM_RTL8192E ||
1127             dm->support_ic_type == ODM_RTL8188E ||
1128             dm->support_ic_type == ODM_RTL8723D ||
1129             dm->support_ic_type == ODM_RTL8710B)
1130                 dm->is_noisy_state = is_noisy_state_from_c2h;
1131         odm_set_ra_dm_arfb_by_noisy(dm);
1132 };
1133
1134 void phydm_update_pwr_track(void *dm_void, u8 rate)
1135 {
1136         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
1137
1138         ODM_RT_TRACE(dm, ODM_COMP_TX_PWR_TRACK, "Pwr Track Get rate=0x%x\n",
1139                      rate);
1140
1141         dm->tx_rate = rate;
1142 }
1143
1144 /* RA_MASK_PHYDMLIZE, will delete it later*/
1145
1146 bool odm_ra_state_check(void *dm_void, s32 rssi, bool is_force_update,
1147                         u8 *ra_tr_state)
1148 {
1149         struct phy_dm_struct *dm = (struct phy_dm_struct *)dm_void;
1150         struct odm_rate_adaptive *ra = &dm->rate_adaptive;
1151         const u8 go_up_gap = 5;
1152         u8 high_rssi_thresh_for_ra = ra->high_rssi_thresh;
1153         u8 low_rssi_thresh_for_ra = ra->low_rssi_thresh;
1154         u8 ratr_state;
1155
1156         ODM_RT_TRACE(dm, ODM_COMP_RA_MASK,
1157                      "RSSI= (( %d )), Current_RSSI_level = (( %d ))\n", rssi,
1158                      *ra_tr_state);
1159         ODM_RT_TRACE(dm, ODM_COMP_RA_MASK,
1160                      "[Ori RA RSSI Thresh]  High= (( %d )), Low = (( %d ))\n",
1161                      high_rssi_thresh_for_ra, low_rssi_thresh_for_ra);
1162         /* threshold Adjustment:
1163          * when RSSI state trends to go up one or two levels, make sure RSSI is
1164          * high enough. Here go_up_gap is added to solve the boundary's level
1165          * alternation issue.
1166          */
1167
1168         switch (*ra_tr_state) {
1169         case DM_RATR_STA_INIT:
1170         case DM_RATR_STA_HIGH:
1171                 break;
1172
1173         case DM_RATR_STA_MIDDLE:
1174                 high_rssi_thresh_for_ra += go_up_gap;
1175                 break;
1176
1177         case DM_RATR_STA_LOW:
1178                 high_rssi_thresh_for_ra += go_up_gap;
1179                 low_rssi_thresh_for_ra += go_up_gap;
1180                 break;
1181
1182         default:
1183                 WARN_ONCE(true, "wrong rssi level setting %d !", *ra_tr_state);
1184                 break;
1185         }
1186
1187         /* Decide ratr_state by RSSI.*/
1188         if (rssi > high_rssi_thresh_for_ra)
1189                 ratr_state = DM_RATR_STA_HIGH;
1190         else if (rssi > low_rssi_thresh_for_ra)
1191                 ratr_state = DM_RATR_STA_MIDDLE;
1192
1193         else
1194                 ratr_state = DM_RATR_STA_LOW;
1195         ODM_RT_TRACE(dm, ODM_COMP_RA_MASK,
1196                      "[Mod RA RSSI Thresh]  High= (( %d )), Low = (( %d ))\n",
1197                      high_rssi_thresh_for_ra, low_rssi_thresh_for_ra);
1198
1199         if (*ra_tr_state != ratr_state || is_force_update) {
1200                 ODM_RT_TRACE(dm, ODM_COMP_RA_MASK,
1201                              "[RSSI Level Update] %d->%d\n", *ra_tr_state,
1202                              ratr_state);
1203                 *ra_tr_state = ratr_state;
1204                 return true;
1205         }
1206
1207         return false;
1208 }