drivers/staging/rtl8192e/rtl8192e/rtl_core.h

   1 /******************************************************************************
   2  * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
   3  *
   4  * Based on the r8180 driver, which is:
   5  * Copyright 2004-2005 Andrea Merello <andrea.merello@gmail.com>, et al.
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of version 2 of the GNU General Public License as
   8  * published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  * more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along with
  16  * this program; if not, write to the Free Software Foundation, Inc.,
  17  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  18  *
  19  * The full GNU General Public License is included in this distribution in the
  20  * file called LICENSE.
  21  *
  22  * Contact Information:
  23  * wlanfae <wlanfae@realtek.com>
  24 ******************************************************************************/
  25
  26 #ifndef _RTL_CORE_H
  27 #define _RTL_CORE_H
  28
  29 #include <linux/module.h>
  30 #include <linux/kernel.h>
  31 #include <linux/ioport.h>
  32 #include <linux/sched.h>
  33 #include <linux/types.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/slab.h>
  36 #include <linux/netdevice.h>
  37 #include <linux/pci.h>
  38 #include <linux/etherdevice.h>
  39 #include <linux/delay.h>
  40 #include <linux/rtnetlink.h>
  41 #include <linux/wireless.h>
  42 #include <linux/timer.h>
  43 #include <linux/proc_fs.h>
  44 #include <linux/if_arp.h>
  45 #include <linux/random.h>
  46 #include <linux/io.h>
  47
  48 /* Need this defined before including local include files */
  49 #define DRV_NAME "rtl819xE"
  50
  51 #include "../rtllib.h"
  52
  53 #include "../dot11d.h"
  54
  55 #include "r8192E_firmware.h"
  56 #include "r8192E_hw.h"
  57
  58 #include "r8190P_def.h"
  59 #include "r8192E_dev.h"
  60
  61 #include "rtl_eeprom.h"
  62 #include "rtl_ps.h"
  63 #include "rtl_pci.h"
  64 #include "rtl_cam.h"
  65
  66 #define DRV_COPYRIGHT           \
  67         "Copyright(c) 2008 - 2010 Realsil Semiconductor Corporation"
  68 #define DRV_AUTHOR  "<wlanfae@realtek.com>"
  69 #define DRV_VERSION  "0014.0401.2010"
  70
  71 #define IS_HARDWARE_TYPE_819xP(_priv)           \
  72         ((((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8190P) || \
  73         (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192E))
  74 #define IS_HARDWARE_TYPE_8192SE(_priv)          \
  75         (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192SE)
  76 #define IS_HARDWARE_TYPE_8192CE(_priv)          \
  77         (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192CE)
  78 #define IS_HARDWARE_TYPE_8192CU(_priv)          \
  79         (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192CU)
  80 #define IS_HARDWARE_TYPE_8192DE(_priv)          \
  81         (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192DE)
  82 #define IS_HARDWARE_TYPE_8192DU(_priv)          \
  83         (((struct r8192_priv *)rtllib_priv(dev))->card_8192 == NIC_8192DU)
  84
  85 #define RTL_PCI_DEVICE(vend, dev, cfg) \
  86         .vendor = (vend), .device = (dev), \
  87         .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID , \
  88         .driver_data = (kernel_ulong_t)&(cfg)
  89
  90 #define RTL_MAX_SCAN_SIZE 128
  91
  92 #define RTL_RATE_MAX            30
  93
  94 #define TOTAL_CAM_ENTRY         32
  95 #define CAM_CONTENT_COUNT       8
  96
  97 #ifndef BIT
  98 #define BIT(_i)                         (1<<(_i))
  99 #endif
 100
 101 #define IS_NIC_DOWN(priv)       (!(priv)->up)
 102
 103 #define IS_ADAPTER_SENDS_BEACON(dev) 0
 104
 105 #define IS_UNDER_11N_AES_MODE(_rtllib)          \
 106         ((_rtllib->pHTInfo->bCurrentHTSupport == true) && \
 107         (_rtllib->pairwise_key_type == KEY_TYPE_CCMP))
 108
 109 #define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI      0x1000
 110 #define HAL_HW_PCI_REVISION_ID_8190PCI                  0x00
 111 #define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE     0x4000
 112 #define HAL_HW_PCI_REVISION_ID_8192PCIE         0x01
 113 #define HAL_MEMORY_MAPPED_IO_RANGE_8192SE       0x4000
 114 #define HAL_HW_PCI_REVISION_ID_8192SE   0x10
 115 #define HAL_HW_PCI_REVISION_ID_8192CE                   0x1
 116 #define HAL_MEMORY_MAPPED_IO_RANGE_8192CE       0x4000
 117 #define HAL_HW_PCI_REVISION_ID_8192DE                   0x0
 118 #define HAL_MEMORY_MAPPED_IO_RANGE_8192DE       0x4000
 119
 120 #define HAL_HW_PCI_8180_DEVICE_ID                       0x8180
 121 #define HAL_HW_PCI_8185_DEVICE_ID                       0x8185
 122 #define HAL_HW_PCI_8188_DEVICE_ID                       0x8188
 123 #define HAL_HW_PCI_8198_DEVICE_ID                       0x8198
 124 #define HAL_HW_PCI_8190_DEVICE_ID                       0x8190
 125 #define HAL_HW_PCI_8192_DEVICE_ID                       0x8192
 126 #define HAL_HW_PCI_8192SE_DEVICE_ID                     0x8192
 127 #define HAL_HW_PCI_8174_DEVICE_ID                       0x8174
 128 #define HAL_HW_PCI_8173_DEVICE_ID                       0x8173
 129 #define HAL_HW_PCI_8172_DEVICE_ID                       0x8172
 130 #define HAL_HW_PCI_8171_DEVICE_ID                       0x8171
 131 #define HAL_HW_PCI_0045_DEVICE_ID                       0x0045
 132 #define HAL_HW_PCI_0046_DEVICE_ID                       0x0046
 133 #define HAL_HW_PCI_0044_DEVICE_ID                       0x0044
 134 #define HAL_HW_PCI_0047_DEVICE_ID                       0x0047
 135 #define HAL_HW_PCI_700F_DEVICE_ID                       0x700F
 136 #define HAL_HW_PCI_701F_DEVICE_ID                       0x701F
 137 #define HAL_HW_PCI_DLINK_DEVICE_ID                      0x3304
 138 #define HAL_HW_PCI_8192CET_DEVICE_ID                    0x8191
 139 #define HAL_HW_PCI_8192CE_DEVICE_ID                     0x8178
 140 #define HAL_HW_PCI_8191CE_DEVICE_ID                     0x8177
 141 #define HAL_HW_PCI_8188CE_DEVICE_ID                     0x8176
 142 #define HAL_HW_PCI_8192CU_DEVICE_ID                     0x8191
 143 #define HAL_HW_PCI_8192DE_DEVICE_ID                     0x092D
 144 #define HAL_HW_PCI_8192DU_DEVICE_ID                     0x092D
 145
 146 #define RTL819X_DEFAULT_RF_TYPE         RF_1T2R
 147
 148 #define RTLLIB_WATCH_DOG_TIME           2000
 149
 150 #define MAX_DEV_ADDR_SIZE               8  /*support till 64 bit bus width OS*/
 151 #define MAX_FIRMWARE_INFORMATION_SIZE   32
 152 #define MAX_802_11_HEADER_LENGTH        (40 + MAX_FIRMWARE_INFORMATION_SIZE)
 153 #define ENCRYPTION_MAX_OVERHEAD         128
 154 #define MAX_FRAGMENT_COUNT              8
 155 #define MAX_TRANSMIT_BUFFER_SIZE        \
 156         (1600 + (MAX_802_11_HEADER_LENGTH + ENCRYPTION_MAX_OVERHEAD) *  \
 157          MAX_FRAGMENT_COUNT)
 158
 159 #define scrclng                         4
 160
 161 #define DEFAULT_FRAG_THRESHOLD  2342U
 162 #define MIN_FRAG_THRESHOLD      256U
 163 #define DEFAULT_BEACONINTERVAL  0x64U
 164
 165 #define DEFAULT_SSID            ""
 166 #define DEFAULT_RETRY_RTS       7
 167 #define DEFAULT_RETRY_DATA      7
 168 #define PRISM_HDR_SIZE          64
 169
 170 #define PHY_RSSI_SLID_WIN_MAX                   100
 171
 172 #define RTL_IOCTL_WPA_SUPPLICANT                (SIOCIWFIRSTPRIV + 30)
 173
 174 #define TxBBGainTableLength                     37
 175 #define CCKTxBBGainTableLength                  23
 176
 177 #define CHANNEL_PLAN_LEN                        10
 178 #define sCrcLng                                 4
 179
 180 #define NIC_SEND_HANG_THRESHOLD_NORMAL          4
 181 #define NIC_SEND_HANG_THRESHOLD_POWERSAVE       8
 182
 183 #define MAX_TX_QUEUE                            9
 184
 185 #define MAX_RX_QUEUE                            1
 186
 187 #define MAX_RX_COUNT                            64
 188 #define MAX_TX_QUEUE_COUNT                      9
 189
 190 extern int hwwep;
 191
 192 enum RTL819x_PHY_PARAM {
 193         RTL819X_PHY_MACPHY_REG                  = 0,
 194         RTL819X_PHY_MACPHY_REG_PG               = 1,
 195         RTL8188C_PHY_MACREG                     = 2,
 196         RTL8192C_PHY_MACREG                     = 3,
 197         RTL819X_PHY_REG                         = 4,
 198         RTL819X_PHY_REG_1T2R                    = 5,
 199         RTL819X_PHY_REG_to1T1R                  = 6,
 200         RTL819X_PHY_REG_to1T2R                  = 7,
 201         RTL819X_PHY_REG_to2T2R                  = 8,
 202         RTL819X_PHY_REG_PG                      = 9,
 203         RTL819X_AGC_TAB                         = 10,
 204         RTL819X_PHY_RADIO_A                     = 11,
 205         RTL819X_PHY_RADIO_A_1T                  = 12,
 206         RTL819X_PHY_RADIO_A_2T                  = 13,
 207         RTL819X_PHY_RADIO_B                     = 14,
 208         RTL819X_PHY_RADIO_B_GM                  = 15,
 209         RTL819X_PHY_RADIO_C                     = 16,
 210         RTL819X_PHY_RADIO_D                     = 17,
 211         RTL819X_EEPROM_MAP                      = 18,
 212         RTL819X_EFUSE_MAP                       = 19,
 213 };
 214
 215 enum nic_t {
 216         NIC_UNKNOWN     = 0,
 217         NIC_8192E       = 1,
 218         NIC_8190P       = 2,
 219         NIC_8192SE      = 4,
 220         NIC_8192CE      = 5,
 221         NIC_8192CU      = 6,
 222         NIC_8192DE      = 7,
 223         NIC_8192DU      = 8,
 224 };
 225
 226 enum rt_eeprom_type {
 227         EEPROM_93C46,
 228         EEPROM_93C56,
 229         EEPROM_BOOT_EFUSE,
 230 };
 231
 232 enum dcmg_txcmd_op {
 233         TXCMD_TXRA_HISTORY_CTRL         = 0xFF900000,
 234         TXCMD_RESET_TX_PKT_BUFF         = 0xFF900001,
 235         TXCMD_RESET_RX_PKT_BUFF         = 0xFF900002,
 236         TXCMD_SET_TX_DURATION           = 0xFF900003,
 237         TXCMD_SET_RX_RSSI               = 0xFF900004,
 238         TXCMD_SET_TX_PWR_TRACKING       = 0xFF900005,
 239         TXCMD_XXXX_CTRL,
 240 };
 241
 242 enum rt_rf_type_819xu {
 243         RF_TYPE_MIN = 0,
 244         RF_8225,
 245         RF_8256,
 246         RF_8258,
 247         RF_6052 = 4,
 248         RF_PSEUDO_11N = 5,
 249 };
 250
 251 enum rf_step {
 252         RF_STEP_INIT = 0,
 253         RF_STEP_NORMAL,
 254         RF_STEP_MAX
 255 };
 256
 257 enum rt_status {
 258         RT_STATUS_SUCCESS,
 259         RT_STATUS_FAILURE,
 260         RT_STATUS_PENDING,
 261         RT_STATUS_RESOURCE
 262 };
 263
 264 enum rt_customer_id {
 265         RT_CID_DEFAULT    = 0,
 266         RT_CID_8187_ALPHA0      = 1,
 267         RT_CID_8187_SERCOMM_PS  = 2,
 268         RT_CID_8187_HW_LED      = 3,
 269         RT_CID_8187_NETGEAR     = 4,
 270         RT_CID_WHQL          = 5,
 271         RT_CID_819x_CAMEO       = 6,
 272         RT_CID_819x_RUNTOP      = 7,
 273         RT_CID_819x_Senao       = 8,
 274         RT_CID_TOSHIBA    = 9,
 275         RT_CID_819x_Netcore     = 10,
 276         RT_CID_Nettronix        = 11,
 277         RT_CID_DLINK        = 12,
 278         RT_CID_PRONET      = 13,
 279         RT_CID_COREGA      = 14,
 280         RT_CID_819x_ALPHA       = 15,
 281         RT_CID_819x_Sitecom     = 16,
 282         RT_CID_CCX            = 17,
 283         RT_CID_819x_Lenovo      = 18,
 284         RT_CID_819x_QMI  = 19,
 285         RT_CID_819x_Edimax_Belkin = 20,
 286         RT_CID_819x_Sercomm_Belkin = 21,
 287         RT_CID_819x_CAMEO1 = 22,
 288         RT_CID_819x_MSI = 23,
 289         RT_CID_819x_Acer = 24,
 290         RT_CID_819x_HP  = 27,
 291         RT_CID_819x_CLEVO = 28,
 292         RT_CID_819x_Arcadyan_Belkin = 29,
 293         RT_CID_819x_SAMSUNG = 30,
 294         RT_CID_819x_WNC_COREGA = 31,
 295 };
 296
 297 enum reset_type {
 298         RESET_TYPE_NORESET = 0x00,
 299         RESET_TYPE_NORMAL = 0x01,
 300         RESET_TYPE_SILENT = 0x02
 301 };
 302
 303 enum ic_inferiority_8192s {
 304         IC_INFERIORITY_A            = 0,
 305         IC_INFERIORITY_B            = 1,
 306 };
 307
 308 enum pci_bridge_vendor {
 309         PCI_BRIDGE_VENDOR_INTEL = 0x0,
 310         PCI_BRIDGE_VENDOR_ATI,
 311         PCI_BRIDGE_VENDOR_AMD,
 312         PCI_BRIDGE_VENDOR_SIS ,
 313         PCI_BRIDGE_VENDOR_UNKNOWN,
 314         PCI_BRIDGE_VENDOR_MAX ,
 315 };
 316
 317 struct buffer {
 318         struct buffer *next;
 319         u32 *buf;
 320         dma_addr_t dma;
 321
 322 };
 323
 324 struct rtl_reg_debug {
 325         unsigned int  cmd;
 326         struct {
 327                 unsigned char type;
 328                 unsigned char addr;
 329                 unsigned char page;
 330                 unsigned char length;
 331         } head;
 332         unsigned char buf[0xff];
 333 };
 334
 335 struct rt_tx_rahis {
 336         u32          cck[4];
 337         u32          ofdm[8];
 338         u32          ht_mcs[4][16];
 339 };
 340
 341 struct rt_smooth_data_4rf {
 342         char    elements[4][100];
 343         u32     index;
 344         u32     TotalNum;
 345         u32     TotalVal[4];
 346 };
 347
 348 struct rt_stats {
 349         unsigned long txrdu;
 350         unsigned long rxrdu;
 351         unsigned long rxok;
 352         unsigned long rxframgment;
 353         unsigned long rxurberr;
 354         unsigned long rxstaterr;
 355         unsigned long rxdatacrcerr;
 356         unsigned long rxmgmtcrcerr;
 357         unsigned long rxcrcerrmin;
 358         unsigned long rxcrcerrmid;
 359         unsigned long rxcrcerrmax;
 360         unsigned long received_rate_histogram[4][32];
 361         unsigned long received_preamble_GI[2][32];
 362         unsigned long   rx_AMPDUsize_histogram[5];
 363         unsigned long rx_AMPDUnum_histogram[5];
 364         unsigned long numpacket_matchbssid;
 365         unsigned long numpacket_toself;
 366         unsigned long num_process_phyinfo;
 367         unsigned long numqry_phystatus;
 368         unsigned long numqry_phystatusCCK;
 369         unsigned long numqry_phystatusHT;
 370         unsigned long received_bwtype[5];
 371         unsigned long txnperr;
 372         unsigned long txnpdrop;
 373         unsigned long txresumed;
 374         unsigned long rxoverflow;
 375         unsigned long rxint;
 376         unsigned long txnpokint;
 377         unsigned long ints;
 378         unsigned long shints;
 379         unsigned long txoverflow;
 380         unsigned long txlpokint;
 381         unsigned long txlpdrop;
 382         unsigned long txlperr;
 383         unsigned long txbeokint;
 384         unsigned long txbedrop;
 385         unsigned long txbeerr;
 386         unsigned long txbkokint;
 387         unsigned long txbkdrop;
 388         unsigned long txbkerr;
 389         unsigned long txviokint;
 390         unsigned long txvidrop;
 391         unsigned long txvierr;
 392         unsigned long txvookint;
 393         unsigned long txvodrop;
 394         unsigned long txvoerr;
 395         unsigned long txbeaconokint;
 396         unsigned long txbeacondrop;
 397         unsigned long txbeaconerr;
 398         unsigned long txmanageokint;
 399         unsigned long txmanagedrop;
 400         unsigned long txmanageerr;
 401         unsigned long txcmdpktokint;
 402         unsigned long txdatapkt;
 403         unsigned long txfeedback;
 404         unsigned long txfeedbackok;
 405         unsigned long txoktotal;
 406         unsigned long txokbytestotal;
 407         unsigned long txokinperiod;
 408         unsigned long txmulticast;
 409         unsigned long txbytesmulticast;
 410         unsigned long txbroadcast;
 411         unsigned long txbytesbroadcast;
 412         unsigned long txunicast;
 413         unsigned long txbytesunicast;
 414         unsigned long rxbytesunicast;
 415         unsigned long txfeedbackfail;
 416         unsigned long txerrtotal;
 417         unsigned long txerrbytestotal;
 418         unsigned long txerrmulticast;
 419         unsigned long txerrbroadcast;
 420         unsigned long txerrunicast;
 421         unsigned long txretrycount;
 422         unsigned long txfeedbackretry;
 423         u8      last_packet_rate;
 424         unsigned long slide_signal_strength[100];
 425         unsigned long slide_evm[100];
 426         unsigned long   slide_rssi_total;
 427         unsigned long slide_evm_total;
 428         long signal_strength;
 429         long signal_quality;
 430         long last_signal_strength_inpercent;
 431         long    recv_signal_power;
 432         u8 rx_rssi_percentage[4];
 433         u8 rx_evm_percentage[2];
 434         long rxSNRdB[4];
 435         struct rt_tx_rahis txrate;
 436         u32 Slide_Beacon_pwdb[100];
 437         u32 Slide_Beacon_Total;
 438         struct rt_smooth_data_4rf cck_adc_pwdb;
 439         u32     CurrentShowTxate;
 440 };
 441
 442 struct channel_access_setting {
 443         u16 SIFS_Timer;
 444         u16 DIFS_Timer;
 445         u16 SlotTimeTimer;
 446         u16 EIFS_Timer;
 447         u16 CWminIndex;
 448         u16 CWmaxIndex;
 449 };
 450
 451 enum two_port_status {
 452         TWO_PORT_STATUS__DEFAULT_ONLY,
 453         TWO_PORT_STATUS__EXTENSION_ONLY,
 454         TWO_PORT_STATUS__EXTENSION_FOLLOW_DEFAULT,
 455         TWO_PORT_STATUS__DEFAULT_G_EXTENSION_N20,
 456         TWO_PORT_STATUS__ADHOC,
 457         TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE
 458 };
 459
 460 struct txbbgain_struct {
 461         long    txbb_iq_amplifygain;
 462         u32     txbbgain_value;
 463 };
 464
 465 struct ccktxbbgain {
 466         u8      ccktxbb_valuearray[8];
 467 };
 468
 469 struct init_gain {
 470         u8      xaagccore1;
 471         u8      xbagccore1;
 472         u8      xcagccore1;
 473         u8      xdagccore1;
 474         u8      cca;
 475
 476 };
 477
 478 struct tx_ring {
 479         u32 *desc;
 480         u8 nStuckCount;
 481         struct tx_ring *next;
 482 } __packed;
 483
 484 struct rtl8192_tx_ring {
 485         struct tx_desc *desc;
 486         dma_addr_t dma;
 487         unsigned int idx;
 488         unsigned int entries;
 489         struct sk_buff_head queue;
 490 };
 491
 492
 493
 494 struct rtl819x_ops {
 495         enum nic_t nic_type;
 496         void (*get_eeprom_size)(struct net_device *dev);
 497         void (*init_adapter_variable)(struct net_device *dev);
 498         void (*init_before_adapter_start)(struct net_device *dev);
 499         bool (*initialize_adapter)(struct net_device *dev);
 500         void (*link_change)(struct net_device *dev);
 501         void (*tx_fill_descriptor)(struct net_device *dev,
 502                                    struct tx_desc *tx_desc,
 503                                    struct cb_desc *cb_desc,
 504                                    struct sk_buff *skb);
 505         void (*tx_fill_cmd_descriptor)(struct net_device *dev,
 506                                        struct tx_desc_cmd *entry,
 507                                        struct cb_desc *cb_desc,
 508                                        struct sk_buff *skb);
 509         bool (*rx_query_status_descriptor)(struct net_device *dev,
 510                                            struct rtllib_rx_stats *stats,
 511                                            struct rx_desc *pdesc,
 512                                            struct sk_buff *skb);
 513         bool (*rx_command_packet_handler)(struct net_device *dev,
 514                                           struct sk_buff *skb,
 515                                           struct rx_desc *pdesc);
 516         void (*stop_adapter)(struct net_device *dev, bool reset);
 517         void (*update_ratr_table)(struct net_device *dev);
 518         void (*irq_enable)(struct net_device *dev);
 519         void (*irq_disable)(struct net_device *dev);
 520         void (*irq_clear)(struct net_device *dev);
 521         void (*rx_enable)(struct net_device *dev);
 522         void (*tx_enable)(struct net_device *dev);
 523         void (*interrupt_recognized)(struct net_device *dev,
 524                                      u32 *p_inta, u32 *p_intb);
 525         bool (*TxCheckStuckHandler)(struct net_device *dev);
 526         bool (*RxCheckStuckHandler)(struct net_device *dev);
 527 };
 528
 529 struct r8192_priv {
 530         struct pci_dev *pdev;
 531         struct pci_dev *bridge_pdev;
 532
 533         bool            bfirst_init;
 534         bool            bfirst_after_down;
 535         bool            initialized_at_probe;
 536         bool            being_init_adapter;
 537         bool            bDriverIsGoingToUnload;
 538
 539         int             irq;
 540         short   irq_enabled;
 541
 542         short   up;
 543         short   up_first_time;
 544         struct delayed_work             update_beacon_wq;
 545         struct delayed_work             watch_dog_wq;
 546         struct delayed_work             txpower_tracking_wq;
 547         struct delayed_work             rfpath_check_wq;
 548         struct delayed_work             gpio_change_rf_wq;
 549         struct delayed_work             initialgain_operate_wq;
 550         struct delayed_work             check_hw_scan_wq;
 551         struct delayed_work             hw_scan_simu_wq;
 552         struct delayed_work             start_hw_scan_wq;
 553
 554         struct workqueue_struct         *priv_wq;
 555
 556         struct channel_access_setting ChannelAccessSetting;
 557
 558         struct mp_adapter NdisAdapter;
 559
 560         struct rtl819x_ops                      *ops;
 561         struct rtllib_device                    *rtllib;
 562
 563         struct work_struct                              reset_wq;
 564
 565         struct log_int_8190 InterruptLog;
 566
 567         enum rt_customer_id CustomerID;
 568
 569
 570         enum rt_rf_type_819xu rf_chip;
 571         enum ic_inferiority_8192s IC_Class;
 572         enum ht_channel_width CurrentChannelBW;
 573         struct bb_reg_definition PHYRegDef[4];
 574         struct rate_adaptive rate_adaptive;
 575
 576         struct ccktxbbgain cck_txbbgain_table[CCKTxBBGainTableLength];
 577         struct ccktxbbgain cck_txbbgain_ch14_table[CCKTxBBGainTableLength];
 578
 579         struct txbbgain_struct txbbgain_table[TxBBGainTableLength];
 580
 581         enum acm_method AcmMethod;
 582
 583         struct rt_firmware                      *pFirmware;
 584         enum rtl819x_loopback LoopbackMode;
 585
 586         struct timer_list                       watch_dog_timer;
 587         struct timer_list                       fsync_timer;
 588         struct timer_list                       gpio_polling_timer;
 589
 590         spinlock_t                              fw_scan_lock;
 591         spinlock_t                              irq_lock;
 592         spinlock_t                              irq_th_lock;
 593         spinlock_t                              tx_lock;
 594         spinlock_t                              rf_ps_lock;
 595         spinlock_t                              rw_lock;
 596         spinlock_t                              rt_h2c_lock;
 597         spinlock_t                              rf_lock;
 598         spinlock_t                              ps_lock;
 599
 600         struct sk_buff_head             rx_queue;
 601         struct sk_buff_head             skb_queue;
 602
 603         struct tasklet_struct           irq_rx_tasklet;
 604         struct tasklet_struct           irq_tx_tasklet;
 605         struct tasklet_struct           irq_prepare_beacon_tasklet;
 606
 607         struct semaphore                        wx_sem;
 608         struct semaphore                        rf_sem;
 609         struct mutex                            mutex;
 610
 611         struct rt_stats stats;
 612         struct iw_statistics                    wstats;
 613         struct proc_dir_entry           *dir_dev;
 614
 615         short (*rf_set_sens)(struct net_device *dev, short sens);
 616         u8 (*rf_set_chan)(struct net_device *dev, u8 ch);
 617         void (*rf_close)(struct net_device *dev);
 618         void (*rf_init)(struct net_device *dev);
 619
 620         struct rx_desc *rx_ring[MAX_RX_QUEUE];
 621         struct sk_buff  *rx_buf[MAX_RX_QUEUE][MAX_RX_COUNT];
 622         dma_addr_t      rx_ring_dma[MAX_RX_QUEUE];
 623         unsigned int    rx_idx[MAX_RX_QUEUE];
 624         int             rxringcount;
 625         u16             rxbuffersize;
 626
 627         u64             LastRxDescTSF;
 628
 629         u16             EarlyRxThreshold;
 630         u32             ReceiveConfig;
 631         u8              AcmControl;
 632         u8              RFProgType;
 633         u8              retry_data;
 634         u8              retry_rts;
 635         u16             rts;
 636
 637         struct rtl8192_tx_ring tx_ring[MAX_TX_QUEUE_COUNT];
 638         int              txringcount;
 639         int             txbuffsize;
 640         int             txfwbuffersize;
 641         atomic_t        tx_pending[0x10];
 642
 643         u16             ShortRetryLimit;
 644         u16             LongRetryLimit;
 645         u32             TransmitConfig;
 646         u8              RegCWinMin;
 647         u8              keepAliveLevel;
 648
 649         bool            sw_radio_on;
 650         bool            bHwRadioOff;
 651         bool            pwrdown;
 652         bool            blinked_ingpio;
 653         u8              polling_timer_on;
 654
 655         /**********************************************************/
 656
 657         enum card_type {
 658                 PCI, MINIPCI,
 659                 CARDBUS, USB
 660         } card_type;
 661
 662         struct work_struct qos_activate;
 663
 664         u8 bIbssCoordinator;
 665
 666         short   promisc;
 667         short   crcmon;
 668
 669         int txbeaconcount;
 670
 671         short   chan;
 672         short   sens;
 673         short   max_sens;
 674         u32 rx_prevlen;
 675
 676         u8 ScanDelay;
 677         bool ps_force;
 678
 679         u32 irq_mask[2];
 680
 681         u8 Rf_Mode;
 682         enum nic_t card_8192;
 683         u8 card_8192_version;
 684
 685         short   enable_gpio0;
 686
 687         u8 rf_type;
 688         u8 IC_Cut;
 689         char nick[IW_ESSID_MAX_SIZE + 1];
 690
 691         u8 RegBcnCtrlVal;
 692         bool bHwAntDiv;
 693
 694         bool bTKIPinNmodeFromReg;
 695         bool bWEPinNmodeFromReg;
 696
 697         bool bLedOpenDrain;
 698
 699         u8 check_roaming_cnt;
 700
 701         bool bIgnoreSilentReset;
 702         u32 SilentResetRxSoltNum;
 703         u32 SilentResetRxSlotIndex;
 704         u32 SilentResetRxStuckEvent[MAX_SILENT_RESET_RX_SLOT_NUM];
 705
 706         void *scan_cmd;
 707         u8 hwscan_bw_40;
 708
 709         u16 nrxAMPDU_size;
 710         u8 nrxAMPDU_aggr_num;
 711
 712         u32 last_rxdesc_tsf_high;
 713         u32 last_rxdesc_tsf_low;
 714
 715         u16 basic_rate;
 716         u8 short_preamble;
 717         u8 dot11CurrentPreambleMode;
 718         u8 slot_time;
 719         u16 SifsTime;
 720
 721         u8 RegWirelessMode;
 722
 723         u8 firmware_version;
 724         u16 FirmwareSubVersion;
 725         u16 rf_pathmap;
 726         bool AutoloadFailFlag;
 727
 728         u8 RegPciASPM;
 729         u8 RegAMDPciASPM;
 730         u8 RegHwSwRfOffD3;
 731         u8 RegSupportPciASPM;
 732         bool bSupportASPM;
 733
 734         u32 RfRegChnlVal[2];
 735
 736         u8 ShowRateMode;
 737         u8 RATRTableBitmap;
 738
 739         u8 EfuseMap[2][HWSET_MAX_SIZE_92S];
 740         u16 EfuseUsedBytes;
 741         u8 EfuseUsedPercentage;
 742
 743         short   epromtype;
 744         u16 eeprom_vid;
 745         u16 eeprom_did;
 746         u16 eeprom_svid;
 747         u16 eeprom_smid;
 748         u8 eeprom_CustomerID;
 749         u16 eeprom_ChannelPlan;
 750         u8 eeprom_version;
 751
 752         u8 EEPROMRegulatory;
 753         u8 EEPROMPwrGroup[2][3];
 754         u8 EEPROMOptional;
 755
 756         u8 EEPROMTxPowerLevelCCK[14];
 757         u8 EEPROMTxPowerLevelOFDM24G[14];
 758         u8 EEPROMTxPowerLevelOFDM5G[24];
 759         u8 EEPROMRfACCKChnl1TxPwLevel[3];
 760         u8 EEPROMRfAOfdmChnlTxPwLevel[3];
 761         u8 EEPROMRfCCCKChnl1TxPwLevel[3];
 762         u8 EEPROMRfCOfdmChnlTxPwLevel[3];
 763         u16 EEPROMTxPowerDiff;
 764         u16 EEPROMAntPwDiff;
 765         u8 EEPROMThermalMeter;
 766         u8 EEPROMPwDiff;
 767         u8 EEPROMCrystalCap;
 768
 769         u8 EEPROMBluetoothCoexist;
 770         u8 EEPROMBluetoothType;
 771         u8 EEPROMBluetoothAntNum;
 772         u8 EEPROMBluetoothAntIsolation;
 773         u8 EEPROMBluetoothRadioShared;
 774
 775
 776         u8 EEPROMSupportWoWLAN;
 777         u8 EEPROMBoardType;
 778         u8 EEPROM_Def_Ver;
 779         u8 EEPROMHT2T_TxPwr[6];
 780         u8 EEPROMTSSI_A;
 781         u8 EEPROMTSSI_B;
 782         u8 EEPROMTxPowerLevelCCK_V1[3];
 783         u8 EEPROMLegacyHTTxPowerDiff;
 784
 785         u8 BluetoothCoexist;
 786
 787         u8 CrystalCap;
 788         u8 ThermalMeter[2];
 789
 790         u16 FwCmdIOMap;
 791         u32 FwCmdIOParam;
 792
 793         u8 SwChnlInProgress;
 794         u8 SwChnlStage;
 795         u8 SwChnlStep;
 796         u8 SetBWModeInProgress;
 797
 798         u8 nCur40MhzPrimeSC;
 799
 800         u32 RfReg0Value[4];
 801         u8 NumTotalRFPath;
 802         bool brfpath_rxenable[4];
 803
 804         bool bTXPowerDataReadFromEEPORM;
 805
 806         u16 RegChannelPlan;
 807         u16 ChannelPlan;
 808         bool bChnlPlanFromHW;
 809
 810         bool RegRfOff;
 811         bool isRFOff;
 812         bool bInPowerSaveMode;
 813         u8 bHwRfOffAction;
 814
 815         bool aspm_clkreq_enable;
 816         u32 pci_bridge_vendor;
 817         u8 RegHostPciASPMSetting;
 818         u8 RegDevicePciASPMSetting;
 819
 820         bool RFChangeInProgress;
 821         bool SetRFPowerStateInProgress;
 822         bool bdisable_nic;
 823
 824         u8 pwrGroupCnt;
 825
 826         u8 ThermalValue_LCK;
 827         u8 ThermalValue_IQK;
 828         bool bRfPiEnable;
 829
 830         u32 APKoutput[2][2];
 831         bool bAPKdone;
 832
 833         long RegE94;
 834         long RegE9C;
 835         long RegEB4;
 836         long RegEBC;
 837
 838         u32 RegC04;
 839         u32 Reg874;
 840         u32 RegC08;
 841         u32 ADDA_backup[16];
 842         u32 IQK_MAC_backup[3];
 843
 844         bool SetFwCmdInProgress;
 845         u8 CurrentFwCmdIO;
 846
 847         u8 rssi_level;
 848
 849         bool bInformFWDriverControlDM;
 850         u8 PwrGroupHT20[2][14];
 851         u8 PwrGroupHT40[2][14];
 852
 853         u8 ThermalValue;
 854         long EntryMinUndecoratedSmoothedPWDB;
 855         long EntryMaxUndecoratedSmoothedPWDB;
 856         u8 DynamicTxHighPowerLvl;
 857         u8 LastDTPLvl;
 858         u32 CurrentRATR0;
 859         struct false_alarm_stats FalseAlmCnt;
 860
 861         u8 DMFlag;
 862         u8 DM_Type;
 863
 864         u8 CckPwEnl;
 865         u16 TSSI_13dBm;
 866         u32 Pwr_Track;
 867         u8 CCKPresentAttentuation_20Mdefault;
 868         u8 CCKPresentAttentuation_40Mdefault;
 869         char CCKPresentAttentuation_difference;
 870         char CCKPresentAttentuation;
 871         u8 bCckHighPower;
 872         long undecorated_smoothed_pwdb;
 873         long undecorated_smoothed_cck_adc_pwdb[4];
 874
 875         u32 MCSTxPowerLevelOriginalOffset[6];
 876         u32 CCKTxPowerLevelOriginalOffset;
 877         u8 TxPowerLevelCCK[14];
 878         u8 TxPowerLevelCCK_A[14];
 879         u8 TxPowerLevelCCK_C[14];
 880         u8              TxPowerLevelOFDM24G[14];
 881         u8              TxPowerLevelOFDM5G[14];
 882         u8              TxPowerLevelOFDM24G_A[14];
 883         u8              TxPowerLevelOFDM24G_C[14];
 884         u8              LegacyHTTxPowerDiff;
 885         u8              TxPowerDiff;
 886         s8              RF_C_TxPwDiff;
 887         s8              RF_B_TxPwDiff;
 888         u8              RfTxPwrLevelCck[2][14];
 889         u8              RfTxPwrLevelOfdm1T[2][14];
 890         u8              RfTxPwrLevelOfdm2T[2][14];
 891         u8              AntennaTxPwDiff[3];
 892         u8              TxPwrHt20Diff[2][14];
 893         u8              TxPwrLegacyHtDiff[2][14];
 894         u8              TxPwrSafetyFlag;
 895         u8              HT2T_TxPwr_A[14];
 896         u8              HT2T_TxPwr_B[14];
 897         u8              CurrentCckTxPwrIdx;
 898         u8              CurrentOfdm24GTxPwrIdx;
 899
 900         bool            bdynamic_txpower;
 901         bool            bDynamicTxHighPower;
 902         bool            bDynamicTxLowPower;
 903         bool            bLastDTPFlag_High;
 904         bool            bLastDTPFlag_Low;
 905
 906         bool            bstore_last_dtpflag;
 907         bool            bstart_txctrl_bydtp;
 908
 909         u8              rfa_txpowertrackingindex;
 910         u8              rfa_txpowertrackingindex_real;
 911         u8              rfa_txpowertracking_default;
 912         u8              rfc_txpowertrackingindex;
 913         u8              rfc_txpowertrackingindex_real;
 914         u8              rfc_txpowertracking_default;
 915         bool            btxpower_tracking;
 916         bool            bcck_in_ch14;
 917
 918         u8              TxPowerTrackControl;
 919         u8              txpower_count;
 920         bool            btxpower_trackingInit;
 921
 922         u8              OFDM_index[2];
 923         u8              CCK_index;
 924
 925         u8              Record_CCK_20Mindex;
 926         u8              Record_CCK_40Mindex;
 927
 928         struct init_gain initgain_backup;
 929         u8              DefaultInitialGain[4];
 930         bool            bis_any_nonbepkts;
 931         bool            bcurrent_turbo_EDCA;
 932         bool            bis_cur_rdlstate;
 933
 934         bool            bCCKinCH14;
 935
 936         u8              MidHighPwrTHR_L1;
 937         u8              MidHighPwrTHR_L2;
 938
 939         bool            bfsync_processing;
 940         u32             rate_record;
 941         u32             rateCountDiffRecord;
 942         u32             ContinueDiffCount;
 943         bool            bswitch_fsync;
 944         u8              framesync;
 945         u32             framesyncC34;
 946         u8              framesyncMonitor;
 947
 948         bool            bDMInitialGainEnable;
 949         bool            MutualAuthenticationFail;
 950
 951         bool            bDisableFrameBursting;
 952
 953         u32             reset_count;
 954         bool            bpbc_pressed;
 955
 956         u32             txpower_checkcnt;
 957         u32             txpower_tracking_callback_cnt;
 958         u8              thermal_read_val[40];
 959         u8              thermal_readback_index;
 960         u32             ccktxpower_adjustcnt_not_ch14;
 961         u32             ccktxpower_adjustcnt_ch14;
 962
 963         enum reset_type ResetProgress;
 964         bool            bForcedSilentReset;
 965         bool            bDisableNormalResetCheck;
 966         u16             TxCounter;
 967         u16             RxCounter;
 968         int             IrpPendingCount;
 969         bool            bResetInProgress;
 970         bool            force_reset;
 971         bool            force_lps;
 972         u8              InitialGainOperateType;
 973
 974         bool            chan_forced;
 975         bool            bSingleCarrier;
 976         bool            RegBoard;
 977         bool            bCckContTx;
 978         bool            bOfdmContTx;
 979         bool            bStartContTx;
 980         u8              RegPaModel;
 981         u8              btMpCckTxPower;
 982         u8              btMpOfdmTxPower;
 983
 984         u32             MptActType;
 985         u32             MptIoOffset;
 986         u32             MptIoValue;
 987         u32             MptRfPath;
 988
 989         u32             MptBandWidth;
 990         u32             MptRateIndex;
 991         u8              MptChannelToSw;
 992         u32     MptRCR;
 993
 994         u8              PwrDomainProtect;
 995         u8              H2CTxCmdSeq;
 996
 997
 998 };
 999
1000 extern const struct ethtool_ops rtl819x_ethtool_ops;
1001
1002 void rtl8192_tx_cmd(struct net_device *dev, struct sk_buff *skb);
1003 short rtl8192_tx(struct net_device *dev, struct sk_buff *skb);
1004
1005 u8 read_nic_io_byte(struct net_device *dev, int x);
1006 u32 read_nic_io_dword(struct net_device *dev, int x);
1007 u16 read_nic_io_word(struct net_device *dev, int x) ;
1008 void write_nic_io_byte(struct net_device *dev, int x, u8 y);
1009 void write_nic_io_word(struct net_device *dev, int x, u16 y);
1010 void write_nic_io_dword(struct net_device *dev, int x, u32 y);
1011
1012 u8 read_nic_byte(struct net_device *dev, int x);
1013 u32 read_nic_dword(struct net_device *dev, int x);
1014 u16 read_nic_word(struct net_device *dev, int x) ;
1015 void write_nic_byte(struct net_device *dev, int x, u8 y);
1016 void write_nic_word(struct net_device *dev, int x, u16 y);
1017 void write_nic_dword(struct net_device *dev, int x, u32 y);
1018
1019 void force_pci_posting(struct net_device *dev);
1020
1021 void rtl8192_rx_enable(struct net_device *);
1022 void rtl8192_tx_enable(struct net_device *);
1023
1024 int rtl8192_hard_start_xmit(struct sk_buff *skb, struct net_device *dev);
1025 void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev,
1026                             int rate);
1027 void rtl8192_data_hard_stop(struct net_device *dev);
1028 void rtl8192_data_hard_resume(struct net_device *dev);
1029 void rtl8192_restart(void *data);
1030 void rtl819x_watchdog_wqcallback(void *data);
1031 void rtl8192_hw_sleep_wq(void *data);
1032 void watch_dog_timer_callback(unsigned long data);
1033 void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
1034 void rtl8192_irq_tx_tasklet(struct r8192_priv *priv);
1035 int rtl8192_down(struct net_device *dev, bool shutdownrf);
1036 int rtl8192_up(struct net_device *dev);
1037 void rtl8192_commit(struct net_device *dev);
1038 void rtl8192_set_chan(struct net_device *dev, short ch);
1039
1040 void check_rfctrl_gpio_timer(unsigned long data);
1041
1042 void rtl8192_hw_wakeup_wq(void *data);
1043 short rtl8192_pci_initdescring(struct net_device *dev);
1044
1045 void rtl8192_cancel_deferred_work(struct r8192_priv *priv);
1046
1047 int _rtl8192_up(struct net_device *dev, bool is_silent_reset);
1048
1049 short rtl8192_is_tx_queue_empty(struct net_device *dev);
1050 void rtl8192_irq_disable(struct net_device *dev);
1051
1052 void rtl8192_tx_timeout(struct net_device *dev);
1053 void rtl8192_pci_resetdescring(struct net_device *dev);
1054 void rtl8192_SetWirelessMode(struct net_device *dev, u8 wireless_mode);
1055 void rtl8192_irq_enable(struct net_device *dev);
1056 void rtl8192_config_rate(struct net_device *dev, u16 *rate_config);
1057 void rtl8192_update_cap(struct net_device *dev, u16 cap);
1058 void rtl8192_irq_disable(struct net_device *dev);
1059
1060 void rtl819x_UpdateRxPktTimeStamp(struct net_device *dev,
1061                                   struct rtllib_rx_stats *stats);
1062 long rtl819x_translate_todbm(struct r8192_priv *priv, u8 signal_strength_index);
1063 void rtl819x_update_rxsignalstatistics8190pci(struct r8192_priv *priv,
1064                                       struct rtllib_rx_stats *pprevious_stats);
1065 u8 rtl819x_evm_dbtopercentage(char value);
1066 void rtl819x_process_cck_rxpathsel(struct r8192_priv *priv,
1067                                    struct rtllib_rx_stats *pprevious_stats);
1068 u8 rtl819x_query_rxpwrpercentage(char antpower);
1069 void rtl8192_record_rxdesc_forlateruse(struct rtllib_rx_stats *psrc_stats,
1070                                        struct rtllib_rx_stats *ptarget_stats);
1071 bool NicIFEnableNIC(struct net_device *dev);
1072 bool NicIFDisableNIC(struct net_device *dev);
1073
1074 bool MgntActSet_RF_State(struct net_device *dev,
1075                          enum rt_rf_power_state StateToSet,
1076                          RT_RF_CHANGE_SOURCE ChangeSource,
1077                          bool   ProtectOrNot);
1078 void ActUpdateChannelAccessSetting(struct net_device *dev,
1079                            enum wireless_mode WirelessMode,
1080                            struct channel_access_setting *ChnlAccessSetting);
1081
1082 #endif