2 * NVEC: NVIDIA compliant embedded controller interface
4 * Copyright (C) 2011 The AC100 Kernel Team <ac100@lists.lauchpad.net>
6 * Authors: Pierre-Hugues Husson <phhusson@free.fr>
7 * Ilya Petrov <ilya.muromec@gmail.com>
8 * Marc Dietrich <marvin24@gmx.de>
9 * Julian Andres Klode <jak@jak-linux.org>
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/atomic.h>
22 #include <linux/clk.h>
23 #include <linux/completion.h>
24 #include <linux/delay.h>
25 #include <linux/err.h>
26 #include <linux/gpio.h>
27 #include <linux/interrupt.h>
29 #include <linux/irq.h>
31 #include <linux/of_gpio.h>
32 #include <linux/list.h>
33 #include <linux/mfd/core.h>
34 #include <linux/mutex.h>
35 #include <linux/notifier.h>
36 #include <linux/slab.h>
37 #include <linux/spinlock.h>
38 #include <linux/workqueue.h>
43 #define I2C_CNFG_PACKET_MODE_EN (1<<10)
44 #define I2C_CNFG_NEW_MASTER_SFM (1<<11)
45 #define I2C_CNFG_DEBOUNCE_CNT_SHIFT 12
47 #define I2C_SL_CNFG 0x20
48 #define I2C_SL_NEWSL (1<<2)
49 #define I2C_SL_NACK (1<<1)
50 #define I2C_SL_RESP (1<<0)
51 #define I2C_SL_IRQ (1<<3)
52 #define END_TRANS (1<<4)
56 #define I2C_SL_RCVD 0x24
57 #define I2C_SL_STATUS 0x28
58 #define I2C_SL_ADDR1 0x2c
59 #define I2C_SL_ADDR2 0x30
60 #define I2C_SL_DELAY_COUNT 0x3c
63 * enum nvec_msg_category - Message categories for nvec_msg_alloc()
64 * @NVEC_MSG_RX: The message is an incoming message (from EC)
65 * @NVEC_MSG_TX: The message is an outgoing message (to EC)
67 enum nvec_msg_category {
72 enum nvec_sleep_subcmds {
78 #define CNF_EVENT_REPORTING 0x01
79 #define GET_FIRMWARE_VERSION 0x15
80 #define LID_SWITCH BIT(1)
81 #define PWR_BUTTON BIT(15)
83 static struct nvec_chip *nvec_power_handle;
85 static const struct mfd_cell nvec_devices[] = {
103 .name = "nvec-paz00",
109 * nvec_register_notifier - Register a notifier with nvec
110 * @nvec: A &struct nvec_chip
111 * @nb: The notifier block to register
113 * Registers a notifier with @nvec. The notifier will be added to an atomic
114 * notifier chain that is called for all received messages except those that
115 * correspond to a request initiated by nvec_write_sync().
117 int nvec_register_notifier(struct nvec_chip *nvec, struct notifier_block *nb,
120 return atomic_notifier_chain_register(&nvec->notifier_list, nb);
122 EXPORT_SYMBOL_GPL(nvec_register_notifier);
125 * nvec_unregister_notifier - Unregister a notifier with nvec
126 * @nvec: A &struct nvec_chip
127 * @nb: The notifier block to unregister
129 * Unregisters a notifier with @nvec. The notifier will be removed from the
130 * atomic notifier chain.
132 int nvec_unregister_notifier(struct nvec_chip *nvec, struct notifier_block *nb)
134 return atomic_notifier_chain_unregister(&nvec->notifier_list, nb);
136 EXPORT_SYMBOL_GPL(nvec_unregister_notifier);
139 * nvec_status_notifier - The final notifier
141 * Prints a message about control events not handled in the notifier
144 static int nvec_status_notifier(struct notifier_block *nb,
145 unsigned long event_type, void *data)
147 struct nvec_chip *nvec = container_of(nb, struct nvec_chip,
148 nvec_status_notifier);
149 unsigned char *msg = (unsigned char *)data;
151 if (event_type != NVEC_CNTL)
154 dev_warn(nvec->dev, "unhandled msg type %ld\n", event_type);
155 print_hex_dump(KERN_WARNING, "payload: ", DUMP_PREFIX_NONE, 16, 1,
156 msg, msg[1] + 2, true);
163 * @nvec: A &struct nvec_chip
164 * @category: Pool category, see &enum nvec_msg_category
166 * Allocate a single &struct nvec_msg object from the message pool of
167 * @nvec. The result shall be passed to nvec_msg_free() if no longer
170 * Outgoing messages are placed in the upper 75% of the pool, keeping the
171 * lower 25% available for RX buffers only. The reason is to prevent a
172 * situation where all buffers are full and a message is thus endlessly
173 * retried because the response could never be processed.
175 static struct nvec_msg *nvec_msg_alloc(struct nvec_chip *nvec,
176 enum nvec_msg_category category)
178 int i = (category == NVEC_MSG_TX) ? (NVEC_POOL_SIZE / 4) : 0;
180 for (; i < NVEC_POOL_SIZE; i++) {
181 if (atomic_xchg(&nvec->msg_pool[i].used, 1) == 0) {
182 dev_vdbg(nvec->dev, "INFO: Allocate %i\n", i);
183 return &nvec->msg_pool[i];
187 dev_err(nvec->dev, "could not allocate %s buffer\n",
188 (category == NVEC_MSG_TX) ? "TX" : "RX");
195 * @nvec: A &struct nvec_chip
196 * @msg: A message (must be allocated by nvec_msg_alloc() and belong to @nvec)
198 * Free the given message
200 void nvec_msg_free(struct nvec_chip *nvec, struct nvec_msg *msg)
202 if (msg != &nvec->tx_scratch)
203 dev_vdbg(nvec->dev, "INFO: Free %ti\n", msg - nvec->msg_pool);
204 atomic_set(&msg->used, 0);
206 EXPORT_SYMBOL_GPL(nvec_msg_free);
209 * nvec_msg_is_event - Return %true if @msg is an event
212 static bool nvec_msg_is_event(struct nvec_msg *msg)
214 return msg->data[0] >> 7;
218 * nvec_msg_size - Get the size of a message
219 * @msg: The message to get the size for
221 * This only works for received messages, not for outgoing messages.
223 static size_t nvec_msg_size(struct nvec_msg *msg)
225 bool is_event = nvec_msg_is_event(msg);
226 int event_length = (msg->data[0] & 0x60) >> 5;
228 /* for variable size, payload size in byte 1 + count (1) + cmd (1) */
229 if (!is_event || event_length == NVEC_VAR_SIZE)
230 return (msg->pos || msg->size) ? (msg->data[1] + 2) : 0;
231 else if (event_length == NVEC_2BYTES)
233 else if (event_length == NVEC_3BYTES)
239 * nvec_gpio_set_value - Set the GPIO value
240 * @nvec: A &struct nvec_chip
241 * @value: The value to write (0 or 1)
243 * Like gpio_set_value(), but generating debugging information
245 static void nvec_gpio_set_value(struct nvec_chip *nvec, int value)
247 dev_dbg(nvec->dev, "GPIO changed from %u to %u\n",
248 gpio_get_value(nvec->gpio), value);
249 gpio_set_value(nvec->gpio, value);
253 * nvec_write_async - Asynchronously write a message to NVEC
254 * @nvec: An nvec_chip instance
255 * @data: The message data, starting with the request type
256 * @size: The size of @data
258 * Queue a single message to be transferred to the embedded controller
259 * and return immediately.
261 * Returns: 0 on success, a negative error code on failure. If a failure
262 * occured, the nvec driver may print an error.
264 int nvec_write_async(struct nvec_chip *nvec, const unsigned char *data,
267 struct nvec_msg *msg;
270 msg = nvec_msg_alloc(nvec, NVEC_MSG_TX);
276 memcpy(msg->data + 1, data, size);
277 msg->size = size + 1;
279 spin_lock_irqsave(&nvec->tx_lock, flags);
280 list_add_tail(&msg->node, &nvec->tx_data);
281 spin_unlock_irqrestore(&nvec->tx_lock, flags);
283 schedule_work(&nvec->tx_work);
287 EXPORT_SYMBOL(nvec_write_async);
290 * nvec_write_sync - Write a message to nvec and read the response
291 * @nvec: An &struct nvec_chip
292 * @data: The data to write
293 * @size: The size of @data
295 * This is similar to nvec_write_async(), but waits for the
296 * request to be answered before returning. This function
297 * uses a mutex and can thus not be called from e.g.
298 * interrupt handlers.
300 * Returns: A pointer to the response message on success,
301 * %NULL on failure. Free with nvec_msg_free() once no longer
304 struct nvec_msg *nvec_write_sync(struct nvec_chip *nvec,
305 const unsigned char *data, short size)
307 struct nvec_msg *msg;
309 mutex_lock(&nvec->sync_write_mutex);
311 nvec->sync_write_pending = (data[1] << 8) + data[0];
313 if (nvec_write_async(nvec, data, size) < 0) {
314 mutex_unlock(&nvec->sync_write_mutex);
318 dev_dbg(nvec->dev, "nvec_sync_write: 0x%04x\n",
319 nvec->sync_write_pending);
320 if (!(wait_for_completion_timeout(&nvec->sync_write,
321 msecs_to_jiffies(2000)))) {
322 dev_warn(nvec->dev, "timeout waiting for sync write to complete\n");
323 mutex_unlock(&nvec->sync_write_mutex);
327 dev_dbg(nvec->dev, "nvec_sync_write: pong!\n");
329 msg = nvec->last_sync_msg;
331 mutex_unlock(&nvec->sync_write_mutex);
335 EXPORT_SYMBOL(nvec_write_sync);
338 * nvec_toggle_global_events - enables or disables global event reporting
340 * @state: true for enable, false for disable
342 * This switches on/off global event reports by the embedded controller.
344 static void nvec_toggle_global_events(struct nvec_chip *nvec, bool state)
346 unsigned char global_events[] = { NVEC_SLEEP, GLOBAL_EVENTS, state };
348 nvec_write_async(nvec, global_events, 3);
352 * nvec_event_mask - fill the command string with event bitfield
353 * ev: points to event command string
354 * mask: bit to insert into the event mask
356 * Configure event command expects a 32 bit bitfield which describes
357 * which events to enable. The bitfield has the following structure
358 * (from highest byte to lowest):
359 * system state bits 7-0
360 * system state bits 15-8
361 * oem system state bits 7-0
362 * oem system state bits 15-8
364 static void nvec_event_mask(char *ev, u32 mask)
366 ev[3] = mask >> 16 & 0xff;
367 ev[4] = mask >> 24 & 0xff;
368 ev[5] = mask >> 0 & 0xff;
369 ev[6] = mask >> 8 & 0xff;
373 * nvec_request_master - Process outgoing messages
374 * @work: A &struct work_struct (the tx_worker member of &struct nvec_chip)
376 * Processes all outgoing requests by sending the request and awaiting the
377 * response, then continuing with the next request. Once a request has a
378 * matching response, it will be freed and removed from the list.
380 static void nvec_request_master(struct work_struct *work)
382 struct nvec_chip *nvec = container_of(work, struct nvec_chip, tx_work);
385 struct nvec_msg *msg;
387 spin_lock_irqsave(&nvec->tx_lock, flags);
388 while (!list_empty(&nvec->tx_data)) {
389 msg = list_first_entry(&nvec->tx_data, struct nvec_msg, node);
390 spin_unlock_irqrestore(&nvec->tx_lock, flags);
391 nvec_gpio_set_value(nvec, 0);
392 err = wait_for_completion_interruptible_timeout(
393 &nvec->ec_transfer, msecs_to_jiffies(5000));
396 dev_warn(nvec->dev, "timeout waiting for ec transfer\n");
397 nvec_gpio_set_value(nvec, 1);
401 spin_lock_irqsave(&nvec->tx_lock, flags);
404 list_del_init(&msg->node);
405 nvec_msg_free(nvec, msg);
408 spin_unlock_irqrestore(&nvec->tx_lock, flags);
412 * parse_msg - Print some information and call the notifiers on an RX message
413 * @nvec: A &struct nvec_chip
414 * @msg: A message received by @nvec
416 * Paarse some pieces of the message and then call the chain of notifiers
417 * registered via nvec_register_notifier.
419 static int parse_msg(struct nvec_chip *nvec, struct nvec_msg *msg)
421 if ((msg->data[0] & 1 << 7) == 0 && msg->data[3]) {
422 dev_err(nvec->dev, "ec responded %*ph\n", 4, msg->data);
426 if ((msg->data[0] >> 7) == 1 && (msg->data[0] & 0x0f) == 5)
427 print_hex_dump(KERN_WARNING, "ec system event ",
428 DUMP_PREFIX_NONE, 16, 1, msg->data,
429 msg->data[1] + 2, true);
431 atomic_notifier_call_chain(&nvec->notifier_list, msg->data[0] & 0x8f,
438 * nvec_dispatch - Process messages received from the EC
439 * @work: A &struct work_struct (the tx_worker member of &struct nvec_chip)
441 * Process messages previously received from the EC and put into the RX
442 * queue of the &struct nvec_chip instance associated with @work.
444 static void nvec_dispatch(struct work_struct *work)
446 struct nvec_chip *nvec = container_of(work, struct nvec_chip, rx_work);
448 struct nvec_msg *msg;
450 spin_lock_irqsave(&nvec->rx_lock, flags);
451 while (!list_empty(&nvec->rx_data)) {
452 msg = list_first_entry(&nvec->rx_data, struct nvec_msg, node);
453 list_del_init(&msg->node);
454 spin_unlock_irqrestore(&nvec->rx_lock, flags);
456 if (nvec->sync_write_pending ==
457 (msg->data[2] << 8) + msg->data[0]) {
458 dev_dbg(nvec->dev, "sync write completed!\n");
459 nvec->sync_write_pending = 0;
460 nvec->last_sync_msg = msg;
461 complete(&nvec->sync_write);
463 parse_msg(nvec, msg);
464 nvec_msg_free(nvec, msg);
466 spin_lock_irqsave(&nvec->rx_lock, flags);
468 spin_unlock_irqrestore(&nvec->rx_lock, flags);
472 * nvec_tx_completed - Complete the current transfer
473 * @nvec: A &struct nvec_chip
475 * This is called when we have received an END_TRANS on a TX transfer.
477 static void nvec_tx_completed(struct nvec_chip *nvec)
479 /* We got an END_TRANS, let's skip this, maybe there's an event */
480 if (nvec->tx->pos != nvec->tx->size) {
481 dev_err(nvec->dev, "premature END_TRANS, resending\n");
483 nvec_gpio_set_value(nvec, 0);
490 * nvec_rx_completed - Complete the current transfer
491 * @nvec: A &struct nvec_chip
493 * This is called when we have received an END_TRANS on a RX transfer.
495 static void nvec_rx_completed(struct nvec_chip *nvec)
497 if (nvec->rx->pos != nvec_msg_size(nvec->rx)) {
498 dev_err(nvec->dev, "RX incomplete: Expected %u bytes, got %u\n",
499 (uint) nvec_msg_size(nvec->rx),
500 (uint) nvec->rx->pos);
502 nvec_msg_free(nvec, nvec->rx);
505 /* Battery quirk - Often incomplete, and likes to crash */
506 if (nvec->rx->data[0] == NVEC_BAT)
507 complete(&nvec->ec_transfer);
512 spin_lock(&nvec->rx_lock);
514 /* add the received data to the work list
515 and move the ring buffer pointer to the next entry */
516 list_add_tail(&nvec->rx->node, &nvec->rx_data);
518 spin_unlock(&nvec->rx_lock);
522 if (!nvec_msg_is_event(nvec->rx))
523 complete(&nvec->ec_transfer);
525 schedule_work(&nvec->rx_work);
529 * nvec_invalid_flags - Send an error message about invalid flags and jump
530 * @nvec: The nvec device
531 * @status: The status flags
532 * @reset: Whether we shall jump to state 0.
534 static void nvec_invalid_flags(struct nvec_chip *nvec, unsigned int status,
537 dev_err(nvec->dev, "unexpected status flags 0x%02x during state %i\n",
538 status, nvec->state);
544 * nvec_tx_set - Set the message to transfer (nvec->tx)
545 * @nvec: A &struct nvec_chip
547 * Gets the first entry from the tx_data list of @nvec and sets the
548 * tx member to it. If the tx_data list is empty, this uses the
549 * tx_scratch message to send a no operation message.
551 static void nvec_tx_set(struct nvec_chip *nvec)
553 spin_lock(&nvec->tx_lock);
554 if (list_empty(&nvec->tx_data)) {
555 dev_err(nvec->dev, "empty tx - sending no-op\n");
556 memcpy(nvec->tx_scratch.data, "\x02\x07\x02", 3);
557 nvec->tx_scratch.size = 3;
558 nvec->tx_scratch.pos = 0;
559 nvec->tx = &nvec->tx_scratch;
560 list_add_tail(&nvec->tx->node, &nvec->tx_data);
562 nvec->tx = list_first_entry(&nvec->tx_data, struct nvec_msg,
566 spin_unlock(&nvec->tx_lock);
568 dev_dbg(nvec->dev, "Sending message of length %u, command 0x%x\n",
569 (uint)nvec->tx->size, nvec->tx->data[1]);
573 * nvec_interrupt - Interrupt handler
575 * @dev: The nvec device
577 * Interrupt handler that fills our RX buffers and empties our TX
578 * buffers. This uses a finite state machine with ridiculous amounts
579 * of error checking, in order to be fairly reliable.
581 static irqreturn_t nvec_interrupt(int irq, void *dev)
583 unsigned long status;
584 unsigned int received = 0;
585 unsigned char to_send = 0xff;
586 const unsigned long irq_mask = I2C_SL_IRQ | END_TRANS | RCVD | RNW;
587 struct nvec_chip *nvec = dev;
588 unsigned int state = nvec->state;
590 status = readl(nvec->base + I2C_SL_STATUS);
592 /* Filter out some errors */
593 if ((status & irq_mask) == 0 && (status & ~irq_mask) != 0) {
594 dev_err(nvec->dev, "unexpected irq mask %lx\n", status);
597 if ((status & I2C_SL_IRQ) == 0) {
598 dev_err(nvec->dev, "Spurious IRQ\n");
602 /* The EC did not request a read, so it send us something, read it */
603 if ((status & RNW) == 0) {
604 received = readl(nvec->base + I2C_SL_RCVD);
606 writel(0, nvec->base + I2C_SL_RCVD);
609 if (status == (I2C_SL_IRQ | RCVD))
612 switch (nvec->state) {
613 case 0: /* Verify that its a transfer start, the rest later */
614 if (status != (I2C_SL_IRQ | RCVD))
615 nvec_invalid_flags(nvec, status, false);
617 case 1: /* command byte */
618 if (status != I2C_SL_IRQ) {
619 nvec_invalid_flags(nvec, status, true);
621 nvec->rx = nvec_msg_alloc(nvec, NVEC_MSG_RX);
622 /* Should not happen in a normal world */
623 if (unlikely(nvec->rx == NULL)) {
627 nvec->rx->data[0] = received;
632 case 2: /* first byte after command */
633 if (status == (I2C_SL_IRQ | RNW | RCVD)) {
635 if (nvec->rx->data[0] != 0x01) {
637 "Read without prior read command\n");
641 nvec_msg_free(nvec, nvec->rx);
644 BUG_ON(nvec->tx->size < 1);
645 to_send = nvec->tx->data[0];
647 } else if (status == (I2C_SL_IRQ)) {
648 BUG_ON(nvec->rx == NULL);
649 nvec->rx->data[1] = received;
653 nvec_invalid_flags(nvec, status, true);
656 case 3: /* EC does a block read, we transmit data */
657 if (status & END_TRANS) {
658 nvec_tx_completed(nvec);
659 } else if ((status & RNW) == 0 || (status & RCVD)) {
660 nvec_invalid_flags(nvec, status, true);
661 } else if (nvec->tx && nvec->tx->pos < nvec->tx->size) {
662 to_send = nvec->tx->data[nvec->tx->pos++];
664 dev_err(nvec->dev, "tx buffer underflow on %p (%u > %u)\n",
666 (uint) (nvec->tx ? nvec->tx->pos : 0),
667 (uint) (nvec->tx ? nvec->tx->size : 0));
671 case 4: /* EC does some write, we read the data */
672 if ((status & (END_TRANS | RNW)) == END_TRANS)
673 nvec_rx_completed(nvec);
674 else if (status & (RNW | RCVD))
675 nvec_invalid_flags(nvec, status, true);
676 else if (nvec->rx && nvec->rx->pos < NVEC_MSG_SIZE)
677 nvec->rx->data[nvec->rx->pos++] = received;
680 "RX buffer overflow on %p: Trying to write byte %u of %u\n",
681 nvec->rx, nvec->rx ? nvec->rx->pos : 0,
688 /* If we are told that a new transfer starts, verify it */
689 if ((status & (RCVD | RNW)) == RCVD) {
690 if (received != nvec->i2c_addr)
692 "received address 0x%02x, expected 0x%02x\n",
693 received, nvec->i2c_addr);
697 /* Send data if requested, but not on end of transmission */
698 if ((status & (RNW | END_TRANS)) == RNW)
699 writel(to_send, nvec->base + I2C_SL_RCVD);
701 /* If we have send the first byte */
702 if (status == (I2C_SL_IRQ | RNW | RCVD))
703 nvec_gpio_set_value(nvec, 1);
706 "Handled: %s 0x%02x, %s 0x%02x in state %u [%s%s%s]\n",
707 (status & RNW) == 0 ? "received" : "R=",
709 (status & (RNW | END_TRANS)) ? "sent" : "S=",
712 status & END_TRANS ? " END_TRANS" : "",
713 status & RCVD ? " RCVD" : "",
714 status & RNW ? " RNW" : "");
718 * TODO: A correct fix needs to be found for this.
720 * We experience less incomplete messages with this delay than without
721 * it, but we don't know why. Help is appreciated.
728 static void tegra_init_i2c_slave(struct nvec_chip *nvec)
732 clk_prepare_enable(nvec->i2c_clk);
734 reset_control_assert(nvec->rst);
736 reset_control_deassert(nvec->rst);
738 val = I2C_CNFG_NEW_MASTER_SFM | I2C_CNFG_PACKET_MODE_EN |
739 (0x2 << I2C_CNFG_DEBOUNCE_CNT_SHIFT);
740 writel(val, nvec->base + I2C_CNFG);
742 clk_set_rate(nvec->i2c_clk, 8 * 80000);
744 writel(I2C_SL_NEWSL, nvec->base + I2C_SL_CNFG);
745 writel(0x1E, nvec->base + I2C_SL_DELAY_COUNT);
747 writel(nvec->i2c_addr>>1, nvec->base + I2C_SL_ADDR1);
748 writel(0, nvec->base + I2C_SL_ADDR2);
750 enable_irq(nvec->irq);
753 #ifdef CONFIG_PM_SLEEP
754 static void nvec_disable_i2c_slave(struct nvec_chip *nvec)
756 disable_irq(nvec->irq);
757 writel(I2C_SL_NEWSL | I2C_SL_NACK, nvec->base + I2C_SL_CNFG);
758 clk_disable_unprepare(nvec->i2c_clk);
762 static void nvec_power_off(void)
764 char ap_pwr_down[] = { NVEC_SLEEP, AP_PWR_DOWN };
766 nvec_toggle_global_events(nvec_power_handle, false);
767 nvec_write_async(nvec_power_handle, ap_pwr_down, 2);
771 * Parse common device tree data
773 static int nvec_i2c_parse_dt_pdata(struct nvec_chip *nvec)
775 nvec->gpio = of_get_named_gpio(nvec->dev->of_node, "request-gpios", 0);
777 if (nvec->gpio < 0) {
778 dev_err(nvec->dev, "no gpio specified");
782 if (of_property_read_u32(nvec->dev->of_node, "slave-addr",
784 dev_err(nvec->dev, "no i2c address specified");
791 static int tegra_nvec_probe(struct platform_device *pdev)
795 struct nvec_chip *nvec;
796 struct nvec_msg *msg;
797 struct resource *res;
799 char get_firmware_version[] = { NVEC_CNTL, GET_FIRMWARE_VERSION },
800 unmute_speakers[] = { NVEC_OEM0, 0x10, 0x59, 0x95 },
801 enable_event[7] = { NVEC_SYS, CNF_EVENT_REPORTING, true };
803 if (!pdev->dev.of_node) {
804 dev_err(&pdev->dev, "must be instantiated using device tree\n");
808 nvec = devm_kzalloc(&pdev->dev, sizeof(struct nvec_chip), GFP_KERNEL);
812 platform_set_drvdata(pdev, nvec);
813 nvec->dev = &pdev->dev;
815 err = nvec_i2c_parse_dt_pdata(nvec);
819 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
820 base = devm_ioremap_resource(&pdev->dev, res);
822 return PTR_ERR(base);
824 nvec->irq = platform_get_irq(pdev, 0);
826 dev_err(&pdev->dev, "no irq resource?\n");
830 i2c_clk = devm_clk_get(&pdev->dev, "div-clk");
831 if (IS_ERR(i2c_clk)) {
832 dev_err(nvec->dev, "failed to get controller clock\n");
836 nvec->rst = devm_reset_control_get(&pdev->dev, "i2c");
837 if (IS_ERR(nvec->rst)) {
838 dev_err(nvec->dev, "failed to get controller reset\n");
839 return PTR_ERR(nvec->rst);
843 nvec->i2c_clk = i2c_clk;
844 nvec->rx = &nvec->msg_pool[0];
846 ATOMIC_INIT_NOTIFIER_HEAD(&nvec->notifier_list);
848 init_completion(&nvec->sync_write);
849 init_completion(&nvec->ec_transfer);
850 mutex_init(&nvec->sync_write_mutex);
851 spin_lock_init(&nvec->tx_lock);
852 spin_lock_init(&nvec->rx_lock);
853 INIT_LIST_HEAD(&nvec->rx_data);
854 INIT_LIST_HEAD(&nvec->tx_data);
855 INIT_WORK(&nvec->rx_work, nvec_dispatch);
856 INIT_WORK(&nvec->tx_work, nvec_request_master);
858 err = devm_gpio_request_one(&pdev->dev, nvec->gpio, GPIOF_OUT_INIT_HIGH,
861 dev_err(nvec->dev, "couldn't request gpio\n");
865 err = devm_request_irq(&pdev->dev, nvec->irq, nvec_interrupt, 0,
868 dev_err(nvec->dev, "couldn't request irq\n");
871 disable_irq(nvec->irq);
873 tegra_init_i2c_slave(nvec);
875 /* enable event reporting */
876 nvec_toggle_global_events(nvec, true);
878 nvec->nvec_status_notifier.notifier_call = nvec_status_notifier;
879 nvec_register_notifier(nvec, &nvec->nvec_status_notifier, 0);
881 nvec_power_handle = nvec;
882 pm_power_off = nvec_power_off;
884 /* Get Firmware Version */
885 msg = nvec_write_sync(nvec, get_firmware_version, 2);
888 dev_warn(nvec->dev, "ec firmware version %02x.%02x.%02x / %02x\n",
889 msg->data[4], msg->data[5], msg->data[6], msg->data[7]);
891 nvec_msg_free(nvec, msg);
894 ret = mfd_add_devices(nvec->dev, -1, nvec_devices,
895 ARRAY_SIZE(nvec_devices), NULL, 0, NULL);
897 dev_err(nvec->dev, "error adding subdevices\n");
899 /* unmute speakers? */
900 nvec_write_async(nvec, unmute_speakers, 4);
902 /* enable lid switch event */
903 nvec_event_mask(enable_event, LID_SWITCH);
904 nvec_write_async(nvec, enable_event, 7);
906 /* enable power button event */
907 nvec_event_mask(enable_event, PWR_BUTTON);
908 nvec_write_async(nvec, enable_event, 7);
913 static int tegra_nvec_remove(struct platform_device *pdev)
915 struct nvec_chip *nvec = platform_get_drvdata(pdev);
917 nvec_toggle_global_events(nvec, false);
918 mfd_remove_devices(nvec->dev);
919 nvec_unregister_notifier(nvec, &nvec->nvec_status_notifier);
920 cancel_work_sync(&nvec->rx_work);
921 cancel_work_sync(&nvec->tx_work);
922 /* FIXME: needs check wether nvec is responsible for power off */
928 #ifdef CONFIG_PM_SLEEP
929 static int nvec_suspend(struct device *dev)
931 struct platform_device *pdev = to_platform_device(dev);
932 struct nvec_chip *nvec = platform_get_drvdata(pdev);
933 struct nvec_msg *msg;
934 char ap_suspend[] = { NVEC_SLEEP, AP_SUSPEND };
936 dev_dbg(nvec->dev, "suspending\n");
938 /* keep these sync or you'll break suspend */
939 nvec_toggle_global_events(nvec, false);
941 msg = nvec_write_sync(nvec, ap_suspend, sizeof(ap_suspend));
942 nvec_msg_free(nvec, msg);
944 nvec_disable_i2c_slave(nvec);
949 static int nvec_resume(struct device *dev)
951 struct platform_device *pdev = to_platform_device(dev);
952 struct nvec_chip *nvec = platform_get_drvdata(pdev);
954 dev_dbg(nvec->dev, "resuming\n");
955 tegra_init_i2c_slave(nvec);
956 nvec_toggle_global_events(nvec, true);
962 static SIMPLE_DEV_PM_OPS(nvec_pm_ops, nvec_suspend, nvec_resume);
964 /* Match table for of_platform binding */
965 static const struct of_device_id nvidia_nvec_of_match[] = {
966 { .compatible = "nvidia,nvec", },
969 MODULE_DEVICE_TABLE(of, nvidia_nvec_of_match);
971 static struct platform_driver nvec_device_driver = {
972 .probe = tegra_nvec_probe,
973 .remove = tegra_nvec_remove,
976 .owner = THIS_MODULE,
978 .of_match_table = nvidia_nvec_of_match,
982 module_platform_driver(nvec_device_driver);
984 MODULE_ALIAS("platform:nvec");
985 MODULE_DESCRIPTION("NVIDIA compliant embedded controller interface");
986 MODULE_AUTHOR("Marc Dietrich <marvin24@gmx.de>");
987 MODULE_LICENSE("GPL");