3 * Support for Intel Camera Imaging ISP subsystem.
4 * Copyright (c) 2015, Intel Corporation.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 #ifndef __ISP2601_CONFIG_H_INCLUDED__
17 #define __ISP2601_CONFIG_H_INCLUDED__
20 #define ISP_VEC_ELEMBITS NUM_BITS
22 #define NUM_SLICE_ELEMS 4
23 #define ROUNDMODE ROUND_NEAREST_EVEN
24 #define MAX_SHIFT_1W (NUM_BITS-1) /* Max number of bits a 1w input can be shifted */
25 #define MAX_SHIFT_2W (2*NUM_BITS-1) /* Max number of bits a 2w input can be shifted */
29 #define HAS_1w_sqrt_u_unit
30 #define HAS_2w_sqrt_u_unit
34 /* Bit widths and element widths defined in HW implementation of BFA */
35 #define BFA_THRESHOLD_BIT_CNT (8)
36 #define BFA_THRESHOLD_MASK ((1<<BFA_THRESHOLD_BIT_CNT)-1)
37 #define BFA_SW_BIT_CNT (7)
38 #define BFA_SW_MASK ((1<<BFA_SW_BIT_CNT)-1)
40 #define BFA_RW_BIT_CNT (7)
41 #define BFA_RW_MASK ((1<<BFA_RW_BIT_CNT)-1)
42 #define BFA_RW_SLOPE_BIT_POS (8)
43 #define BFA_RW_SLOPE_BIT_SHIFT (5)
45 #define BFA_RW_IDX_BIT_CNT (3)
46 #define BFA_RW_FRAC_BIT_CNT (5)
47 #define BFA_RW_LUT0_FRAC_START_BIT (0)
48 #define BFA_RW_LUT0_FRAC_END_BIT (BFA_RW_LUT0_FRAC_START_BIT+BFA_RW_FRAC_BIT_CNT-1) /* 4 */
49 #define BFA_RW_LUT1_FRAC_START_BIT (2)
50 #define BFA_RW_LUT1_FRAC_END_BIT (BFA_RW_LUT1_FRAC_START_BIT+BFA_RW_FRAC_BIT_CNT-1) /* 6 */
51 /* LUT IDX end bit computation, start+idx_bit_cnt-2, one -1 comes as we count
52 * bits from 0, another -1 comes as we use 2 lut table, so idx_bit_cnt is one
54 #define BFA_RW_LUT0_IDX_START_BIT (BFA_RW_LUT0_FRAC_END_BIT+1) /* 5 */
55 #define BFA_RW_LUT0_IDX_END_BIT (BFA_RW_LUT0_IDX_START_BIT+BFA_RW_IDX_BIT_CNT-2) /* 6 */
56 #define BFA_RW_LUT1_IDX_START_BIT (BFA_RW_LUT1_FRAC_END_BIT + 1) /* 7 */
57 #define BFA_RW_LUT1_IDX_END_BIT (BFA_RW_LUT1_IDX_START_BIT+BFA_RW_IDX_BIT_CNT-2) /* 8 */
58 #define BFA_RW_LUT_THRESHOLD (1<<(BFA_RW_LUT1_IDX_END_BIT-1)) /* 0x80 : next bit after lut1 end is set */
59 #define BFA_RW_LUT1_IDX_OFFSET ((1<<(BFA_RW_IDX_BIT_CNT-1))-1) /* 3 */
61 #define BFA_CP_MASK (0xFFFFFF80)
62 #define BFA_SUBABS_SHIFT (6)
63 #define BFA_SUBABS_BIT_CNT (8)
64 #define BFA_SUBABS_MAX ((1<<BFA_SUBABS_BIT_CNT)-1)
65 #define BFA_SUBABSSAT_BIT_CNT (9)
66 #define BFA_SUBABSSAT_MAX ((1<<BFA_SUBABSSAT_BIT_CNT)-1)
67 #define BFA_WEIGHT_SHIFT (6)
69 #endif /* __ISP2601_CONFIG_H_INCLUDED__ */