drivers/staging/iio/meter/ade7754.c

   1 /*
   2  * ADE7754 Polyphase Multifunction Energy Metering IC Driver
   3  *
   4  * Copyright 2010 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/interrupt.h>
  10 #include <linux/irq.h>
  11 #include <linux/delay.h>
  12 #include <linux/mutex.h>
  13 #include <linux/device.h>
  14 #include <linux/kernel.h>
  15 #include <linux/spi/spi.h>
  16 #include <linux/slab.h>
  17 #include <linux/sysfs.h>
  18 #include <linux/list.h>
  19 #include <linux/module.h>
  20
  21 #include <linux/iio/iio.h>
  22 #include <linux/iio/sysfs.h>
  23 #include "meter.h"
  24 #include "ade7754.h"
  25
  26 static int ade7754_spi_write_reg_8(struct device *dev, u8 reg_address, u8 val)
  27 {
  28         int ret;
  29         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  30         struct ade7754_state *st = iio_priv(indio_dev);
  31
  32         mutex_lock(&st->buf_lock);
  33         st->tx[0] = ADE7754_WRITE_REG(reg_address);
  34         st->tx[1] = val;
  35
  36         ret = spi_write(st->us, st->tx, 2);
  37         mutex_unlock(&st->buf_lock);
  38
  39         return ret;
  40 }
  41
  42 static int ade7754_spi_write_reg_16(struct device *dev,
  43                                     u8 reg_address, u16 value)
  44 {
  45         int ret;
  46         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  47         struct ade7754_state *st = iio_priv(indio_dev);
  48
  49         mutex_lock(&st->buf_lock);
  50         st->tx[0] = ADE7754_WRITE_REG(reg_address);
  51         st->tx[1] = (value >> 8) & 0xFF;
  52         st->tx[2] = value & 0xFF;
  53         ret = spi_write(st->us, st->tx, 3);
  54         mutex_unlock(&st->buf_lock);
  55
  56         return ret;
  57 }
  58
  59 static int ade7754_spi_read_reg_8(struct device *dev, u8 reg_address, u8 *val)
  60 {
  61         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  62         struct ade7754_state *st = iio_priv(indio_dev);
  63         int ret;
  64
  65         ret = spi_w8r8(st->us, ADE7754_READ_REG(reg_address));
  66         if (ret < 0) {
  67                 dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
  68                         reg_address);
  69                 return ret;
  70         }
  71         *val = ret;
  72
  73         return 0;
  74 }
  75
  76 static int ade7754_spi_read_reg_16(struct device *dev,
  77                                    u8 reg_address, u16 *val)
  78 {
  79         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  80         struct ade7754_state *st = iio_priv(indio_dev);
  81         int ret;
  82
  83         ret = spi_w8r16be(st->us, ADE7754_READ_REG(reg_address));
  84         if (ret < 0) {
  85                 dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
  86                         reg_address);
  87                 return ret;
  88         }
  89
  90         *val = ret;
  91
  92         return 0;
  93 }
  94
  95 static int ade7754_spi_read_reg_24(struct device *dev,
  96                                    u8 reg_address, u32 *val)
  97 {
  98         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  99         struct ade7754_state *st = iio_priv(indio_dev);
 100         int ret;
 101         struct spi_transfer xfers[] = {
 102                 {
 103                         .tx_buf = st->tx,
 104                         .rx_buf = st->rx,
 105                         .bits_per_word = 8,
 106                         .len = 4,
 107                 },
 108         };
 109
 110         mutex_lock(&st->buf_lock);
 111         st->tx[0] = ADE7754_READ_REG(reg_address);
 112         st->tx[1] = 0;
 113         st->tx[2] = 0;
 114         st->tx[3] = 0;
 115
 116         ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
 117         if (ret) {
 118                 dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
 119                         reg_address);
 120                 goto error_ret;
 121         }
 122         *val = (st->rx[1] << 16) | (st->rx[2] << 8) | st->rx[3];
 123
 124 error_ret:
 125         mutex_unlock(&st->buf_lock);
 126         return ret;
 127 }
 128
 129 static ssize_t ade7754_read_8bit(struct device *dev,
 130                                  struct device_attribute *attr,
 131                                  char *buf)
 132 {
 133         int ret;
 134         u8 val = 0;
 135         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 136
 137         ret = ade7754_spi_read_reg_8(dev, this_attr->address, &val);
 138         if (ret)
 139                 return ret;
 140
 141         return sprintf(buf, "%u\n", val);
 142 }
 143
 144 static ssize_t ade7754_read_16bit(struct device *dev,
 145                                   struct device_attribute *attr,
 146                                   char *buf)
 147 {
 148         int ret;
 149         u16 val = 0;
 150         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 151
 152         ret = ade7754_spi_read_reg_16(dev, this_attr->address, &val);
 153         if (ret)
 154                 return ret;
 155
 156         return sprintf(buf, "%u\n", val);
 157 }
 158
 159 static ssize_t ade7754_read_24bit(struct device *dev,
 160                                   struct device_attribute *attr,
 161                                   char *buf)
 162 {
 163         int ret;
 164         u32 val = 0;
 165         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 166
 167         ret = ade7754_spi_read_reg_24(dev, this_attr->address, &val);
 168         if (ret)
 169                 return ret;
 170
 171         return sprintf(buf, "%u\n", val & 0xFFFFFF);
 172 }
 173
 174 static ssize_t ade7754_write_8bit(struct device *dev,
 175                                   struct device_attribute *attr,
 176                                   const char *buf,
 177                                   size_t len)
 178 {
 179         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 180         int ret;
 181         u8 val;
 182
 183         ret = kstrtou8(buf, 10, &val);
 184         if (ret)
 185                 goto error_ret;
 186         ret = ade7754_spi_write_reg_8(dev, this_attr->address, val);
 187
 188 error_ret:
 189         return ret ? ret : len;
 190 }
 191
 192 static ssize_t ade7754_write_16bit(struct device *dev,
 193                                    struct device_attribute *attr,
 194                                    const char *buf,
 195                                    size_t len)
 196 {
 197         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 198         int ret;
 199         u16 val;
 200
 201         ret = kstrtou16(buf, 10, &val);
 202         if (ret)
 203                 goto error_ret;
 204         ret = ade7754_spi_write_reg_16(dev, this_attr->address, val);
 205
 206 error_ret:
 207         return ret ? ret : len;
 208 }
 209
 210 static int ade7754_reset(struct device *dev)
 211 {
 212         int ret;
 213         u8 val;
 214
 215         ret = ade7754_spi_read_reg_8(dev, ADE7754_OPMODE, &val);
 216         if (ret < 0)
 217                 return ret;
 218
 219         val |= BIT(6); /* Software Chip Reset */
 220         return ade7754_spi_write_reg_8(dev, ADE7754_OPMODE, val);
 221 }
 222
 223 static IIO_DEV_ATTR_AENERGY(ade7754_read_24bit, ADE7754_AENERGY);
 224 static IIO_DEV_ATTR_LAENERGY(ade7754_read_24bit, ADE7754_LAENERGY);
 225 static IIO_DEV_ATTR_VAENERGY(ade7754_read_24bit, ADE7754_VAENERGY);
 226 static IIO_DEV_ATTR_LVAENERGY(ade7754_read_24bit, ADE7754_LVAENERGY);
 227 static IIO_DEV_ATTR_VPEAK(S_IWUSR | S_IRUGO,
 228                 ade7754_read_8bit,
 229                 ade7754_write_8bit,
 230                 ADE7754_VPEAK);
 231 static IIO_DEV_ATTR_IPEAK(S_IWUSR | S_IRUGO,
 232                 ade7754_read_8bit,
 233                 ade7754_write_8bit,
 234                 ADE7754_VPEAK);
 235 static IIO_DEV_ATTR_APHCAL(S_IWUSR | S_IRUGO,
 236                 ade7754_read_8bit,
 237                 ade7754_write_8bit,
 238                 ADE7754_APHCAL);
 239 static IIO_DEV_ATTR_BPHCAL(S_IWUSR | S_IRUGO,
 240                 ade7754_read_8bit,
 241                 ade7754_write_8bit,
 242                 ADE7754_BPHCAL);
 243 static IIO_DEV_ATTR_CPHCAL(S_IWUSR | S_IRUGO,
 244                 ade7754_read_8bit,
 245                 ade7754_write_8bit,
 246                 ADE7754_CPHCAL);
 247 static IIO_DEV_ATTR_AAPOS(S_IWUSR | S_IRUGO,
 248                 ade7754_read_16bit,
 249                 ade7754_write_16bit,
 250                 ADE7754_AAPOS);
 251 static IIO_DEV_ATTR_BAPOS(S_IWUSR | S_IRUGO,
 252                 ade7754_read_16bit,
 253                 ade7754_write_16bit,
 254                 ADE7754_BAPOS);
 255 static IIO_DEV_ATTR_CAPOS(S_IWUSR | S_IRUGO,
 256                 ade7754_read_16bit,
 257                 ade7754_write_16bit,
 258                 ADE7754_CAPOS);
 259 static IIO_DEV_ATTR_WDIV(S_IWUSR | S_IRUGO,
 260                 ade7754_read_8bit,
 261                 ade7754_write_8bit,
 262                 ADE7754_WDIV);
 263 static IIO_DEV_ATTR_VADIV(S_IWUSR | S_IRUGO,
 264                 ade7754_read_8bit,
 265                 ade7754_write_8bit,
 266                 ADE7754_VADIV);
 267 static IIO_DEV_ATTR_CFNUM(S_IWUSR | S_IRUGO,
 268                 ade7754_read_16bit,
 269                 ade7754_write_16bit,
 270                 ADE7754_CFNUM);
 271 static IIO_DEV_ATTR_CFDEN(S_IWUSR | S_IRUGO,
 272                 ade7754_read_16bit,
 273                 ade7754_write_16bit,
 274                 ADE7754_CFDEN);
 275 static IIO_DEV_ATTR_ACTIVE_POWER_A_GAIN(S_IWUSR | S_IRUGO,
 276                 ade7754_read_16bit,
 277                 ade7754_write_16bit,
 278                 ADE7754_AAPGAIN);
 279 static IIO_DEV_ATTR_ACTIVE_POWER_B_GAIN(S_IWUSR | S_IRUGO,
 280                 ade7754_read_16bit,
 281                 ade7754_write_16bit,
 282                 ADE7754_BAPGAIN);
 283 static IIO_DEV_ATTR_ACTIVE_POWER_C_GAIN(S_IWUSR | S_IRUGO,
 284                 ade7754_read_16bit,
 285                 ade7754_write_16bit,
 286                 ADE7754_CAPGAIN);
 287 static IIO_DEV_ATTR_AIRMS(S_IRUGO,
 288                 ade7754_read_24bit,
 289                 NULL,
 290                 ADE7754_AIRMS);
 291 static IIO_DEV_ATTR_BIRMS(S_IRUGO,
 292                 ade7754_read_24bit,
 293                 NULL,
 294                 ADE7754_BIRMS);
 295 static IIO_DEV_ATTR_CIRMS(S_IRUGO,
 296                 ade7754_read_24bit,
 297                 NULL,
 298                 ADE7754_CIRMS);
 299 static IIO_DEV_ATTR_AVRMS(S_IRUGO,
 300                 ade7754_read_24bit,
 301                 NULL,
 302                 ADE7754_AVRMS);
 303 static IIO_DEV_ATTR_BVRMS(S_IRUGO,
 304                 ade7754_read_24bit,
 305                 NULL,
 306                 ADE7754_BVRMS);
 307 static IIO_DEV_ATTR_CVRMS(S_IRUGO,
 308                 ade7754_read_24bit,
 309                 NULL,
 310                 ADE7754_CVRMS);
 311 static IIO_DEV_ATTR_AIRMSOS(S_IRUGO,
 312                 ade7754_read_16bit,
 313                 ade7754_write_16bit,
 314                 ADE7754_AIRMSOS);
 315 static IIO_DEV_ATTR_BIRMSOS(S_IRUGO,
 316                 ade7754_read_16bit,
 317                 ade7754_write_16bit,
 318                 ADE7754_BIRMSOS);
 319 static IIO_DEV_ATTR_CIRMSOS(S_IRUGO,
 320                 ade7754_read_16bit,
 321                 ade7754_write_16bit,
 322                 ADE7754_CIRMSOS);
 323 static IIO_DEV_ATTR_AVRMSOS(S_IRUGO,
 324                 ade7754_read_16bit,
 325                 ade7754_write_16bit,
 326                 ADE7754_AVRMSOS);
 327 static IIO_DEV_ATTR_BVRMSOS(S_IRUGO,
 328                 ade7754_read_16bit,
 329                 ade7754_write_16bit,
 330                 ADE7754_BVRMSOS);
 331 static IIO_DEV_ATTR_CVRMSOS(S_IRUGO,
 332                 ade7754_read_16bit,
 333                 ade7754_write_16bit,
 334                 ADE7754_CVRMSOS);
 335
 336 static int ade7754_set_irq(struct device *dev, bool enable)
 337 {
 338         int ret;
 339         u16 irqen;
 340
 341         ret = ade7754_spi_read_reg_16(dev, ADE7754_IRQEN, &irqen);
 342         if (ret)
 343                 return ret;
 344
 345         if (enable)
 346                 irqen |= BIT(14); /* Enables an interrupt when a data is
 347                                    * present in the waveform register
 348                                    */
 349         else
 350                 irqen &= ~BIT(14);
 351
 352         ret = ade7754_spi_write_reg_16(dev, ADE7754_IRQEN, irqen);
 353
 354         return ret;
 355 }
 356
 357 /* Power down the device */
 358 static int ade7754_stop_device(struct device *dev)
 359 {
 360         int ret;
 361         u8 val;
 362
 363         ret = ade7754_spi_read_reg_8(dev, ADE7754_OPMODE, &val);
 364         if (ret < 0) {
 365                 dev_err(dev, "unable to power down the device, error: %d",
 366                         ret);
 367                 return ret;
 368         }
 369
 370         val |= 7 << 3;  /* ADE7754 powered down */
 371         return ade7754_spi_write_reg_8(dev, ADE7754_OPMODE, val);
 372 }
 373
 374 static int ade7754_initial_setup(struct iio_dev *indio_dev)
 375 {
 376         int ret;
 377         struct ade7754_state *st = iio_priv(indio_dev);
 378         struct device *dev = &indio_dev->dev;
 379
 380         /* use low spi speed for init */
 381         st->us->mode = SPI_MODE_3;
 382         spi_setup(st->us);
 383
 384         /* Disable IRQ */
 385         ret = ade7754_set_irq(dev, false);
 386         if (ret) {
 387                 dev_err(dev, "disable irq failed");
 388                 goto err_ret;
 389         }
 390
 391         ade7754_reset(dev);
 392         msleep(ADE7754_STARTUP_DELAY);
 393
 394 err_ret:
 395         return ret;
 396 }
 397
 398 static ssize_t ade7754_read_frequency(struct device *dev,
 399                                       struct device_attribute *attr,
 400                                       char *buf)
 401 {
 402         int ret;
 403         u8 t;
 404         int sps;
 405
 406         ret = ade7754_spi_read_reg_8(dev, ADE7754_WAVMODE, &t);
 407         if (ret)
 408                 return ret;
 409
 410         t = (t >> 3) & 0x3;
 411         sps = 26000 / (1 + t);
 412
 413         return sprintf(buf, "%d\n", sps);
 414 }
 415
 416 static ssize_t ade7754_write_frequency(struct device *dev,
 417                                        struct device_attribute *attr,
 418                                        const char *buf,
 419                                        size_t len)
 420 {
 421         struct iio_dev *indio_dev = dev_to_iio_dev(dev);
 422         struct ade7754_state *st = iio_priv(indio_dev);
 423         u16 val;
 424         int ret;
 425         u8 reg, t;
 426
 427         ret = kstrtou16(buf, 10, &val);
 428         if (ret)
 429                 return ret;
 430         if (!val)
 431                 return -EINVAL;
 432
 433         mutex_lock(&indio_dev->mlock);
 434
 435         t = 26000 / val;
 436         if (t > 0)
 437                 t--;
 438
 439         if (t > 1)
 440                 st->us->max_speed_hz = ADE7754_SPI_SLOW;
 441         else
 442                 st->us->max_speed_hz = ADE7754_SPI_FAST;
 443
 444         ret = ade7754_spi_read_reg_8(dev, ADE7754_WAVMODE, &reg);
 445         if (ret)
 446                 goto out;
 447
 448         reg &= ~(3 << 3);
 449         reg |= t << 3;
 450
 451         ret = ade7754_spi_write_reg_8(dev, ADE7754_WAVMODE, reg);
 452
 453 out:
 454         mutex_unlock(&indio_dev->mlock);
 455
 456         return ret ? ret : len;
 457 }
 458 static IIO_DEV_ATTR_TEMP_RAW(ade7754_read_8bit);
 459 static IIO_CONST_ATTR(in_temp_offset, "129 C");
 460 static IIO_CONST_ATTR(in_temp_scale, "4 C");
 461
 462 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
 463                 ade7754_read_frequency,
 464                 ade7754_write_frequency);
 465
 466 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("26000 13000 65000 33000");
 467
 468 static struct attribute *ade7754_attributes[] = {
 469         &iio_dev_attr_in_temp_raw.dev_attr.attr,
 470         &iio_const_attr_in_temp_offset.dev_attr.attr,
 471         &iio_const_attr_in_temp_scale.dev_attr.attr,
 472         &iio_dev_attr_sampling_frequency.dev_attr.attr,
 473         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 474         &iio_dev_attr_aenergy.dev_attr.attr,
 475         &iio_dev_attr_laenergy.dev_attr.attr,
 476         &iio_dev_attr_vaenergy.dev_attr.attr,
 477         &iio_dev_attr_lvaenergy.dev_attr.attr,
 478         &iio_dev_attr_vpeak.dev_attr.attr,
 479         &iio_dev_attr_ipeak.dev_attr.attr,
 480         &iio_dev_attr_aphcal.dev_attr.attr,
 481         &iio_dev_attr_bphcal.dev_attr.attr,
 482         &iio_dev_attr_cphcal.dev_attr.attr,
 483         &iio_dev_attr_aapos.dev_attr.attr,
 484         &iio_dev_attr_bapos.dev_attr.attr,
 485         &iio_dev_attr_capos.dev_attr.attr,
 486         &iio_dev_attr_wdiv.dev_attr.attr,
 487         &iio_dev_attr_vadiv.dev_attr.attr,
 488         &iio_dev_attr_cfnum.dev_attr.attr,
 489         &iio_dev_attr_cfden.dev_attr.attr,
 490         &iio_dev_attr_active_power_a_gain.dev_attr.attr,
 491         &iio_dev_attr_active_power_b_gain.dev_attr.attr,
 492         &iio_dev_attr_active_power_c_gain.dev_attr.attr,
 493         &iio_dev_attr_airms.dev_attr.attr,
 494         &iio_dev_attr_birms.dev_attr.attr,
 495         &iio_dev_attr_cirms.dev_attr.attr,
 496         &iio_dev_attr_avrms.dev_attr.attr,
 497         &iio_dev_attr_bvrms.dev_attr.attr,
 498         &iio_dev_attr_cvrms.dev_attr.attr,
 499         &iio_dev_attr_airmsos.dev_attr.attr,
 500         &iio_dev_attr_birmsos.dev_attr.attr,
 501         &iio_dev_attr_cirmsos.dev_attr.attr,
 502         &iio_dev_attr_avrmsos.dev_attr.attr,
 503         &iio_dev_attr_bvrmsos.dev_attr.attr,
 504         &iio_dev_attr_cvrmsos.dev_attr.attr,
 505         NULL,
 506 };
 507
 508 static const struct attribute_group ade7754_attribute_group = {
 509         .attrs = ade7754_attributes,
 510 };
 511
 512 static const struct iio_info ade7754_info = {
 513         .attrs = &ade7754_attribute_group,
 514         .driver_module = THIS_MODULE,
 515 };
 516
 517 static int ade7754_probe(struct spi_device *spi)
 518 {
 519         int ret;
 520         struct ade7754_state *st;
 521         struct iio_dev *indio_dev;
 522
 523         /* setup the industrialio driver allocated elements */
 524         indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
 525         if (!indio_dev)
 526                 return -ENOMEM;
 527         /* this is only used for removal purposes */
 528         spi_set_drvdata(spi, indio_dev);
 529
 530         st = iio_priv(indio_dev);
 531         st->us = spi;
 532         mutex_init(&st->buf_lock);
 533
 534         indio_dev->name = spi->dev.driver->name;
 535         indio_dev->dev.parent = &spi->dev;
 536         indio_dev->info = &ade7754_info;
 537         indio_dev->modes = INDIO_DIRECT_MODE;
 538
 539         /* Get the device into a sane initial state */
 540         ret = ade7754_initial_setup(indio_dev);
 541         if (ret)
 542                 goto powerdown_on_error;
 543         ret = iio_device_register(indio_dev);
 544         if (ret)
 545                 goto powerdown_on_error;
 546         return ret;
 547
 548 powerdown_on_error:
 549         ade7754_stop_device(&indio_dev->dev);
 550         return ret;
 551 }
 552
 553 static int ade7754_remove(struct spi_device *spi)
 554 {
 555         struct iio_dev *indio_dev = spi_get_drvdata(spi);
 556
 557         iio_device_unregister(indio_dev);
 558         ade7754_stop_device(&indio_dev->dev);
 559
 560         return 0;
 561 }
 562
 563 static struct spi_driver ade7754_driver = {
 564         .driver = {
 565                 .name = "ade7754",
 566         },
 567         .probe = ade7754_probe,
 568         .remove = ade7754_remove,
 569 };
 570 module_spi_driver(ade7754_driver);
 571
 572 MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
 573 MODULE_DESCRIPTION("Analog Devices ADE7754 Polyphase Multifunction Energy Metering IC Driver");
 574 MODULE_LICENSE("GPL v2");
 575 MODULE_ALIAS("spi:ad7754");