drivers/scsi/be2iscsi/be_main.c

   1 /*
   2  * This file is part of the Emulex Linux Device Driver for Enterprise iSCSI
   3  * Host Bus Adapters. Refer to the README file included with this package
   4  * for driver version and adapter compatibility.
   5  *
   6  * Copyright (c) 2018 Broadcom. All Rights Reserved.
   7  * The term “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
   8  *
   9  * This program is free software; you can redistribute it and/or modify it
  10  * under the terms of version 2 of the GNU General Public License as published
  11  * by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful. ALL EXPRESS
  14  * OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES, INCLUDING ANY
  15  * IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE,
  16  * OR NON-INFRINGEMENT, ARE DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH
  17  * DISCLAIMERS ARE HELD TO BE LEGALLY INVALID.
  18  * See the GNU General Public License for more details, a copy of which
  19  * can be found in the file COPYING included with this package.
  20  *
  21  * Contact Information:
  22  * linux-drivers@broadcom.com
  23  *
  24  */
  25
  26 #include <linux/reboot.h>
  27 #include <linux/delay.h>
  28 #include <linux/slab.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/blkdev.h>
  31 #include <linux/pci.h>
  32 #include <linux/string.h>
  33 #include <linux/kernel.h>
  34 #include <linux/semaphore.h>
  35 #include <linux/iscsi_boot_sysfs.h>
  36 #include <linux/module.h>
  37 #include <linux/bsg-lib.h>
  38 #include <linux/irq_poll.h>
  39
  40 #include <scsi/libiscsi.h>
  41 #include <scsi/scsi_bsg_iscsi.h>
  42 #include <scsi/scsi_netlink.h>
  43 #include <scsi/scsi_transport_iscsi.h>
  44 #include <scsi/scsi_transport.h>
  45 #include <scsi/scsi_cmnd.h>
  46 #include <scsi/scsi_device.h>
  47 #include <scsi/scsi_host.h>
  48 #include <scsi/scsi.h>
  49 #include "be_main.h"
  50 #include "be_iscsi.h"
  51 #include "be_mgmt.h"
  52 #include "be_cmds.h"
  53
  54 static unsigned int be_iopoll_budget = 10;
  55 static unsigned int be_max_phys_size = 64;
  56 static unsigned int enable_msix = 1;
  57
  58 MODULE_DESCRIPTION(DRV_DESC " " BUILD_STR);
  59 MODULE_VERSION(BUILD_STR);
  60 MODULE_AUTHOR("Emulex Corporation");
  61 MODULE_LICENSE("GPL");
  62 module_param(be_iopoll_budget, int, 0);
  63 module_param(enable_msix, int, 0);
  64 module_param(be_max_phys_size, uint, S_IRUGO);
  65 MODULE_PARM_DESC(be_max_phys_size,
  66                 "Maximum Size (In Kilobytes) of physically contiguous "
  67                 "memory that can be allocated. Range is 16 - 128");
  68
  69 #define beiscsi_disp_param(_name)\
  70 static ssize_t  \
  71 beiscsi_##_name##_disp(struct device *dev,\
  72                         struct device_attribute *attrib, char *buf)     \
  73 {       \
  74         struct Scsi_Host *shost = class_to_shost(dev);\
  75         struct beiscsi_hba *phba = iscsi_host_priv(shost); \
  76         return snprintf(buf, PAGE_SIZE, "%d\n",\
  77                         phba->attr_##_name);\
  78 }
  79
  80 #define beiscsi_change_param(_name, _minval, _maxval, _defaval)\
  81 static int \
  82 beiscsi_##_name##_change(struct beiscsi_hba *phba, uint32_t val)\
  83 {\
  84         if (val >= _minval && val <= _maxval) {\
  85                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
  86                             "BA_%d : beiscsi_"#_name" updated "\
  87                             "from 0x%x ==> 0x%x\n",\
  88                             phba->attr_##_name, val); \
  89                 phba->attr_##_name = val;\
  90                 return 0;\
  91         } \
  92         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT, \
  93                     "BA_%d beiscsi_"#_name" attribute "\
  94                     "cannot be updated to 0x%x, "\
  95                     "range allowed is ["#_minval" - "#_maxval"]\n", val);\
  96                 return -EINVAL;\
  97 }
  98
  99 #define beiscsi_store_param(_name)  \
 100 static ssize_t \
 101 beiscsi_##_name##_store(struct device *dev,\
 102                          struct device_attribute *attr, const char *buf,\
 103                          size_t count) \
 104 { \
 105         struct Scsi_Host  *shost = class_to_shost(dev);\
 106         struct beiscsi_hba *phba = iscsi_host_priv(shost);\
 107         uint32_t param_val = 0;\
 108         if (!isdigit(buf[0]))\
 109                 return -EINVAL;\
 110         if (sscanf(buf, "%i", &param_val) != 1)\
 111                 return -EINVAL;\
 112         if (beiscsi_##_name##_change(phba, param_val) == 0) \
 113                 return strlen(buf);\
 114         else \
 115                 return -EINVAL;\
 116 }
 117
 118 #define beiscsi_init_param(_name, _minval, _maxval, _defval) \
 119 static int \
 120 beiscsi_##_name##_init(struct beiscsi_hba *phba, uint32_t val) \
 121 { \
 122         if (val >= _minval && val <= _maxval) {\
 123                 phba->attr_##_name = val;\
 124                 return 0;\
 125         } \
 126         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,\
 127                     "BA_%d beiscsi_"#_name" attribute " \
 128                     "cannot be updated to 0x%x, "\
 129                     "range allowed is ["#_minval" - "#_maxval"]\n", val);\
 130         phba->attr_##_name = _defval;\
 131         return -EINVAL;\
 132 }
 133
 134 #define BEISCSI_RW_ATTR(_name, _minval, _maxval, _defval, _descp) \
 135 static uint beiscsi_##_name = _defval;\
 136 module_param(beiscsi_##_name, uint, S_IRUGO);\
 137 MODULE_PARM_DESC(beiscsi_##_name, _descp);\
 138 beiscsi_disp_param(_name)\
 139 beiscsi_change_param(_name, _minval, _maxval, _defval)\
 140 beiscsi_store_param(_name)\
 141 beiscsi_init_param(_name, _minval, _maxval, _defval)\
 142 DEVICE_ATTR(beiscsi_##_name, S_IRUGO | S_IWUSR,\
 143               beiscsi_##_name##_disp, beiscsi_##_name##_store)
 144
 145 /*
 146  * When new log level added update the
 147  * the MAX allowed value for log_enable
 148  */
 149 BEISCSI_RW_ATTR(log_enable, 0x00,
 150                 0xFF, 0x00, "Enable logging Bit Mask\n"
 151                 "\t\t\t\tInitialization Events  : 0x01\n"
 152                 "\t\t\t\tMailbox Events         : 0x02\n"
 153                 "\t\t\t\tMiscellaneous Events   : 0x04\n"
 154                 "\t\t\t\tError Handling         : 0x08\n"
 155                 "\t\t\t\tIO Path Events         : 0x10\n"
 156                 "\t\t\t\tConfiguration Path     : 0x20\n"
 157                 "\t\t\t\tiSCSI Protocol         : 0x40\n");
 158
 159 DEVICE_ATTR(beiscsi_drvr_ver, S_IRUGO, beiscsi_drvr_ver_disp, NULL);
 160 DEVICE_ATTR(beiscsi_adapter_family, S_IRUGO, beiscsi_adap_family_disp, NULL);
 161 DEVICE_ATTR(beiscsi_fw_ver, S_IRUGO, beiscsi_fw_ver_disp, NULL);
 162 DEVICE_ATTR(beiscsi_phys_port, S_IRUGO, beiscsi_phys_port_disp, NULL);
 163 DEVICE_ATTR(beiscsi_active_session_count, S_IRUGO,
 164              beiscsi_active_session_disp, NULL);
 165 DEVICE_ATTR(beiscsi_free_session_count, S_IRUGO,
 166              beiscsi_free_session_disp, NULL);
 167 struct device_attribute *beiscsi_attrs[] = {
 168         &dev_attr_beiscsi_log_enable,
 169         &dev_attr_beiscsi_drvr_ver,
 170         &dev_attr_beiscsi_adapter_family,
 171         &dev_attr_beiscsi_fw_ver,
 172         &dev_attr_beiscsi_active_session_count,
 173         &dev_attr_beiscsi_free_session_count,
 174         &dev_attr_beiscsi_phys_port,
 175         NULL,
 176 };
 177
 178 static char const *cqe_desc[] = {
 179         "RESERVED_DESC",
 180         "SOL_CMD_COMPLETE",
 181         "SOL_CMD_KILLED_DATA_DIGEST_ERR",
 182         "CXN_KILLED_PDU_SIZE_EXCEEDS_DSL",
 183         "CXN_KILLED_BURST_LEN_MISMATCH",
 184         "CXN_KILLED_AHS_RCVD",
 185         "CXN_KILLED_HDR_DIGEST_ERR",
 186         "CXN_KILLED_UNKNOWN_HDR",
 187         "CXN_KILLED_STALE_ITT_TTT_RCVD",
 188         "CXN_KILLED_INVALID_ITT_TTT_RCVD",
 189         "CXN_KILLED_RST_RCVD",
 190         "CXN_KILLED_TIMED_OUT",
 191         "CXN_KILLED_RST_SENT",
 192         "CXN_KILLED_FIN_RCVD",
 193         "CXN_KILLED_BAD_UNSOL_PDU_RCVD",
 194         "CXN_KILLED_BAD_WRB_INDEX_ERROR",
 195         "CXN_KILLED_OVER_RUN_RESIDUAL",
 196         "CXN_KILLED_UNDER_RUN_RESIDUAL",
 197         "CMD_KILLED_INVALID_STATSN_RCVD",
 198         "CMD_KILLED_INVALID_R2T_RCVD",
 199         "CMD_CXN_KILLED_LUN_INVALID",
 200         "CMD_CXN_KILLED_ICD_INVALID",
 201         "CMD_CXN_KILLED_ITT_INVALID",
 202         "CMD_CXN_KILLED_SEQ_OUTOFORDER",
 203         "CMD_CXN_KILLED_INVALID_DATASN_RCVD",
 204         "CXN_INVALIDATE_NOTIFY",
 205         "CXN_INVALIDATE_INDEX_NOTIFY",
 206         "CMD_INVALIDATED_NOTIFY",
 207         "UNSOL_HDR_NOTIFY",
 208         "UNSOL_DATA_NOTIFY",
 209         "UNSOL_DATA_DIGEST_ERROR_NOTIFY",
 210         "DRIVERMSG_NOTIFY",
 211         "CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN",
 212         "SOL_CMD_KILLED_DIF_ERR",
 213         "CXN_KILLED_SYN_RCVD",
 214         "CXN_KILLED_IMM_DATA_RCVD"
 215 };
 216
 217 static int beiscsi_eh_abort(struct scsi_cmnd *sc)
 218 {
 219         struct iscsi_task *abrt_task = (struct iscsi_task *)sc->SCp.ptr;
 220         struct iscsi_cls_session *cls_session;
 221         struct beiscsi_io_task *abrt_io_task;
 222         struct beiscsi_conn *beiscsi_conn;
 223         struct iscsi_session *session;
 224         struct invldt_cmd_tbl inv_tbl;
 225         struct beiscsi_hba *phba;
 226         struct iscsi_conn *conn;
 227         int rc;
 228
 229         cls_session = starget_to_session(scsi_target(sc->device));
 230         session = cls_session->dd_data;
 231
 232         /* check if we raced, task just got cleaned up under us */
 233         spin_lock_bh(&session->back_lock);
 234         if (!abrt_task || !abrt_task->sc) {
 235                 spin_unlock_bh(&session->back_lock);
 236                 return SUCCESS;
 237         }
 238         /* get a task ref till FW processes the req for the ICD used */
 239         __iscsi_get_task(abrt_task);
 240         abrt_io_task = abrt_task->dd_data;
 241         conn = abrt_task->conn;
 242         beiscsi_conn = conn->dd_data;
 243         phba = beiscsi_conn->phba;
 244         /* mark WRB invalid which have been not processed by FW yet */
 245         if (is_chip_be2_be3r(phba)) {
 246                 AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
 247                               abrt_io_task->pwrb_handle->pwrb, 1);
 248         } else {
 249                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, invld,
 250                               abrt_io_task->pwrb_handle->pwrb, 1);
 251         }
 252         inv_tbl.cid = beiscsi_conn->beiscsi_conn_cid;
 253         inv_tbl.icd = abrt_io_task->psgl_handle->sgl_index;
 254         spin_unlock_bh(&session->back_lock);
 255
 256         rc = beiscsi_mgmt_invalidate_icds(phba, &inv_tbl, 1);
 257         iscsi_put_task(abrt_task);
 258         if (rc) {
 259                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
 260                             "BM_%d : sc %p invalidation failed %d\n",
 261                             sc, rc);
 262                 return FAILED;
 263         }
 264
 265         return iscsi_eh_abort(sc);
 266 }
 267
 268 static int beiscsi_eh_device_reset(struct scsi_cmnd *sc)
 269 {
 270         struct beiscsi_invldt_cmd_tbl {
 271                 struct invldt_cmd_tbl tbl[BE_INVLDT_CMD_TBL_SZ];
 272                 struct iscsi_task *task[BE_INVLDT_CMD_TBL_SZ];
 273         } *inv_tbl;
 274         struct iscsi_cls_session *cls_session;
 275         struct beiscsi_conn *beiscsi_conn;
 276         struct beiscsi_io_task *io_task;
 277         struct iscsi_session *session;
 278         struct beiscsi_hba *phba;
 279         struct iscsi_conn *conn;
 280         struct iscsi_task *task;
 281         unsigned int i, nents;
 282         int rc, more = 0;
 283
 284         cls_session = starget_to_session(scsi_target(sc->device));
 285         session = cls_session->dd_data;
 286
 287         spin_lock_bh(&session->frwd_lock);
 288         if (!session->leadconn || session->state != ISCSI_STATE_LOGGED_IN) {
 289                 spin_unlock_bh(&session->frwd_lock);
 290                 return FAILED;
 291         }
 292
 293         conn = session->leadconn;
 294         beiscsi_conn = conn->dd_data;
 295         phba = beiscsi_conn->phba;
 296
 297         inv_tbl = kzalloc(sizeof(*inv_tbl), GFP_ATOMIC);
 298         if (!inv_tbl) {
 299                 spin_unlock_bh(&session->frwd_lock);
 300                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
 301                             "BM_%d : invldt_cmd_tbl alloc failed\n");
 302                 return FAILED;
 303         }
 304         nents = 0;
 305         /* take back_lock to prevent task from getting cleaned up under us */
 306         spin_lock(&session->back_lock);
 307         for (i = 0; i < conn->session->cmds_max; i++) {
 308                 task = conn->session->cmds[i];
 309                 if (!task->sc)
 310                         continue;
 311
 312                 if (sc->device->lun != task->sc->device->lun)
 313                         continue;
 314                 /**
 315                  * Can't fit in more cmds? Normally this won't happen b'coz
 316                  * BEISCSI_CMD_PER_LUN is same as BE_INVLDT_CMD_TBL_SZ.
 317                  */
 318                 if (nents == BE_INVLDT_CMD_TBL_SZ) {
 319                         more = 1;
 320                         break;
 321                 }
 322
 323                 /* get a task ref till FW processes the req for the ICD used */
 324                 __iscsi_get_task(task);
 325                 io_task = task->dd_data;
 326                 /* mark WRB invalid which have been not processed by FW yet */
 327                 if (is_chip_be2_be3r(phba)) {
 328                         AMAP_SET_BITS(struct amap_iscsi_wrb, invld,
 329                                       io_task->pwrb_handle->pwrb, 1);
 330                 } else {
 331                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, invld,
 332                                       io_task->pwrb_handle->pwrb, 1);
 333                 }
 334
 335                 inv_tbl->tbl[nents].cid = beiscsi_conn->beiscsi_conn_cid;
 336                 inv_tbl->tbl[nents].icd = io_task->psgl_handle->sgl_index;
 337                 inv_tbl->task[nents] = task;
 338                 nents++;
 339         }
 340         spin_unlock(&session->back_lock);
 341         spin_unlock_bh(&session->frwd_lock);
 342
 343         rc = SUCCESS;
 344         if (!nents)
 345                 goto end_reset;
 346
 347         if (more) {
 348                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_EH,
 349                             "BM_%d : number of cmds exceeds size of invalidation table\n");
 350                 rc = FAILED;
 351                 goto end_reset;
 352         }
 353
 354         if (beiscsi_mgmt_invalidate_icds(phba, &inv_tbl->tbl[0], nents)) {
 355                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_EH,
 356                             "BM_%d : cid %u scmds invalidation failed\n",
 357                             beiscsi_conn->beiscsi_conn_cid);
 358                 rc = FAILED;
 359         }
 360
 361 end_reset:
 362         for (i = 0; i < nents; i++)
 363                 iscsi_put_task(inv_tbl->task[i]);
 364         kfree(inv_tbl);
 365
 366         if (rc == SUCCESS)
 367                 rc = iscsi_eh_device_reset(sc);
 368         return rc;
 369 }
 370
 371 /*------------------- PCI Driver operations and data ----------------- */
 372 static const struct pci_device_id beiscsi_pci_id_table[] = {
 373         { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
 374         { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
 375         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
 376         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
 377         { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
 378         { PCI_DEVICE(ELX_VENDOR_ID, OC_SKH_ID1) },
 379         { 0 }
 380 };
 381 MODULE_DEVICE_TABLE(pci, beiscsi_pci_id_table);
 382
 383
 384 static struct scsi_host_template beiscsi_sht = {
 385         .module = THIS_MODULE,
 386         .name = "Emulex 10Gbe open-iscsi Initiator Driver",
 387         .proc_name = DRV_NAME,
 388         .queuecommand = iscsi_queuecommand,
 389         .change_queue_depth = scsi_change_queue_depth,
 390         .target_alloc = iscsi_target_alloc,
 391         .eh_timed_out = iscsi_eh_cmd_timed_out,
 392         .eh_abort_handler = beiscsi_eh_abort,
 393         .eh_device_reset_handler = beiscsi_eh_device_reset,
 394         .eh_target_reset_handler = iscsi_eh_session_reset,
 395         .shost_attrs = beiscsi_attrs,
 396         .sg_tablesize = BEISCSI_SGLIST_ELEMENTS,
 397         .can_queue = BE2_IO_DEPTH,
 398         .this_id = -1,
 399         .max_sectors = BEISCSI_MAX_SECTORS,
 400         .max_segment_size = 65536,
 401         .cmd_per_lun = BEISCSI_CMD_PER_LUN,
 402         .vendor_id = SCSI_NL_VID_TYPE_PCI | BE_VENDOR_ID,
 403         .track_queue_depth = 1,
 404 };
 405
 406 static struct scsi_transport_template *beiscsi_scsi_transport;
 407
 408 static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)
 409 {
 410         struct beiscsi_hba *phba;
 411         struct Scsi_Host *shost;
 412
 413         shost = iscsi_host_alloc(&beiscsi_sht, sizeof(*phba), 0);
 414         if (!shost) {
 415                 dev_err(&pcidev->dev,
 416                         "beiscsi_hba_alloc - iscsi_host_alloc failed\n");
 417                 return NULL;
 418         }
 419         shost->max_id = BE2_MAX_SESSIONS;
 420         shost->max_channel = 0;
 421         shost->max_cmd_len = BEISCSI_MAX_CMD_LEN;
 422         shost->max_lun = BEISCSI_NUM_MAX_LUN;
 423         shost->transportt = beiscsi_scsi_transport;
 424         phba = iscsi_host_priv(shost);
 425         memset(phba, 0, sizeof(*phba));
 426         phba->shost = shost;
 427         phba->pcidev = pci_dev_get(pcidev);
 428         pci_set_drvdata(pcidev, phba);
 429         phba->interface_handle = 0xFFFFFFFF;
 430
 431         return phba;
 432 }
 433
 434 static void beiscsi_unmap_pci_function(struct beiscsi_hba *phba)
 435 {
 436         if (phba->csr_va) {
 437                 iounmap(phba->csr_va);
 438                 phba->csr_va = NULL;
 439         }
 440         if (phba->db_va) {
 441                 iounmap(phba->db_va);
 442                 phba->db_va = NULL;
 443         }
 444         if (phba->pci_va) {
 445                 iounmap(phba->pci_va);
 446                 phba->pci_va = NULL;
 447         }
 448 }
 449
 450 static int beiscsi_map_pci_bars(struct beiscsi_hba *phba,
 451                                 struct pci_dev *pcidev)
 452 {
 453         u8 __iomem *addr;
 454         int pcicfg_reg;
 455
 456         addr = ioremap(pci_resource_start(pcidev, 2),
 457                                pci_resource_len(pcidev, 2));
 458         if (addr == NULL)
 459                 return -ENOMEM;
 460         phba->ctrl.csr = addr;
 461         phba->csr_va = addr;
 462
 463         addr = ioremap(pci_resource_start(pcidev, 4), 128 * 1024);
 464         if (addr == NULL)
 465                 goto pci_map_err;
 466         phba->ctrl.db = addr;
 467         phba->db_va = addr;
 468
 469         if (phba->generation == BE_GEN2)
 470                 pcicfg_reg = 1;
 471         else
 472                 pcicfg_reg = 0;
 473
 474         addr = ioremap(pci_resource_start(pcidev, pcicfg_reg),
 475                                pci_resource_len(pcidev, pcicfg_reg));
 476
 477         if (addr == NULL)
 478                 goto pci_map_err;
 479         phba->ctrl.pcicfg = addr;
 480         phba->pci_va = addr;
 481         return 0;
 482
 483 pci_map_err:
 484         beiscsi_unmap_pci_function(phba);
 485         return -ENOMEM;
 486 }
 487
 488 static int beiscsi_enable_pci(struct pci_dev *pcidev)
 489 {
 490         int ret;
 491
 492         ret = pci_enable_device(pcidev);
 493         if (ret) {
 494                 dev_err(&pcidev->dev,
 495                         "beiscsi_enable_pci - enable device failed\n");
 496                 return ret;
 497         }
 498
 499         ret = pci_request_regions(pcidev, DRV_NAME);
 500         if (ret) {
 501                 dev_err(&pcidev->dev,
 502                                 "beiscsi_enable_pci - request region failed\n");
 503                 goto pci_dev_disable;
 504         }
 505
 506         pci_set_master(pcidev);
 507         ret = dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(64));
 508         if (ret) {
 509                 ret = dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(32));
 510                 if (ret) {
 511                         dev_err(&pcidev->dev, "Could not set PCI DMA Mask\n");
 512                         goto pci_region_release;
 513                 }
 514         }
 515         return 0;
 516
 517 pci_region_release:
 518         pci_release_regions(pcidev);
 519 pci_dev_disable:
 520         pci_disable_device(pcidev);
 521
 522         return ret;
 523 }
 524
 525 static int be_ctrl_init(struct beiscsi_hba *phba, struct pci_dev *pdev)
 526 {
 527         struct be_ctrl_info *ctrl = &phba->ctrl;
 528         struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
 529         struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
 530         int status = 0;
 531
 532         ctrl->pdev = pdev;
 533         status = beiscsi_map_pci_bars(phba, pdev);
 534         if (status)
 535                 return status;
 536         mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
 537         mbox_mem_alloc->va = dma_alloc_coherent(&pdev->dev,
 538                         mbox_mem_alloc->size, &mbox_mem_alloc->dma, GFP_KERNEL);
 539         if (!mbox_mem_alloc->va) {
 540                 beiscsi_unmap_pci_function(phba);
 541                 return -ENOMEM;
 542         }
 543
 544         mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
 545         mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
 546         mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
 547         memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
 548         mutex_init(&ctrl->mbox_lock);
 549         spin_lock_init(&phba->ctrl.mcc_lock);
 550
 551         return status;
 552 }
 553
 554 /**
 555  * beiscsi_get_params()- Set the config paramters
 556  * @phba: ptr  device priv structure
 557  **/
 558 static void beiscsi_get_params(struct beiscsi_hba *phba)
 559 {
 560         uint32_t total_cid_count = 0;
 561         uint32_t total_icd_count = 0;
 562         uint8_t ulp_num = 0;
 563
 564         total_cid_count = BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP0) +
 565                           BEISCSI_GET_CID_COUNT(phba, BEISCSI_ULP1);
 566
 567         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
 568                 uint32_t align_mask = 0;
 569                 uint32_t icd_post_per_page = 0;
 570                 uint32_t icd_count_unavailable = 0;
 571                 uint32_t icd_start = 0, icd_count = 0;
 572                 uint32_t icd_start_align = 0, icd_count_align = 0;
 573
 574                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
 575                         icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
 576                         icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
 577
 578                         /* Get ICD count that can be posted on each page */
 579                         icd_post_per_page = (PAGE_SIZE / (BE2_SGE *
 580                                              sizeof(struct iscsi_sge)));
 581                         align_mask = (icd_post_per_page - 1);
 582
 583                         /* Check if icd_start is aligned ICD per page posting */
 584                         if (icd_start % icd_post_per_page) {
 585                                 icd_start_align = ((icd_start +
 586                                                     icd_post_per_page) &
 587                                                     ~(align_mask));
 588                                 phba->fw_config.
 589                                         iscsi_icd_start[ulp_num] =
 590                                         icd_start_align;
 591                         }
 592
 593                         icd_count_align = (icd_count & ~align_mask);
 594
 595                         /* ICD discarded in the process of alignment */
 596                         if (icd_start_align)
 597                                 icd_count_unavailable = ((icd_start_align -
 598                                                           icd_start) +
 599                                                          (icd_count -
 600                                                           icd_count_align));
 601
 602                         /* Updated ICD count available */
 603                         phba->fw_config.iscsi_icd_count[ulp_num] = (icd_count -
 604                                         icd_count_unavailable);
 605
 606                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
 607                                         "BM_%d : Aligned ICD values\n"
 608                                         "\t ICD Start : %d\n"
 609                                         "\t ICD Count : %d\n"
 610                                         "\t ICD Discarded : %d\n",
 611                                         phba->fw_config.
 612                                         iscsi_icd_start[ulp_num],
 613                                         phba->fw_config.
 614                                         iscsi_icd_count[ulp_num],
 615                                         icd_count_unavailable);
 616                         break;
 617                 }
 618         }
 619
 620         total_icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
 621         phba->params.ios_per_ctrl = (total_icd_count -
 622                                     (total_cid_count +
 623                                      BE2_TMFS + BE2_NOPOUT_REQ));
 624         phba->params.cxns_per_ctrl = total_cid_count;
 625         phba->params.icds_per_ctrl = total_icd_count;
 626         phba->params.num_sge_per_io = BE2_SGE;
 627         phba->params.defpdu_hdr_sz = BE2_DEFPDU_HDR_SZ;
 628         phba->params.defpdu_data_sz = BE2_DEFPDU_DATA_SZ;
 629         phba->params.num_eq_entries = 1024;
 630         phba->params.num_cq_entries = 1024;
 631         phba->params.wrbs_per_cxn = 256;
 632 }
 633
 634 static void hwi_ring_eq_db(struct beiscsi_hba *phba,
 635                            unsigned int id, unsigned int clr_interrupt,
 636                            unsigned int num_processed,
 637                            unsigned char rearm, unsigned char event)
 638 {
 639         u32 val = 0;
 640
 641         if (rearm)
 642                 val |= 1 << DB_EQ_REARM_SHIFT;
 643         if (clr_interrupt)
 644                 val |= 1 << DB_EQ_CLR_SHIFT;
 645         if (event)
 646                 val |= 1 << DB_EQ_EVNT_SHIFT;
 647
 648         val |= num_processed << DB_EQ_NUM_POPPED_SHIFT;
 649         /* Setting lower order EQ_ID Bits */
 650         val |= (id & DB_EQ_RING_ID_LOW_MASK);
 651
 652         /* Setting Higher order EQ_ID Bits */
 653         val |= (((id >> DB_EQ_HIGH_FEILD_SHIFT) &
 654                   DB_EQ_RING_ID_HIGH_MASK)
 655                   << DB_EQ_HIGH_SET_SHIFT);
 656
 657         iowrite32(val, phba->db_va + DB_EQ_OFFSET);
 658 }
 659
 660 /**
 661  * be_isr_mcc - The isr routine of the driver.
 662  * @irq: Not used
 663  * @dev_id: Pointer to host adapter structure
 664  */
 665 static irqreturn_t be_isr_mcc(int irq, void *dev_id)
 666 {
 667         struct beiscsi_hba *phba;
 668         struct be_eq_entry *eqe;
 669         struct be_queue_info *eq;
 670         struct be_queue_info *mcc;
 671         unsigned int mcc_events;
 672         struct be_eq_obj *pbe_eq;
 673
 674         pbe_eq = dev_id;
 675         eq = &pbe_eq->q;
 676         phba =  pbe_eq->phba;
 677         mcc = &phba->ctrl.mcc_obj.cq;
 678         eqe = queue_tail_node(eq);
 679
 680         mcc_events = 0;
 681         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 682                                 & EQE_VALID_MASK) {
 683                 if (((eqe->dw[offsetof(struct amap_eq_entry,
 684                      resource_id) / 32] &
 685                      EQE_RESID_MASK) >> 16) == mcc->id) {
 686                         mcc_events++;
 687                 }
 688                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 689                 queue_tail_inc(eq);
 690                 eqe = queue_tail_node(eq);
 691         }
 692
 693         if (mcc_events) {
 694                 queue_work(phba->wq, &pbe_eq->mcc_work);
 695                 hwi_ring_eq_db(phba, eq->id, 1, mcc_events, 1, 1);
 696         }
 697         return IRQ_HANDLED;
 698 }
 699
 700 /**
 701  * be_isr_msix - The isr routine of the driver.
 702  * @irq: Not used
 703  * @dev_id: Pointer to host adapter structure
 704  */
 705 static irqreturn_t be_isr_msix(int irq, void *dev_id)
 706 {
 707         struct beiscsi_hba *phba;
 708         struct be_queue_info *eq;
 709         struct be_eq_obj *pbe_eq;
 710
 711         pbe_eq = dev_id;
 712         eq = &pbe_eq->q;
 713
 714         phba = pbe_eq->phba;
 715         /* disable interrupt till iopoll completes */
 716         hwi_ring_eq_db(phba, eq->id, 1, 0, 0, 1);
 717         irq_poll_sched(&pbe_eq->iopoll);
 718
 719         return IRQ_HANDLED;
 720 }
 721
 722 /**
 723  * be_isr - The isr routine of the driver.
 724  * @irq: Not used
 725  * @dev_id: Pointer to host adapter structure
 726  */
 727 static irqreturn_t be_isr(int irq, void *dev_id)
 728 {
 729         struct beiscsi_hba *phba;
 730         struct hwi_controller *phwi_ctrlr;
 731         struct hwi_context_memory *phwi_context;
 732         struct be_eq_entry *eqe;
 733         struct be_queue_info *eq;
 734         struct be_queue_info *mcc;
 735         unsigned int mcc_events, io_events;
 736         struct be_ctrl_info *ctrl;
 737         struct be_eq_obj *pbe_eq;
 738         int isr, rearm;
 739
 740         phba = dev_id;
 741         ctrl = &phba->ctrl;
 742         isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET +
 743                        (PCI_FUNC(ctrl->pdev->devfn) * CEV_ISR_SIZE));
 744         if (!isr)
 745                 return IRQ_NONE;
 746
 747         phwi_ctrlr = phba->phwi_ctrlr;
 748         phwi_context = phwi_ctrlr->phwi_ctxt;
 749         pbe_eq = &phwi_context->be_eq[0];
 750
 751         eq = &phwi_context->be_eq[0].q;
 752         mcc = &phba->ctrl.mcc_obj.cq;
 753         eqe = queue_tail_node(eq);
 754
 755         io_events = 0;
 756         mcc_events = 0;
 757         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
 758                                 & EQE_VALID_MASK) {
 759                 if (((eqe->dw[offsetof(struct amap_eq_entry,
 760                       resource_id) / 32] & EQE_RESID_MASK) >> 16) == mcc->id)
 761                         mcc_events++;
 762                 else
 763                         io_events++;
 764                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
 765                 queue_tail_inc(eq);
 766                 eqe = queue_tail_node(eq);
 767         }
 768         if (!io_events && !mcc_events)
 769                 return IRQ_NONE;
 770
 771         /* no need to rearm if interrupt is only for IOs */
 772         rearm = 0;
 773         if (mcc_events) {
 774                 queue_work(phba->wq, &pbe_eq->mcc_work);
 775                 /* rearm for MCCQ */
 776                 rearm = 1;
 777         }
 778         if (io_events)
 779                 irq_poll_sched(&pbe_eq->iopoll);
 780         hwi_ring_eq_db(phba, eq->id, 0, (io_events + mcc_events), rearm, 1);
 781         return IRQ_HANDLED;
 782 }
 783
 784 static void beiscsi_free_irqs(struct beiscsi_hba *phba)
 785 {
 786         struct hwi_context_memory *phwi_context;
 787         int i;
 788
 789         if (!phba->pcidev->msix_enabled) {
 790                 if (phba->pcidev->irq)
 791                         free_irq(phba->pcidev->irq, phba);
 792                 return;
 793         }
 794
 795         phwi_context = phba->phwi_ctrlr->phwi_ctxt;
 796         for (i = 0; i <= phba->num_cpus; i++) {
 797                 free_irq(pci_irq_vector(phba->pcidev, i),
 798                          &phwi_context->be_eq[i]);
 799                 kfree(phba->msi_name[i]);
 800         }
 801 }
 802
 803 static int beiscsi_init_irqs(struct beiscsi_hba *phba)
 804 {
 805         struct pci_dev *pcidev = phba->pcidev;
 806         struct hwi_controller *phwi_ctrlr;
 807         struct hwi_context_memory *phwi_context;
 808         int ret, i, j;
 809
 810         phwi_ctrlr = phba->phwi_ctrlr;
 811         phwi_context = phwi_ctrlr->phwi_ctxt;
 812
 813         if (pcidev->msix_enabled) {
 814                 for (i = 0; i < phba->num_cpus; i++) {
 815                         phba->msi_name[i] = kasprintf(GFP_KERNEL,
 816                                                       "beiscsi_%02x_%02x",
 817                                                       phba->shost->host_no, i);
 818                         if (!phba->msi_name[i]) {
 819                                 ret = -ENOMEM;
 820                                 goto free_msix_irqs;
 821                         }
 822
 823                         ret = request_irq(pci_irq_vector(pcidev, i),
 824                                           be_isr_msix, 0, phba->msi_name[i],
 825                                           &phwi_context->be_eq[i]);
 826                         if (ret) {
 827                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
 828                                             "BM_%d : beiscsi_init_irqs-Failed to"
 829                                             "register msix for i = %d\n",
 830                                             i);
 831                                 kfree(phba->msi_name[i]);
 832                                 goto free_msix_irqs;
 833                         }
 834                 }
 835                 phba->msi_name[i] = kasprintf(GFP_KERNEL, "beiscsi_mcc_%02x",
 836                                               phba->shost->host_no);
 837                 if (!phba->msi_name[i]) {
 838                         ret = -ENOMEM;
 839                         goto free_msix_irqs;
 840                 }
 841                 ret = request_irq(pci_irq_vector(pcidev, i), be_isr_mcc, 0,
 842                                   phba->msi_name[i], &phwi_context->be_eq[i]);
 843                 if (ret) {
 844                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT ,
 845                                     "BM_%d : beiscsi_init_irqs-"
 846                                     "Failed to register beiscsi_msix_mcc\n");
 847                         kfree(phba->msi_name[i]);
 848                         goto free_msix_irqs;
 849                 }
 850
 851         } else {
 852                 ret = request_irq(pcidev->irq, be_isr, IRQF_SHARED,
 853                                   "beiscsi", phba);
 854                 if (ret) {
 855                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
 856                                     "BM_%d : beiscsi_init_irqs-"
 857                                     "Failed to register irq\\n");
 858                         return ret;
 859                 }
 860         }
 861         return 0;
 862 free_msix_irqs:
 863         for (j = i - 1; j >= 0; j--) {
 864                 free_irq(pci_irq_vector(pcidev, i), &phwi_context->be_eq[j]);
 865                 kfree(phba->msi_name[j]);
 866         }
 867         return ret;
 868 }
 869
 870 void hwi_ring_cq_db(struct beiscsi_hba *phba,
 871                            unsigned int id, unsigned int num_processed,
 872                            unsigned char rearm)
 873 {
 874         u32 val = 0;
 875
 876         if (rearm)
 877                 val |= 1 << DB_CQ_REARM_SHIFT;
 878
 879         val |= num_processed << DB_CQ_NUM_POPPED_SHIFT;
 880
 881         /* Setting lower order CQ_ID Bits */
 882         val |= (id & DB_CQ_RING_ID_LOW_MASK);
 883
 884         /* Setting Higher order CQ_ID Bits */
 885         val |= (((id >> DB_CQ_HIGH_FEILD_SHIFT) &
 886                   DB_CQ_RING_ID_HIGH_MASK)
 887                   << DB_CQ_HIGH_SET_SHIFT);
 888
 889         iowrite32(val, phba->db_va + DB_CQ_OFFSET);
 890 }
 891
 892 static struct sgl_handle *alloc_io_sgl_handle(struct beiscsi_hba *phba)
 893 {
 894         struct sgl_handle *psgl_handle;
 895         unsigned long flags;
 896
 897         spin_lock_irqsave(&phba->io_sgl_lock, flags);
 898         if (phba->io_sgl_hndl_avbl) {
 899                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
 900                             "BM_%d : In alloc_io_sgl_handle,"
 901                             " io_sgl_alloc_index=%d\n",
 902                             phba->io_sgl_alloc_index);
 903
 904                 psgl_handle = phba->io_sgl_hndl_base[phba->
 905                                                 io_sgl_alloc_index];
 906                 phba->io_sgl_hndl_base[phba->io_sgl_alloc_index] = NULL;
 907                 phba->io_sgl_hndl_avbl--;
 908                 if (phba->io_sgl_alloc_index == (phba->params.
 909                                                  ios_per_ctrl - 1))
 910                         phba->io_sgl_alloc_index = 0;
 911                 else
 912                         phba->io_sgl_alloc_index++;
 913         } else
 914                 psgl_handle = NULL;
 915         spin_unlock_irqrestore(&phba->io_sgl_lock, flags);
 916         return psgl_handle;
 917 }
 918
 919 static void
 920 free_io_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
 921 {
 922         unsigned long flags;
 923
 924         spin_lock_irqsave(&phba->io_sgl_lock, flags);
 925         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
 926                     "BM_%d : In free_,io_sgl_free_index=%d\n",
 927                     phba->io_sgl_free_index);
 928
 929         if (phba->io_sgl_hndl_base[phba->io_sgl_free_index]) {
 930                 /*
 931                  * this can happen if clean_task is called on a task that
 932                  * failed in xmit_task or alloc_pdu.
 933                  */
 934                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_IO,
 935                             "BM_%d : Double Free in IO SGL io_sgl_free_index=%d, value there=%p\n",
 936                             phba->io_sgl_free_index,
 937                             phba->io_sgl_hndl_base[phba->io_sgl_free_index]);
 938                 spin_unlock_irqrestore(&phba->io_sgl_lock, flags);
 939                 return;
 940         }
 941         phba->io_sgl_hndl_base[phba->io_sgl_free_index] = psgl_handle;
 942         phba->io_sgl_hndl_avbl++;
 943         if (phba->io_sgl_free_index == (phba->params.ios_per_ctrl - 1))
 944                 phba->io_sgl_free_index = 0;
 945         else
 946                 phba->io_sgl_free_index++;
 947         spin_unlock_irqrestore(&phba->io_sgl_lock, flags);
 948 }
 949
 950 static inline struct wrb_handle *
 951 beiscsi_get_wrb_handle(struct hwi_wrb_context *pwrb_context,
 952                        unsigned int wrbs_per_cxn)
 953 {
 954         struct wrb_handle *pwrb_handle;
 955         unsigned long flags;
 956
 957         spin_lock_irqsave(&pwrb_context->wrb_lock, flags);
 958         if (!pwrb_context->wrb_handles_available) {
 959                 spin_unlock_irqrestore(&pwrb_context->wrb_lock, flags);
 960                 return NULL;
 961         }
 962         pwrb_handle = pwrb_context->pwrb_handle_base[pwrb_context->alloc_index];
 963         pwrb_context->wrb_handles_available--;
 964         if (pwrb_context->alloc_index == (wrbs_per_cxn - 1))
 965                 pwrb_context->alloc_index = 0;
 966         else
 967                 pwrb_context->alloc_index++;
 968         spin_unlock_irqrestore(&pwrb_context->wrb_lock, flags);
 969
 970         if (pwrb_handle)
 971                 memset(pwrb_handle->pwrb, 0, sizeof(*pwrb_handle->pwrb));
 972
 973         return pwrb_handle;
 974 }
 975
 976 /**
 977  * alloc_wrb_handle - To allocate a wrb handle
 978  * @phba: The hba pointer
 979  * @cid: The cid to use for allocation
 980  * @pwrb_context: ptr to ptr to wrb context
 981  *
 982  * This happens under session_lock until submission to chip
 983  */
 984 struct wrb_handle *alloc_wrb_handle(struct beiscsi_hba *phba, unsigned int cid,
 985                                     struct hwi_wrb_context **pcontext)
 986 {
 987         struct hwi_wrb_context *pwrb_context;
 988         struct hwi_controller *phwi_ctrlr;
 989         uint16_t cri_index = BE_GET_CRI_FROM_CID(cid);
 990
 991         phwi_ctrlr = phba->phwi_ctrlr;
 992         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
 993         /* return the context address */
 994         *pcontext = pwrb_context;
 995         return beiscsi_get_wrb_handle(pwrb_context, phba->params.wrbs_per_cxn);
 996 }
 997
 998 static inline void
 999 beiscsi_put_wrb_handle(struct hwi_wrb_context *pwrb_context,
1000                        struct wrb_handle *pwrb_handle,
1001                        unsigned int wrbs_per_cxn)
1002 {
1003         unsigned long flags;
1004
1005         spin_lock_irqsave(&pwrb_context->wrb_lock, flags);
1006         pwrb_context->pwrb_handle_base[pwrb_context->free_index] = pwrb_handle;
1007         pwrb_context->wrb_handles_available++;
1008         if (pwrb_context->free_index == (wrbs_per_cxn - 1))
1009                 pwrb_context->free_index = 0;
1010         else
1011                 pwrb_context->free_index++;
1012         pwrb_handle->pio_handle = NULL;
1013         spin_unlock_irqrestore(&pwrb_context->wrb_lock, flags);
1014 }
1015
1016 /**
1017  * free_wrb_handle - To free the wrb handle back to pool
1018  * @phba: The hba pointer
1019  * @pwrb_context: The context to free from
1020  * @pwrb_handle: The wrb_handle to free
1021  *
1022  * This happens under session_lock until submission to chip
1023  */
1024 static void
1025 free_wrb_handle(struct beiscsi_hba *phba, struct hwi_wrb_context *pwrb_context,
1026                 struct wrb_handle *pwrb_handle)
1027 {
1028         beiscsi_put_wrb_handle(pwrb_context,
1029                                pwrb_handle,
1030                                phba->params.wrbs_per_cxn);
1031         beiscsi_log(phba, KERN_INFO,
1032                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1033                     "BM_%d : FREE WRB: pwrb_handle=%p free_index=0x%x"
1034                     "wrb_handles_available=%d\n",
1035                     pwrb_handle, pwrb_context->free_index,
1036                     pwrb_context->wrb_handles_available);
1037 }
1038
1039 static struct sgl_handle *alloc_mgmt_sgl_handle(struct beiscsi_hba *phba)
1040 {
1041         struct sgl_handle *psgl_handle;
1042         unsigned long flags;
1043
1044         spin_lock_irqsave(&phba->mgmt_sgl_lock, flags);
1045         if (phba->eh_sgl_hndl_avbl) {
1046                 psgl_handle = phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index];
1047                 phba->eh_sgl_hndl_base[phba->eh_sgl_alloc_index] = NULL;
1048                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1049                             "BM_%d : mgmt_sgl_alloc_index=%d=0x%x\n",
1050                             phba->eh_sgl_alloc_index,
1051                             phba->eh_sgl_alloc_index);
1052
1053                 phba->eh_sgl_hndl_avbl--;
1054                 if (phba->eh_sgl_alloc_index ==
1055                     (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl -
1056                      1))
1057                         phba->eh_sgl_alloc_index = 0;
1058                 else
1059                         phba->eh_sgl_alloc_index++;
1060         } else
1061                 psgl_handle = NULL;
1062         spin_unlock_irqrestore(&phba->mgmt_sgl_lock, flags);
1063         return psgl_handle;
1064 }
1065
1066 void
1067 free_mgmt_sgl_handle(struct beiscsi_hba *phba, struct sgl_handle *psgl_handle)
1068 {
1069         unsigned long flags;
1070
1071         spin_lock_irqsave(&phba->mgmt_sgl_lock, flags);
1072         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
1073                     "BM_%d : In  free_mgmt_sgl_handle,"
1074                     "eh_sgl_free_index=%d\n",
1075                     phba->eh_sgl_free_index);
1076
1077         if (phba->eh_sgl_hndl_base[phba->eh_sgl_free_index]) {
1078                 /*
1079                  * this can happen if clean_task is called on a task that
1080                  * failed in xmit_task or alloc_pdu.
1081                  */
1082                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_CONFIG,
1083                             "BM_%d : Double Free in eh SGL ,"
1084                             "eh_sgl_free_index=%d\n",
1085                             phba->eh_sgl_free_index);
1086                 spin_unlock_irqrestore(&phba->mgmt_sgl_lock, flags);
1087                 return;
1088         }
1089         phba->eh_sgl_hndl_base[phba->eh_sgl_free_index] = psgl_handle;
1090         phba->eh_sgl_hndl_avbl++;
1091         if (phba->eh_sgl_free_index ==
1092             (phba->params.icds_per_ctrl - phba->params.ios_per_ctrl - 1))
1093                 phba->eh_sgl_free_index = 0;
1094         else
1095                 phba->eh_sgl_free_index++;
1096         spin_unlock_irqrestore(&phba->mgmt_sgl_lock, flags);
1097 }
1098
1099 static void
1100 be_complete_io(struct beiscsi_conn *beiscsi_conn,
1101                 struct iscsi_task *task,
1102                 struct common_sol_cqe *csol_cqe)
1103 {
1104         struct beiscsi_io_task *io_task = task->dd_data;
1105         struct be_status_bhs *sts_bhs =
1106                                 (struct be_status_bhs *)io_task->cmd_bhs;
1107         struct iscsi_conn *conn = beiscsi_conn->conn;
1108         unsigned char *sense;
1109         u32 resid = 0, exp_cmdsn, max_cmdsn;
1110         u8 rsp, status, flags;
1111
1112         exp_cmdsn = csol_cqe->exp_cmdsn;
1113         max_cmdsn = (csol_cqe->exp_cmdsn +
1114                      csol_cqe->cmd_wnd - 1);
1115         rsp = csol_cqe->i_resp;
1116         status = csol_cqe->i_sts;
1117         flags = csol_cqe->i_flags;
1118         resid = csol_cqe->res_cnt;
1119
1120         if (!task->sc) {
1121                 if (io_task->scsi_cmnd) {
1122                         scsi_dma_unmap(io_task->scsi_cmnd);
1123                         io_task->scsi_cmnd = NULL;
1124                 }
1125
1126                 return;
1127         }
1128         task->sc->result = (DID_OK << 16) | status;
1129         if (rsp != ISCSI_STATUS_CMD_COMPLETED) {
1130                 task->sc->result = DID_ERROR << 16;
1131                 goto unmap;
1132         }
1133
1134         /* bidi not initially supported */
1135         if (flags & (ISCSI_FLAG_CMD_UNDERFLOW | ISCSI_FLAG_CMD_OVERFLOW)) {
1136                 if (!status && (flags & ISCSI_FLAG_CMD_OVERFLOW))
1137                         task->sc->result = DID_ERROR << 16;
1138
1139                 if (flags & ISCSI_FLAG_CMD_UNDERFLOW) {
1140                         scsi_set_resid(task->sc, resid);
1141                         if (!status && (scsi_bufflen(task->sc) - resid <
1142                             task->sc->underflow))
1143                                 task->sc->result = DID_ERROR << 16;
1144                 }
1145         }
1146
1147         if (status == SAM_STAT_CHECK_CONDITION) {
1148                 u16 sense_len;
1149                 unsigned short *slen = (unsigned short *)sts_bhs->sense_info;
1150
1151                 sense = sts_bhs->sense_info + sizeof(unsigned short);
1152                 sense_len = be16_to_cpu(*slen);
1153                 memcpy(task->sc->sense_buffer, sense,
1154                        min_t(u16, sense_len, SCSI_SENSE_BUFFERSIZE));
1155         }
1156
1157         if (io_task->cmd_bhs->iscsi_hdr.flags & ISCSI_FLAG_CMD_READ)
1158                 conn->rxdata_octets += resid;
1159 unmap:
1160         if (io_task->scsi_cmnd) {
1161                 scsi_dma_unmap(io_task->scsi_cmnd);
1162                 io_task->scsi_cmnd = NULL;
1163         }
1164         iscsi_complete_scsi_task(task, exp_cmdsn, max_cmdsn);
1165 }
1166
1167 static void
1168 be_complete_logout(struct beiscsi_conn *beiscsi_conn,
1169                     struct iscsi_task *task,
1170                     struct common_sol_cqe *csol_cqe)
1171 {
1172         struct iscsi_logout_rsp *hdr;
1173         struct beiscsi_io_task *io_task = task->dd_data;
1174         struct iscsi_conn *conn = beiscsi_conn->conn;
1175
1176         hdr = (struct iscsi_logout_rsp *)task->hdr;
1177         hdr->opcode = ISCSI_OP_LOGOUT_RSP;
1178         hdr->t2wait = 5;
1179         hdr->t2retain = 0;
1180         hdr->flags = csol_cqe->i_flags;
1181         hdr->response = csol_cqe->i_resp;
1182         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1183         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1184                                      csol_cqe->cmd_wnd - 1);
1185
1186         hdr->dlength[0] = 0;
1187         hdr->dlength[1] = 0;
1188         hdr->dlength[2] = 0;
1189         hdr->hlength = 0;
1190         hdr->itt = io_task->libiscsi_itt;
1191         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1192 }
1193
1194 static void
1195 be_complete_tmf(struct beiscsi_conn *beiscsi_conn,
1196                  struct iscsi_task *task,
1197                  struct common_sol_cqe *csol_cqe)
1198 {
1199         struct iscsi_tm_rsp *hdr;
1200         struct iscsi_conn *conn = beiscsi_conn->conn;
1201         struct beiscsi_io_task *io_task = task->dd_data;
1202
1203         hdr = (struct iscsi_tm_rsp *)task->hdr;
1204         hdr->opcode = ISCSI_OP_SCSI_TMFUNC_RSP;
1205         hdr->flags = csol_cqe->i_flags;
1206         hdr->response = csol_cqe->i_resp;
1207         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1208         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1209                                      csol_cqe->cmd_wnd - 1);
1210
1211         hdr->itt = io_task->libiscsi_itt;
1212         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1213 }
1214
1215 static void
1216 hwi_complete_drvr_msgs(struct beiscsi_conn *beiscsi_conn,
1217                        struct beiscsi_hba *phba, struct sol_cqe *psol)
1218 {
1219         struct hwi_wrb_context *pwrb_context;
1220         uint16_t wrb_index, cid, cri_index;
1221         struct hwi_controller *phwi_ctrlr;
1222         struct wrb_handle *pwrb_handle;
1223         struct iscsi_session *session;
1224         struct iscsi_task *task;
1225
1226         phwi_ctrlr = phba->phwi_ctrlr;
1227         if (is_chip_be2_be3r(phba)) {
1228                 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1229                                           wrb_idx, psol);
1230                 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe,
1231                                     cid, psol);
1232         } else {
1233                 wrb_index = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1234                                           wrb_idx, psol);
1235                 cid = AMAP_GET_BITS(struct amap_it_dmsg_cqe_v2,
1236                                     cid, psol);
1237         }
1238
1239         cri_index = BE_GET_CRI_FROM_CID(cid);
1240         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1241         pwrb_handle = pwrb_context->pwrb_handle_basestd[wrb_index];
1242         session = beiscsi_conn->conn->session;
1243         spin_lock_bh(&session->back_lock);
1244         task = pwrb_handle->pio_handle;
1245         if (task)
1246                 __iscsi_put_task(task);
1247         spin_unlock_bh(&session->back_lock);
1248 }
1249
1250 static void
1251 be_complete_nopin_resp(struct beiscsi_conn *beiscsi_conn,
1252                         struct iscsi_task *task,
1253                         struct common_sol_cqe *csol_cqe)
1254 {
1255         struct iscsi_nopin *hdr;
1256         struct iscsi_conn *conn = beiscsi_conn->conn;
1257         struct beiscsi_io_task *io_task = task->dd_data;
1258
1259         hdr = (struct iscsi_nopin *)task->hdr;
1260         hdr->flags = csol_cqe->i_flags;
1261         hdr->exp_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn);
1262         hdr->max_cmdsn = cpu_to_be32(csol_cqe->exp_cmdsn +
1263                                      csol_cqe->cmd_wnd - 1);
1264
1265         hdr->opcode = ISCSI_OP_NOOP_IN;
1266         hdr->itt = io_task->libiscsi_itt;
1267         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)hdr, NULL, 0);
1268 }
1269
1270 static void adapter_get_sol_cqe(struct beiscsi_hba *phba,
1271                 struct sol_cqe *psol,
1272                 struct common_sol_cqe *csol_cqe)
1273 {
1274         if (is_chip_be2_be3r(phba)) {
1275                 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe,
1276                                                     i_exp_cmd_sn, psol);
1277                 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe,
1278                                                   i_res_cnt, psol);
1279                 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe,
1280                                                   i_cmd_wnd, psol);
1281                 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe,
1282                                                     wrb_index, psol);
1283                 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe,
1284                                               cid, psol);
1285                 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1286                                                  hw_sts, psol);
1287                 csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe,
1288                                                  i_resp, psol);
1289                 csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe,
1290                                                 i_sts, psol);
1291                 csol_cqe->i_flags = AMAP_GET_BITS(struct amap_sol_cqe,
1292                                                   i_flags, psol);
1293         } else {
1294                 csol_cqe->exp_cmdsn = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1295                                                     i_exp_cmd_sn, psol);
1296                 csol_cqe->res_cnt = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1297                                                   i_res_cnt, psol);
1298                 csol_cqe->wrb_index = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1299                                                     wrb_index, psol);
1300                 csol_cqe->cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1301                                               cid, psol);
1302                 csol_cqe->hw_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1303                                                  hw_sts, psol);
1304                 csol_cqe->cmd_wnd = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1305                                                   i_cmd_wnd, psol);
1306                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1307                                   cmd_cmpl, psol))
1308                         csol_cqe->i_sts = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1309                                                         i_sts, psol);
1310                 else
1311                         csol_cqe->i_resp = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1312                                                          i_sts, psol);
1313                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1314                                   u, psol))
1315                         csol_cqe->i_flags = ISCSI_FLAG_CMD_UNDERFLOW;
1316
1317                 if (AMAP_GET_BITS(struct amap_sol_cqe_v2,
1318                                   o, psol))
1319                         csol_cqe->i_flags |= ISCSI_FLAG_CMD_OVERFLOW;
1320         }
1321 }
1322
1323
1324 static void hwi_complete_cmd(struct beiscsi_conn *beiscsi_conn,
1325                              struct beiscsi_hba *phba, struct sol_cqe *psol)
1326 {
1327         struct iscsi_conn *conn = beiscsi_conn->conn;
1328         struct iscsi_session *session = conn->session;
1329         struct common_sol_cqe csol_cqe = {0};
1330         struct hwi_wrb_context *pwrb_context;
1331         struct hwi_controller *phwi_ctrlr;
1332         struct wrb_handle *pwrb_handle;
1333         struct iscsi_task *task;
1334         uint16_t cri_index = 0;
1335         uint8_t type;
1336
1337         phwi_ctrlr = phba->phwi_ctrlr;
1338
1339         /* Copy the elements to a common structure */
1340         adapter_get_sol_cqe(phba, psol, &csol_cqe);
1341
1342         cri_index = BE_GET_CRI_FROM_CID(csol_cqe.cid);
1343         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
1344
1345         pwrb_handle = pwrb_context->pwrb_handle_basestd[
1346                       csol_cqe.wrb_index];
1347
1348         spin_lock_bh(&session->back_lock);
1349         task = pwrb_handle->pio_handle;
1350         if (!task) {
1351                 spin_unlock_bh(&session->back_lock);
1352                 return;
1353         }
1354         type = ((struct beiscsi_io_task *)task->dd_data)->wrb_type;
1355
1356         switch (type) {
1357         case HWH_TYPE_IO:
1358         case HWH_TYPE_IO_RD:
1359                 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) ==
1360                      ISCSI_OP_NOOP_OUT)
1361                         be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1362                 else
1363                         be_complete_io(beiscsi_conn, task, &csol_cqe);
1364                 break;
1365
1366         case HWH_TYPE_LOGOUT:
1367                 if ((task->hdr->opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGOUT)
1368                         be_complete_logout(beiscsi_conn, task, &csol_cqe);
1369                 else
1370                         be_complete_tmf(beiscsi_conn, task, &csol_cqe);
1371                 break;
1372
1373         case HWH_TYPE_LOGIN:
1374                 beiscsi_log(phba, KERN_ERR,
1375                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1376                             "BM_%d :\t\t No HWH_TYPE_LOGIN Expected in"
1377                             " hwi_complete_cmd- Solicited path\n");
1378                 break;
1379
1380         case HWH_TYPE_NOP:
1381                 be_complete_nopin_resp(beiscsi_conn, task, &csol_cqe);
1382                 break;
1383
1384         default:
1385                 beiscsi_log(phba, KERN_WARNING,
1386                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1387                             "BM_%d : In hwi_complete_cmd, unknown type = %d"
1388                             "wrb_index 0x%x CID 0x%x\n", type,
1389                             csol_cqe.wrb_index,
1390                             csol_cqe.cid);
1391                 break;
1392         }
1393
1394         spin_unlock_bh(&session->back_lock);
1395 }
1396
1397 /**
1398  * ASYNC PDUs include
1399  * a. Unsolicited NOP-In (target initiated NOP-In)
1400  * b. ASYNC Messages
1401  * c. Reject PDU
1402  * d. Login response
1403  * These headers arrive unprocessed by the EP firmware.
1404  * iSCSI layer processes them.
1405  */
1406 static unsigned int
1407 beiscsi_complete_pdu(struct beiscsi_conn *beiscsi_conn,
1408                 struct pdu_base *phdr, void *pdata, unsigned int dlen)
1409 {
1410         struct beiscsi_hba *phba = beiscsi_conn->phba;
1411         struct iscsi_conn *conn = beiscsi_conn->conn;
1412         struct beiscsi_io_task *io_task;
1413         struct iscsi_hdr *login_hdr;
1414         struct iscsi_task *task;
1415         u8 code;
1416
1417         code = AMAP_GET_BITS(struct amap_pdu_base, opcode, phdr);
1418         switch (code) {
1419         case ISCSI_OP_NOOP_IN:
1420                 pdata = NULL;
1421                 dlen = 0;
1422                 break;
1423         case ISCSI_OP_ASYNC_EVENT:
1424                 break;
1425         case ISCSI_OP_REJECT:
1426                 WARN_ON(!pdata);
1427                 WARN_ON(!(dlen == 48));
1428                 beiscsi_log(phba, KERN_ERR,
1429                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1430                             "BM_%d : In ISCSI_OP_REJECT\n");
1431                 break;
1432         case ISCSI_OP_LOGIN_RSP:
1433         case ISCSI_OP_TEXT_RSP:
1434                 task = conn->login_task;
1435                 io_task = task->dd_data;
1436                 login_hdr = (struct iscsi_hdr *)phdr;
1437                 login_hdr->itt = io_task->libiscsi_itt;
1438                 break;
1439         default:
1440                 beiscsi_log(phba, KERN_WARNING,
1441                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1442                             "BM_%d : unrecognized async PDU opcode 0x%x\n",
1443                             code);
1444                 return 1;
1445         }
1446         __iscsi_complete_pdu(conn, (struct iscsi_hdr *)phdr, pdata, dlen);
1447         return 0;
1448 }
1449
1450 static inline void
1451 beiscsi_hdl_put_handle(struct hd_async_context *pasync_ctx,
1452                          struct hd_async_handle *pasync_handle)
1453 {
1454         pasync_handle->is_final = 0;
1455         pasync_handle->buffer_len = 0;
1456         pasync_handle->in_use = 0;
1457         list_del_init(&pasync_handle->link);
1458 }
1459
1460 static void
1461 beiscsi_hdl_purge_handles(struct beiscsi_hba *phba,
1462                           struct hd_async_context *pasync_ctx,
1463                           u16 cri)
1464 {
1465         struct hd_async_handle *pasync_handle, *tmp_handle;
1466         struct list_head *plist;
1467
1468         plist  = &pasync_ctx->async_entry[cri].wq.list;
1469         list_for_each_entry_safe(pasync_handle, tmp_handle, plist, link)
1470                 beiscsi_hdl_put_handle(pasync_ctx, pasync_handle);
1471
1472         INIT_LIST_HEAD(&pasync_ctx->async_entry[cri].wq.list);
1473         pasync_ctx->async_entry[cri].wq.hdr_len = 0;
1474         pasync_ctx->async_entry[cri].wq.bytes_received = 0;
1475         pasync_ctx->async_entry[cri].wq.bytes_needed = 0;
1476 }
1477
1478 static struct hd_async_handle *
1479 beiscsi_hdl_get_handle(struct beiscsi_conn *beiscsi_conn,
1480                        struct hd_async_context *pasync_ctx,
1481                        struct i_t_dpdu_cqe *pdpdu_cqe,
1482                        u8 *header)
1483 {
1484         struct beiscsi_hba *phba = beiscsi_conn->phba;
1485         struct hd_async_handle *pasync_handle;
1486         struct be_bus_address phys_addr;
1487         u16 cid, code, ci, cri;
1488         u8 final, error = 0;
1489         u32 dpl;
1490
1491         cid = beiscsi_conn->beiscsi_conn_cid;
1492         cri = BE_GET_ASYNC_CRI_FROM_CID(cid);
1493         /**
1494          * This function is invoked to get the right async_handle structure
1495          * from a given DEF PDU CQ entry.
1496          *
1497          * - index in CQ entry gives the vertical index
1498          * - address in CQ entry is the offset where the DMA last ended
1499          * - final - no more notifications for this PDU
1500          */
1501         if (is_chip_be2_be3r(phba)) {
1502                 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1503                                     dpl, pdpdu_cqe);
1504                 ci = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1505                                       index, pdpdu_cqe);
1506                 final = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1507                                       final, pdpdu_cqe);
1508         } else {
1509                 dpl = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1510                                     dpl, pdpdu_cqe);
1511                 ci = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1512                                       index, pdpdu_cqe);
1513                 final = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1514                                       final, pdpdu_cqe);
1515         }
1516
1517         /**
1518          * DB addr Hi/Lo is same for BE and SKH.
1519          * Subtract the dataplacementlength to get to the base.
1520          */
1521         phys_addr.u.a32.address_lo = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1522                                                    db_addr_lo, pdpdu_cqe);
1523         phys_addr.u.a32.address_lo -= dpl;
1524         phys_addr.u.a32.address_hi = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1525                                                    db_addr_hi, pdpdu_cqe);
1526
1527         code = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe, code, pdpdu_cqe);
1528         switch (code) {
1529         case UNSOL_HDR_NOTIFY:
1530                 pasync_handle = pasync_ctx->async_entry[ci].header;
1531                 *header = 1;
1532                 break;
1533         case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
1534                 error = 1;
1535                 /* fall through */
1536         case UNSOL_DATA_NOTIFY:
1537                 pasync_handle = pasync_ctx->async_entry[ci].data;
1538                 break;
1539         /* called only for above codes */
1540         default:
1541                 return NULL;
1542         }
1543
1544         if (pasync_handle->pa.u.a64.address != phys_addr.u.a64.address ||
1545             pasync_handle->index != ci) {
1546                 /* driver bug - if ci does not match async handle index */
1547                 error = 1;
1548                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
1549                             "BM_%d : cid %u async PDU handle mismatch - addr in %cQE %llx at %u:addr in CQE %llx ci %u\n",
1550                             cid, pasync_handle->is_header ? 'H' : 'D',
1551                             pasync_handle->pa.u.a64.address,
1552                             pasync_handle->index,
1553                             phys_addr.u.a64.address, ci);
1554                 /* FW has stale address - attempt continuing by dropping */
1555         }
1556
1557         /**
1558          * DEF PDU header and data buffers with errors should be simply
1559          * dropped as there are no consumers for it.
1560          */
1561         if (error) {
1562                 beiscsi_hdl_put_handle(pasync_ctx, pasync_handle);
1563                 return NULL;
1564         }
1565
1566         if (pasync_handle->in_use || !list_empty(&pasync_handle->link)) {
1567                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
1568                             "BM_%d : cid %d async PDU handle in use - code %d ci %d addr %llx\n",
1569                             cid, code, ci, phys_addr.u.a64.address);
1570                 beiscsi_hdl_purge_handles(phba, pasync_ctx, cri);
1571         }
1572
1573         list_del_init(&pasync_handle->link);
1574         /**
1575          * Each CID is associated with unique CRI.
1576          * ASYNC_CRI_FROM_CID mapping and CRI_FROM_CID are totaly different.
1577          **/
1578         pasync_handle->cri = cri;
1579         pasync_handle->is_final = final;
1580         pasync_handle->buffer_len = dpl;
1581         pasync_handle->in_use = 1;
1582
1583         return pasync_handle;
1584 }
1585
1586 static unsigned int
1587 beiscsi_hdl_fwd_pdu(struct beiscsi_conn *beiscsi_conn,
1588                     struct hd_async_context *pasync_ctx,
1589                     u16 cri)
1590 {
1591         struct iscsi_session *session = beiscsi_conn->conn->session;
1592         struct hd_async_handle *pasync_handle, *plast_handle;
1593         struct beiscsi_hba *phba = beiscsi_conn->phba;
1594         void *phdr = NULL, *pdata = NULL;
1595         u32 dlen = 0, status = 0;
1596         struct list_head *plist;
1597
1598         plist = &pasync_ctx->async_entry[cri].wq.list;
1599         plast_handle = NULL;
1600         list_for_each_entry(pasync_handle, plist, link) {
1601                 plast_handle = pasync_handle;
1602                 /* get the header, the first entry */
1603                 if (!phdr) {
1604                         phdr = pasync_handle->pbuffer;
1605                         continue;
1606                 }
1607                 /* use first buffer to collect all the data */
1608                 if (!pdata) {
1609                         pdata = pasync_handle->pbuffer;
1610                         dlen = pasync_handle->buffer_len;
1611                         continue;
1612                 }
1613                 if (!pasync_handle->buffer_len ||
1614                     (dlen + pasync_handle->buffer_len) >
1615                     pasync_ctx->async_data.buffer_size)
1616                         break;
1617                 memcpy(pdata + dlen, pasync_handle->pbuffer,
1618                        pasync_handle->buffer_len);
1619                 dlen += pasync_handle->buffer_len;
1620         }
1621
1622         if (!plast_handle->is_final) {
1623                 /* last handle should have final PDU notification from FW */
1624                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
1625                             "BM_%d : cid %u %p fwd async PDU opcode %x with last handle missing - HL%u:DN%u:DR%u\n",
1626                             beiscsi_conn->beiscsi_conn_cid, plast_handle,
1627                             AMAP_GET_BITS(struct amap_pdu_base, opcode, phdr),
1628                             pasync_ctx->async_entry[cri].wq.hdr_len,
1629                             pasync_ctx->async_entry[cri].wq.bytes_needed,
1630                             pasync_ctx->async_entry[cri].wq.bytes_received);
1631         }
1632         spin_lock_bh(&session->back_lock);
1633         status = beiscsi_complete_pdu(beiscsi_conn, phdr, pdata, dlen);
1634         spin_unlock_bh(&session->back_lock);
1635         beiscsi_hdl_purge_handles(phba, pasync_ctx, cri);
1636         return status;
1637 }
1638
1639 static unsigned int
1640 beiscsi_hdl_gather_pdu(struct beiscsi_conn *beiscsi_conn,
1641                        struct hd_async_context *pasync_ctx,
1642                        struct hd_async_handle *pasync_handle)
1643 {
1644         unsigned int bytes_needed = 0, status = 0;
1645         u16 cri = pasync_handle->cri;
1646         struct cri_wait_queue *wq;
1647         struct beiscsi_hba *phba;
1648         struct pdu_base *ppdu;
1649         char *err = "";
1650
1651         phba = beiscsi_conn->phba;
1652         wq = &pasync_ctx->async_entry[cri].wq;
1653         if (pasync_handle->is_header) {
1654                 /* check if PDU hdr is rcv'd when old hdr not completed */
1655                 if (wq->hdr_len) {
1656                         err = "incomplete";
1657                         goto drop_pdu;
1658                 }
1659                 ppdu = pasync_handle->pbuffer;
1660                 bytes_needed = AMAP_GET_BITS(struct amap_pdu_base,
1661                                              data_len_hi, ppdu);
1662                 bytes_needed <<= 16;
1663                 bytes_needed |= be16_to_cpu(AMAP_GET_BITS(struct amap_pdu_base,
1664                                                           data_len_lo, ppdu));
1665                 wq->hdr_len = pasync_handle->buffer_len;
1666                 wq->bytes_received = 0;
1667                 wq->bytes_needed = bytes_needed;
1668                 list_add_tail(&pasync_handle->link, &wq->list);
1669                 if (!bytes_needed)
1670                         status = beiscsi_hdl_fwd_pdu(beiscsi_conn,
1671                                                      pasync_ctx, cri);
1672         } else {
1673                 /* check if data received has header and is needed */
1674                 if (!wq->hdr_len || !wq->bytes_needed) {
1675                         err = "header less";
1676                         goto drop_pdu;
1677                 }
1678                 wq->bytes_received += pasync_handle->buffer_len;
1679                 /* Something got overwritten? Better catch it here. */
1680                 if (wq->bytes_received > wq->bytes_needed) {
1681                         err = "overflow";
1682                         goto drop_pdu;
1683                 }
1684                 list_add_tail(&pasync_handle->link, &wq->list);
1685                 if (wq->bytes_received == wq->bytes_needed)
1686                         status = beiscsi_hdl_fwd_pdu(beiscsi_conn,
1687                                                      pasync_ctx, cri);
1688         }
1689         return status;
1690
1691 drop_pdu:
1692         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_ISCSI,
1693                     "BM_%d : cid %u async PDU %s - def-%c:HL%u:DN%u:DR%u\n",
1694                     beiscsi_conn->beiscsi_conn_cid, err,
1695                     pasync_handle->is_header ? 'H' : 'D',
1696                     wq->hdr_len, wq->bytes_needed,
1697                     pasync_handle->buffer_len);
1698         /* discard this handle */
1699         beiscsi_hdl_put_handle(pasync_ctx, pasync_handle);
1700         /* free all the other handles in cri_wait_queue */
1701         beiscsi_hdl_purge_handles(phba, pasync_ctx, cri);
1702         /* try continuing */
1703         return status;
1704 }
1705
1706 static void
1707 beiscsi_hdq_post_handles(struct beiscsi_hba *phba,
1708                          u8 header, u8 ulp_num, u16 nbuf)
1709 {
1710         struct hd_async_handle *pasync_handle;
1711         struct hd_async_context *pasync_ctx;
1712         struct hwi_controller *phwi_ctrlr;
1713         struct phys_addr *pasync_sge;
1714         u32 ring_id, doorbell = 0;
1715         u32 doorbell_offset;
1716         u16 prod, pi;
1717
1718         phwi_ctrlr = phba->phwi_ctrlr;
1719         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
1720         if (header) {
1721                 pasync_sge = pasync_ctx->async_header.ring_base;
1722                 pi = pasync_ctx->async_header.pi;
1723                 ring_id = phwi_ctrlr->default_pdu_hdr[ulp_num].id;
1724                 doorbell_offset = phwi_ctrlr->default_pdu_hdr[ulp_num].
1725                                         doorbell_offset;
1726         } else {
1727                 pasync_sge = pasync_ctx->async_data.ring_base;
1728                 pi = pasync_ctx->async_data.pi;
1729                 ring_id = phwi_ctrlr->default_pdu_data[ulp_num].id;
1730                 doorbell_offset = phwi_ctrlr->default_pdu_data[ulp_num].
1731                                         doorbell_offset;
1732         }
1733
1734         for (prod = 0; prod < nbuf; prod++) {
1735                 if (header)
1736                         pasync_handle = pasync_ctx->async_entry[pi].header;
1737                 else
1738                         pasync_handle = pasync_ctx->async_entry[pi].data;
1739                 WARN_ON(pasync_handle->is_header != header);
1740                 WARN_ON(pasync_handle->index != pi);
1741                 /* setup the ring only once */
1742                 if (nbuf == pasync_ctx->num_entries) {
1743                         /* note hi is lo */
1744                         pasync_sge[pi].hi = pasync_handle->pa.u.a32.address_lo;
1745                         pasync_sge[pi].lo = pasync_handle->pa.u.a32.address_hi;
1746                 }
1747                 if (++pi == pasync_ctx->num_entries)
1748                         pi = 0;
1749         }
1750
1751         if (header)
1752                 pasync_ctx->async_header.pi = pi;
1753         else
1754                 pasync_ctx->async_data.pi = pi;
1755
1756         doorbell |= ring_id & DB_DEF_PDU_RING_ID_MASK;
1757         doorbell |= 1 << DB_DEF_PDU_REARM_SHIFT;
1758         doorbell |= 0 << DB_DEF_PDU_EVENT_SHIFT;
1759         doorbell |= (prod & DB_DEF_PDU_CQPROC_MASK) << DB_DEF_PDU_CQPROC_SHIFT;
1760         iowrite32(doorbell, phba->db_va + doorbell_offset);
1761 }
1762
1763 static void
1764 beiscsi_hdq_process_compl(struct beiscsi_conn *beiscsi_conn,
1765                           struct i_t_dpdu_cqe *pdpdu_cqe)
1766 {
1767         struct beiscsi_hba *phba = beiscsi_conn->phba;
1768         struct hd_async_handle *pasync_handle = NULL;
1769         struct hd_async_context *pasync_ctx;
1770         struct hwi_controller *phwi_ctrlr;
1771         u8 ulp_num, consumed, header = 0;
1772         u16 cid_cri;
1773
1774         phwi_ctrlr = phba->phwi_ctrlr;
1775         cid_cri = BE_GET_CRI_FROM_CID(beiscsi_conn->beiscsi_conn_cid);
1776         ulp_num = BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr, cid_cri);
1777         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
1778         pasync_handle = beiscsi_hdl_get_handle(beiscsi_conn, pasync_ctx,
1779                                                pdpdu_cqe, &header);
1780         if (is_chip_be2_be3r(phba))
1781                 consumed = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe,
1782                                          num_cons, pdpdu_cqe);
1783         else
1784                 consumed = AMAP_GET_BITS(struct amap_i_t_dpdu_cqe_v2,
1785                                          num_cons, pdpdu_cqe);
1786         if (pasync_handle)
1787                 beiscsi_hdl_gather_pdu(beiscsi_conn, pasync_ctx, pasync_handle);
1788         /* num_cons indicates number of 8 RQEs consumed */
1789         if (consumed)
1790                 beiscsi_hdq_post_handles(phba, header, ulp_num, 8 * consumed);
1791 }
1792
1793 void beiscsi_process_mcc_cq(struct beiscsi_hba *phba)
1794 {
1795         struct be_queue_info *mcc_cq;
1796         struct  be_mcc_compl *mcc_compl;
1797         unsigned int num_processed = 0;
1798
1799         mcc_cq = &phba->ctrl.mcc_obj.cq;
1800         mcc_compl = queue_tail_node(mcc_cq);
1801         mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
1802         while (mcc_compl->flags & CQE_FLAGS_VALID_MASK) {
1803                 if (beiscsi_hba_in_error(phba))
1804                         return;
1805
1806                 if (num_processed >= 32) {
1807                         hwi_ring_cq_db(phba, mcc_cq->id,
1808                                         num_processed, 0);
1809                         num_processed = 0;
1810                 }
1811                 if (mcc_compl->flags & CQE_FLAGS_ASYNC_MASK) {
1812                         beiscsi_process_async_event(phba, mcc_compl);
1813                 } else if (mcc_compl->flags & CQE_FLAGS_COMPLETED_MASK) {
1814                         beiscsi_process_mcc_compl(&phba->ctrl, mcc_compl);
1815                 }
1816
1817                 mcc_compl->flags = 0;
1818                 queue_tail_inc(mcc_cq);
1819                 mcc_compl = queue_tail_node(mcc_cq);
1820                 mcc_compl->flags = le32_to_cpu(mcc_compl->flags);
1821                 num_processed++;
1822         }
1823
1824         if (num_processed > 0)
1825                 hwi_ring_cq_db(phba, mcc_cq->id, num_processed, 1);
1826 }
1827
1828 static void beiscsi_mcc_work(struct work_struct *work)
1829 {
1830         struct be_eq_obj *pbe_eq;
1831         struct beiscsi_hba *phba;
1832
1833         pbe_eq = container_of(work, struct be_eq_obj, mcc_work);
1834         phba = pbe_eq->phba;
1835         beiscsi_process_mcc_cq(phba);
1836         /* rearm EQ for further interrupts */
1837         if (!beiscsi_hba_in_error(phba))
1838                 hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
1839 }
1840
1841 /**
1842  * beiscsi_process_cq()- Process the Completion Queue
1843  * @pbe_eq: Event Q on which the Completion has come
1844  * @budget: Max number of events to processed
1845  *
1846  * return
1847  *     Number of Completion Entries processed.
1848  **/
1849 unsigned int beiscsi_process_cq(struct be_eq_obj *pbe_eq, int budget)
1850 {
1851         struct be_queue_info *cq;
1852         struct sol_cqe *sol;
1853         unsigned int total = 0;
1854         unsigned int num_processed = 0;
1855         unsigned short code = 0, cid = 0;
1856         uint16_t cri_index = 0;
1857         struct beiscsi_conn *beiscsi_conn;
1858         struct beiscsi_endpoint *beiscsi_ep;
1859         struct iscsi_endpoint *ep;
1860         struct beiscsi_hba *phba;
1861
1862         cq = pbe_eq->cq;
1863         sol = queue_tail_node(cq);
1864         phba = pbe_eq->phba;
1865
1866         while (sol->dw[offsetof(struct amap_sol_cqe, valid) / 32] &
1867                CQE_VALID_MASK) {
1868                 if (beiscsi_hba_in_error(phba))
1869                         return 0;
1870
1871                 be_dws_le_to_cpu(sol, sizeof(struct sol_cqe));
1872
1873                 code = (sol->dw[offsetof(struct amap_sol_cqe, code) / 32] &
1874                                 CQE_CODE_MASK);
1875
1876                  /* Get the CID */
1877                 if (is_chip_be2_be3r(phba)) {
1878                         cid = AMAP_GET_BITS(struct amap_sol_cqe, cid, sol);
1879                 } else {
1880                         if ((code == DRIVERMSG_NOTIFY) ||
1881                             (code == UNSOL_HDR_NOTIFY) ||
1882                             (code == UNSOL_DATA_NOTIFY))
1883                                 cid = AMAP_GET_BITS(
1884                                                     struct amap_i_t_dpdu_cqe_v2,
1885                                                     cid, sol);
1886                          else
1887                                  cid = AMAP_GET_BITS(struct amap_sol_cqe_v2,
1888                                                      cid, sol);
1889                 }
1890
1891                 cri_index = BE_GET_CRI_FROM_CID(cid);
1892                 ep = phba->ep_array[cri_index];
1893
1894                 if (ep == NULL) {
1895                         /* connection has already been freed
1896                          * just move on to next one
1897                          */
1898                         beiscsi_log(phba, KERN_WARNING,
1899                                     BEISCSI_LOG_INIT,
1900                                     "BM_%d : proc cqe of disconn ep: cid %d\n",
1901                                     cid);
1902                         goto proc_next_cqe;
1903                 }
1904
1905                 beiscsi_ep = ep->dd_data;
1906                 beiscsi_conn = beiscsi_ep->conn;
1907
1908                 /* replenish cq */
1909                 if (num_processed == 32) {
1910                         hwi_ring_cq_db(phba, cq->id, 32, 0);
1911                         num_processed = 0;
1912                 }
1913                 total++;
1914
1915                 switch (code) {
1916                 case SOL_CMD_COMPLETE:
1917                         hwi_complete_cmd(beiscsi_conn, phba, sol);
1918                         break;
1919                 case DRIVERMSG_NOTIFY:
1920                         beiscsi_log(phba, KERN_INFO,
1921                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1922                                     "BM_%d : Received %s[%d] on CID : %d\n",
1923                                     cqe_desc[code], code, cid);
1924
1925                         hwi_complete_drvr_msgs(beiscsi_conn, phba, sol);
1926                         break;
1927                 case UNSOL_HDR_NOTIFY:
1928                         beiscsi_log(phba, KERN_INFO,
1929                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1930                                     "BM_%d : Received %s[%d] on CID : %d\n",
1931                                     cqe_desc[code], code, cid);
1932
1933                         spin_lock_bh(&phba->async_pdu_lock);
1934                         beiscsi_hdq_process_compl(beiscsi_conn,
1935                                                   (struct i_t_dpdu_cqe *)sol);
1936                         spin_unlock_bh(&phba->async_pdu_lock);
1937                         break;
1938                 case UNSOL_DATA_NOTIFY:
1939                         beiscsi_log(phba, KERN_INFO,
1940                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1941                                     "BM_%d : Received %s[%d] on CID : %d\n",
1942                                     cqe_desc[code], code, cid);
1943
1944                         spin_lock_bh(&phba->async_pdu_lock);
1945                         beiscsi_hdq_process_compl(beiscsi_conn,
1946                                                   (struct i_t_dpdu_cqe *)sol);
1947                         spin_unlock_bh(&phba->async_pdu_lock);
1948                         break;
1949                 case CXN_INVALIDATE_INDEX_NOTIFY:
1950                 case CMD_INVALIDATED_NOTIFY:
1951                 case CXN_INVALIDATE_NOTIFY:
1952                         beiscsi_log(phba, KERN_ERR,
1953                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1954                                     "BM_%d : Ignoring %s[%d] on CID : %d\n",
1955                                     cqe_desc[code], code, cid);
1956                         break;
1957                 case CXN_KILLED_HDR_DIGEST_ERR:
1958                 case SOL_CMD_KILLED_DATA_DIGEST_ERR:
1959                         beiscsi_log(phba, KERN_ERR,
1960                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1961                                     "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
1962                                     cqe_desc[code], code,  cid);
1963                         break;
1964                 case CMD_KILLED_INVALID_STATSN_RCVD:
1965                 case CMD_KILLED_INVALID_R2T_RCVD:
1966                 case CMD_CXN_KILLED_LUN_INVALID:
1967                 case CMD_CXN_KILLED_ICD_INVALID:
1968                 case CMD_CXN_KILLED_ITT_INVALID:
1969                 case CMD_CXN_KILLED_SEQ_OUTOFORDER:
1970                 case CMD_CXN_KILLED_INVALID_DATASN_RCVD:
1971                         beiscsi_log(phba, KERN_ERR,
1972                                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
1973                                     "BM_%d : Cmd Notification %s[%d] on CID : %d\n",
1974                                     cqe_desc[code], code,  cid);
1975                         break;
1976                 case UNSOL_DATA_DIGEST_ERROR_NOTIFY:
1977                         beiscsi_log(phba, KERN_ERR,
1978                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
1979                                     "BM_%d :  Dropping %s[%d] on DPDU ring on CID : %d\n",
1980                                     cqe_desc[code], code, cid);
1981                         spin_lock_bh(&phba->async_pdu_lock);
1982                         /* driver consumes the entry and drops the contents */
1983                         beiscsi_hdq_process_compl(beiscsi_conn,
1984                                                   (struct i_t_dpdu_cqe *)sol);
1985                         spin_unlock_bh(&phba->async_pdu_lock);
1986                         break;
1987                 case CXN_KILLED_PDU_SIZE_EXCEEDS_DSL:
1988                 case CXN_KILLED_BURST_LEN_MISMATCH:
1989                 case CXN_KILLED_AHS_RCVD:
1990                 case CXN_KILLED_UNKNOWN_HDR:
1991                 case CXN_KILLED_STALE_ITT_TTT_RCVD:
1992                 case CXN_KILLED_INVALID_ITT_TTT_RCVD:
1993                 case CXN_KILLED_TIMED_OUT:
1994                 case CXN_KILLED_FIN_RCVD:
1995                 case CXN_KILLED_RST_SENT:
1996                 case CXN_KILLED_RST_RCVD:
1997                 case CXN_KILLED_BAD_UNSOL_PDU_RCVD:
1998                 case CXN_KILLED_BAD_WRB_INDEX_ERROR:
1999                 case CXN_KILLED_OVER_RUN_RESIDUAL:
2000                 case CXN_KILLED_UNDER_RUN_RESIDUAL:
2001                 case CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN:
2002                         beiscsi_log(phba, KERN_ERR,
2003                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2004                                     "BM_%d : Event %s[%d] received on CID : %d\n",
2005                                     cqe_desc[code], code, cid);
2006                         if (beiscsi_conn)
2007                                 iscsi_conn_failure(beiscsi_conn->conn,
2008                                                    ISCSI_ERR_CONN_FAILED);
2009                         break;
2010                 default:
2011                         beiscsi_log(phba, KERN_ERR,
2012                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
2013                                     "BM_%d : Invalid CQE Event Received Code : %d"
2014                                     "CID 0x%x...\n",
2015                                     code, cid);
2016                         break;
2017                 }
2018
2019 proc_next_cqe:
2020                 AMAP_SET_BITS(struct amap_sol_cqe, valid, sol, 0);
2021                 queue_tail_inc(cq);
2022                 sol = queue_tail_node(cq);
2023                 num_processed++;
2024                 if (total == budget)
2025                         break;
2026         }
2027
2028         hwi_ring_cq_db(phba, cq->id, num_processed, 1);
2029         return total;
2030 }
2031
2032 static int be_iopoll(struct irq_poll *iop, int budget)
2033 {
2034         unsigned int ret, io_events;
2035         struct beiscsi_hba *phba;
2036         struct be_eq_obj *pbe_eq;
2037         struct be_eq_entry *eqe = NULL;
2038         struct be_queue_info *eq;
2039
2040         pbe_eq = container_of(iop, struct be_eq_obj, iopoll);
2041         phba = pbe_eq->phba;
2042         if (beiscsi_hba_in_error(phba)) {
2043                 irq_poll_complete(iop);
2044                 return 0;
2045         }
2046
2047         io_events = 0;
2048         eq = &pbe_eq->q;
2049         eqe = queue_tail_node(eq);
2050         while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32] &
2051                         EQE_VALID_MASK) {
2052                 AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
2053                 queue_tail_inc(eq);
2054                 eqe = queue_tail_node(eq);
2055                 io_events++;
2056         }
2057         hwi_ring_eq_db(phba, eq->id, 1, io_events, 0, 1);
2058
2059         ret = beiscsi_process_cq(pbe_eq, budget);
2060         pbe_eq->cq_count += ret;
2061         if (ret < budget) {
2062                 irq_poll_complete(iop);
2063                 beiscsi_log(phba, KERN_INFO,
2064                             BEISCSI_LOG_CONFIG | BEISCSI_LOG_IO,
2065                             "BM_%d : rearm pbe_eq->q.id =%d ret %d\n",
2066                             pbe_eq->q.id, ret);
2067                 if (!beiscsi_hba_in_error(phba))
2068                         hwi_ring_eq_db(phba, pbe_eq->q.id, 0, 0, 1, 1);
2069         }
2070         return ret;
2071 }
2072
2073 static void
2074 hwi_write_sgl_v2(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2075                   unsigned int num_sg, struct beiscsi_io_task *io_task)
2076 {
2077         struct iscsi_sge *psgl;
2078         unsigned int sg_len, index;
2079         unsigned int sge_len = 0;
2080         unsigned long long addr;
2081         struct scatterlist *l_sg;
2082         unsigned int offset;
2083
2084         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_lo, pwrb,
2085                       io_task->bhs_pa.u.a32.address_lo);
2086         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, iscsi_bhs_addr_hi, pwrb,
2087                       io_task->bhs_pa.u.a32.address_hi);
2088
2089         l_sg = sg;
2090         for (index = 0; (index < num_sg) && (index < 2); index++,
2091                         sg = sg_next(sg)) {
2092                 if (index == 0) {
2093                         sg_len = sg_dma_len(sg);
2094                         addr = (u64) sg_dma_address(sg);
2095                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2096                                       sge0_addr_lo, pwrb,
2097                                       lower_32_bits(addr));
2098                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2099                                       sge0_addr_hi, pwrb,
2100                                       upper_32_bits(addr));
2101                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2102                                       sge0_len, pwrb,
2103                                       sg_len);
2104                         sge_len = sg_len;
2105                 } else {
2106                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_r2t_offset,
2107                                       pwrb, sge_len);
2108                         sg_len = sg_dma_len(sg);
2109                         addr = (u64) sg_dma_address(sg);
2110                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2111                                       sge1_addr_lo, pwrb,
2112                                       lower_32_bits(addr));
2113                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2114                                       sge1_addr_hi, pwrb,
2115                                       upper_32_bits(addr));
2116                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
2117                                       sge1_len, pwrb,
2118                                       sg_len);
2119                 }
2120         }
2121         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2122         memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2123
2124         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2125
2126         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2127                       io_task->bhs_pa.u.a32.address_hi);
2128         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2129                       io_task->bhs_pa.u.a32.address_lo);
2130
2131         if (num_sg == 1) {
2132                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2133                               1);
2134                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2135                               0);
2136         } else if (num_sg == 2) {
2137                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2138                               0);
2139                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2140                               1);
2141         } else {
2142                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge0_last, pwrb,
2143                               0);
2144                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sge1_last, pwrb,
2145                               0);
2146         }
2147
2148         sg = l_sg;
2149         psgl++;
2150         psgl++;
2151         offset = 0;
2152         for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2153                 sg_len = sg_dma_len(sg);
2154                 addr = (u64) sg_dma_address(sg);
2155                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2156                               lower_32_bits(addr));
2157                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2158                               upper_32_bits(addr));
2159                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2160                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2161                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2162                 offset += sg_len;
2163         }
2164         psgl--;
2165         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2166 }
2167
2168 static void
2169 hwi_write_sgl(struct iscsi_wrb *pwrb, struct scatterlist *sg,
2170               unsigned int num_sg, struct beiscsi_io_task *io_task)
2171 {
2172         struct iscsi_sge *psgl;
2173         unsigned int sg_len, index;
2174         unsigned int sge_len = 0;
2175         unsigned long long addr;
2176         struct scatterlist *l_sg;
2177         unsigned int offset;
2178
2179         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2180                                       io_task->bhs_pa.u.a32.address_lo);
2181         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2182                                       io_task->bhs_pa.u.a32.address_hi);
2183
2184         l_sg = sg;
2185         for (index = 0; (index < num_sg) && (index < 2); index++,
2186                                                          sg = sg_next(sg)) {
2187                 if (index == 0) {
2188                         sg_len = sg_dma_len(sg);
2189                         addr = (u64) sg_dma_address(sg);
2190                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2191                                                 ((u32)(addr & 0xFFFFFFFF)));
2192                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2193                                                         ((u32)(addr >> 32)));
2194                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2195                                                         sg_len);
2196                         sge_len = sg_len;
2197                 } else {
2198                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_r2t_offset,
2199                                                         pwrb, sge_len);
2200                         sg_len = sg_dma_len(sg);
2201                         addr = (u64) sg_dma_address(sg);
2202                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_lo, pwrb,
2203                                                 ((u32)(addr & 0xFFFFFFFF)));
2204                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_addr_hi, pwrb,
2205                                                         ((u32)(addr >> 32)));
2206                         AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_len, pwrb,
2207                                                         sg_len);
2208                 }
2209         }
2210         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2211         memset(psgl, 0, sizeof(*psgl) * BE2_SGE);
2212
2213         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len - 2);
2214
2215         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2216                         io_task->bhs_pa.u.a32.address_hi);
2217         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2218                         io_task->bhs_pa.u.a32.address_lo);
2219
2220         if (num_sg == 1) {
2221                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2222                                                                 1);
2223                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2224                                                                 0);
2225         } else if (num_sg == 2) {
2226                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2227                                                                 0);
2228                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2229                                                                 1);
2230         } else {
2231                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb,
2232                                                                 0);
2233                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge1_last, pwrb,
2234                                                                 0);
2235         }
2236         sg = l_sg;
2237         psgl++;
2238         psgl++;
2239         offset = 0;
2240         for (index = 0; index < num_sg; index++, sg = sg_next(sg), psgl++) {
2241                 sg_len = sg_dma_len(sg);
2242                 addr = (u64) sg_dma_address(sg);
2243                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2244                                                 (addr & 0xFFFFFFFF));
2245                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2246                                                 (addr >> 32));
2247                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, sg_len);
2248                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, offset);
2249                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2250                 offset += sg_len;
2251         }
2252         psgl--;
2253         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2254 }
2255
2256 /**
2257  * hwi_write_buffer()- Populate the WRB with task info
2258  * @pwrb: ptr to the WRB entry
2259  * @task: iscsi task which is to be executed
2260  **/
2261 static int hwi_write_buffer(struct iscsi_wrb *pwrb, struct iscsi_task *task)
2262 {
2263         struct iscsi_sge *psgl;
2264         struct beiscsi_io_task *io_task = task->dd_data;
2265         struct beiscsi_conn *beiscsi_conn = io_task->conn;
2266         struct beiscsi_hba *phba = beiscsi_conn->phba;
2267         uint8_t dsp_value = 0;
2268
2269         io_task->bhs_len = sizeof(struct be_nonio_bhs) - 2;
2270         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_lo, pwrb,
2271                                 io_task->bhs_pa.u.a32.address_lo);
2272         AMAP_SET_BITS(struct amap_iscsi_wrb, iscsi_bhs_addr_hi, pwrb,
2273                                 io_task->bhs_pa.u.a32.address_hi);
2274
2275         if (task->data) {
2276
2277                 /* Check for the data_count */
2278                 dsp_value = (task->data_count) ? 1 : 0;
2279
2280                 if (is_chip_be2_be3r(phba))
2281                         AMAP_SET_BITS(struct amap_iscsi_wrb, dsp,
2282                                       pwrb, dsp_value);
2283                 else
2284                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp,
2285                                       pwrb, dsp_value);
2286
2287                 /* Map addr only if there is data_count */
2288                 if (dsp_value) {
2289                         io_task->mtask_addr = dma_map_single(&phba->pcidev->dev,
2290                                                              task->data,
2291                                                              task->data_count,
2292                                                              DMA_TO_DEVICE);
2293                         if (dma_mapping_error(&phba->pcidev->dev,
2294                                                   io_task->mtask_addr))
2295                                 return -ENOMEM;
2296                         io_task->mtask_data_count = task->data_count;
2297                 } else
2298                         io_task->mtask_addr = 0;
2299
2300                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_lo, pwrb,
2301                               lower_32_bits(io_task->mtask_addr));
2302                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_addr_hi, pwrb,
2303                               upper_32_bits(io_task->mtask_addr));
2304                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_len, pwrb,
2305                                                 task->data_count);
2306
2307                 AMAP_SET_BITS(struct amap_iscsi_wrb, sge0_last, pwrb, 1);
2308         } else {
2309                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
2310                 io_task->mtask_addr = 0;
2311         }
2312
2313         psgl = (struct iscsi_sge *)io_task->psgl_handle->pfrag;
2314
2315         AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, io_task->bhs_len);
2316
2317         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2318                       io_task->bhs_pa.u.a32.address_hi);
2319         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2320                       io_task->bhs_pa.u.a32.address_lo);
2321         if (task->data) {
2322                 psgl++;
2323                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl, 0);
2324                 AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl, 0);
2325                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0);
2326                 AMAP_SET_BITS(struct amap_iscsi_sge, sge_offset, psgl, 0);
2327                 AMAP_SET_BITS(struct amap_iscsi_sge, rsvd0, psgl, 0);
2328                 AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 0);
2329
2330                 psgl++;
2331                 if (task->data) {
2332                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, psgl,
2333                                       lower_32_bits(io_task->mtask_addr));
2334                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, psgl,
2335                                       upper_32_bits(io_task->mtask_addr));
2336                 }
2337                 AMAP_SET_BITS(struct amap_iscsi_sge, len, psgl, 0x106);
2338         }
2339         AMAP_SET_BITS(struct amap_iscsi_sge, last_sge, psgl, 1);
2340         return 0;
2341 }
2342
2343 /**
2344  * beiscsi_find_mem_req()- Find mem needed
2345  * @phba: ptr to HBA struct
2346  **/
2347 static void beiscsi_find_mem_req(struct beiscsi_hba *phba)
2348 {
2349         uint8_t mem_descr_index, ulp_num;
2350         unsigned int num_async_pdu_buf_pages;
2351         unsigned int num_async_pdu_data_pages, wrb_sz_per_cxn;
2352         unsigned int num_async_pdu_buf_sgl_pages, num_async_pdu_data_sgl_pages;
2353
2354         phba->params.hwi_ws_sz = sizeof(struct hwi_controller);
2355
2356         phba->mem_req[ISCSI_MEM_GLOBAL_HEADER] = 2 *
2357                                                  BE_ISCSI_PDU_HEADER_SIZE;
2358         phba->mem_req[HWI_MEM_ADDN_CONTEXT] =
2359                                             sizeof(struct hwi_context_memory);
2360
2361
2362         phba->mem_req[HWI_MEM_WRB] = sizeof(struct iscsi_wrb)
2363             * (phba->params.wrbs_per_cxn)
2364             * phba->params.cxns_per_ctrl;
2365         wrb_sz_per_cxn =  sizeof(struct wrb_handle) *
2366                                  (phba->params.wrbs_per_cxn);
2367         phba->mem_req[HWI_MEM_WRBH] = roundup_pow_of_two((wrb_sz_per_cxn) *
2368                                 phba->params.cxns_per_ctrl);
2369
2370         phba->mem_req[HWI_MEM_SGLH] = sizeof(struct sgl_handle) *
2371                 phba->params.icds_per_ctrl;
2372         phba->mem_req[HWI_MEM_SGE] = sizeof(struct iscsi_sge) *
2373                 phba->params.num_sge_per_io * phba->params.icds_per_ctrl;
2374         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2375                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2376
2377                         num_async_pdu_buf_sgl_pages =
2378                                 PAGES_REQUIRED(BEISCSI_ASYNC_HDQ_SIZE(
2379                                                phba, ulp_num) *
2380                                                sizeof(struct phys_addr));
2381
2382                         num_async_pdu_buf_pages =
2383                                 PAGES_REQUIRED(BEISCSI_ASYNC_HDQ_SIZE(
2384                                                phba, ulp_num) *
2385                                                phba->params.defpdu_hdr_sz);
2386
2387                         num_async_pdu_data_pages =
2388                                 PAGES_REQUIRED(BEISCSI_ASYNC_HDQ_SIZE(
2389                                                phba, ulp_num) *
2390                                                phba->params.defpdu_data_sz);
2391
2392                         num_async_pdu_data_sgl_pages =
2393                                 PAGES_REQUIRED(BEISCSI_ASYNC_HDQ_SIZE(
2394                                                phba, ulp_num) *
2395                                                sizeof(struct phys_addr));
2396
2397                         mem_descr_index = (HWI_MEM_TEMPLATE_HDR_ULP0 +
2398                                           (ulp_num * MEM_DESCR_OFFSET));
2399                         phba->mem_req[mem_descr_index] =
2400                                         BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2401                                         BEISCSI_TEMPLATE_HDR_PER_CXN_SIZE;
2402
2403                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2404                                           (ulp_num * MEM_DESCR_OFFSET));
2405                         phba->mem_req[mem_descr_index] =
2406                                           num_async_pdu_buf_pages *
2407                                           PAGE_SIZE;
2408
2409                         mem_descr_index = (HWI_MEM_ASYNC_DATA_BUF_ULP0 +
2410                                           (ulp_num * MEM_DESCR_OFFSET));
2411                         phba->mem_req[mem_descr_index] =
2412                                           num_async_pdu_data_pages *
2413                                           PAGE_SIZE;
2414
2415                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_RING_ULP0 +
2416                                           (ulp_num * MEM_DESCR_OFFSET));
2417                         phba->mem_req[mem_descr_index] =
2418                                           num_async_pdu_buf_sgl_pages *
2419                                           PAGE_SIZE;
2420
2421                         mem_descr_index = (HWI_MEM_ASYNC_DATA_RING_ULP0 +
2422                                           (ulp_num * MEM_DESCR_OFFSET));
2423                         phba->mem_req[mem_descr_index] =
2424                                           num_async_pdu_data_sgl_pages *
2425                                           PAGE_SIZE;
2426
2427                         mem_descr_index = (HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
2428                                           (ulp_num * MEM_DESCR_OFFSET));
2429                         phba->mem_req[mem_descr_index] =
2430                                 BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
2431                                 sizeof(struct hd_async_handle);
2432
2433                         mem_descr_index = (HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
2434                                           (ulp_num * MEM_DESCR_OFFSET));
2435                         phba->mem_req[mem_descr_index] =
2436                                 BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
2437                                 sizeof(struct hd_async_handle);
2438
2439                         mem_descr_index = (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2440                                           (ulp_num * MEM_DESCR_OFFSET));
2441                         phba->mem_req[mem_descr_index] =
2442                                 sizeof(struct hd_async_context) +
2443                                 (BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
2444                                  sizeof(struct hd_async_entry));
2445                 }
2446         }
2447 }
2448
2449 static int beiscsi_alloc_mem(struct beiscsi_hba *phba)
2450 {
2451         dma_addr_t bus_add;
2452         struct hwi_controller *phwi_ctrlr;
2453         struct be_mem_descriptor *mem_descr;
2454         struct mem_array *mem_arr, *mem_arr_orig;
2455         unsigned int i, j, alloc_size, curr_alloc_size;
2456
2457         phba->phwi_ctrlr = kzalloc(phba->params.hwi_ws_sz, GFP_KERNEL);
2458         if (!phba->phwi_ctrlr)
2459                 return -ENOMEM;
2460
2461         /* Allocate memory for wrb_context */
2462         phwi_ctrlr = phba->phwi_ctrlr;
2463         phwi_ctrlr->wrb_context = kcalloc(phba->params.cxns_per_ctrl,
2464                                           sizeof(struct hwi_wrb_context),
2465                                           GFP_KERNEL);
2466         if (!phwi_ctrlr->wrb_context) {
2467                 kfree(phba->phwi_ctrlr);
2468                 return -ENOMEM;
2469         }
2470
2471         phba->init_mem = kcalloc(SE_MEM_MAX, sizeof(*mem_descr),
2472                                  GFP_KERNEL);
2473         if (!phba->init_mem) {
2474                 kfree(phwi_ctrlr->wrb_context);
2475                 kfree(phba->phwi_ctrlr);
2476                 return -ENOMEM;
2477         }
2478
2479         mem_arr_orig = kmalloc_array(BEISCSI_MAX_FRAGS_INIT,
2480                                      sizeof(*mem_arr_orig),
2481                                      GFP_KERNEL);
2482         if (!mem_arr_orig) {
2483                 kfree(phba->init_mem);
2484                 kfree(phwi_ctrlr->wrb_context);
2485                 kfree(phba->phwi_ctrlr);
2486                 return -ENOMEM;
2487         }
2488
2489         mem_descr = phba->init_mem;
2490         for (i = 0; i < SE_MEM_MAX; i++) {
2491                 if (!phba->mem_req[i]) {
2492                         mem_descr->mem_array = NULL;
2493                         mem_descr++;
2494                         continue;
2495                 }
2496
2497                 j = 0;
2498                 mem_arr = mem_arr_orig;
2499                 alloc_size = phba->mem_req[i];
2500                 memset(mem_arr, 0, sizeof(struct mem_array) *
2501                        BEISCSI_MAX_FRAGS_INIT);
2502                 curr_alloc_size = min(be_max_phys_size * 1024, alloc_size);
2503                 do {
2504                         mem_arr->virtual_address =
2505                                 dma_alloc_coherent(&phba->pcidev->dev,
2506                                         curr_alloc_size, &bus_add, GFP_KERNEL);
2507                         if (!mem_arr->virtual_address) {
2508                                 if (curr_alloc_size <= BE_MIN_MEM_SIZE)
2509                                         goto free_mem;
2510                                 if (curr_alloc_size -
2511                                         rounddown_pow_of_two(curr_alloc_size))
2512                                         curr_alloc_size = rounddown_pow_of_two
2513                                                              (curr_alloc_size);
2514                                 else
2515                                         curr_alloc_size = curr_alloc_size / 2;
2516                         } else {
2517                                 mem_arr->bus_address.u.
2518                                     a64.address = (__u64) bus_add;
2519                                 mem_arr->size = curr_alloc_size;
2520                                 alloc_size -= curr_alloc_size;
2521                                 curr_alloc_size = min(be_max_phys_size *
2522                                                       1024, alloc_size);
2523                                 j++;
2524                                 mem_arr++;
2525                         }
2526                 } while (alloc_size);
2527                 mem_descr->num_elements = j;
2528                 mem_descr->size_in_bytes = phba->mem_req[i];
2529                 mem_descr->mem_array = kmalloc_array(j, sizeof(*mem_arr),
2530                                                      GFP_KERNEL);
2531                 if (!mem_descr->mem_array)
2532                         goto free_mem;
2533
2534                 memcpy(mem_descr->mem_array, mem_arr_orig,
2535                        sizeof(struct mem_array) * j);
2536                 mem_descr++;
2537         }
2538         kfree(mem_arr_orig);
2539         return 0;
2540 free_mem:
2541         mem_descr->num_elements = j;
2542         while ((i) || (j)) {
2543                 for (j = mem_descr->num_elements; j > 0; j--) {
2544                         dma_free_coherent(&phba->pcidev->dev,
2545                                             mem_descr->mem_array[j - 1].size,
2546                                             mem_descr->mem_array[j - 1].
2547                                             virtual_address,
2548                                             (unsigned long)mem_descr->
2549                                             mem_array[j - 1].
2550                                             bus_address.u.a64.address);
2551                 }
2552                 if (i) {
2553                         i--;
2554                         kfree(mem_descr->mem_array);
2555                         mem_descr--;
2556                 }
2557         }
2558         kfree(mem_arr_orig);
2559         kfree(phba->init_mem);
2560         kfree(phba->phwi_ctrlr->wrb_context);
2561         kfree(phba->phwi_ctrlr);
2562         return -ENOMEM;
2563 }
2564
2565 static int beiscsi_get_memory(struct beiscsi_hba *phba)
2566 {
2567         beiscsi_find_mem_req(phba);
2568         return beiscsi_alloc_mem(phba);
2569 }
2570
2571 static void iscsi_init_global_templates(struct beiscsi_hba *phba)
2572 {
2573         struct pdu_data_out *pdata_out;
2574         struct pdu_nop_out *pnop_out;
2575         struct be_mem_descriptor *mem_descr;
2576
2577         mem_descr = phba->init_mem;
2578         mem_descr += ISCSI_MEM_GLOBAL_HEADER;
2579         pdata_out =
2580             (struct pdu_data_out *)mem_descr->mem_array[0].virtual_address;
2581         memset(pdata_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2582
2583         AMAP_SET_BITS(struct amap_pdu_data_out, opcode, pdata_out,
2584                       IIOC_SCSI_DATA);
2585
2586         pnop_out =
2587             (struct pdu_nop_out *)((unsigned char *)mem_descr->mem_array[0].
2588                                    virtual_address + BE_ISCSI_PDU_HEADER_SIZE);
2589
2590         memset(pnop_out, 0, BE_ISCSI_PDU_HEADER_SIZE);
2591         AMAP_SET_BITS(struct amap_pdu_nop_out, ttt, pnop_out, 0xFFFFFFFF);
2592         AMAP_SET_BITS(struct amap_pdu_nop_out, f_bit, pnop_out, 1);
2593         AMAP_SET_BITS(struct amap_pdu_nop_out, i_bit, pnop_out, 0);
2594 }
2595
2596 static int beiscsi_init_wrb_handle(struct beiscsi_hba *phba)
2597 {
2598         struct be_mem_descriptor *mem_descr_wrbh, *mem_descr_wrb;
2599         struct hwi_context_memory *phwi_ctxt;
2600         struct wrb_handle *pwrb_handle = NULL;
2601         struct hwi_controller *phwi_ctrlr;
2602         struct hwi_wrb_context *pwrb_context;
2603         struct iscsi_wrb *pwrb = NULL;
2604         unsigned int num_cxn_wrbh = 0;
2605         unsigned int num_cxn_wrb = 0, j, idx = 0, index;
2606
2607         mem_descr_wrbh = phba->init_mem;
2608         mem_descr_wrbh += HWI_MEM_WRBH;
2609
2610         mem_descr_wrb = phba->init_mem;
2611         mem_descr_wrb += HWI_MEM_WRB;
2612         phwi_ctrlr = phba->phwi_ctrlr;
2613
2614         /* Allocate memory for WRBQ */
2615         phwi_ctxt = phwi_ctrlr->phwi_ctxt;
2616         phwi_ctxt->be_wrbq = kcalloc(phba->params.cxns_per_ctrl,
2617                                      sizeof(struct be_queue_info),
2618                                      GFP_KERNEL);
2619         if (!phwi_ctxt->be_wrbq) {
2620                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2621                             "BM_%d : WRBQ Mem Alloc Failed\n");
2622                 return -ENOMEM;
2623         }
2624
2625         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2626                 pwrb_context = &phwi_ctrlr->wrb_context[index];
2627                 pwrb_context->pwrb_handle_base =
2628                                 kcalloc(phba->params.wrbs_per_cxn,
2629                                         sizeof(struct wrb_handle *),
2630                                         GFP_KERNEL);
2631                 if (!pwrb_context->pwrb_handle_base) {
2632                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2633                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
2634                         goto init_wrb_hndl_failed;
2635                 }
2636                 pwrb_context->pwrb_handle_basestd =
2637                                 kcalloc(phba->params.wrbs_per_cxn,
2638                                         sizeof(struct wrb_handle *),
2639                                         GFP_KERNEL);
2640                 if (!pwrb_context->pwrb_handle_basestd) {
2641                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
2642                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
2643                         goto init_wrb_hndl_failed;
2644                 }
2645                 if (!num_cxn_wrbh) {
2646                         pwrb_handle =
2647                                 mem_descr_wrbh->mem_array[idx].virtual_address;
2648                         num_cxn_wrbh = ((mem_descr_wrbh->mem_array[idx].size) /
2649                                         ((sizeof(struct wrb_handle)) *
2650                                          phba->params.wrbs_per_cxn));
2651                         idx++;
2652                 }
2653                 pwrb_context->alloc_index = 0;
2654                 pwrb_context->wrb_handles_available = 0;
2655                 pwrb_context->free_index = 0;
2656
2657                 if (num_cxn_wrbh) {
2658                         for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2659                                 pwrb_context->pwrb_handle_base[j] = pwrb_handle;
2660                                 pwrb_context->pwrb_handle_basestd[j] =
2661                                                                 pwrb_handle;
2662                                 pwrb_context->wrb_handles_available++;
2663                                 pwrb_handle->wrb_index = j;
2664                                 pwrb_handle++;
2665                         }
2666                         num_cxn_wrbh--;
2667                 }
2668                 spin_lock_init(&pwrb_context->wrb_lock);
2669         }
2670         idx = 0;
2671         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
2672                 pwrb_context = &phwi_ctrlr->wrb_context[index];
2673                 if (!num_cxn_wrb) {
2674                         pwrb = mem_descr_wrb->mem_array[idx].virtual_address;
2675                         num_cxn_wrb = (mem_descr_wrb->mem_array[idx].size) /
2676                                 ((sizeof(struct iscsi_wrb) *
2677                                   phba->params.wrbs_per_cxn));
2678                         idx++;
2679                 }
2680
2681                 if (num_cxn_wrb) {
2682                         for (j = 0; j < phba->params.wrbs_per_cxn; j++) {
2683                                 pwrb_handle = pwrb_context->pwrb_handle_base[j];
2684                                 pwrb_handle->pwrb = pwrb;
2685                                 pwrb++;
2686                         }
2687                         num_cxn_wrb--;
2688                 }
2689         }
2690         return 0;
2691 init_wrb_hndl_failed:
2692         for (j = index; j > 0; j--) {
2693                 pwrb_context = &phwi_ctrlr->wrb_context[j];
2694                 kfree(pwrb_context->pwrb_handle_base);
2695                 kfree(pwrb_context->pwrb_handle_basestd);
2696         }
2697         return -ENOMEM;
2698 }
2699
2700 static int hwi_init_async_pdu_ctx(struct beiscsi_hba *phba)
2701 {
2702         uint8_t ulp_num;
2703         struct hwi_controller *phwi_ctrlr;
2704         struct hba_parameters *p = &phba->params;
2705         struct hd_async_context *pasync_ctx;
2706         struct hd_async_handle *pasync_header_h, *pasync_data_h;
2707         unsigned int index, idx, num_per_mem, num_async_data;
2708         struct be_mem_descriptor *mem_descr;
2709
2710         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2711                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2712                         /* get async_ctx for each ULP */
2713                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2714                         mem_descr += (HWI_MEM_ASYNC_PDU_CONTEXT_ULP0 +
2715                                      (ulp_num * MEM_DESCR_OFFSET));
2716
2717                         phwi_ctrlr = phba->phwi_ctrlr;
2718                         phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num] =
2719                                 (struct hd_async_context *)
2720                                  mem_descr->mem_array[0].virtual_address;
2721
2722                         pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
2723                         memset(pasync_ctx, 0, sizeof(*pasync_ctx));
2724
2725                         pasync_ctx->async_entry =
2726                                         (struct hd_async_entry *)
2727                                         ((long unsigned int)pasync_ctx +
2728                                         sizeof(struct hd_async_context));
2729
2730                         pasync_ctx->num_entries = BEISCSI_ASYNC_HDQ_SIZE(phba,
2731                                                   ulp_num);
2732                         /* setup header buffers */
2733                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2734                         mem_descr += HWI_MEM_ASYNC_HEADER_BUF_ULP0 +
2735                                 (ulp_num * MEM_DESCR_OFFSET);
2736                         if (mem_descr->mem_array[0].virtual_address) {
2737                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2738                                             "BM_%d : hwi_init_async_pdu_ctx"
2739                                             " HWI_MEM_ASYNC_HEADER_BUF_ULP%d va=%p\n",
2740                                             ulp_num,
2741                                             mem_descr->mem_array[0].
2742                                             virtual_address);
2743                         } else
2744                                 beiscsi_log(phba, KERN_WARNING,
2745                                             BEISCSI_LOG_INIT,
2746                                             "BM_%d : No Virtual address for ULP : %d\n",
2747                                             ulp_num);
2748
2749                         pasync_ctx->async_header.pi = 0;
2750                         pasync_ctx->async_header.buffer_size = p->defpdu_hdr_sz;
2751                         pasync_ctx->async_header.va_base =
2752                                 mem_descr->mem_array[0].virtual_address;
2753
2754                         pasync_ctx->async_header.pa_base.u.a64.address =
2755                                 mem_descr->mem_array[0].
2756                                 bus_address.u.a64.address;
2757
2758                         /* setup header buffer sgls */
2759                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2760                         mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
2761                                      (ulp_num * MEM_DESCR_OFFSET);
2762                         if (mem_descr->mem_array[0].virtual_address) {
2763                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2764                                             "BM_%d : hwi_init_async_pdu_ctx"
2765                                             " HWI_MEM_ASYNC_HEADER_RING_ULP%d va=%p\n",
2766                                             ulp_num,
2767                                             mem_descr->mem_array[0].
2768                                             virtual_address);
2769                         } else
2770                                 beiscsi_log(phba, KERN_WARNING,
2771                                             BEISCSI_LOG_INIT,
2772                                             "BM_%d : No Virtual address for ULP : %d\n",
2773                                             ulp_num);
2774
2775                         pasync_ctx->async_header.ring_base =
2776                                 mem_descr->mem_array[0].virtual_address;
2777
2778                         /* setup header buffer handles */
2779                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2780                         mem_descr += HWI_MEM_ASYNC_HEADER_HANDLE_ULP0 +
2781                                      (ulp_num * MEM_DESCR_OFFSET);
2782                         if (mem_descr->mem_array[0].virtual_address) {
2783                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2784                                             "BM_%d : hwi_init_async_pdu_ctx"
2785                                             " HWI_MEM_ASYNC_HEADER_HANDLE_ULP%d va=%p\n",
2786                                             ulp_num,
2787                                             mem_descr->mem_array[0].
2788                                             virtual_address);
2789                         } else
2790                                 beiscsi_log(phba, KERN_WARNING,
2791                                             BEISCSI_LOG_INIT,
2792                                             "BM_%d : No Virtual address for ULP : %d\n",
2793                                             ulp_num);
2794
2795                         pasync_ctx->async_header.handle_base =
2796                                 mem_descr->mem_array[0].virtual_address;
2797
2798                         /* setup data buffer sgls */
2799                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2800                         mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
2801                                      (ulp_num * MEM_DESCR_OFFSET);
2802                         if (mem_descr->mem_array[0].virtual_address) {
2803                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2804                                             "BM_%d : hwi_init_async_pdu_ctx"
2805                                             " HWI_MEM_ASYNC_DATA_RING_ULP%d va=%p\n",
2806                                             ulp_num,
2807                                             mem_descr->mem_array[0].
2808                                             virtual_address);
2809                         } else
2810                                 beiscsi_log(phba, KERN_WARNING,
2811                                             BEISCSI_LOG_INIT,
2812                                             "BM_%d : No Virtual address for ULP : %d\n",
2813                                             ulp_num);
2814
2815                         pasync_ctx->async_data.ring_base =
2816                                 mem_descr->mem_array[0].virtual_address;
2817
2818                         /* setup data buffer handles */
2819                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2820                         mem_descr += HWI_MEM_ASYNC_DATA_HANDLE_ULP0 +
2821                                      (ulp_num * MEM_DESCR_OFFSET);
2822                         if (!mem_descr->mem_array[0].virtual_address)
2823                                 beiscsi_log(phba, KERN_WARNING,
2824                                             BEISCSI_LOG_INIT,
2825                                             "BM_%d : No Virtual address for ULP : %d\n",
2826                                             ulp_num);
2827
2828                         pasync_ctx->async_data.handle_base =
2829                                 mem_descr->mem_array[0].virtual_address;
2830
2831                         pasync_header_h =
2832                                 (struct hd_async_handle *)
2833                                 pasync_ctx->async_header.handle_base;
2834                         pasync_data_h =
2835                                 (struct hd_async_handle *)
2836                                 pasync_ctx->async_data.handle_base;
2837
2838                         /* setup data buffers */
2839                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
2840                         mem_descr += HWI_MEM_ASYNC_DATA_BUF_ULP0 +
2841                                      (ulp_num * MEM_DESCR_OFFSET);
2842                         if (mem_descr->mem_array[0].virtual_address) {
2843                                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
2844                                             "BM_%d : hwi_init_async_pdu_ctx"
2845                                             " HWI_MEM_ASYNC_DATA_BUF_ULP%d va=%p\n",
2846                                             ulp_num,
2847                                             mem_descr->mem_array[0].
2848                                             virtual_address);
2849                         } else
2850                                 beiscsi_log(phba, KERN_WARNING,
2851                                             BEISCSI_LOG_INIT,
2852                                             "BM_%d : No Virtual address for ULP : %d\n",
2853                                             ulp_num);
2854
2855                         idx = 0;
2856                         pasync_ctx->async_data.pi = 0;
2857                         pasync_ctx->async_data.buffer_size = p->defpdu_data_sz;
2858                         pasync_ctx->async_data.va_base =
2859                                 mem_descr->mem_array[idx].virtual_address;
2860                         pasync_ctx->async_data.pa_base.u.a64.address =
2861                                 mem_descr->mem_array[idx].
2862                                 bus_address.u.a64.address;
2863
2864                         num_async_data = ((mem_descr->mem_array[idx].size) /
2865                                         phba->params.defpdu_data_sz);
2866                         num_per_mem = 0;
2867
2868                         for (index = 0; index < BEISCSI_ASYNC_HDQ_SIZE
2869                                         (phba, ulp_num); index++) {
2870                                 pasync_header_h->cri = -1;
2871                                 pasync_header_h->is_header = 1;
2872                                 pasync_header_h->index = index;
2873                                 INIT_LIST_HEAD(&pasync_header_h->link);
2874                                 pasync_header_h->pbuffer =
2875                                         (void *)((unsigned long)
2876                                                  (pasync_ctx->
2877                                                   async_header.va_base) +
2878                                                  (p->defpdu_hdr_sz * index));
2879
2880                                 pasync_header_h->pa.u.a64.address =
2881                                         pasync_ctx->async_header.pa_base.u.a64.
2882                                         address + (p->defpdu_hdr_sz * index);
2883
2884                                 pasync_ctx->async_entry[index].header =
2885                                         pasync_header_h;
2886                                 pasync_header_h++;
2887                                 INIT_LIST_HEAD(&pasync_ctx->async_entry[index].
2888                                                 wq.list);
2889
2890                                 pasync_data_h->cri = -1;
2891                                 pasync_data_h->is_header = 0;
2892                                 pasync_data_h->index = index;
2893                                 INIT_LIST_HEAD(&pasync_data_h->link);
2894
2895                                 if (!num_async_data) {
2896                                         num_per_mem = 0;
2897                                         idx++;
2898                                         pasync_ctx->async_data.va_base =
2899                                                 mem_descr->mem_array[idx].
2900                                                 virtual_address;
2901                                         pasync_ctx->async_data.pa_base.u.
2902                                                 a64.address =
2903                                                 mem_descr->mem_array[idx].
2904                                                 bus_address.u.a64.address;
2905                                         num_async_data =
2906                                                 ((mem_descr->mem_array[idx].
2907                                                   size) /
2908                                                  phba->params.defpdu_data_sz);
2909                                 }
2910                                 pasync_data_h->pbuffer =
2911                                         (void *)((unsigned long)
2912                                         (pasync_ctx->async_data.va_base) +
2913                                         (p->defpdu_data_sz * num_per_mem));
2914
2915                                 pasync_data_h->pa.u.a64.address =
2916                                         pasync_ctx->async_data.pa_base.u.a64.
2917                                         address + (p->defpdu_data_sz *
2918                                         num_per_mem);
2919                                 num_per_mem++;
2920                                 num_async_data--;
2921
2922                                 pasync_ctx->async_entry[index].data =
2923                                         pasync_data_h;
2924                                 pasync_data_h++;
2925                         }
2926                 }
2927         }
2928
2929         return 0;
2930 }
2931
2932 static int
2933 be_sgl_create_contiguous(void *virtual_address,
2934                          u64 physical_address, u32 length,
2935                          struct be_dma_mem *sgl)
2936 {
2937         WARN_ON(!virtual_address);
2938         WARN_ON(!physical_address);
2939         WARN_ON(!length);
2940         WARN_ON(!sgl);
2941
2942         sgl->va = virtual_address;
2943         sgl->dma = (unsigned long)physical_address;
2944         sgl->size = length;
2945
2946         return 0;
2947 }
2948
2949 static void be_sgl_destroy_contiguous(struct be_dma_mem *sgl)
2950 {
2951         memset(sgl, 0, sizeof(*sgl));
2952 }
2953
2954 static void
2955 hwi_build_be_sgl_arr(struct beiscsi_hba *phba,
2956                      struct mem_array *pmem, struct be_dma_mem *sgl)
2957 {
2958         if (sgl->va)
2959                 be_sgl_destroy_contiguous(sgl);
2960
2961         be_sgl_create_contiguous(pmem->virtual_address,
2962                                  pmem->bus_address.u.a64.address,
2963                                  pmem->size, sgl);
2964 }
2965
2966 static void
2967 hwi_build_be_sgl_by_offset(struct beiscsi_hba *phba,
2968                            struct mem_array *pmem, struct be_dma_mem *sgl)
2969 {
2970         if (sgl->va)
2971                 be_sgl_destroy_contiguous(sgl);
2972
2973         be_sgl_create_contiguous((unsigned char *)pmem->virtual_address,
2974                                  pmem->bus_address.u.a64.address,
2975                                  pmem->size, sgl);
2976 }
2977
2978 static int be_fill_queue(struct be_queue_info *q,
2979                 u16 len, u16 entry_size, void *vaddress)
2980 {
2981         struct be_dma_mem *mem = &q->dma_mem;
2982
2983         memset(q, 0, sizeof(*q));
2984         q->len = len;
2985         q->entry_size = entry_size;
2986         mem->size = len * entry_size;
2987         mem->va = vaddress;
2988         if (!mem->va)
2989                 return -ENOMEM;
2990         memset(mem->va, 0, mem->size);
2991         return 0;
2992 }
2993
2994 static int beiscsi_create_eqs(struct beiscsi_hba *phba,
2995                              struct hwi_context_memory *phwi_context)
2996 {
2997         int ret = -ENOMEM, eq_for_mcc;
2998         unsigned int i, num_eq_pages;
2999         struct be_queue_info *eq;
3000         struct be_dma_mem *mem;
3001         void *eq_vaddress;
3002         dma_addr_t paddr;
3003
3004         num_eq_pages = PAGES_REQUIRED(phba->params.num_eq_entries * \
3005                                       sizeof(struct be_eq_entry));
3006
3007         if (phba->pcidev->msix_enabled)
3008                 eq_for_mcc = 1;
3009         else
3010                 eq_for_mcc = 0;
3011         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3012                 eq = &phwi_context->be_eq[i].q;
3013                 mem = &eq->dma_mem;
3014                 phwi_context->be_eq[i].phba = phba;
3015                 eq_vaddress = dma_alloc_coherent(&phba->pcidev->dev,
3016                                                    num_eq_pages * PAGE_SIZE,
3017                                                    &paddr, GFP_KERNEL);
3018                 if (!eq_vaddress) {
3019                         ret = -ENOMEM;
3020                         goto create_eq_error;
3021                 }
3022
3023                 mem->va = eq_vaddress;
3024                 ret = be_fill_queue(eq, phba->params.num_eq_entries,
3025                                     sizeof(struct be_eq_entry), eq_vaddress);
3026                 if (ret) {
3027                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3028                                     "BM_%d : be_fill_queue Failed for EQ\n");
3029                         goto create_eq_error;
3030                 }
3031
3032                 mem->dma = paddr;
3033                 ret = beiscsi_cmd_eq_create(&phba->ctrl, eq,
3034                                             BEISCSI_EQ_DELAY_DEF);
3035                 if (ret) {
3036                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3037                                     "BM_%d : beiscsi_cmd_eq_create"
3038                                     "Failed for EQ\n");
3039                         goto create_eq_error;
3040                 }
3041
3042                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3043                             "BM_%d : eqid = %d\n",
3044                             phwi_context->be_eq[i].q.id);
3045         }
3046         return 0;
3047
3048 create_eq_error:
3049         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3050                 eq = &phwi_context->be_eq[i].q;
3051                 mem = &eq->dma_mem;
3052                 if (mem->va)
3053                         dma_free_coherent(&phba->pcidev->dev, num_eq_pages
3054                                             * PAGE_SIZE,
3055                                             mem->va, mem->dma);
3056         }
3057         return ret;
3058 }
3059
3060 static int beiscsi_create_cqs(struct beiscsi_hba *phba,
3061                              struct hwi_context_memory *phwi_context)
3062 {
3063         unsigned int i, num_cq_pages;
3064         struct be_queue_info *cq, *eq;
3065         struct be_dma_mem *mem;
3066         struct be_eq_obj *pbe_eq;
3067         void *cq_vaddress;
3068         int ret = -ENOMEM;
3069         dma_addr_t paddr;
3070
3071         num_cq_pages = PAGES_REQUIRED(phba->params.num_cq_entries * \
3072                                       sizeof(struct sol_cqe));
3073
3074         for (i = 0; i < phba->num_cpus; i++) {
3075                 cq = &phwi_context->be_cq[i];
3076                 eq = &phwi_context->be_eq[i].q;
3077                 pbe_eq = &phwi_context->be_eq[i];
3078                 pbe_eq->cq = cq;
3079                 pbe_eq->phba = phba;
3080                 mem = &cq->dma_mem;
3081                 cq_vaddress = dma_alloc_coherent(&phba->pcidev->dev,
3082                                                    num_cq_pages * PAGE_SIZE,
3083                                                    &paddr, GFP_KERNEL);
3084                 if (!cq_vaddress) {
3085                         ret = -ENOMEM;
3086                         goto create_cq_error;
3087                 }
3088
3089                 ret = be_fill_queue(cq, phba->params.num_cq_entries,
3090                                     sizeof(struct sol_cqe), cq_vaddress);
3091                 if (ret) {
3092                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3093                                     "BM_%d : be_fill_queue Failed "
3094                                     "for ISCSI CQ\n");
3095                         goto create_cq_error;
3096                 }
3097
3098                 mem->dma = paddr;
3099                 ret = beiscsi_cmd_cq_create(&phba->ctrl, cq, eq, false,
3100                                             false, 0);
3101                 if (ret) {
3102                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3103                                     "BM_%d : beiscsi_cmd_eq_create"
3104                                     "Failed for ISCSI CQ\n");
3105                         goto create_cq_error;
3106                 }
3107                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3108                             "BM_%d : iscsi cq_id is %d for eq_id %d\n"
3109                             "iSCSI CQ CREATED\n", cq->id, eq->id);
3110         }
3111         return 0;
3112
3113 create_cq_error:
3114         for (i = 0; i < phba->num_cpus; i++) {
3115                 cq = &phwi_context->be_cq[i];
3116                 mem = &cq->dma_mem;
3117                 if (mem->va)
3118                         dma_free_coherent(&phba->pcidev->dev, num_cq_pages
3119                                             * PAGE_SIZE,
3120                                             mem->va, mem->dma);
3121         }
3122         return ret;
3123 }
3124
3125 static int
3126 beiscsi_create_def_hdr(struct beiscsi_hba *phba,
3127                        struct hwi_context_memory *phwi_context,
3128                        struct hwi_controller *phwi_ctrlr,
3129                        unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3130 {
3131         unsigned int idx;
3132         int ret;
3133         struct be_queue_info *dq, *cq;
3134         struct be_dma_mem *mem;
3135         struct be_mem_descriptor *mem_descr;
3136         void *dq_vaddress;
3137
3138         idx = 0;
3139         dq = &phwi_context->be_def_hdrq[ulp_num];
3140         cq = &phwi_context->be_cq[0];
3141         mem = &dq->dma_mem;
3142         mem_descr = phba->init_mem;
3143         mem_descr += HWI_MEM_ASYNC_HEADER_RING_ULP0 +
3144                     (ulp_num * MEM_DESCR_OFFSET);
3145         dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3146         ret = be_fill_queue(dq, mem_descr->mem_array[0].size /
3147                             sizeof(struct phys_addr),
3148                             sizeof(struct phys_addr), dq_vaddress);
3149         if (ret) {
3150                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3151                             "BM_%d : be_fill_queue Failed for DEF PDU HDR on ULP : %d\n",
3152                             ulp_num);
3153
3154                 return ret;
3155         }
3156         mem->dma = (unsigned long)mem_descr->mem_array[idx].
3157                                   bus_address.u.a64.address;
3158         ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dq,
3159                                               def_pdu_ring_sz,
3160                                               phba->params.defpdu_hdr_sz,
3161                                               BEISCSI_DEFQ_HDR, ulp_num);
3162         if (ret) {
3163                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3164                             "BM_%d : be_cmd_create_default_pdu_queue Failed DEFHDR on ULP : %d\n",
3165                             ulp_num);
3166
3167                 return ret;
3168         }
3169
3170         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3171                     "BM_%d : iscsi hdr def pdu id for ULP : %d is %d\n",
3172                     ulp_num,
3173                     phwi_context->be_def_hdrq[ulp_num].id);
3174         return 0;
3175 }
3176
3177 static int
3178 beiscsi_create_def_data(struct beiscsi_hba *phba,
3179                         struct hwi_context_memory *phwi_context,
3180                         struct hwi_controller *phwi_ctrlr,
3181                         unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3182 {
3183         unsigned int idx;
3184         int ret;
3185         struct be_queue_info *dataq, *cq;
3186         struct be_dma_mem *mem;
3187         struct be_mem_descriptor *mem_descr;
3188         void *dq_vaddress;
3189
3190         idx = 0;
3191         dataq = &phwi_context->be_def_dataq[ulp_num];
3192         cq = &phwi_context->be_cq[0];
3193         mem = &dataq->dma_mem;
3194         mem_descr = phba->init_mem;
3195         mem_descr += HWI_MEM_ASYNC_DATA_RING_ULP0 +
3196                     (ulp_num * MEM_DESCR_OFFSET);
3197         dq_vaddress = mem_descr->mem_array[idx].virtual_address;
3198         ret = be_fill_queue(dataq, mem_descr->mem_array[0].size /
3199                             sizeof(struct phys_addr),
3200                             sizeof(struct phys_addr), dq_vaddress);
3201         if (ret) {
3202                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3203                             "BM_%d : be_fill_queue Failed for DEF PDU "
3204                             "DATA on ULP : %d\n",
3205                             ulp_num);
3206
3207                 return ret;
3208         }
3209         mem->dma = (unsigned long)mem_descr->mem_array[idx].
3210                                   bus_address.u.a64.address;
3211         ret = be_cmd_create_default_pdu_queue(&phba->ctrl, cq, dataq,
3212                                               def_pdu_ring_sz,
3213                                               phba->params.defpdu_data_sz,
3214                                               BEISCSI_DEFQ_DATA, ulp_num);
3215         if (ret) {
3216                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3217                             "BM_%d be_cmd_create_default_pdu_queue"
3218                             " Failed for DEF PDU DATA on ULP : %d\n",
3219                             ulp_num);
3220                 return ret;
3221         }
3222
3223         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3224                     "BM_%d : iscsi def data id on ULP : %d is  %d\n",
3225                     ulp_num,
3226                     phwi_context->be_def_dataq[ulp_num].id);
3227
3228         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3229                     "BM_%d : DEFAULT PDU DATA RING CREATED"
3230                     "on ULP : %d\n", ulp_num);
3231         return 0;
3232 }
3233
3234
3235 static int
3236 beiscsi_post_template_hdr(struct beiscsi_hba *phba)
3237 {
3238         struct be_mem_descriptor *mem_descr;
3239         struct mem_array *pm_arr;
3240         struct be_dma_mem sgl;
3241         int status, ulp_num;
3242
3243         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3244                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3245                         mem_descr = (struct be_mem_descriptor *)phba->init_mem;
3246                         mem_descr += HWI_MEM_TEMPLATE_HDR_ULP0 +
3247                                     (ulp_num * MEM_DESCR_OFFSET);
3248                         pm_arr = mem_descr->mem_array;
3249
3250                         hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3251                         status = be_cmd_iscsi_post_template_hdr(
3252                                  &phba->ctrl, &sgl);
3253
3254                         if (status != 0) {
3255                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3256                                             "BM_%d : Post Template HDR Failed for"
3257                                             "ULP_%d\n", ulp_num);
3258                                 return status;
3259                         }
3260
3261                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3262                                     "BM_%d : Template HDR Pages Posted for"
3263                                     "ULP_%d\n", ulp_num);
3264                 }
3265         }
3266         return 0;
3267 }
3268
3269 static int
3270 beiscsi_post_pages(struct beiscsi_hba *phba)
3271 {
3272         struct be_mem_descriptor *mem_descr;
3273         struct mem_array *pm_arr;
3274         unsigned int page_offset, i;
3275         struct be_dma_mem sgl;
3276         int status, ulp_num = 0;
3277
3278         mem_descr = phba->init_mem;
3279         mem_descr += HWI_MEM_SGE;
3280         pm_arr = mem_descr->mem_array;
3281
3282         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3283                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3284                         break;
3285
3286         page_offset = (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io *
3287                         phba->fw_config.iscsi_icd_start[ulp_num]) / PAGE_SIZE;
3288         for (i = 0; i < mem_descr->num_elements; i++) {
3289                 hwi_build_be_sgl_arr(phba, pm_arr, &sgl);
3290                 status = be_cmd_iscsi_post_sgl_pages(&phba->ctrl, &sgl,
3291                                                 page_offset,
3292                                                 (pm_arr->size / PAGE_SIZE));
3293                 page_offset += pm_arr->size / PAGE_SIZE;
3294                 if (status != 0) {
3295                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3296                                     "BM_%d : post sgl failed.\n");
3297                         return status;
3298                 }
3299                 pm_arr++;
3300         }
3301         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3302                     "BM_%d : POSTED PAGES\n");
3303         return 0;
3304 }
3305
3306 static void be_queue_free(struct beiscsi_hba *phba, struct be_queue_info *q)
3307 {
3308         struct be_dma_mem *mem = &q->dma_mem;
3309         if (mem->va) {
3310                 dma_free_coherent(&phba->pcidev->dev, mem->size,
3311                         mem->va, mem->dma);
3312                 mem->va = NULL;
3313         }
3314 }
3315
3316 static int be_queue_alloc(struct beiscsi_hba *phba, struct be_queue_info *q,
3317                 u16 len, u16 entry_size)
3318 {
3319         struct be_dma_mem *mem = &q->dma_mem;
3320
3321         memset(q, 0, sizeof(*q));
3322         q->len = len;
3323         q->entry_size = entry_size;
3324         mem->size = len * entry_size;
3325         mem->va = dma_alloc_coherent(&phba->pcidev->dev, mem->size, &mem->dma,
3326                                      GFP_KERNEL);
3327         if (!mem->va)
3328                 return -ENOMEM;
3329         return 0;
3330 }
3331
3332 static int
3333 beiscsi_create_wrb_rings(struct beiscsi_hba *phba,
3334                          struct hwi_context_memory *phwi_context,
3335                          struct hwi_controller *phwi_ctrlr)
3336 {
3337         unsigned int num_wrb_rings;
3338         u64 pa_addr_lo;
3339         unsigned int idx, num, i, ulp_num;
3340         struct mem_array *pwrb_arr;
3341         void *wrb_vaddr;
3342         struct be_dma_mem sgl;
3343         struct be_mem_descriptor *mem_descr;
3344         struct hwi_wrb_context *pwrb_context;
3345         int status;
3346         uint8_t ulp_count = 0, ulp_base_num = 0;
3347         uint16_t cid_count_ulp[BEISCSI_ULP_COUNT] = { 0 };
3348
3349         idx = 0;
3350         mem_descr = phba->init_mem;
3351         mem_descr += HWI_MEM_WRB;
3352         pwrb_arr = kmalloc_array(phba->params.cxns_per_ctrl,
3353                                  sizeof(*pwrb_arr),
3354                                  GFP_KERNEL);
3355         if (!pwrb_arr) {
3356                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3357                             "BM_%d : Memory alloc failed in create wrb ring.\n");
3358                 return -ENOMEM;
3359         }
3360         wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3361         pa_addr_lo = mem_descr->mem_array[idx].bus_address.u.a64.address;
3362         num_wrb_rings = mem_descr->mem_array[idx].size /
3363                 (phba->params.wrbs_per_cxn * sizeof(struct iscsi_wrb));
3364
3365         for (num = 0; num < phba->params.cxns_per_ctrl; num++) {
3366                 if (num_wrb_rings) {
3367                         pwrb_arr[num].virtual_address = wrb_vaddr;
3368                         pwrb_arr[num].bus_address.u.a64.address = pa_addr_lo;
3369                         pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3370                                             sizeof(struct iscsi_wrb);
3371                         wrb_vaddr += pwrb_arr[num].size;
3372                         pa_addr_lo += pwrb_arr[num].size;
3373                         num_wrb_rings--;
3374                 } else {
3375                         idx++;
3376                         wrb_vaddr = mem_descr->mem_array[idx].virtual_address;
3377                         pa_addr_lo = mem_descr->mem_array[idx].\
3378                                         bus_address.u.a64.address;
3379                         num_wrb_rings = mem_descr->mem_array[idx].size /
3380                                         (phba->params.wrbs_per_cxn *
3381                                         sizeof(struct iscsi_wrb));
3382                         pwrb_arr[num].virtual_address = wrb_vaddr;
3383                         pwrb_arr[num].bus_address.u.a64.address\
3384                                                 = pa_addr_lo;
3385                         pwrb_arr[num].size = phba->params.wrbs_per_cxn *
3386                                                  sizeof(struct iscsi_wrb);
3387                         wrb_vaddr += pwrb_arr[num].size;
3388                         pa_addr_lo   += pwrb_arr[num].size;
3389                         num_wrb_rings--;
3390                 }
3391         }
3392
3393         /* Get the ULP Count */
3394         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3395                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3396                         ulp_count++;
3397                         ulp_base_num = ulp_num;
3398                         cid_count_ulp[ulp_num] =
3399                                 BEISCSI_GET_CID_COUNT(phba, ulp_num);
3400                 }
3401
3402         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3403                 if (ulp_count > 1) {
3404                         ulp_base_num = (ulp_base_num + 1) % BEISCSI_ULP_COUNT;
3405
3406                         if (!cid_count_ulp[ulp_base_num])
3407                                 ulp_base_num = (ulp_base_num + 1) %
3408                                                 BEISCSI_ULP_COUNT;
3409
3410                         cid_count_ulp[ulp_base_num]--;
3411                 }
3412
3413
3414                 hwi_build_be_sgl_by_offset(phba, &pwrb_arr[i], &sgl);
3415                 status = be_cmd_wrbq_create(&phba->ctrl, &sgl,
3416                                             &phwi_context->be_wrbq[i],
3417                                             &phwi_ctrlr->wrb_context[i],
3418                                             ulp_base_num);
3419                 if (status != 0) {
3420                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3421                                     "BM_%d : wrbq create failed.");
3422                         kfree(pwrb_arr);
3423                         return status;
3424                 }
3425                 pwrb_context = &phwi_ctrlr->wrb_context[i];
3426                 BE_SET_CID_TO_CRI(i, pwrb_context->cid);
3427         }
3428         kfree(pwrb_arr);
3429         return 0;
3430 }
3431
3432 static void free_wrb_handles(struct beiscsi_hba *phba)
3433 {
3434         unsigned int index;
3435         struct hwi_controller *phwi_ctrlr;
3436         struct hwi_wrb_context *pwrb_context;
3437
3438         phwi_ctrlr = phba->phwi_ctrlr;
3439         for (index = 0; index < phba->params.cxns_per_ctrl; index++) {
3440                 pwrb_context = &phwi_ctrlr->wrb_context[index];
3441                 kfree(pwrb_context->pwrb_handle_base);
3442                 kfree(pwrb_context->pwrb_handle_basestd);
3443         }
3444 }
3445
3446 static void be_mcc_queues_destroy(struct beiscsi_hba *phba)
3447 {
3448         struct be_ctrl_info *ctrl = &phba->ctrl;
3449         struct be_dma_mem *ptag_mem;
3450         struct be_queue_info *q;
3451         int i, tag;
3452
3453         q = &phba->ctrl.mcc_obj.q;
3454         for (i = 0; i < MAX_MCC_CMD; i++) {
3455                 tag = i + 1;
3456                 if (!test_bit(MCC_TAG_STATE_RUNNING,
3457                               &ctrl->ptag_state[tag].tag_state))
3458                         continue;
3459
3460                 if (test_bit(MCC_TAG_STATE_TIMEOUT,
3461                              &ctrl->ptag_state[tag].tag_state)) {
3462                         ptag_mem = &ctrl->ptag_state[tag].tag_mem_state;
3463                         if (ptag_mem->size) {
3464                                 dma_free_coherent(&ctrl->pdev->dev,
3465                                                     ptag_mem->size,
3466                                                     ptag_mem->va,
3467                                                     ptag_mem->dma);
3468                                 ptag_mem->size = 0;
3469                         }
3470                         continue;
3471                 }
3472                 /**
3473                  * If MCC is still active and waiting then wake up the process.
3474                  * We are here only because port is going offline. The process
3475                  * sees that (BEISCSI_HBA_ONLINE is cleared) and EIO error is
3476                  * returned for the operation and allocated memory cleaned up.
3477                  */
3478                 if (waitqueue_active(&ctrl->mcc_wait[tag])) {
3479                         ctrl->mcc_tag_status[tag] = MCC_STATUS_FAILED;
3480                         ctrl->mcc_tag_status[tag] |= CQE_VALID_MASK;
3481                         wake_up_interruptible(&ctrl->mcc_wait[tag]);
3482                         /*
3483                          * Control tag info gets reinitialized in enable
3484                          * so wait for the process to clear running state.
3485                          */
3486                         while (test_bit(MCC_TAG_STATE_RUNNING,
3487                                         &ctrl->ptag_state[tag].tag_state))
3488                                 schedule_timeout_uninterruptible(HZ);
3489                 }
3490                 /**
3491                  * For MCC with tag_states MCC_TAG_STATE_ASYNC and
3492                  * MCC_TAG_STATE_IGNORE nothing needs to done.
3493                  */
3494         }
3495         if (q->created) {
3496                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_MCCQ);
3497                 be_queue_free(phba, q);
3498         }
3499
3500         q = &phba->ctrl.mcc_obj.cq;
3501         if (q->created) {
3502                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3503                 be_queue_free(phba, q);
3504         }
3505 }
3506
3507 static int be_mcc_queues_create(struct beiscsi_hba *phba,
3508                                 struct hwi_context_memory *phwi_context)
3509 {
3510         struct be_queue_info *q, *cq;
3511         struct be_ctrl_info *ctrl = &phba->ctrl;
3512
3513         /* Alloc MCC compl queue */
3514         cq = &phba->ctrl.mcc_obj.cq;
3515         if (be_queue_alloc(phba, cq, MCC_CQ_LEN,
3516                         sizeof(struct be_mcc_compl)))
3517                 goto err;
3518         /* Ask BE to create MCC compl queue; */
3519         if (phba->pcidev->msix_enabled) {
3520                 if (beiscsi_cmd_cq_create(ctrl, cq,
3521                                         &phwi_context->be_eq[phba->num_cpus].q,
3522                                         false, true, 0))
3523                         goto mcc_cq_free;
3524         } else {
3525                 if (beiscsi_cmd_cq_create(ctrl, cq, &phwi_context->be_eq[0].q,
3526                                           false, true, 0))
3527                         goto mcc_cq_free;
3528         }
3529
3530         /* Alloc MCC queue */
3531         q = &phba->ctrl.mcc_obj.q;
3532         if (be_queue_alloc(phba, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
3533                 goto mcc_cq_destroy;
3534
3535         /* Ask BE to create MCC queue */
3536         if (beiscsi_cmd_mccq_create(phba, q, cq))
3537                 goto mcc_q_free;
3538
3539         return 0;
3540
3541 mcc_q_free:
3542         be_queue_free(phba, q);
3543 mcc_cq_destroy:
3544         beiscsi_cmd_q_destroy(ctrl, cq, QTYPE_CQ);
3545 mcc_cq_free:
3546         be_queue_free(phba, cq);
3547 err:
3548         return -ENOMEM;
3549 }
3550
3551 static void be2iscsi_enable_msix(struct beiscsi_hba *phba)
3552 {
3553         int nvec = 1;
3554
3555         switch (phba->generation) {
3556         case BE_GEN2:
3557         case BE_GEN3:
3558                 nvec = BEISCSI_MAX_NUM_CPUS + 1;
3559                 break;
3560         case BE_GEN4:
3561                 nvec = phba->fw_config.eqid_count;
3562                 break;
3563         default:
3564                 nvec = 2;
3565                 break;
3566         }
3567
3568         /* if eqid_count == 1 fall back to INTX */
3569         if (enable_msix && nvec > 1) {
3570                 struct irq_affinity desc = { .post_vectors = 1 };
3571
3572                 if (pci_alloc_irq_vectors_affinity(phba->pcidev, 2, nvec,
3573                                 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY, &desc) < 0) {
3574                         phba->num_cpus = nvec - 1;
3575                         return;
3576                 }
3577         }
3578
3579         phba->num_cpus = 1;
3580 }
3581
3582 static void hwi_purge_eq(struct beiscsi_hba *phba)
3583 {
3584         struct hwi_controller *phwi_ctrlr;
3585         struct hwi_context_memory *phwi_context;
3586         struct be_queue_info *eq;
3587         struct be_eq_entry *eqe = NULL;
3588         int i, eq_msix;
3589         unsigned int num_processed;
3590
3591         if (beiscsi_hba_in_error(phba))
3592                 return;
3593
3594         phwi_ctrlr = phba->phwi_ctrlr;
3595         phwi_context = phwi_ctrlr->phwi_ctxt;
3596         if (phba->pcidev->msix_enabled)
3597                 eq_msix = 1;
3598         else
3599                 eq_msix = 0;
3600
3601         for (i = 0; i < (phba->num_cpus + eq_msix); i++) {
3602                 eq = &phwi_context->be_eq[i].q;
3603                 eqe = queue_tail_node(eq);
3604                 num_processed = 0;
3605                 while (eqe->dw[offsetof(struct amap_eq_entry, valid) / 32]
3606                                         & EQE_VALID_MASK) {
3607                         AMAP_SET_BITS(struct amap_eq_entry, valid, eqe, 0);
3608                         queue_tail_inc(eq);
3609                         eqe = queue_tail_node(eq);
3610                         num_processed++;
3611                 }
3612
3613                 if (num_processed)
3614                         hwi_ring_eq_db(phba, eq->id, 1, num_processed, 1, 1);
3615         }
3616 }
3617
3618 static void hwi_cleanup_port(struct beiscsi_hba *phba)
3619 {
3620         struct be_queue_info *q;
3621         struct be_ctrl_info *ctrl = &phba->ctrl;
3622         struct hwi_controller *phwi_ctrlr;
3623         struct hwi_context_memory *phwi_context;
3624         int i, eq_for_mcc, ulp_num;
3625
3626         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3627                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3628                         beiscsi_cmd_iscsi_cleanup(phba, ulp_num);
3629
3630         /**
3631          * Purge all EQ entries that may have been left out. This is to
3632          * workaround a problem we've seen occasionally where driver gets an
3633          * interrupt with EQ entry bit set after stopping the controller.
3634          */
3635         hwi_purge_eq(phba);
3636
3637         phwi_ctrlr = phba->phwi_ctrlr;
3638         phwi_context = phwi_ctrlr->phwi_ctxt;
3639
3640         be_cmd_iscsi_remove_template_hdr(ctrl);
3641
3642         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
3643                 q = &phwi_context->be_wrbq[i];
3644                 if (q->created)
3645                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_WRBQ);
3646         }
3647         kfree(phwi_context->be_wrbq);
3648         free_wrb_handles(phba);
3649
3650         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3651                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3652
3653                         q = &phwi_context->be_def_hdrq[ulp_num];
3654                         if (q->created)
3655                                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3656
3657                         q = &phwi_context->be_def_dataq[ulp_num];
3658                         if (q->created)
3659                                 beiscsi_cmd_q_destroy(ctrl, q, QTYPE_DPDUQ);
3660                 }
3661         }
3662
3663         beiscsi_cmd_q_destroy(ctrl, NULL, QTYPE_SGL);
3664
3665         for (i = 0; i < (phba->num_cpus); i++) {
3666                 q = &phwi_context->be_cq[i];
3667                 if (q->created) {
3668                         be_queue_free(phba, q);
3669                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_CQ);
3670                 }
3671         }
3672
3673         be_mcc_queues_destroy(phba);
3674         if (phba->pcidev->msix_enabled)
3675                 eq_for_mcc = 1;
3676         else
3677                 eq_for_mcc = 0;
3678         for (i = 0; i < (phba->num_cpus + eq_for_mcc); i++) {
3679                 q = &phwi_context->be_eq[i].q;
3680                 if (q->created) {
3681                         be_queue_free(phba, q);
3682                         beiscsi_cmd_q_destroy(ctrl, q, QTYPE_EQ);
3683                 }
3684         }
3685         /* this ensures complete FW cleanup */
3686         beiscsi_cmd_function_reset(phba);
3687         /* last communication, indicate driver is unloading */
3688         beiscsi_cmd_special_wrb(&phba->ctrl, 0);
3689 }
3690
3691 static int hwi_init_port(struct beiscsi_hba *phba)
3692 {
3693         struct hwi_controller *phwi_ctrlr;
3694         struct hwi_context_memory *phwi_context;
3695         unsigned int def_pdu_ring_sz;
3696         struct be_ctrl_info *ctrl = &phba->ctrl;
3697         int status, ulp_num;
3698         u16 nbufs;
3699
3700         phwi_ctrlr = phba->phwi_ctrlr;
3701         phwi_context = phwi_ctrlr->phwi_ctxt;
3702         /* set port optic state to unknown */
3703         phba->optic_state = 0xff;
3704
3705         status = beiscsi_create_eqs(phba, phwi_context);
3706         if (status != 0) {
3707                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3708                             "BM_%d : EQ not created\n");
3709                 goto error;
3710         }
3711
3712         status = be_mcc_queues_create(phba, phwi_context);
3713         if (status != 0)
3714                 goto error;
3715
3716         status = beiscsi_check_supported_fw(ctrl, phba);
3717         if (status != 0) {
3718                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3719                             "BM_%d : Unsupported fw version\n");
3720                 goto error;
3721         }
3722
3723         status = beiscsi_create_cqs(phba, phwi_context);
3724         if (status != 0) {
3725                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3726                             "BM_%d : CQ not created\n");
3727                 goto error;
3728         }
3729
3730         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3731                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3732                         nbufs = phwi_context->pasync_ctx[ulp_num]->num_entries;
3733                         def_pdu_ring_sz = nbufs * sizeof(struct phys_addr);
3734
3735                         status = beiscsi_create_def_hdr(phba, phwi_context,
3736                                                         phwi_ctrlr,
3737                                                         def_pdu_ring_sz,
3738                                                         ulp_num);
3739                         if (status != 0) {
3740                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3741                                             "BM_%d : Default Header not created for ULP : %d\n",
3742                                             ulp_num);
3743                                 goto error;
3744                         }
3745
3746                         status = beiscsi_create_def_data(phba, phwi_context,
3747                                                          phwi_ctrlr,
3748                                                          def_pdu_ring_sz,
3749                                                          ulp_num);
3750                         if (status != 0) {
3751                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3752                                             "BM_%d : Default Data not created for ULP : %d\n",
3753                                             ulp_num);
3754                                 goto error;
3755                         }
3756                         /**
3757                          * Now that the default PDU rings have been created,
3758                          * let EP know about it.
3759                          */
3760                         beiscsi_hdq_post_handles(phba, BEISCSI_DEFQ_HDR,
3761                                                  ulp_num, nbufs);
3762                         beiscsi_hdq_post_handles(phba, BEISCSI_DEFQ_DATA,
3763                                                  ulp_num, nbufs);
3764                 }
3765         }
3766
3767         status = beiscsi_post_pages(phba);
3768         if (status != 0) {
3769                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3770                             "BM_%d : Post SGL Pages Failed\n");
3771                 goto error;
3772         }
3773
3774         status = beiscsi_post_template_hdr(phba);
3775         if (status != 0) {
3776                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3777                             "BM_%d : Template HDR Posting for CXN Failed\n");
3778         }
3779
3780         status = beiscsi_create_wrb_rings(phba, phwi_context, phwi_ctrlr);
3781         if (status != 0) {
3782                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3783                             "BM_%d : WRB Rings not created\n");
3784                 goto error;
3785         }
3786
3787         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3788                 uint16_t async_arr_idx = 0;
3789
3790                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3791                         uint16_t cri = 0;
3792                         struct hd_async_context *pasync_ctx;
3793
3794                         pasync_ctx = HWI_GET_ASYNC_PDU_CTX(
3795                                      phwi_ctrlr, ulp_num);
3796                         for (cri = 0; cri <
3797                              phba->params.cxns_per_ctrl; cri++) {
3798                                 if (ulp_num == BEISCSI_GET_ULP_FROM_CRI
3799                                                (phwi_ctrlr, cri))
3800                                         pasync_ctx->cid_to_async_cri_map[
3801                                         phwi_ctrlr->wrb_context[cri].cid] =
3802                                         async_arr_idx++;
3803                         }
3804                 }
3805         }
3806
3807         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3808                     "BM_%d : hwi_init_port success\n");
3809         return 0;
3810
3811 error:
3812         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3813                     "BM_%d : hwi_init_port failed");
3814         hwi_cleanup_port(phba);
3815         return status;
3816 }
3817
3818 static int hwi_init_controller(struct beiscsi_hba *phba)
3819 {
3820         struct hwi_controller *phwi_ctrlr;
3821
3822         phwi_ctrlr = phba->phwi_ctrlr;
3823         if (1 == phba->init_mem[HWI_MEM_ADDN_CONTEXT].num_elements) {
3824                 phwi_ctrlr->phwi_ctxt = (struct hwi_context_memory *)phba->
3825                     init_mem[HWI_MEM_ADDN_CONTEXT].mem_array[0].virtual_address;
3826                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3827                             "BM_%d :  phwi_ctrlr->phwi_ctxt=%p\n",
3828                             phwi_ctrlr->phwi_ctxt);
3829         } else {
3830                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3831                             "BM_%d : HWI_MEM_ADDN_CONTEXT is more "
3832                             "than one element.Failing to load\n");
3833                 return -ENOMEM;
3834         }
3835
3836         iscsi_init_global_templates(phba);
3837         if (beiscsi_init_wrb_handle(phba))
3838                 return -ENOMEM;
3839
3840         if (hwi_init_async_pdu_ctx(phba)) {
3841                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3842                             "BM_%d : hwi_init_async_pdu_ctx failed\n");
3843                 return -ENOMEM;
3844         }
3845
3846         if (hwi_init_port(phba) != 0) {
3847                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3848                             "BM_%d : hwi_init_controller failed\n");
3849
3850                 return -ENOMEM;
3851         }
3852         return 0;
3853 }
3854
3855 static void beiscsi_free_mem(struct beiscsi_hba *phba)
3856 {
3857         struct be_mem_descriptor *mem_descr;
3858         int i, j;
3859
3860         mem_descr = phba->init_mem;
3861         i = 0;
3862         j = 0;
3863         for (i = 0; i < SE_MEM_MAX; i++) {
3864                 for (j = mem_descr->num_elements; j > 0; j--) {
3865                         dma_free_coherent(&phba->pcidev->dev,
3866                           mem_descr->mem_array[j - 1].size,
3867                           mem_descr->mem_array[j - 1].virtual_address,
3868                           (unsigned long)mem_descr->mem_array[j - 1].
3869                           bus_address.u.a64.address);
3870                 }
3871
3872                 kfree(mem_descr->mem_array);
3873                 mem_descr++;
3874         }
3875         kfree(phba->init_mem);
3876         kfree(phba->phwi_ctrlr->wrb_context);
3877         kfree(phba->phwi_ctrlr);
3878 }
3879
3880 static int beiscsi_init_sgl_handle(struct beiscsi_hba *phba)
3881 {
3882         struct be_mem_descriptor *mem_descr_sglh, *mem_descr_sg;
3883         struct sgl_handle *psgl_handle;
3884         struct iscsi_sge *pfrag;
3885         unsigned int arr_index, i, idx;
3886         unsigned int ulp_icd_start, ulp_num = 0;
3887
3888         phba->io_sgl_hndl_avbl = 0;
3889         phba->eh_sgl_hndl_avbl = 0;
3890
3891         mem_descr_sglh = phba->init_mem;
3892         mem_descr_sglh += HWI_MEM_SGLH;
3893         if (1 == mem_descr_sglh->num_elements) {
3894                 phba->io_sgl_hndl_base = kcalloc(phba->params.ios_per_ctrl,
3895                                                  sizeof(struct sgl_handle *),
3896                                                  GFP_KERNEL);
3897                 if (!phba->io_sgl_hndl_base) {
3898                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3899                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
3900                         return -ENOMEM;
3901                 }
3902                 phba->eh_sgl_hndl_base =
3903                         kcalloc(phba->params.icds_per_ctrl -
3904                                         phba->params.ios_per_ctrl,
3905                                 sizeof(struct sgl_handle *), GFP_KERNEL);
3906                 if (!phba->eh_sgl_hndl_base) {
3907                         kfree(phba->io_sgl_hndl_base);
3908                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3909                                     "BM_%d : Mem Alloc Failed. Failing to load\n");
3910                         return -ENOMEM;
3911                 }
3912         } else {
3913                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
3914                             "BM_%d : HWI_MEM_SGLH is more than one element."
3915                             "Failing to load\n");
3916                 return -ENOMEM;
3917         }
3918
3919         arr_index = 0;
3920         idx = 0;
3921         while (idx < mem_descr_sglh->num_elements) {
3922                 psgl_handle = mem_descr_sglh->mem_array[idx].virtual_address;
3923
3924                 for (i = 0; i < (mem_descr_sglh->mem_array[idx].size /
3925                       sizeof(struct sgl_handle)); i++) {
3926                         if (arr_index < phba->params.ios_per_ctrl) {
3927                                 phba->io_sgl_hndl_base[arr_index] = psgl_handle;
3928                                 phba->io_sgl_hndl_avbl++;
3929                                 arr_index++;
3930                         } else {
3931                                 phba->eh_sgl_hndl_base[arr_index -
3932                                         phba->params.ios_per_ctrl] =
3933                                                                 psgl_handle;
3934                                 arr_index++;
3935                                 phba->eh_sgl_hndl_avbl++;
3936                         }
3937                         psgl_handle++;
3938                 }
3939                 idx++;
3940         }
3941         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3942                     "BM_%d : phba->io_sgl_hndl_avbl=%d"
3943                     "phba->eh_sgl_hndl_avbl=%d\n",
3944                     phba->io_sgl_hndl_avbl,
3945                     phba->eh_sgl_hndl_avbl);
3946
3947         mem_descr_sg = phba->init_mem;
3948         mem_descr_sg += HWI_MEM_SGE;
3949         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
3950                     "\n BM_%d : mem_descr_sg->num_elements=%d\n",
3951                     mem_descr_sg->num_elements);
3952
3953         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3954                 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3955                         break;
3956
3957         ulp_icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
3958
3959         arr_index = 0;
3960         idx = 0;
3961         while (idx < mem_descr_sg->num_elements) {
3962                 pfrag = mem_descr_sg->mem_array[idx].virtual_address;
3963
3964                 for (i = 0;
3965                      i < (mem_descr_sg->mem_array[idx].size) /
3966                      (sizeof(struct iscsi_sge) * phba->params.num_sge_per_io);
3967                      i++) {
3968                         if (arr_index < phba->params.ios_per_ctrl)
3969                                 psgl_handle = phba->io_sgl_hndl_base[arr_index];
3970                         else
3971                                 psgl_handle = phba->eh_sgl_hndl_base[arr_index -
3972                                                 phba->params.ios_per_ctrl];
3973                         psgl_handle->pfrag = pfrag;
3974                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_hi, pfrag, 0);
3975                         AMAP_SET_BITS(struct amap_iscsi_sge, addr_lo, pfrag, 0);
3976                         pfrag += phba->params.num_sge_per_io;
3977                         psgl_handle->sgl_index = ulp_icd_start + arr_index++;
3978                 }
3979                 idx++;
3980         }
3981         phba->io_sgl_free_index = 0;
3982         phba->io_sgl_alloc_index = 0;
3983         phba->eh_sgl_free_index = 0;
3984         phba->eh_sgl_alloc_index = 0;
3985         return 0;
3986 }
3987
3988 static int hba_setup_cid_tbls(struct beiscsi_hba *phba)
3989 {
3990         int ret;
3991         uint16_t i, ulp_num;
3992         struct ulp_cid_info *ptr_cid_info = NULL;
3993
3994         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3995                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
3996                         ptr_cid_info = kzalloc(sizeof(struct ulp_cid_info),
3997                                                GFP_KERNEL);
3998
3999                         if (!ptr_cid_info) {
4000                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4001                                             "BM_%d : Failed to allocate memory"
4002                                             "for ULP_CID_INFO for ULP : %d\n",
4003                                             ulp_num);
4004                                 ret = -ENOMEM;
4005                                 goto free_memory;
4006
4007                         }
4008
4009                         /* Allocate memory for CID array */
4010                         ptr_cid_info->cid_array =
4011                                 kcalloc(BEISCSI_GET_CID_COUNT(phba, ulp_num),
4012                                         sizeof(*ptr_cid_info->cid_array),
4013                                         GFP_KERNEL);
4014                         if (!ptr_cid_info->cid_array) {
4015                                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4016                                             "BM_%d : Failed to allocate memory"
4017                                             "for CID_ARRAY for ULP : %d\n",
4018                                             ulp_num);
4019                                 kfree(ptr_cid_info);
4020                                 ptr_cid_info = NULL;
4021                                 ret = -ENOMEM;
4022
4023                                 goto free_memory;
4024                         }
4025                         ptr_cid_info->avlbl_cids = BEISCSI_GET_CID_COUNT(
4026                                                    phba, ulp_num);
4027
4028                         /* Save the cid_info_array ptr */
4029                         phba->cid_array_info[ulp_num] = ptr_cid_info;
4030                 }
4031         }
4032         phba->ep_array = kcalloc(phba->params.cxns_per_ctrl,
4033                                  sizeof(struct iscsi_endpoint *),
4034                                  GFP_KERNEL);
4035         if (!phba->ep_array) {
4036                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4037                             "BM_%d : Failed to allocate memory in "
4038                             "hba_setup_cid_tbls\n");
4039                 ret = -ENOMEM;
4040
4041                 goto free_memory;
4042         }
4043
4044         phba->conn_table = kcalloc(phba->params.cxns_per_ctrl,
4045                                    sizeof(struct beiscsi_conn *),
4046                                    GFP_KERNEL);
4047         if (!phba->conn_table) {
4048                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4049                             "BM_%d : Failed to allocate memory in"
4050                             "hba_setup_cid_tbls\n");
4051
4052                 kfree(phba->ep_array);
4053                 phba->ep_array = NULL;
4054                 ret = -ENOMEM;
4055
4056                 goto free_memory;
4057         }
4058
4059         for (i = 0; i < phba->params.cxns_per_ctrl; i++) {
4060                 ulp_num = phba->phwi_ctrlr->wrb_context[i].ulp_num;
4061
4062                 ptr_cid_info = phba->cid_array_info[ulp_num];
4063                 ptr_cid_info->cid_array[ptr_cid_info->cid_alloc++] =
4064                         phba->phwi_ctrlr->wrb_context[i].cid;
4065
4066         }
4067
4068         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4069                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4070                         ptr_cid_info = phba->cid_array_info[ulp_num];
4071
4072                         ptr_cid_info->cid_alloc = 0;
4073                         ptr_cid_info->cid_free = 0;
4074                 }
4075         }
4076         return 0;
4077
4078 free_memory:
4079         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4080                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4081                         ptr_cid_info = phba->cid_array_info[ulp_num];
4082
4083                         if (ptr_cid_info) {
4084                                 kfree(ptr_cid_info->cid_array);
4085                                 kfree(ptr_cid_info);
4086                                 phba->cid_array_info[ulp_num] = NULL;
4087                         }
4088                 }
4089         }
4090
4091         return ret;
4092 }
4093
4094 static void hwi_enable_intr(struct beiscsi_hba *phba)
4095 {
4096         struct be_ctrl_info *ctrl = &phba->ctrl;
4097         struct hwi_controller *phwi_ctrlr;
4098         struct hwi_context_memory *phwi_context;
4099         struct be_queue_info *eq;
4100         u8 __iomem *addr;
4101         u32 reg, i;
4102         u32 enabled;
4103
4104         phwi_ctrlr = phba->phwi_ctrlr;
4105         phwi_context = phwi_ctrlr->phwi_ctxt;
4106
4107         addr = (u8 __iomem *) ((u8 __iomem *) ctrl->pcicfg +
4108                         PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
4109         reg = ioread32(addr);
4110
4111         enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4112         if (!enabled) {
4113                 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4114                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4115                             "BM_%d : reg =x%08x addr=%p\n", reg, addr);
4116                 iowrite32(reg, addr);
4117         }
4118
4119         if (!phba->pcidev->msix_enabled) {
4120                 eq = &phwi_context->be_eq[0].q;
4121                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4122                             "BM_%d : eq->id=%d\n", eq->id);
4123
4124                 hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4125         } else {
4126                 for (i = 0; i <= phba->num_cpus; i++) {
4127                         eq = &phwi_context->be_eq[i].q;
4128                         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
4129                                     "BM_%d : eq->id=%d\n", eq->id);
4130                         hwi_ring_eq_db(phba, eq->id, 0, 0, 1, 1);
4131                 }
4132         }
4133 }
4134
4135 static void hwi_disable_intr(struct beiscsi_hba *phba)
4136 {
4137         struct be_ctrl_info *ctrl = &phba->ctrl;
4138
4139         u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
4140         u32 reg = ioread32(addr);
4141
4142         u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4143         if (enabled) {
4144                 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
4145                 iowrite32(reg, addr);
4146         } else
4147                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
4148                             "BM_%d : In hwi_disable_intr, Already Disabled\n");
4149 }
4150
4151 static int beiscsi_init_port(struct beiscsi_hba *phba)
4152 {
4153         int ret;
4154
4155         ret = hwi_init_controller(phba);
4156         if (ret < 0) {
4157                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4158                             "BM_%d : init controller failed\n");
4159                 return ret;
4160         }
4161         ret = beiscsi_init_sgl_handle(phba);
4162         if (ret < 0) {
4163                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4164                             "BM_%d : init sgl handles failed\n");
4165                 goto cleanup_port;
4166         }
4167
4168         ret = hba_setup_cid_tbls(phba);
4169         if (ret < 0) {
4170                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
4171                             "BM_%d : setup CID table failed\n");
4172                 kfree(phba->io_sgl_hndl_base);
4173                 kfree(phba->eh_sgl_hndl_base);
4174                 goto cleanup_port;
4175         }
4176         return ret;
4177
4178 cleanup_port:
4179         hwi_cleanup_port(phba);
4180         return ret;
4181 }
4182
4183 static void beiscsi_cleanup_port(struct beiscsi_hba *phba)
4184 {
4185         struct ulp_cid_info *ptr_cid_info = NULL;
4186         int ulp_num;
4187
4188         kfree(phba->io_sgl_hndl_base);
4189         kfree(phba->eh_sgl_hndl_base);
4190         kfree(phba->ep_array);
4191         kfree(phba->conn_table);
4192
4193         for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4194                 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4195                         ptr_cid_info = phba->cid_array_info[ulp_num];
4196
4197                         if (ptr_cid_info) {
4198                                 kfree(ptr_cid_info->cid_array);
4199                                 kfree(ptr_cid_info);
4200                                 phba->cid_array_info[ulp_num] = NULL;
4201                         }
4202                 }
4203         }
4204 }
4205
4206 /**
4207  * beiscsi_free_mgmt_task_handles()- Free driver CXN resources
4208  * @beiscsi_conn: ptr to the conn to be cleaned up
4209  * @task: ptr to iscsi_task resource to be freed.
4210  *
4211  * Free driver mgmt resources binded to CXN.
4212  **/
4213 void
4214 beiscsi_free_mgmt_task_handles(struct beiscsi_conn *beiscsi_conn,
4215                                 struct iscsi_task *task)
4216 {
4217         struct beiscsi_io_task *io_task;
4218         struct beiscsi_hba *phba = beiscsi_conn->phba;
4219         struct hwi_wrb_context *pwrb_context;
4220         struct hwi_controller *phwi_ctrlr;
4221         uint16_t cri_index = BE_GET_CRI_FROM_CID(
4222                                 beiscsi_conn->beiscsi_conn_cid);
4223
4224         phwi_ctrlr = phba->phwi_ctrlr;
4225         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4226
4227         io_task = task->dd_data;
4228
4229         if (io_task->pwrb_handle) {
4230                 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
4231                 io_task->pwrb_handle = NULL;
4232         }
4233
4234         if (io_task->psgl_handle) {
4235                 free_mgmt_sgl_handle(phba, io_task->psgl_handle);
4236                 io_task->psgl_handle = NULL;
4237         }
4238
4239         if (io_task->mtask_addr) {
4240                 dma_unmap_single(&phba->pcidev->dev,
4241                                  io_task->mtask_addr,
4242                                  io_task->mtask_data_count,
4243                                  DMA_TO_DEVICE);
4244                 io_task->mtask_addr = 0;
4245         }
4246 }
4247
4248 /**
4249  * beiscsi_cleanup_task()- Free driver resources of the task
4250  * @task: ptr to the iscsi task
4251  *
4252  **/
4253 static void beiscsi_cleanup_task(struct iscsi_task *task)
4254 {
4255         struct beiscsi_io_task *io_task = task->dd_data;
4256         struct iscsi_conn *conn = task->conn;
4257         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4258         struct beiscsi_hba *phba = beiscsi_conn->phba;
4259         struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4260         struct hwi_wrb_context *pwrb_context;
4261         struct hwi_controller *phwi_ctrlr;
4262         uint16_t cri_index = BE_GET_CRI_FROM_CID(
4263                              beiscsi_conn->beiscsi_conn_cid);
4264
4265         phwi_ctrlr = phba->phwi_ctrlr;
4266         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4267
4268         if (io_task->cmd_bhs) {
4269                 dma_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4270                               io_task->bhs_pa.u.a64.address);
4271                 io_task->cmd_bhs = NULL;
4272                 task->hdr = NULL;
4273         }
4274
4275         if (task->sc) {
4276                 if (io_task->pwrb_handle) {
4277                         free_wrb_handle(phba, pwrb_context,
4278                                         io_task->pwrb_handle);
4279                         io_task->pwrb_handle = NULL;
4280                 }
4281
4282                 if (io_task->psgl_handle) {
4283                         free_io_sgl_handle(phba, io_task->psgl_handle);
4284                         io_task->psgl_handle = NULL;
4285                 }
4286
4287                 if (io_task->scsi_cmnd) {
4288                         if (io_task->num_sg)
4289                                 scsi_dma_unmap(io_task->scsi_cmnd);
4290                         io_task->scsi_cmnd = NULL;
4291                 }
4292         } else {
4293                 if (!beiscsi_conn->login_in_progress)
4294                         beiscsi_free_mgmt_task_handles(beiscsi_conn, task);
4295         }
4296 }
4297
4298 void
4299 beiscsi_offload_connection(struct beiscsi_conn *beiscsi_conn,
4300                            struct beiscsi_offload_params *params)
4301 {
4302         struct wrb_handle *pwrb_handle;
4303         struct hwi_wrb_context *pwrb_context = NULL;
4304         struct beiscsi_hba *phba = beiscsi_conn->phba;
4305         struct iscsi_task *task = beiscsi_conn->task;
4306         struct iscsi_session *session = task->conn->session;
4307         u32 doorbell = 0;
4308
4309         /*
4310          * We can always use 0 here because it is reserved by libiscsi for
4311          * login/startup related tasks.
4312          */
4313         beiscsi_conn->login_in_progress = 0;
4314         spin_lock_bh(&session->back_lock);
4315         beiscsi_cleanup_task(task);
4316         spin_unlock_bh(&session->back_lock);
4317
4318         pwrb_handle = alloc_wrb_handle(phba, beiscsi_conn->beiscsi_conn_cid,
4319                                        &pwrb_context);
4320
4321         /* Check for the adapter family */
4322         if (is_chip_be2_be3r(phba))
4323                 beiscsi_offload_cxn_v0(params, pwrb_handle,
4324                                        phba->init_mem,
4325                                        pwrb_context);
4326         else
4327                 beiscsi_offload_cxn_v2(params, pwrb_handle,
4328                                        pwrb_context);
4329
4330         be_dws_le_to_cpu(pwrb_handle->pwrb,
4331                          sizeof(struct iscsi_target_context_update_wrb));
4332
4333         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4334         doorbell |= (pwrb_handle->wrb_index & DB_DEF_PDU_WRB_INDEX_MASK)
4335                              << DB_DEF_PDU_WRB_INDEX_SHIFT;
4336         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4337         iowrite32(doorbell, phba->db_va +
4338                   beiscsi_conn->doorbell_offset);
4339
4340         /*
4341          * There is no completion for CONTEXT_UPDATE. The completion of next
4342          * WRB posted guarantees FW's processing and DMA'ing of it.
4343          * Use beiscsi_put_wrb_handle to put it back in the pool which makes
4344          * sure zero'ing or reuse of the WRB only after wrbs_per_cxn.
4345          */
4346         beiscsi_put_wrb_handle(pwrb_context, pwrb_handle,
4347                                phba->params.wrbs_per_cxn);
4348         beiscsi_log(phba, KERN_INFO,
4349                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4350                     "BM_%d : put CONTEXT_UPDATE pwrb_handle=%p free_index=0x%x wrb_handles_available=%d\n",
4351                     pwrb_handle, pwrb_context->free_index,
4352                     pwrb_context->wrb_handles_available);
4353 }
4354
4355 static void beiscsi_parse_pdu(struct iscsi_conn *conn, itt_t itt,
4356                               int *index, int *age)
4357 {
4358         *index = (int)itt;
4359         if (age)
4360                 *age = conn->session->age;
4361 }
4362
4363 /**
4364  * beiscsi_alloc_pdu - allocates pdu and related resources
4365  * @task: libiscsi task
4366  * @opcode: opcode of pdu for task
4367  *
4368  * This is called with the session lock held. It will allocate
4369  * the wrb and sgl if needed for the command. And it will prep
4370  * the pdu's itt. beiscsi_parse_pdu will later translate
4371  * the pdu itt to the libiscsi task itt.
4372  */
4373 static int beiscsi_alloc_pdu(struct iscsi_task *task, uint8_t opcode)
4374 {
4375         struct beiscsi_io_task *io_task = task->dd_data;
4376         struct iscsi_conn *conn = task->conn;
4377         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4378         struct beiscsi_hba *phba = beiscsi_conn->phba;
4379         struct hwi_wrb_context *pwrb_context;
4380         struct hwi_controller *phwi_ctrlr;
4381         itt_t itt;
4382         uint16_t cri_index = 0;
4383         struct beiscsi_session *beiscsi_sess = beiscsi_conn->beiscsi_sess;
4384         dma_addr_t paddr;
4385
4386         io_task->cmd_bhs = dma_pool_alloc(beiscsi_sess->bhs_pool,
4387                                           GFP_ATOMIC, &paddr);
4388         if (!io_task->cmd_bhs)
4389                 return -ENOMEM;
4390         io_task->bhs_pa.u.a64.address = paddr;
4391         io_task->libiscsi_itt = (itt_t)task->itt;
4392         io_task->conn = beiscsi_conn;
4393
4394         task->hdr = (struct iscsi_hdr *)&io_task->cmd_bhs->iscsi_hdr;
4395         task->hdr_max = sizeof(struct be_cmd_bhs);
4396         io_task->psgl_handle = NULL;
4397         io_task->pwrb_handle = NULL;
4398
4399         if (task->sc) {
4400                 io_task->psgl_handle = alloc_io_sgl_handle(phba);
4401                 if (!io_task->psgl_handle) {
4402                         beiscsi_log(phba, KERN_ERR,
4403                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4404                                     "BM_%d : Alloc of IO_SGL_ICD Failed"
4405                                     "for the CID : %d\n",
4406                                     beiscsi_conn->beiscsi_conn_cid);
4407                         goto free_hndls;
4408                 }
4409                 io_task->pwrb_handle = alloc_wrb_handle(phba,
4410                                         beiscsi_conn->beiscsi_conn_cid,
4411                                         &io_task->pwrb_context);
4412                 if (!io_task->pwrb_handle) {
4413                         beiscsi_log(phba, KERN_ERR,
4414                                     BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4415                                     "BM_%d : Alloc of WRB_HANDLE Failed"
4416                                     "for the CID : %d\n",
4417                                     beiscsi_conn->beiscsi_conn_cid);
4418                         goto free_io_hndls;
4419                 }
4420         } else {
4421                 io_task->scsi_cmnd = NULL;
4422                 if ((opcode & ISCSI_OPCODE_MASK) == ISCSI_OP_LOGIN) {
4423                         beiscsi_conn->task = task;
4424                         if (!beiscsi_conn->login_in_progress) {
4425                                 io_task->psgl_handle = (struct sgl_handle *)
4426                                                 alloc_mgmt_sgl_handle(phba);
4427                                 if (!io_task->psgl_handle) {
4428                                         beiscsi_log(phba, KERN_ERR,
4429                                                     BEISCSI_LOG_IO |
4430                                                     BEISCSI_LOG_CONFIG,
4431                                                     "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4432                                                     "for the CID : %d\n",
4433                                                     beiscsi_conn->
4434                                                     beiscsi_conn_cid);
4435                                         goto free_hndls;
4436                                 }
4437
4438                                 beiscsi_conn->login_in_progress = 1;
4439                                 beiscsi_conn->plogin_sgl_handle =
4440                                                         io_task->psgl_handle;
4441                                 io_task->pwrb_handle =
4442                                         alloc_wrb_handle(phba,
4443                                         beiscsi_conn->beiscsi_conn_cid,
4444                                         &io_task->pwrb_context);
4445                                 if (!io_task->pwrb_handle) {
4446                                         beiscsi_log(phba, KERN_ERR,
4447                                                     BEISCSI_LOG_IO |
4448                                                     BEISCSI_LOG_CONFIG,
4449                                                     "BM_%d : Alloc of WRB_HANDLE Failed"
4450                                                     "for the CID : %d\n",
4451                                                     beiscsi_conn->
4452                                                     beiscsi_conn_cid);
4453                                         goto free_mgmt_hndls;
4454                                 }
4455                                 beiscsi_conn->plogin_wrb_handle =
4456                                                         io_task->pwrb_handle;
4457
4458                         } else {
4459                                 io_task->psgl_handle =
4460                                                 beiscsi_conn->plogin_sgl_handle;
4461                                 io_task->pwrb_handle =
4462                                                 beiscsi_conn->plogin_wrb_handle;
4463                         }
4464                 } else {
4465                         io_task->psgl_handle = alloc_mgmt_sgl_handle(phba);
4466                         if (!io_task->psgl_handle) {
4467                                 beiscsi_log(phba, KERN_ERR,
4468                                             BEISCSI_LOG_IO |
4469                                             BEISCSI_LOG_CONFIG,
4470                                             "BM_%d : Alloc of MGMT_SGL_ICD Failed"
4471                                             "for the CID : %d\n",
4472                                             beiscsi_conn->
4473                                             beiscsi_conn_cid);
4474                                 goto free_hndls;
4475                         }
4476                         io_task->pwrb_handle =
4477                                         alloc_wrb_handle(phba,
4478                                         beiscsi_conn->beiscsi_conn_cid,
4479                                         &io_task->pwrb_context);
4480                         if (!io_task->pwrb_handle) {
4481                                 beiscsi_log(phba, KERN_ERR,
4482                                             BEISCSI_LOG_IO | BEISCSI_LOG_CONFIG,
4483                                             "BM_%d : Alloc of WRB_HANDLE Failed"
4484                                             "for the CID : %d\n",
4485                                             beiscsi_conn->beiscsi_conn_cid);
4486                                 goto free_mgmt_hndls;
4487                         }
4488
4489                 }
4490         }
4491         itt = (itt_t) cpu_to_be32(((unsigned int)io_task->pwrb_handle->
4492                                  wrb_index << 16) | (unsigned int)
4493                                 (io_task->psgl_handle->sgl_index));
4494         io_task->pwrb_handle->pio_handle = task;
4495
4496         io_task->cmd_bhs->iscsi_hdr.itt = itt;
4497         return 0;
4498
4499 free_io_hndls:
4500         free_io_sgl_handle(phba, io_task->psgl_handle);
4501         goto free_hndls;
4502 free_mgmt_hndls:
4503         free_mgmt_sgl_handle(phba, io_task->psgl_handle);
4504         io_task->psgl_handle = NULL;
4505 free_hndls:
4506         phwi_ctrlr = phba->phwi_ctrlr;
4507         cri_index = BE_GET_CRI_FROM_CID(
4508         beiscsi_conn->beiscsi_conn_cid);
4509         pwrb_context = &phwi_ctrlr->wrb_context[cri_index];
4510         if (io_task->pwrb_handle)
4511                 free_wrb_handle(phba, pwrb_context, io_task->pwrb_handle);
4512         io_task->pwrb_handle = NULL;
4513         dma_pool_free(beiscsi_sess->bhs_pool, io_task->cmd_bhs,
4514                       io_task->bhs_pa.u.a64.address);
4515         io_task->cmd_bhs = NULL;
4516         return -ENOMEM;
4517 }
4518 static int beiscsi_iotask_v2(struct iscsi_task *task, struct scatterlist *sg,
4519                        unsigned int num_sg, unsigned int xferlen,
4520                        unsigned int writedir)
4521 {
4522
4523         struct beiscsi_io_task *io_task = task->dd_data;
4524         struct iscsi_conn *conn = task->conn;
4525         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4526         struct beiscsi_hba *phba = beiscsi_conn->phba;
4527         struct iscsi_wrb *pwrb = NULL;
4528         unsigned int doorbell = 0;
4529
4530         pwrb = io_task->pwrb_handle->pwrb;
4531
4532         io_task->bhs_len = sizeof(struct be_cmd_bhs);
4533
4534         if (writedir) {
4535                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4536                               INI_WR_CMD);
4537                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 1);
4538         } else {
4539                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, type, pwrb,
4540                               INI_RD_CMD);
4541                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, dsp, pwrb, 0);
4542         }
4543
4544         io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb_v2,
4545                                           type, pwrb);
4546
4547         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, lun, pwrb,
4548                       cpu_to_be16(*(unsigned short *)
4549                       &io_task->cmd_bhs->iscsi_hdr.lun));
4550         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb, xferlen);
4551         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4552                       io_task->pwrb_handle->wrb_index);
4553         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4554                       be32_to_cpu(task->cmdsn));
4555         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4556                       io_task->psgl_handle->sgl_index);
4557
4558         hwi_write_sgl_v2(pwrb, sg, num_sg, io_task);
4559         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4560                       io_task->pwrb_handle->wrb_index);
4561         if (io_task->pwrb_context->plast_wrb)
4562                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb,
4563                               io_task->pwrb_context->plast_wrb,
4564                               io_task->pwrb_handle->wrb_index);
4565         io_task->pwrb_context->plast_wrb = pwrb;
4566
4567         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4568
4569         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4570         doorbell |= (io_task->pwrb_handle->wrb_index &
4571                      DB_DEF_PDU_WRB_INDEX_MASK) <<
4572                      DB_DEF_PDU_WRB_INDEX_SHIFT;
4573         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4574         iowrite32(doorbell, phba->db_va +
4575                   beiscsi_conn->doorbell_offset);
4576         return 0;
4577 }
4578
4579 static int beiscsi_iotask(struct iscsi_task *task, struct scatterlist *sg,
4580                           unsigned int num_sg, unsigned int xferlen,
4581                           unsigned int writedir)
4582 {
4583
4584         struct beiscsi_io_task *io_task = task->dd_data;
4585         struct iscsi_conn *conn = task->conn;
4586         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4587         struct beiscsi_hba *phba = beiscsi_conn->phba;
4588         struct iscsi_wrb *pwrb = NULL;
4589         unsigned int doorbell = 0;
4590
4591         pwrb = io_task->pwrb_handle->pwrb;
4592         io_task->bhs_len = sizeof(struct be_cmd_bhs);
4593
4594         if (writedir) {
4595                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4596                               INI_WR_CMD);
4597                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 1);
4598         } else {
4599                 AMAP_SET_BITS(struct amap_iscsi_wrb, type, pwrb,
4600                               INI_RD_CMD);
4601                 AMAP_SET_BITS(struct amap_iscsi_wrb, dsp, pwrb, 0);
4602         }
4603
4604         io_task->wrb_type = AMAP_GET_BITS(struct amap_iscsi_wrb,
4605                                           type, pwrb);
4606
4607         AMAP_SET_BITS(struct amap_iscsi_wrb, lun, pwrb,
4608                       cpu_to_be16(*(unsigned short *)
4609                                   &io_task->cmd_bhs->iscsi_hdr.lun));
4610         AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb, xferlen);
4611         AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4612                       io_task->pwrb_handle->wrb_index);
4613         AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4614                       be32_to_cpu(task->cmdsn));
4615         AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4616                       io_task->psgl_handle->sgl_index);
4617
4618         hwi_write_sgl(pwrb, sg, num_sg, io_task);
4619
4620         AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4621                       io_task->pwrb_handle->wrb_index);
4622         if (io_task->pwrb_context->plast_wrb)
4623                 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb,
4624                               io_task->pwrb_context->plast_wrb,
4625                               io_task->pwrb_handle->wrb_index);
4626         io_task->pwrb_context->plast_wrb = pwrb;
4627
4628         be_dws_le_to_cpu(pwrb, sizeof(struct iscsi_wrb));
4629
4630         doorbell |= beiscsi_conn->beiscsi_conn_cid & DB_WRB_POST_CID_MASK;
4631         doorbell |= (io_task->pwrb_handle->wrb_index &
4632                      DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4633         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4634
4635         iowrite32(doorbell, phba->db_va +
4636                   beiscsi_conn->doorbell_offset);
4637         return 0;
4638 }
4639
4640 static int beiscsi_mtask(struct iscsi_task *task)
4641 {
4642         struct beiscsi_io_task *io_task = task->dd_data;
4643         struct iscsi_conn *conn = task->conn;
4644         struct beiscsi_conn *beiscsi_conn = conn->dd_data;
4645         struct beiscsi_hba *phba = beiscsi_conn->phba;
4646         struct iscsi_wrb *pwrb = NULL;
4647         unsigned int doorbell = 0;
4648         unsigned int cid;
4649         unsigned int pwrb_typeoffset = 0;
4650         int ret = 0;
4651
4652         cid = beiscsi_conn->beiscsi_conn_cid;
4653         pwrb = io_task->pwrb_handle->pwrb;
4654
4655         if (is_chip_be2_be3r(phba)) {
4656                 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb,
4657                               be32_to_cpu(task->cmdsn));
4658                 AMAP_SET_BITS(struct amap_iscsi_wrb, wrb_idx, pwrb,
4659                               io_task->pwrb_handle->wrb_index);
4660                 AMAP_SET_BITS(struct amap_iscsi_wrb, sgl_icd_idx, pwrb,
4661                               io_task->psgl_handle->sgl_index);
4662                 AMAP_SET_BITS(struct amap_iscsi_wrb, r2t_exp_dtl, pwrb,
4663                               task->data_count);
4664                 AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb, pwrb,
4665                               io_task->pwrb_handle->wrb_index);
4666                 if (io_task->pwrb_context->plast_wrb)
4667                         AMAP_SET_BITS(struct amap_iscsi_wrb, ptr2nextwrb,
4668                                       io_task->pwrb_context->plast_wrb,
4669                                       io_task->pwrb_handle->wrb_index);
4670                 io_task->pwrb_context->plast_wrb = pwrb;
4671
4672                 pwrb_typeoffset = BE_WRB_TYPE_OFFSET;
4673         } else {
4674                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, cmdsn_itt, pwrb,
4675                               be32_to_cpu(task->cmdsn));
4676                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, wrb_idx, pwrb,
4677                               io_task->pwrb_handle->wrb_index);
4678                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, sgl_idx, pwrb,
4679                               io_task->psgl_handle->sgl_index);
4680                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, r2t_exp_dtl, pwrb,
4681                               task->data_count);
4682                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb, pwrb,
4683                               io_task->pwrb_handle->wrb_index);
4684                 if (io_task->pwrb_context->plast_wrb)
4685                         AMAP_SET_BITS(struct amap_iscsi_wrb_v2, ptr2nextwrb,
4686                                       io_task->pwrb_context->plast_wrb,
4687                                       io_task->pwrb_handle->wrb_index);
4688                 io_task->pwrb_context->plast_wrb = pwrb;
4689
4690                 pwrb_typeoffset = SKH_WRB_TYPE_OFFSET;
4691         }
4692
4693
4694         switch (task->hdr->opcode & ISCSI_OPCODE_MASK) {
4695         case ISCSI_OP_LOGIN:
4696                 AMAP_SET_BITS(struct amap_iscsi_wrb, cmdsn_itt, pwrb, 1);
4697                 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
4698                 ret = hwi_write_buffer(pwrb, task);
4699                 break;
4700         case ISCSI_OP_NOOP_OUT:
4701                 if (task->hdr->ttt != ISCSI_RESERVED_TAG) {
4702                         ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
4703                         if (is_chip_be2_be3r(phba))
4704                                 AMAP_SET_BITS(struct amap_iscsi_wrb,
4705                                               dmsg, pwrb, 1);
4706                         else
4707                                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
4708                                               dmsg, pwrb, 1);
4709                 } else {
4710                         ADAPTER_SET_WRB_TYPE(pwrb, INI_RD_CMD, pwrb_typeoffset);
4711                         if (is_chip_be2_be3r(phba))
4712                                 AMAP_SET_BITS(struct amap_iscsi_wrb,
4713                                               dmsg, pwrb, 0);
4714                         else
4715                                 AMAP_SET_BITS(struct amap_iscsi_wrb_v2,
4716                                               dmsg, pwrb, 0);
4717                 }
4718                 ret = hwi_write_buffer(pwrb, task);
4719                 break;
4720         case ISCSI_OP_TEXT:
4721                 ADAPTER_SET_WRB_TYPE(pwrb, TGT_DM_CMD, pwrb_typeoffset);
4722                 ret = hwi_write_buffer(pwrb, task);
4723                 break;
4724         case ISCSI_OP_SCSI_TMFUNC:
4725                 ADAPTER_SET_WRB_TYPE(pwrb, INI_TMF_CMD, pwrb_typeoffset);
4726                 ret = hwi_write_buffer(pwrb, task);
4727                 break;
4728         case ISCSI_OP_LOGOUT:
4729                 ADAPTER_SET_WRB_TYPE(pwrb, HWH_TYPE_LOGOUT, pwrb_typeoffset);
4730                 ret = hwi_write_buffer(pwrb, task);
4731                 break;
4732
4733         default:
4734                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4735                             "BM_%d : opcode =%d Not supported\n",
4736                             task->hdr->opcode & ISCSI_OPCODE_MASK);
4737
4738                 return -EINVAL;
4739         }
4740
4741         if (ret)
4742                 return ret;
4743
4744         /* Set the task type */
4745         io_task->wrb_type = (is_chip_be2_be3r(phba)) ?
4746                 AMAP_GET_BITS(struct amap_iscsi_wrb, type, pwrb) :
4747                 AMAP_GET_BITS(struct amap_iscsi_wrb_v2, type, pwrb);
4748
4749         doorbell |= cid & DB_WRB_POST_CID_MASK;
4750         doorbell |= (io_task->pwrb_handle->wrb_index &
4751                      DB_DEF_PDU_WRB_INDEX_MASK) << DB_DEF_PDU_WRB_INDEX_SHIFT;
4752         doorbell |= 1 << DB_DEF_PDU_NUM_POSTED_SHIFT;
4753         iowrite32(doorbell, phba->db_va +
4754                   beiscsi_conn->doorbell_offset);
4755         return 0;
4756 }
4757
4758 static int beiscsi_task_xmit(struct iscsi_task *task)
4759 {
4760         struct beiscsi_io_task *io_task = task->dd_data;
4761         struct scsi_cmnd *sc = task->sc;
4762         struct beiscsi_hba *phba;
4763         struct scatterlist *sg;
4764         int num_sg;
4765         unsigned int  writedir = 0, xferlen = 0;
4766
4767         phba = io_task->conn->phba;
4768         /**
4769          * HBA in error includes BEISCSI_HBA_FW_TIMEOUT. IO path might be
4770          * operational if FW still gets heartbeat from EP FW. Is management
4771          * path really needed to continue further?
4772          */
4773         if (!beiscsi_hba_is_online(phba))
4774                 return -EIO;
4775
4776         if (!io_task->conn->login_in_progress)
4777                 task->hdr->exp_statsn = 0;
4778
4779         if (!sc)
4780                 return beiscsi_mtask(task);
4781
4782         io_task->scsi_cmnd = sc;
4783         io_task->num_sg = 0;
4784         num_sg = scsi_dma_map(sc);
4785         if (num_sg < 0) {
4786                 beiscsi_log(phba, KERN_ERR,
4787                             BEISCSI_LOG_IO | BEISCSI_LOG_ISCSI,
4788                             "BM_%d : scsi_dma_map Failed "
4789                             "Driver_ITT : 0x%x ITT : 0x%x Xferlen : 0x%x\n",
4790                             be32_to_cpu(io_task->cmd_bhs->iscsi_hdr.itt),
4791                             io_task->libiscsi_itt, scsi_bufflen(sc));
4792
4793                 return num_sg;
4794         }
4795         /**
4796          * For scsi cmd task, check num_sg before unmapping in cleanup_task.
4797          * For management task, cleanup_task checks mtask_addr before unmapping.
4798          */
4799         io_task->num_sg = num_sg;
4800         xferlen = scsi_bufflen(sc);
4801         sg = scsi_sglist(sc);
4802         if (sc->sc_data_direction == DMA_TO_DEVICE)
4803                 writedir = 1;
4804         else
4805                 writedir = 0;
4806
4807         return phba->iotask_fn(task, sg, num_sg, xferlen, writedir);
4808 }
4809
4810 /**
4811  * beiscsi_bsg_request - handle bsg request from ISCSI transport
4812  * @job: job to handle
4813  */
4814 static int beiscsi_bsg_request(struct bsg_job *job)
4815 {
4816         struct Scsi_Host *shost;
4817         struct beiscsi_hba *phba;
4818         struct iscsi_bsg_request *bsg_req = job->request;
4819         int rc = -EINVAL;
4820         unsigned int tag;
4821         struct be_dma_mem nonemb_cmd;
4822         struct be_cmd_resp_hdr *resp;
4823         struct iscsi_bsg_reply *bsg_reply = job->reply;
4824         unsigned short status, extd_status;
4825
4826         shost = iscsi_job_to_shost(job);
4827         phba = iscsi_host_priv(shost);
4828
4829         if (!beiscsi_hba_is_online(phba)) {
4830                 beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_CONFIG,
4831                             "BM_%d : HBA in error 0x%lx\n", phba->state);
4832                 return -ENXIO;
4833         }
4834
4835         switch (bsg_req->msgcode) {
4836         case ISCSI_BSG_HST_VENDOR:
4837                 nonemb_cmd.va = dma_alloc_coherent(&phba->ctrl.pdev->dev,
4838                                         job->request_payload.payload_len,
4839                                         &nonemb_cmd.dma, GFP_KERNEL);
4840                 if (nonemb_cmd.va == NULL) {
4841                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4842                                     "BM_%d : Failed to allocate memory for "
4843                                     "beiscsi_bsg_request\n");
4844                         return -ENOMEM;
4845                 }
4846                 tag = mgmt_vendor_specific_fw_cmd(&phba->ctrl, phba, job,
4847                                                   &nonemb_cmd);
4848                 if (!tag) {
4849                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4850                                     "BM_%d : MBX Tag Allocation Failed\n");
4851
4852                         dma_free_coherent(&phba->ctrl.pdev->dev, nonemb_cmd.size,
4853                                             nonemb_cmd.va, nonemb_cmd.dma);
4854                         return -EAGAIN;
4855                 }
4856
4857                 rc = wait_event_interruptible_timeout(
4858                                         phba->ctrl.mcc_wait[tag],
4859                                         phba->ctrl.mcc_tag_status[tag],
4860                                         msecs_to_jiffies(
4861                                         BEISCSI_HOST_MBX_TIMEOUT));
4862
4863                 if (!test_bit(BEISCSI_HBA_ONLINE, &phba->state)) {
4864                         clear_bit(MCC_TAG_STATE_RUNNING,
4865                                   &phba->ctrl.ptag_state[tag].tag_state);
4866                         dma_free_coherent(&phba->ctrl.pdev->dev, nonemb_cmd.size,
4867                                             nonemb_cmd.va, nonemb_cmd.dma);
4868                         return -EIO;
4869                 }
4870                 extd_status = (phba->ctrl.mcc_tag_status[tag] &
4871                                CQE_STATUS_ADDL_MASK) >> CQE_STATUS_ADDL_SHIFT;
4872                 status = phba->ctrl.mcc_tag_status[tag] & CQE_STATUS_MASK;
4873                 free_mcc_wrb(&phba->ctrl, tag);
4874                 resp = (struct be_cmd_resp_hdr *)nonemb_cmd.va;
4875                 sg_copy_from_buffer(job->reply_payload.sg_list,
4876                                     job->reply_payload.sg_cnt,
4877                                     nonemb_cmd.va, (resp->response_length
4878                                     + sizeof(*resp)));
4879                 bsg_reply->reply_payload_rcv_len = resp->response_length;
4880                 bsg_reply->result = status;
4881                 bsg_job_done(job, bsg_reply->result,
4882                              bsg_reply->reply_payload_rcv_len);
4883                 dma_free_coherent(&phba->ctrl.pdev->dev, nonemb_cmd.size,
4884                                     nonemb_cmd.va, nonemb_cmd.dma);
4885                 if (status || extd_status) {
4886                         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4887                                     "BM_%d : MBX Cmd Failed"
4888                                     " status = %d extd_status = %d\n",
4889                                     status, extd_status);
4890
4891                         return -EIO;
4892                 } else {
4893                         rc = 0;
4894                 }
4895                 break;
4896
4897         default:
4898                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_CONFIG,
4899                                 "BM_%d : Unsupported bsg command: 0x%x\n",
4900                                 bsg_req->msgcode);
4901                 break;
4902         }
4903
4904         return rc;
4905 }
4906
4907 static void beiscsi_hba_attrs_init(struct beiscsi_hba *phba)
4908 {
4909         /* Set the logging parameter */
4910         beiscsi_log_enable_init(phba, beiscsi_log_enable);
4911 }
4912
4913 void beiscsi_start_boot_work(struct beiscsi_hba *phba, unsigned int s_handle)
4914 {
4915         if (phba->boot_struct.boot_kset)
4916                 return;
4917
4918         /* skip if boot work is already in progress */
4919         if (test_and_set_bit(BEISCSI_HBA_BOOT_WORK, &phba->state))
4920                 return;
4921
4922         phba->boot_struct.retry = 3;
4923         phba->boot_struct.tag = 0;
4924         phba->boot_struct.s_handle = s_handle;
4925         phba->boot_struct.action = BEISCSI_BOOT_GET_SHANDLE;
4926         schedule_work(&phba->boot_work);
4927 }
4928
4929 /**
4930  * Boot flag info for iscsi-utilities
4931  * Bit 0 Block valid flag
4932  * Bit 1 Firmware booting selected
4933  */
4934 #define BEISCSI_SYSFS_ISCSI_BOOT_FLAGS  3
4935
4936 static ssize_t beiscsi_show_boot_tgt_info(void *data, int type, char *buf)
4937 {
4938         struct beiscsi_hba *phba = data;
4939         struct mgmt_session_info *boot_sess = &phba->boot_struct.boot_sess;
4940         struct mgmt_conn_info *boot_conn = &boot_sess->conn_list[0];
4941         char *str = buf;
4942         int rc = -EPERM;
4943
4944         switch (type) {
4945         case ISCSI_BOOT_TGT_NAME:
4946                 rc = sprintf(buf, "%.*s\n",
4947                             (int)strlen(boot_sess->target_name),
4948                             (char *)&boot_sess->target_name);
4949                 break;
4950         case ISCSI_BOOT_TGT_IP_ADDR:
4951                 if (boot_conn->dest_ipaddr.ip_type == BEISCSI_IP_TYPE_V4)
4952                         rc = sprintf(buf, "%pI4\n",
4953                                 (char *)&boot_conn->dest_ipaddr.addr);
4954                 else
4955                         rc = sprintf(str, "%pI6\n",
4956                                 (char *)&boot_conn->dest_ipaddr.addr);
4957                 break;
4958         case ISCSI_BOOT_TGT_PORT:
4959                 rc = sprintf(str, "%d\n", boot_conn->dest_port);
4960                 break;
4961
4962         case ISCSI_BOOT_TGT_CHAP_NAME:
4963                 rc = sprintf(str,  "%.*s\n",
4964                              boot_conn->negotiated_login_options.auth_data.chap.
4965                              target_chap_name_length,
4966                              (char *)&boot_conn->negotiated_login_options.
4967                              auth_data.chap.target_chap_name);
4968                 break;
4969         case ISCSI_BOOT_TGT_CHAP_SECRET:
4970                 rc = sprintf(str,  "%.*s\n",
4971                              boot_conn->negotiated_login_options.auth_data.chap.
4972                              target_secret_length,
4973                              (char *)&boot_conn->negotiated_login_options.
4974                              auth_data.chap.target_secret);
4975                 break;
4976         case ISCSI_BOOT_TGT_REV_CHAP_NAME:
4977                 rc = sprintf(str,  "%.*s\n",
4978                              boot_conn->negotiated_login_options.auth_data.chap.
4979                              intr_chap_name_length,
4980                              (char *)&boot_conn->negotiated_login_options.
4981                              auth_data.chap.intr_chap_name);
4982                 break;
4983         case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
4984                 rc = sprintf(str,  "%.*s\n",
4985                              boot_conn->negotiated_login_options.auth_data.chap.
4986                              intr_secret_length,
4987                              (char *)&boot_conn->negotiated_login_options.
4988                              auth_data.chap.intr_secret);
4989                 break;
4990         case ISCSI_BOOT_TGT_FLAGS:
4991                 rc = sprintf(str, "%d\n", BEISCSI_SYSFS_ISCSI_BOOT_FLAGS);
4992                 break;
4993         case ISCSI_BOOT_TGT_NIC_ASSOC:
4994                 rc = sprintf(str, "0\n");
4995                 break;
4996         }
4997         return rc;
4998 }
4999
5000 static ssize_t beiscsi_show_boot_ini_info(void *data, int type, char *buf)
5001 {
5002         struct beiscsi_hba *phba = data;
5003         char *str = buf;
5004         int rc = -EPERM;
5005
5006         switch (type) {
5007         case ISCSI_BOOT_INI_INITIATOR_NAME:
5008                 rc = sprintf(str, "%s\n",
5009                              phba->boot_struct.boot_sess.initiator_iscsiname);
5010                 break;
5011         }
5012         return rc;
5013 }
5014
5015 static ssize_t beiscsi_show_boot_eth_info(void *data, int type, char *buf)
5016 {
5017         struct beiscsi_hba *phba = data;
5018         char *str = buf;
5019         int rc = -EPERM;
5020
5021         switch (type) {
5022         case ISCSI_BOOT_ETH_FLAGS:
5023                 rc = sprintf(str, "%d\n", BEISCSI_SYSFS_ISCSI_BOOT_FLAGS);
5024                 break;
5025         case ISCSI_BOOT_ETH_INDEX:
5026                 rc = sprintf(str, "0\n");
5027                 break;
5028         case ISCSI_BOOT_ETH_MAC:
5029                 rc  = beiscsi_get_macaddr(str, phba);
5030                 break;
5031         }
5032         return rc;
5033 }
5034
5035 static umode_t beiscsi_tgt_get_attr_visibility(void *data, int type)
5036 {
5037         umode_t rc = 0;
5038
5039         switch (type) {
5040         case ISCSI_BOOT_TGT_NAME:
5041         case ISCSI_BOOT_TGT_IP_ADDR:
5042         case ISCSI_BOOT_TGT_PORT:
5043         case ISCSI_BOOT_TGT_CHAP_NAME:
5044         case ISCSI_BOOT_TGT_CHAP_SECRET:
5045         case ISCSI_BOOT_TGT_REV_CHAP_NAME:
5046         case ISCSI_BOOT_TGT_REV_CHAP_SECRET:
5047         case ISCSI_BOOT_TGT_NIC_ASSOC:
5048         case ISCSI_BOOT_TGT_FLAGS:
5049                 rc = S_IRUGO;
5050                 break;
5051         }
5052         return rc;
5053 }
5054
5055 static umode_t beiscsi_ini_get_attr_visibility(void *data, int type)
5056 {
5057         umode_t rc = 0;
5058
5059         switch (type) {
5060         case ISCSI_BOOT_INI_INITIATOR_NAME:
5061                 rc = S_IRUGO;
5062                 break;
5063         }
5064         return rc;
5065 }
5066
5067 static umode_t beiscsi_eth_get_attr_visibility(void *data, int type)
5068 {
5069         umode_t rc = 0;
5070
5071         switch (type) {
5072         case ISCSI_BOOT_ETH_FLAGS:
5073         case ISCSI_BOOT_ETH_MAC:
5074         case ISCSI_BOOT_ETH_INDEX:
5075                 rc = S_IRUGO;
5076                 break;
5077         }
5078         return rc;
5079 }
5080
5081 static void beiscsi_boot_kobj_release(void *data)
5082 {
5083         struct beiscsi_hba *phba = data;
5084
5085         scsi_host_put(phba->shost);
5086 }
5087
5088 static int beiscsi_boot_create_kset(struct beiscsi_hba *phba)
5089 {
5090         struct boot_struct *bs = &phba->boot_struct;
5091         struct iscsi_boot_kobj *boot_kobj;
5092
5093         if (bs->boot_kset) {
5094                 __beiscsi_log(phba, KERN_ERR,
5095                               "BM_%d: boot_kset already created\n");
5096                 return 0;
5097         }
5098
5099         bs->boot_kset = iscsi_boot_create_host_kset(phba->shost->host_no);
5100         if (!bs->boot_kset) {
5101                 __beiscsi_log(phba, KERN_ERR,
5102                               "BM_%d: boot_kset alloc failed\n");
5103                 return -ENOMEM;
5104         }
5105
5106         /* get shost ref because the show function will refer phba */
5107         if (!scsi_host_get(phba->shost))
5108                 goto free_kset;
5109
5110         boot_kobj = iscsi_boot_create_target(bs->boot_kset, 0, phba,
5111                                              beiscsi_show_boot_tgt_info,
5112                                              beiscsi_tgt_get_attr_visibility,
5113                                              beiscsi_boot_kobj_release);
5114         if (!boot_kobj)
5115                 goto put_shost;
5116
5117         if (!scsi_host_get(phba->shost))
5118                 goto free_kset;
5119
5120         boot_kobj = iscsi_boot_create_initiator(bs->boot_kset, 0, phba,
5121                                                 beiscsi_show_boot_ini_info,
5122                                                 beiscsi_ini_get_attr_visibility,
5123                                                 beiscsi_boot_kobj_release);
5124         if (!boot_kobj)
5125                 goto put_shost;
5126
5127         if (!scsi_host_get(phba->shost))
5128                 goto free_kset;
5129
5130         boot_kobj = iscsi_boot_create_ethernet(bs->boot_kset, 0, phba,
5131                                                beiscsi_show_boot_eth_info,
5132                                                beiscsi_eth_get_attr_visibility,
5133                                                beiscsi_boot_kobj_release);
5134         if (!boot_kobj)
5135                 goto put_shost;
5136
5137         return 0;
5138
5139 put_shost:
5140         scsi_host_put(phba->shost);
5141 free_kset:
5142         iscsi_boot_destroy_kset(bs->boot_kset);
5143         bs->boot_kset = NULL;
5144         return -ENOMEM;
5145 }
5146
5147 static void beiscsi_boot_work(struct work_struct *work)
5148 {
5149         struct beiscsi_hba *phba =
5150                 container_of(work, struct beiscsi_hba, boot_work);
5151         struct boot_struct *bs = &phba->boot_struct;
5152         unsigned int tag = 0;
5153
5154         if (!beiscsi_hba_is_online(phba))
5155                 return;
5156
5157         beiscsi_log(phba, KERN_INFO,
5158                     BEISCSI_LOG_CONFIG | BEISCSI_LOG_MBOX,
5159                     "BM_%d : %s action %d\n",
5160                     __func__, phba->boot_struct.action);
5161
5162         switch (phba->boot_struct.action) {
5163         case BEISCSI_BOOT_REOPEN_SESS:
5164                 tag = beiscsi_boot_reopen_sess(phba);
5165                 break;
5166         case BEISCSI_BOOT_GET_SHANDLE:
5167                 tag = __beiscsi_boot_get_shandle(phba, 1);
5168                 break;
5169         case BEISCSI_BOOT_GET_SINFO:
5170                 tag = beiscsi_boot_get_sinfo(phba);
5171                 break;
5172         case BEISCSI_BOOT_LOGOUT_SESS:
5173                 tag = beiscsi_boot_logout_sess(phba);
5174                 break;
5175         case BEISCSI_BOOT_CREATE_KSET:
5176                 beiscsi_boot_create_kset(phba);
5177                 /**
5178                  * updated boot_kset is made visible to all before
5179                  * ending the boot work.
5180                  */
5181                 mb();
5182                 clear_bit(BEISCSI_HBA_BOOT_WORK, &phba->state);
5183                 return;
5184         }
5185         if (!tag) {
5186                 if (bs->retry--)
5187                         schedule_work(&phba->boot_work);
5188                 else
5189                         clear_bit(BEISCSI_HBA_BOOT_WORK, &phba->state);
5190         }
5191 }
5192
5193 static void beiscsi_eqd_update_work(struct work_struct *work)
5194 {
5195         struct hwi_context_memory *phwi_context;
5196         struct be_set_eqd set_eqd[MAX_CPUS];
5197         struct hwi_controller *phwi_ctrlr;
5198         struct be_eq_obj *pbe_eq;
5199         struct beiscsi_hba *phba;
5200         unsigned int pps, delta;
5201         struct be_aic_obj *aic;
5202         int eqd, i, num = 0;
5203         unsigned long now;
5204
5205         phba = container_of(work, struct beiscsi_hba, eqd_update.work);
5206         if (!beiscsi_hba_is_online(phba))
5207                 return;
5208
5209         phwi_ctrlr = phba->phwi_ctrlr;
5210         phwi_context = phwi_ctrlr->phwi_ctxt;
5211
5212         for (i = 0; i <= phba->num_cpus; i++) {
5213                 aic = &phba->aic_obj[i];
5214                 pbe_eq = &phwi_context->be_eq[i];
5215                 now = jiffies;
5216                 if (!aic->jiffies || time_before(now, aic->jiffies) ||
5217                     pbe_eq->cq_count < aic->eq_prev) {
5218                         aic->jiffies = now;
5219                         aic->eq_prev = pbe_eq->cq_count;
5220                         continue;
5221                 }
5222                 delta = jiffies_to_msecs(now - aic->jiffies);
5223                 pps = (((u32)(pbe_eq->cq_count - aic->eq_prev) * 1000) / delta);
5224                 eqd = (pps / 1500) << 2;
5225
5226                 if (eqd < 8)
5227                         eqd = 0;
5228                 eqd = min_t(u32, eqd, BEISCSI_EQ_DELAY_MAX);
5229                 eqd = max_t(u32, eqd, BEISCSI_EQ_DELAY_MIN);
5230
5231                 aic->jiffies = now;
5232                 aic->eq_prev = pbe_eq->cq_count;
5233
5234                 if (eqd != aic->prev_eqd) {
5235                         set_eqd[num].delay_multiplier = (eqd * 65)/100;
5236                         set_eqd[num].eq_id = pbe_eq->q.id;
5237                         aic->prev_eqd = eqd;
5238                         num++;
5239                 }
5240         }
5241         if (num)
5242                 /* completion of this is ignored */
5243                 beiscsi_modify_eq_delay(phba, set_eqd, num);
5244
5245         schedule_delayed_work(&phba->eqd_update,
5246                               msecs_to_jiffies(BEISCSI_EQD_UPDATE_INTERVAL));
5247 }
5248
5249 static void beiscsi_hw_tpe_check(struct timer_list *t)
5250 {
5251         struct beiscsi_hba *phba = from_timer(phba, t, hw_check);
5252         u32 wait;
5253
5254         /* if not TPE, do nothing */
5255         if (!beiscsi_detect_tpe(phba))
5256                 return;
5257
5258         /* wait default 4000ms before recovering */
5259         wait = 4000;
5260         if (phba->ue2rp > BEISCSI_UE_DETECT_INTERVAL)
5261                 wait = phba->ue2rp - BEISCSI_UE_DETECT_INTERVAL;
5262         queue_delayed_work(phba->wq, &phba->recover_port,
5263                            msecs_to_jiffies(wait));
5264 }
5265
5266 static void beiscsi_hw_health_check(struct timer_list *t)
5267 {
5268         struct beiscsi_hba *phba = from_timer(phba, t, hw_check);
5269
5270         beiscsi_detect_ue(phba);
5271         if (beiscsi_detect_ue(phba)) {
5272                 __beiscsi_log(phba, KERN_ERR,
5273                               "BM_%d : port in error: %lx\n", phba->state);
5274                 /* sessions are no longer valid, so first fail the sessions */
5275                 queue_work(phba->wq, &phba->sess_work);
5276
5277                 /* detect UER supported */
5278                 if (!test_bit(BEISCSI_HBA_UER_SUPP, &phba->state))
5279                         return;
5280                 /* modify this timer to check TPE */
5281                 phba->hw_check.function = beiscsi_hw_tpe_check;
5282         }
5283
5284         mod_timer(&phba->hw_check,
5285                   jiffies + msecs_to_jiffies(BEISCSI_UE_DETECT_INTERVAL));
5286 }
5287
5288 /*
5289  * beiscsi_enable_port()- Enables the disabled port.
5290  * Only port resources freed in disable function are reallocated.
5291  * This is called in HBA error handling path.
5292  *
5293  * @phba: Instance of driver private structure
5294  *
5295  **/
5296 static int beiscsi_enable_port(struct beiscsi_hba *phba)
5297 {
5298         struct hwi_context_memory *phwi_context;
5299         struct hwi_controller *phwi_ctrlr;
5300         struct be_eq_obj *pbe_eq;
5301         int ret, i;
5302
5303         if (test_bit(BEISCSI_HBA_ONLINE, &phba->state)) {
5304                 __beiscsi_log(phba, KERN_ERR,
5305                               "BM_%d : %s : port is online %lx\n",
5306                               __func__, phba->state);
5307                 return 0;
5308         }
5309
5310         ret = beiscsi_init_sliport(phba);
5311         if (ret)
5312                 return ret;
5313
5314         be2iscsi_enable_msix(phba);
5315
5316         beiscsi_get_params(phba);
5317         beiscsi_set_host_data(phba);
5318         /* Re-enable UER. If different TPE occurs then it is recoverable. */
5319         beiscsi_set_uer_feature(phba);
5320
5321         phba->shost->max_id = phba->params.cxns_per_ctrl;
5322         phba->shost->can_queue = phba->params.ios_per_ctrl;
5323         ret = beiscsi_init_port(phba);
5324         if (ret < 0) {
5325                 __beiscsi_log(phba, KERN_ERR,
5326                               "BM_%d : init port failed\n");
5327                 goto disable_msix;
5328         }
5329
5330         for (i = 0; i < MAX_MCC_CMD; i++) {
5331                 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5332                 phba->ctrl.mcc_tag[i] = i + 1;
5333                 phba->ctrl.mcc_tag_status[i + 1] = 0;
5334                 phba->ctrl.mcc_tag_available++;
5335         }
5336
5337         phwi_ctrlr = phba->phwi_ctrlr;
5338         phwi_context = phwi_ctrlr->phwi_ctxt;
5339         for (i = 0; i < phba->num_cpus; i++) {
5340                 pbe_eq = &phwi_context->be_eq[i];
5341                 irq_poll_init(&pbe_eq->iopoll, be_iopoll_budget, be_iopoll);
5342         }
5343
5344         i = (phba->pcidev->msix_enabled) ? i : 0;
5345         /* Work item for MCC handling */
5346         pbe_eq = &phwi_context->be_eq[i];
5347         INIT_WORK(&pbe_eq->mcc_work, beiscsi_mcc_work);
5348
5349         ret = beiscsi_init_irqs(phba);
5350         if (ret < 0) {
5351                 __beiscsi_log(phba, KERN_ERR,
5352                               "BM_%d : setup IRQs failed %d\n", ret);
5353                 goto cleanup_port;
5354         }
5355         hwi_enable_intr(phba);
5356         /* port operational: clear all error bits */
5357         set_bit(BEISCSI_HBA_ONLINE, &phba->state);
5358         __beiscsi_log(phba, KERN_INFO,
5359                       "BM_%d : port online: 0x%lx\n", phba->state);
5360
5361         /* start hw_check timer and eqd_update work */
5362         schedule_delayed_work(&phba->eqd_update,
5363                               msecs_to_jiffies(BEISCSI_EQD_UPDATE_INTERVAL));
5364
5365         /**
5366          * Timer function gets modified for TPE detection.
5367          * Always reinit to do health check first.
5368          */
5369         phba->hw_check.function = beiscsi_hw_health_check;
5370         mod_timer(&phba->hw_check,
5371                   jiffies + msecs_to_jiffies(BEISCSI_UE_DETECT_INTERVAL));
5372         return 0;
5373
5374 cleanup_port:
5375         for (i = 0; i < phba->num_cpus; i++) {
5376                 pbe_eq = &phwi_context->be_eq[i];
5377                 irq_poll_disable(&pbe_eq->iopoll);
5378         }
5379         hwi_cleanup_port(phba);
5380
5381 disable_msix:
5382         pci_free_irq_vectors(phba->pcidev);
5383         return ret;
5384 }
5385
5386 /*
5387  * beiscsi_disable_port()- Disable port and cleanup driver resources.
5388  * This is called in HBA error handling and driver removal.
5389  * @phba: Instance Priv structure
5390  * @unload: indicate driver is unloading
5391  *
5392  * Free the OS and HW resources held by the driver
5393  **/
5394 static void beiscsi_disable_port(struct beiscsi_hba *phba, int unload)
5395 {
5396         struct hwi_context_memory *phwi_context;
5397         struct hwi_controller *phwi_ctrlr;
5398         struct be_eq_obj *pbe_eq;
5399         unsigned int i;
5400
5401         if (!test_and_clear_bit(BEISCSI_HBA_ONLINE, &phba->state))
5402                 return;
5403
5404         phwi_ctrlr = phba->phwi_ctrlr;
5405         phwi_context = phwi_ctrlr->phwi_ctxt;
5406         hwi_disable_intr(phba);
5407         beiscsi_free_irqs(phba);
5408         pci_free_irq_vectors(phba->pcidev);
5409
5410         for (i = 0; i < phba->num_cpus; i++) {
5411                 pbe_eq = &phwi_context->be_eq[i];
5412                 irq_poll_disable(&pbe_eq->iopoll);
5413         }
5414         cancel_delayed_work_sync(&phba->eqd_update);
5415         cancel_work_sync(&phba->boot_work);
5416         /* WQ might be running cancel queued mcc_work if we are not exiting */
5417         if (!unload && beiscsi_hba_in_error(phba)) {
5418                 pbe_eq = &phwi_context->be_eq[i];
5419                 cancel_work_sync(&pbe_eq->mcc_work);
5420         }
5421         hwi_cleanup_port(phba);
5422         beiscsi_cleanup_port(phba);
5423 }
5424
5425 static void beiscsi_sess_work(struct work_struct *work)
5426 {
5427         struct beiscsi_hba *phba;
5428
5429         phba = container_of(work, struct beiscsi_hba, sess_work);
5430         /*
5431          * This work gets scheduled only in case of HBA error.
5432          * Old sessions are gone so need to be re-established.
5433          * iscsi_session_failure needs process context hence this work.
5434          */
5435         iscsi_host_for_each_session(phba->shost, beiscsi_session_fail);
5436 }
5437
5438 static void beiscsi_recover_port(struct work_struct *work)
5439 {
5440         struct beiscsi_hba *phba;
5441
5442         phba = container_of(work, struct beiscsi_hba, recover_port.work);
5443         beiscsi_disable_port(phba, 0);
5444         beiscsi_enable_port(phba);
5445 }
5446
5447 static pci_ers_result_t beiscsi_eeh_err_detected(struct pci_dev *pdev,
5448                 pci_channel_state_t state)
5449 {
5450         struct beiscsi_hba *phba = NULL;
5451
5452         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5453         set_bit(BEISCSI_HBA_PCI_ERR, &phba->state);
5454
5455         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5456                     "BM_%d : EEH error detected\n");
5457
5458         /* first stop UE detection when PCI error detected */
5459         del_timer_sync(&phba->hw_check);
5460         cancel_delayed_work_sync(&phba->recover_port);
5461
5462         /* sessions are no longer valid, so first fail the sessions */
5463         iscsi_host_for_each_session(phba->shost, beiscsi_session_fail);
5464         beiscsi_disable_port(phba, 0);
5465
5466         if (state == pci_channel_io_perm_failure) {
5467                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5468                             "BM_%d : EEH : State PERM Failure");
5469                 return PCI_ERS_RESULT_DISCONNECT;
5470         }
5471
5472         pci_disable_device(pdev);
5473
5474         /* The error could cause the FW to trigger a flash debug dump.
5475          * Resetting the card while flash dump is in progress
5476          * can cause it not to recover; wait for it to finish.
5477          * Wait only for first function as it is needed only once per
5478          * adapter.
5479          **/
5480         if (pdev->devfn == 0)
5481                 ssleep(30);
5482
5483         return PCI_ERS_RESULT_NEED_RESET;
5484 }
5485
5486 static pci_ers_result_t beiscsi_eeh_reset(struct pci_dev *pdev)
5487 {
5488         struct beiscsi_hba *phba = NULL;
5489         int status = 0;
5490
5491         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5492
5493         beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5494                     "BM_%d : EEH Reset\n");
5495
5496         status = pci_enable_device(pdev);
5497         if (status)
5498                 return PCI_ERS_RESULT_DISCONNECT;
5499
5500         pci_set_master(pdev);
5501         pci_set_power_state(pdev, PCI_D0);
5502         pci_restore_state(pdev);
5503
5504         status = beiscsi_check_fw_rdy(phba);
5505         if (status) {
5506                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5507                             "BM_%d : EEH Reset Completed\n");
5508         } else {
5509                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5510                             "BM_%d : EEH Reset Completion Failure\n");
5511                 return PCI_ERS_RESULT_DISCONNECT;
5512         }
5513
5514         return PCI_ERS_RESULT_RECOVERED;
5515 }
5516
5517 static void beiscsi_eeh_resume(struct pci_dev *pdev)
5518 {
5519         struct beiscsi_hba *phba;
5520         int ret;
5521
5522         phba = (struct beiscsi_hba *)pci_get_drvdata(pdev);
5523         pci_save_state(pdev);
5524
5525         ret = beiscsi_enable_port(phba);
5526         if (ret)
5527                 __beiscsi_log(phba, KERN_ERR,
5528                               "BM_%d : AER EEH resume failed\n");
5529 }
5530
5531 static int beiscsi_dev_probe(struct pci_dev *pcidev,
5532                              const struct pci_device_id *id)
5533 {
5534         struct hwi_context_memory *phwi_context;
5535         struct hwi_controller *phwi_ctrlr;
5536         struct beiscsi_hba *phba = NULL;
5537         struct be_eq_obj *pbe_eq;
5538         unsigned int s_handle;
5539         char wq_name[20];
5540         int ret, i;
5541
5542         ret = beiscsi_enable_pci(pcidev);
5543         if (ret < 0) {
5544                 dev_err(&pcidev->dev,
5545                         "beiscsi_dev_probe - Failed to enable pci device\n");
5546                 return ret;
5547         }
5548
5549         phba = beiscsi_hba_alloc(pcidev);
5550         if (!phba) {
5551                 dev_err(&pcidev->dev,
5552                         "beiscsi_dev_probe - Failed in beiscsi_hba_alloc\n");
5553                 ret = -ENOMEM;
5554                 goto disable_pci;
5555         }
5556
5557         /* Enable EEH reporting */
5558         ret = pci_enable_pcie_error_reporting(pcidev);
5559         if (ret)
5560                 beiscsi_log(phba, KERN_WARNING, BEISCSI_LOG_INIT,
5561                             "BM_%d : PCIe Error Reporting "
5562                             "Enabling Failed\n");
5563
5564         pci_save_state(pcidev);
5565
5566         /* Initialize Driver configuration Paramters */
5567         beiscsi_hba_attrs_init(phba);
5568
5569         phba->mac_addr_set = false;
5570
5571         switch (pcidev->device) {
5572         case BE_DEVICE_ID1:
5573         case OC_DEVICE_ID1:
5574         case OC_DEVICE_ID2:
5575                 phba->generation = BE_GEN2;
5576                 phba->iotask_fn = beiscsi_iotask;
5577                 dev_warn(&pcidev->dev,
5578                          "Obsolete/Unsupported BE2 Adapter Family\n");
5579                 break;
5580         case BE_DEVICE_ID2:
5581         case OC_DEVICE_ID3:
5582                 phba->generation = BE_GEN3;
5583                 phba->iotask_fn = beiscsi_iotask;
5584                 break;
5585         case OC_SKH_ID1:
5586                 phba->generation = BE_GEN4;
5587                 phba->iotask_fn = beiscsi_iotask_v2;
5588                 break;
5589         default:
5590                 phba->generation = 0;
5591         }
5592
5593         ret = be_ctrl_init(phba, pcidev);
5594         if (ret) {
5595                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5596                             "BM_%d : be_ctrl_init failed\n");
5597                 goto free_hba;
5598         }
5599
5600         ret = beiscsi_init_sliport(phba);
5601         if (ret)
5602                 goto free_hba;
5603
5604         spin_lock_init(&phba->io_sgl_lock);
5605         spin_lock_init(&phba->mgmt_sgl_lock);
5606         spin_lock_init(&phba->async_pdu_lock);
5607         ret = beiscsi_get_fw_config(&phba->ctrl, phba);
5608         if (ret != 0) {
5609                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5610                             "BM_%d : Error getting fw config\n");
5611                 goto free_port;
5612         }
5613         beiscsi_get_port_name(&phba->ctrl, phba);
5614         beiscsi_get_params(phba);
5615         beiscsi_set_host_data(phba);
5616         beiscsi_set_uer_feature(phba);
5617
5618         be2iscsi_enable_msix(phba);
5619
5620         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5621                     "BM_%d : num_cpus = %d\n",
5622                     phba->num_cpus);
5623
5624         phba->shost->max_id = phba->params.cxns_per_ctrl;
5625         phba->shost->can_queue = phba->params.ios_per_ctrl;
5626         ret = beiscsi_get_memory(phba);
5627         if (ret < 0) {
5628                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5629                             "BM_%d : alloc host mem failed\n");
5630                 goto free_port;
5631         }
5632
5633         ret = beiscsi_init_port(phba);
5634         if (ret < 0) {
5635                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5636                             "BM_%d : init port failed\n");
5637                 beiscsi_free_mem(phba);
5638                 goto free_port;
5639         }
5640
5641         for (i = 0; i < MAX_MCC_CMD; i++) {
5642                 init_waitqueue_head(&phba->ctrl.mcc_wait[i + 1]);
5643                 phba->ctrl.mcc_tag[i] = i + 1;
5644                 phba->ctrl.mcc_tag_status[i + 1] = 0;
5645                 phba->ctrl.mcc_tag_available++;
5646                 memset(&phba->ctrl.ptag_state[i].tag_mem_state, 0,
5647                        sizeof(struct be_dma_mem));
5648         }
5649
5650         phba->ctrl.mcc_alloc_index = phba->ctrl.mcc_free_index = 0;
5651
5652         snprintf(wq_name, sizeof(wq_name), "beiscsi_%02x_wq",
5653                  phba->shost->host_no);
5654         phba->wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 1, wq_name);
5655         if (!phba->wq) {
5656                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5657                             "BM_%d : beiscsi_dev_probe-"
5658                             "Failed to allocate work queue\n");
5659                 ret = -ENOMEM;
5660                 goto free_twq;
5661         }
5662
5663         INIT_DELAYED_WORK(&phba->eqd_update, beiscsi_eqd_update_work);
5664
5665         phwi_ctrlr = phba->phwi_ctrlr;
5666         phwi_context = phwi_ctrlr->phwi_ctxt;
5667
5668         for (i = 0; i < phba->num_cpus; i++) {
5669                 pbe_eq = &phwi_context->be_eq[i];
5670                 irq_poll_init(&pbe_eq->iopoll, be_iopoll_budget, be_iopoll);
5671         }
5672
5673         i = (phba->pcidev->msix_enabled) ? i : 0;
5674         /* Work item for MCC handling */
5675         pbe_eq = &phwi_context->be_eq[i];
5676         INIT_WORK(&pbe_eq->mcc_work, beiscsi_mcc_work);
5677
5678         ret = beiscsi_init_irqs(phba);
5679         if (ret < 0) {
5680                 beiscsi_log(phba, KERN_ERR, BEISCSI_LOG_INIT,
5681                             "BM_%d : beiscsi_dev_probe-"
5682                             "Failed to beiscsi_init_irqs\n");
5683                 goto disable_iopoll;
5684         }
5685         hwi_enable_intr(phba);
5686
5687         ret = iscsi_host_add(phba->shost, &phba->pcidev->dev);
5688         if (ret)
5689                 goto free_irqs;
5690
5691         /* set online bit after port is operational */
5692         set_bit(BEISCSI_HBA_ONLINE, &phba->state);
5693         __beiscsi_log(phba, KERN_INFO,
5694                       "BM_%d : port online: 0x%lx\n", phba->state);
5695
5696         INIT_WORK(&phba->boot_work, beiscsi_boot_work);
5697         ret = beiscsi_boot_get_shandle(phba, &s_handle);
5698         if (ret > 0) {
5699                 beiscsi_start_boot_work(phba, s_handle);
5700                 /**
5701                  * Set this bit after starting the work to let
5702                  * probe handle it first.
5703                  * ASYNC event can too schedule this work.
5704                  */
5705                 set_bit(BEISCSI_HBA_BOOT_FOUND, &phba->state);
5706         }
5707
5708         beiscsi_iface_create_default(phba);
5709         schedule_delayed_work(&phba->eqd_update,
5710                               msecs_to_jiffies(BEISCSI_EQD_UPDATE_INTERVAL));
5711
5712         INIT_WORK(&phba->sess_work, beiscsi_sess_work);
5713         INIT_DELAYED_WORK(&phba->recover_port, beiscsi_recover_port);
5714         /**
5715          * Start UE detection here. UE before this will cause stall in probe
5716          * and eventually fail the probe.
5717          */
5718         timer_setup(&phba->hw_check, beiscsi_hw_health_check, 0);
5719         mod_timer(&phba->hw_check,
5720                   jiffies + msecs_to_jiffies(BEISCSI_UE_DETECT_INTERVAL));
5721         beiscsi_log(phba, KERN_INFO, BEISCSI_LOG_INIT,
5722                     "\n\n\n BM_%d : SUCCESS - DRIVER LOADED\n\n\n");
5723         return 0;
5724
5725 free_irqs:
5726         hwi_disable_intr(phba);
5727         beiscsi_free_irqs(phba);
5728 disable_iopoll:
5729         for (i = 0; i < phba->num_cpus; i++) {
5730                 pbe_eq = &phwi_context->be_eq[i];
5731                 irq_poll_disable(&pbe_eq->iopoll);
5732         }
5733         destroy_workqueue(phba->wq);
5734 free_twq:
5735         hwi_cleanup_port(phba);
5736         beiscsi_cleanup_port(phba);
5737         beiscsi_free_mem(phba);
5738 free_port:
5739         dma_free_coherent(&phba->pcidev->dev,
5740                             phba->ctrl.mbox_mem_alloced.size,
5741                             phba->ctrl.mbox_mem_alloced.va,
5742                             phba->ctrl.mbox_mem_alloced.dma);
5743         beiscsi_unmap_pci_function(phba);
5744 free_hba:
5745         pci_disable_msix(phba->pcidev);
5746         pci_dev_put(phba->pcidev);
5747         iscsi_host_free(phba->shost);
5748         pci_set_drvdata(pcidev, NULL);
5749 disable_pci:
5750         pci_release_regions(pcidev);
5751         pci_disable_device(pcidev);
5752         return ret;
5753 }
5754
5755 static void beiscsi_remove(struct pci_dev *pcidev)
5756 {
5757         struct beiscsi_hba *phba = NULL;
5758
5759         phba = pci_get_drvdata(pcidev);
5760         if (!phba) {
5761                 dev_err(&pcidev->dev, "beiscsi_remove called with no phba\n");
5762                 return;
5763         }
5764
5765         /* first stop UE detection before unloading */
5766         del_timer_sync(&phba->hw_check);
5767         cancel_delayed_work_sync(&phba->recover_port);
5768         cancel_work_sync(&phba->sess_work);
5769
5770         beiscsi_iface_destroy_default(phba);
5771         iscsi_host_remove(phba->shost);
5772         beiscsi_disable_port(phba, 1);
5773
5774         /* after cancelling boot_work */
5775         iscsi_boot_destroy_kset(phba->boot_struct.boot_kset);
5776
5777         /* free all resources */
5778         destroy_workqueue(phba->wq);
5779         beiscsi_free_mem(phba);
5780
5781         /* ctrl uninit */
5782         beiscsi_unmap_pci_function(phba);
5783         dma_free_coherent(&phba->pcidev->dev,
5784                             phba->ctrl.mbox_mem_alloced.size,
5785                             phba->ctrl.mbox_mem_alloced.va,
5786                             phba->ctrl.mbox_mem_alloced.dma);
5787
5788         pci_dev_put(phba->pcidev);
5789         iscsi_host_free(phba->shost);
5790         pci_disable_pcie_error_reporting(pcidev);
5791         pci_set_drvdata(pcidev, NULL);
5792         pci_release_regions(pcidev);
5793         pci_disable_device(pcidev);
5794 }
5795
5796
5797 static struct pci_error_handlers beiscsi_eeh_handlers = {
5798         .error_detected = beiscsi_eeh_err_detected,
5799         .slot_reset = beiscsi_eeh_reset,
5800         .resume = beiscsi_eeh_resume,
5801 };
5802
5803 struct iscsi_transport beiscsi_iscsi_transport = {
5804         .owner = THIS_MODULE,
5805         .name = DRV_NAME,
5806         .caps = CAP_RECOVERY_L0 | CAP_HDRDGST | CAP_TEXT_NEGO |
5807                 CAP_MULTI_R2T | CAP_DATADGST | CAP_DATA_PATH_OFFLOAD,
5808         .create_session = beiscsi_session_create,
5809         .destroy_session = beiscsi_session_destroy,
5810         .create_conn = beiscsi_conn_create,
5811         .bind_conn = beiscsi_conn_bind,
5812         .destroy_conn = iscsi_conn_teardown,
5813         .attr_is_visible = beiscsi_attr_is_visible,
5814         .set_iface_param = beiscsi_iface_set_param,
5815         .get_iface_param = beiscsi_iface_get_param,
5816         .set_param = beiscsi_set_param,
5817         .get_conn_param = iscsi_conn_get_param,
5818         .get_session_param = iscsi_session_get_param,
5819         .get_host_param = beiscsi_get_host_param,
5820         .start_conn = beiscsi_conn_start,
5821         .stop_conn = iscsi_conn_stop,
5822         .send_pdu = iscsi_conn_send_pdu,
5823         .xmit_task = beiscsi_task_xmit,
5824         .cleanup_task = beiscsi_cleanup_task,
5825         .alloc_pdu = beiscsi_alloc_pdu,
5826         .parse_pdu_itt = beiscsi_parse_pdu,
5827         .get_stats = beiscsi_conn_get_stats,
5828         .get_ep_param = beiscsi_ep_get_param,
5829         .ep_connect = beiscsi_ep_connect,
5830         .ep_poll = beiscsi_ep_poll,
5831         .ep_disconnect = beiscsi_ep_disconnect,
5832         .session_recovery_timedout = iscsi_session_recovery_timedout,
5833         .bsg_request = beiscsi_bsg_request,
5834 };
5835
5836 static struct pci_driver beiscsi_pci_driver = {
5837         .name = DRV_NAME,
5838         .probe = beiscsi_dev_probe,
5839         .remove = beiscsi_remove,
5840         .id_table = beiscsi_pci_id_table,
5841         .err_handler = &beiscsi_eeh_handlers
5842 };
5843
5844 static int __init beiscsi_module_init(void)
5845 {
5846         int ret;
5847
5848         beiscsi_scsi_transport =
5849                         iscsi_register_transport(&beiscsi_iscsi_transport);
5850         if (!beiscsi_scsi_transport) {
5851                 printk(KERN_ERR
5852                        "beiscsi_module_init - Unable to  register beiscsi transport.\n");
5853                 return -ENOMEM;
5854         }
5855         printk(KERN_INFO "In beiscsi_module_init, tt=%p\n",
5856                &beiscsi_iscsi_transport);
5857
5858         ret = pci_register_driver(&beiscsi_pci_driver);
5859         if (ret) {
5860                 printk(KERN_ERR
5861                        "beiscsi_module_init - Unable to  register beiscsi pci driver.\n");
5862                 goto unregister_iscsi_transport;
5863         }
5864         return 0;
5865
5866 unregister_iscsi_transport:
5867         iscsi_unregister_transport(&beiscsi_iscsi_transport);
5868         return ret;
5869 }
5870
5871 static void __exit beiscsi_module_exit(void)
5872 {
5873         pci_unregister_driver(&beiscsi_pci_driver);
5874         iscsi_unregister_transport(&beiscsi_iscsi_transport);
5875 }
5876
5877 module_init(beiscsi_module_init);
5878 module_exit(beiscsi_module_exit);