drivers/regulator/ab8500.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) ST-Ericsson SA 2010
   4  *
   5  * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
   6  *          Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
   7  *          Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
   8  *
   9  * AB8500 peripheral regulators
  10  *
  11  * AB8500 supports the following regulators:
  12  *   VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  13  *
  14  * AB8505 supports the following regulators:
  15  *   VAUX1/2/3/4/5/6, VINTCORE, VADC, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  16  */
  17 #include <linux/init.h>
  18 #include <linux/kernel.h>
  19 #include <linux/module.h>
  20 #include <linux/err.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/mfd/abx500.h>
  23 #include <linux/mfd/abx500/ab8500.h>
  24 #include <linux/of.h>
  25 #include <linux/regulator/of_regulator.h>
  26 #include <linux/regulator/driver.h>
  27 #include <linux/regulator/machine.h>
  28 #include <linux/regulator/ab8500.h>
  29 #include <linux/slab.h>
  30
  31 /**
  32  * struct ab8500_shared_mode - is used when mode is shared between
  33  * two regulators.
  34  * @shared_regulator: pointer to the other sharing regulator
  35  * @lp_mode_req: low power mode requested by this regulator
  36  */
  37 struct ab8500_shared_mode {
  38         struct ab8500_regulator_info *shared_regulator;
  39         bool lp_mode_req;
  40 };
  41
  42 /**
  43  * struct ab8500_regulator_info - ab8500 regulator information
  44  * @dev: device pointer
  45  * @desc: regulator description
  46  * @shared_mode: used when mode is shared between two regulators
  47  * @load_lp_uA: maximum load in idle (low power) mode
  48  * @update_bank: bank to control on/off
  49  * @update_reg: register to control on/off
  50  * @update_mask: mask to enable/disable and set mode of regulator
  51  * @update_val: bits holding the regulator current mode
  52  * @update_val_idle: bits to enable the regulator in idle (low power) mode
  53  * @update_val_normal: bits to enable the regulator in normal (high power) mode
  54  * @mode_bank: bank with location of mode register
  55  * @mode_reg: mode register
  56  * @mode_mask: mask for setting mode
  57  * @mode_val_idle: mode setting for low power
  58  * @mode_val_normal: mode setting for normal power
  59  * @voltage_bank: bank to control regulator voltage
  60  * @voltage_reg: register to control regulator voltage
  61  * @voltage_mask: mask to control regulator voltage
  62  */
  63 struct ab8500_regulator_info {
  64         struct device           *dev;
  65         struct regulator_desc   desc;
  66         struct ab8500_shared_mode *shared_mode;
  67         int load_lp_uA;
  68         u8 update_bank;
  69         u8 update_reg;
  70         u8 update_mask;
  71         u8 update_val;
  72         u8 update_val_idle;
  73         u8 update_val_normal;
  74         u8 mode_bank;
  75         u8 mode_reg;
  76         u8 mode_mask;
  77         u8 mode_val_idle;
  78         u8 mode_val_normal;
  79         u8 voltage_bank;
  80         u8 voltage_reg;
  81         u8 voltage_mask;
  82         struct {
  83                 u8 voltage_limit;
  84                 u8 voltage_bank;
  85                 u8 voltage_reg;
  86                 u8 voltage_mask;
  87         } expand_register;
  88 };
  89
  90 /* voltage tables for the vauxn/vintcore supplies */
  91 static const unsigned int ldo_vauxn_voltages[] = {
  92         1100000,
  93         1200000,
  94         1300000,
  95         1400000,
  96         1500000,
  97         1800000,
  98         1850000,
  99         1900000,
 100         2500000,
 101         2650000,
 102         2700000,
 103         2750000,
 104         2800000,
 105         2900000,
 106         3000000,
 107         3300000,
 108 };
 109
 110 static const unsigned int ldo_vaux3_voltages[] = {
 111         1200000,
 112         1500000,
 113         1800000,
 114         2100000,
 115         2500000,
 116         2750000,
 117         2790000,
 118         2910000,
 119 };
 120
 121 static const unsigned int ldo_vaux56_voltages[] = {
 122         1800000,
 123         1050000,
 124         1100000,
 125         1200000,
 126         1500000,
 127         2200000,
 128         2500000,
 129         2790000,
 130 };
 131
 132 static const unsigned int ldo_vintcore_voltages[] = {
 133         1200000,
 134         1225000,
 135         1250000,
 136         1275000,
 137         1300000,
 138         1325000,
 139         1350000,
 140 };
 141
 142 static const unsigned int ldo_sdio_voltages[] = {
 143         1160000,
 144         1050000,
 145         1100000,
 146         1500000,
 147         1800000,
 148         2200000,
 149         2910000,
 150         3050000,
 151 };
 152
 153 static const unsigned int fixed_1200000_voltage[] = {
 154         1200000,
 155 };
 156
 157 static const unsigned int fixed_1800000_voltage[] = {
 158         1800000,
 159 };
 160
 161 static const unsigned int fixed_2000000_voltage[] = {
 162         2000000,
 163 };
 164
 165 static const unsigned int fixed_2050000_voltage[] = {
 166         2050000,
 167 };
 168
 169 static const unsigned int fixed_3300000_voltage[] = {
 170         3300000,
 171 };
 172
 173 static const unsigned int ldo_vana_voltages[] = {
 174         1050000,
 175         1075000,
 176         1100000,
 177         1125000,
 178         1150000,
 179         1175000,
 180         1200000,
 181         1225000,
 182 };
 183
 184 static const unsigned int ldo_vaudio_voltages[] = {
 185         2000000,
 186         2100000,
 187         2200000,
 188         2300000,
 189         2400000,
 190         2500000,
 191         2600000,
 192         2600000,        /* Duplicated in Vaudio and IsoUicc Control register. */
 193 };
 194
 195 static const unsigned int ldo_vdmic_voltages[] = {
 196         1800000,
 197         1900000,
 198         2000000,
 199         2850000,
 200 };
 201
 202 static DEFINE_MUTEX(shared_mode_mutex);
 203 static struct ab8500_shared_mode ldo_anamic1_shared;
 204 static struct ab8500_shared_mode ldo_anamic2_shared;
 205
 206 static int ab8500_regulator_enable(struct regulator_dev *rdev)
 207 {
 208         int ret;
 209         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 210
 211         if (info == NULL) {
 212                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 213                 return -EINVAL;
 214         }
 215
 216         ret = abx500_mask_and_set_register_interruptible(info->dev,
 217                 info->update_bank, info->update_reg,
 218                 info->update_mask, info->update_val);
 219         if (ret < 0) {
 220                 dev_err(rdev_get_dev(rdev),
 221                         "couldn't set enable bits for regulator\n");
 222                 return ret;
 223         }
 224
 225         dev_vdbg(rdev_get_dev(rdev),
 226                 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 227                 info->desc.name, info->update_bank, info->update_reg,
 228                 info->update_mask, info->update_val);
 229
 230         return ret;
 231 }
 232
 233 static int ab8500_regulator_disable(struct regulator_dev *rdev)
 234 {
 235         int ret;
 236         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 237
 238         if (info == NULL) {
 239                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 240                 return -EINVAL;
 241         }
 242
 243         ret = abx500_mask_and_set_register_interruptible(info->dev,
 244                 info->update_bank, info->update_reg,
 245                 info->update_mask, 0x0);
 246         if (ret < 0) {
 247                 dev_err(rdev_get_dev(rdev),
 248                         "couldn't set disable bits for regulator\n");
 249                 return ret;
 250         }
 251
 252         dev_vdbg(rdev_get_dev(rdev),
 253                 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 254                 info->desc.name, info->update_bank, info->update_reg,
 255                 info->update_mask, 0x0);
 256
 257         return ret;
 258 }
 259
 260 static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
 261 {
 262         int ret;
 263         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 264         u8 regval;
 265
 266         if (info == NULL) {
 267                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 268                 return -EINVAL;
 269         }
 270
 271         ret = abx500_get_register_interruptible(info->dev,
 272                 info->update_bank, info->update_reg, &regval);
 273         if (ret < 0) {
 274                 dev_err(rdev_get_dev(rdev),
 275                         "couldn't read 0x%x register\n", info->update_reg);
 276                 return ret;
 277         }
 278
 279         dev_vdbg(rdev_get_dev(rdev),
 280                 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 281                 " 0x%x\n",
 282                 info->desc.name, info->update_bank, info->update_reg,
 283                 info->update_mask, regval);
 284
 285         if (regval & info->update_mask)
 286                 return 1;
 287         else
 288                 return 0;
 289 }
 290
 291 static unsigned int ab8500_regulator_get_optimum_mode(
 292                 struct regulator_dev *rdev, int input_uV,
 293                 int output_uV, int load_uA)
 294 {
 295         unsigned int mode;
 296
 297         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 298
 299         if (info == NULL) {
 300                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 301                 return -EINVAL;
 302         }
 303
 304         if (load_uA <= info->load_lp_uA)
 305                 mode = REGULATOR_MODE_IDLE;
 306         else
 307                 mode = REGULATOR_MODE_NORMAL;
 308
 309         return mode;
 310 }
 311
 312 static int ab8500_regulator_set_mode(struct regulator_dev *rdev,
 313                                      unsigned int mode)
 314 {
 315         int ret = 0;
 316         u8 bank, reg, mask, val;
 317         bool lp_mode_req = false;
 318         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 319
 320         if (info == NULL) {
 321                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 322                 return -EINVAL;
 323         }
 324
 325         if (info->mode_mask) {
 326                 bank = info->mode_bank;
 327                 reg = info->mode_reg;
 328                 mask = info->mode_mask;
 329         } else {
 330                 bank = info->update_bank;
 331                 reg = info->update_reg;
 332                 mask = info->update_mask;
 333         }
 334
 335         if (info->shared_mode)
 336                 mutex_lock(&shared_mode_mutex);
 337
 338         switch (mode) {
 339         case REGULATOR_MODE_NORMAL:
 340                 if (info->shared_mode)
 341                         lp_mode_req = false;
 342
 343                 if (info->mode_mask)
 344                         val = info->mode_val_normal;
 345                 else
 346                         val = info->update_val_normal;
 347                 break;
 348         case REGULATOR_MODE_IDLE:
 349                 if (info->shared_mode) {
 350                         struct ab8500_regulator_info *shared_regulator;
 351
 352                         shared_regulator = info->shared_mode->shared_regulator;
 353                         if (!shared_regulator->shared_mode->lp_mode_req) {
 354                                 /* Other regulator prevent LP mode */
 355                                 info->shared_mode->lp_mode_req = true;
 356                                 goto out_unlock;
 357                         }
 358
 359                         lp_mode_req = true;
 360                 }
 361
 362                 if (info->mode_mask)
 363                         val = info->mode_val_idle;
 364                 else
 365                         val = info->update_val_idle;
 366                 break;
 367         default:
 368                 ret = -EINVAL;
 369                 goto out_unlock;
 370         }
 371
 372         if (info->mode_mask || ab8500_regulator_is_enabled(rdev)) {
 373                 ret = abx500_mask_and_set_register_interruptible(info->dev,
 374                         bank, reg, mask, val);
 375                 if (ret < 0) {
 376                         dev_err(rdev_get_dev(rdev),
 377                                 "couldn't set regulator mode\n");
 378                         goto out_unlock;
 379                 }
 380
 381                 dev_vdbg(rdev_get_dev(rdev),
 382                         "%s-set_mode (bank, reg, mask, value): "
 383                         "0x%x, 0x%x, 0x%x, 0x%x\n",
 384                         info->desc.name, bank, reg,
 385                         mask, val);
 386         }
 387
 388         if (!info->mode_mask)
 389                 info->update_val = val;
 390
 391         if (info->shared_mode)
 392                 info->shared_mode->lp_mode_req = lp_mode_req;
 393
 394 out_unlock:
 395         if (info->shared_mode)
 396                 mutex_unlock(&shared_mode_mutex);
 397
 398         return ret;
 399 }
 400
 401 static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev)
 402 {
 403         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 404         int ret;
 405         u8 val;
 406         u8 val_normal;
 407         u8 val_idle;
 408
 409         if (info == NULL) {
 410                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 411                 return -EINVAL;
 412         }
 413
 414         /* Need special handling for shared mode */
 415         if (info->shared_mode) {
 416                 if (info->shared_mode->lp_mode_req)
 417                         return REGULATOR_MODE_IDLE;
 418                 else
 419                         return REGULATOR_MODE_NORMAL;
 420         }
 421
 422         if (info->mode_mask) {
 423                 /* Dedicated register for handling mode */
 424                 ret = abx500_get_register_interruptible(info->dev,
 425                 info->mode_bank, info->mode_reg, &val);
 426                 val = val & info->mode_mask;
 427
 428                 val_normal = info->mode_val_normal;
 429                 val_idle = info->mode_val_idle;
 430         } else {
 431                 /* Mode register same as enable register */
 432                 val = info->update_val;
 433                 val_normal = info->update_val_normal;
 434                 val_idle = info->update_val_idle;
 435         }
 436
 437         if (val == val_normal)
 438                 ret = REGULATOR_MODE_NORMAL;
 439         else if (val == val_idle)
 440                 ret = REGULATOR_MODE_IDLE;
 441         else
 442                 ret = -EINVAL;
 443
 444         return ret;
 445 }
 446
 447 static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
 448 {
 449         int ret, voltage_shift;
 450         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 451         u8 regval;
 452
 453         if (info == NULL) {
 454                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 455                 return -EINVAL;
 456         }
 457
 458         voltage_shift = ffs(info->voltage_mask) - 1;
 459
 460         ret = abx500_get_register_interruptible(info->dev,
 461                         info->voltage_bank, info->voltage_reg, &regval);
 462         if (ret < 0) {
 463                 dev_err(rdev_get_dev(rdev),
 464                         "couldn't read voltage reg for regulator\n");
 465                 return ret;
 466         }
 467
 468         dev_vdbg(rdev_get_dev(rdev),
 469                 "%s-get_voltage (bank, reg, mask, shift, value): "
 470                 "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
 471                 info->desc.name, info->voltage_bank,
 472                 info->voltage_reg, info->voltage_mask,
 473                 voltage_shift, regval);
 474
 475         return (regval & info->voltage_mask) >> voltage_shift;
 476 }
 477
 478 static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
 479                                             unsigned selector)
 480 {
 481         int ret, voltage_shift;
 482         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 483         u8 regval;
 484
 485         if (info == NULL) {
 486                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 487                 return -EINVAL;
 488         }
 489
 490         voltage_shift = ffs(info->voltage_mask) - 1;
 491
 492         /* set the registers for the request */
 493         regval = (u8)selector << voltage_shift;
 494         ret = abx500_mask_and_set_register_interruptible(info->dev,
 495                         info->voltage_bank, info->voltage_reg,
 496                         info->voltage_mask, regval);
 497         if (ret < 0)
 498                 dev_err(rdev_get_dev(rdev),
 499                 "couldn't set voltage reg for regulator\n");
 500
 501         dev_vdbg(rdev_get_dev(rdev),
 502                 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 503                 " 0x%x\n",
 504                 info->desc.name, info->voltage_bank, info->voltage_reg,
 505                 info->voltage_mask, regval);
 506
 507         return ret;
 508 }
 509
 510 static const struct regulator_ops ab8500_regulator_volt_mode_ops = {
 511         .enable                 = ab8500_regulator_enable,
 512         .disable                = ab8500_regulator_disable,
 513         .is_enabled             = ab8500_regulator_is_enabled,
 514         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 515         .set_mode               = ab8500_regulator_set_mode,
 516         .get_mode               = ab8500_regulator_get_mode,
 517         .get_voltage_sel        = ab8500_regulator_get_voltage_sel,
 518         .set_voltage_sel        = ab8500_regulator_set_voltage_sel,
 519         .list_voltage           = regulator_list_voltage_table,
 520 };
 521
 522 static const struct regulator_ops ab8500_regulator_volt_ops = {
 523         .enable         = ab8500_regulator_enable,
 524         .disable        = ab8500_regulator_disable,
 525         .is_enabled     = ab8500_regulator_is_enabled,
 526         .get_voltage_sel = ab8500_regulator_get_voltage_sel,
 527         .set_voltage_sel = ab8500_regulator_set_voltage_sel,
 528         .list_voltage   = regulator_list_voltage_table,
 529 };
 530
 531 static const struct regulator_ops ab8500_regulator_mode_ops = {
 532         .enable                 = ab8500_regulator_enable,
 533         .disable                = ab8500_regulator_disable,
 534         .is_enabled             = ab8500_regulator_is_enabled,
 535         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 536         .set_mode               = ab8500_regulator_set_mode,
 537         .get_mode               = ab8500_regulator_get_mode,
 538         .list_voltage           = regulator_list_voltage_table,
 539 };
 540
 541 static const struct regulator_ops ab8500_regulator_ops = {
 542         .enable                 = ab8500_regulator_enable,
 543         .disable                = ab8500_regulator_disable,
 544         .is_enabled             = ab8500_regulator_is_enabled,
 545         .list_voltage           = regulator_list_voltage_table,
 546 };
 547
 548 static const struct regulator_ops ab8500_regulator_anamic_mode_ops = {
 549         .enable         = ab8500_regulator_enable,
 550         .disable        = ab8500_regulator_disable,
 551         .is_enabled     = ab8500_regulator_is_enabled,
 552         .set_mode       = ab8500_regulator_set_mode,
 553         .get_mode       = ab8500_regulator_get_mode,
 554         .list_voltage   = regulator_list_voltage_table,
 555 };
 556
 557 /* AB8500 regulator information */
 558 static struct ab8500_regulator_info
 559                 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
 560         /*
 561          * Variable Voltage Regulators
 562          *   name, min mV, max mV,
 563          *   update bank, reg, mask, enable val
 564          *   volt bank, reg, mask
 565          */
 566         [AB8500_LDO_AUX1] = {
 567                 .desc = {
 568                         .name           = "LDO-AUX1",
 569                         .ops            = &ab8500_regulator_volt_mode_ops,
 570                         .type           = REGULATOR_VOLTAGE,
 571                         .id             = AB8500_LDO_AUX1,
 572                         .owner          = THIS_MODULE,
 573                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 574                         .volt_table     = ldo_vauxn_voltages,
 575                         .enable_time    = 200,
 576                         .supply_name    = "vin",
 577                 },
 578                 .load_lp_uA             = 5000,
 579                 .update_bank            = 0x04,
 580                 .update_reg             = 0x09,
 581                 .update_mask            = 0x03,
 582                 .update_val             = 0x01,
 583                 .update_val_idle        = 0x03,
 584                 .update_val_normal      = 0x01,
 585                 .voltage_bank           = 0x04,
 586                 .voltage_reg            = 0x1f,
 587                 .voltage_mask           = 0x0f,
 588         },
 589         [AB8500_LDO_AUX2] = {
 590                 .desc = {
 591                         .name           = "LDO-AUX2",
 592                         .ops            = &ab8500_regulator_volt_mode_ops,
 593                         .type           = REGULATOR_VOLTAGE,
 594                         .id             = AB8500_LDO_AUX2,
 595                         .owner          = THIS_MODULE,
 596                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 597                         .volt_table     = ldo_vauxn_voltages,
 598                         .enable_time    = 200,
 599                         .supply_name    = "vin",
 600                 },
 601                 .load_lp_uA             = 5000,
 602                 .update_bank            = 0x04,
 603                 .update_reg             = 0x09,
 604                 .update_mask            = 0x0c,
 605                 .update_val             = 0x04,
 606                 .update_val_idle        = 0x0c,
 607                 .update_val_normal      = 0x04,
 608                 .voltage_bank           = 0x04,
 609                 .voltage_reg            = 0x20,
 610                 .voltage_mask           = 0x0f,
 611         },
 612         [AB8500_LDO_AUX3] = {
 613                 .desc = {
 614                         .name           = "LDO-AUX3",
 615                         .ops            = &ab8500_regulator_volt_mode_ops,
 616                         .type           = REGULATOR_VOLTAGE,
 617                         .id             = AB8500_LDO_AUX3,
 618                         .owner          = THIS_MODULE,
 619                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
 620                         .volt_table     = ldo_vaux3_voltages,
 621                         .enable_time    = 450,
 622                         .supply_name    = "vin",
 623                 },
 624                 .load_lp_uA             = 5000,
 625                 .update_bank            = 0x04,
 626                 .update_reg             = 0x0a,
 627                 .update_mask            = 0x03,
 628                 .update_val             = 0x01,
 629                 .update_val_idle        = 0x03,
 630                 .update_val_normal      = 0x01,
 631                 .voltage_bank           = 0x04,
 632                 .voltage_reg            = 0x21,
 633                 .voltage_mask           = 0x07,
 634         },
 635         [AB8500_LDO_INTCORE] = {
 636                 .desc = {
 637                         .name           = "LDO-INTCORE",
 638                         .ops            = &ab8500_regulator_volt_mode_ops,
 639                         .type           = REGULATOR_VOLTAGE,
 640                         .id             = AB8500_LDO_INTCORE,
 641                         .owner          = THIS_MODULE,
 642                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
 643                         .volt_table     = ldo_vintcore_voltages,
 644                         .enable_time    = 750,
 645                 },
 646                 .load_lp_uA             = 5000,
 647                 .update_bank            = 0x03,
 648                 .update_reg             = 0x80,
 649                 .update_mask            = 0x44,
 650                 .update_val             = 0x44,
 651                 .update_val_idle        = 0x44,
 652                 .update_val_normal      = 0x04,
 653                 .voltage_bank           = 0x03,
 654                 .voltage_reg            = 0x80,
 655                 .voltage_mask           = 0x38,
 656         },
 657
 658         /*
 659          * Fixed Voltage Regulators
 660          *   name, fixed mV,
 661          *   update bank, reg, mask, enable val
 662          */
 663         [AB8500_LDO_TVOUT] = {
 664                 .desc = {
 665                         .name           = "LDO-TVOUT",
 666                         .ops            = &ab8500_regulator_mode_ops,
 667                         .type           = REGULATOR_VOLTAGE,
 668                         .id             = AB8500_LDO_TVOUT,
 669                         .owner          = THIS_MODULE,
 670                         .n_voltages     = 1,
 671                         .volt_table     = fixed_2000000_voltage,
 672                         .enable_time    = 500,
 673                 },
 674                 .load_lp_uA             = 1000,
 675                 .update_bank            = 0x03,
 676                 .update_reg             = 0x80,
 677                 .update_mask            = 0x82,
 678                 .update_val             = 0x02,
 679                 .update_val_idle        = 0x82,
 680                 .update_val_normal      = 0x02,
 681         },
 682         [AB8500_LDO_AUDIO] = {
 683                 .desc = {
 684                         .name           = "LDO-AUDIO",
 685                         .ops            = &ab8500_regulator_ops,
 686                         .type           = REGULATOR_VOLTAGE,
 687                         .id             = AB8500_LDO_AUDIO,
 688                         .owner          = THIS_MODULE,
 689                         .n_voltages     = 1,
 690                         .enable_time    = 140,
 691                         .volt_table     = fixed_2000000_voltage,
 692                 },
 693                 .update_bank            = 0x03,
 694                 .update_reg             = 0x83,
 695                 .update_mask            = 0x02,
 696                 .update_val             = 0x02,
 697         },
 698         [AB8500_LDO_ANAMIC1] = {
 699                 .desc = {
 700                         .name           = "LDO-ANAMIC1",
 701                         .ops            = &ab8500_regulator_ops,
 702                         .type           = REGULATOR_VOLTAGE,
 703                         .id             = AB8500_LDO_ANAMIC1,
 704                         .owner          = THIS_MODULE,
 705                         .n_voltages     = 1,
 706                         .enable_time    = 500,
 707                         .volt_table     = fixed_2050000_voltage,
 708                 },
 709                 .update_bank            = 0x03,
 710                 .update_reg             = 0x83,
 711                 .update_mask            = 0x08,
 712                 .update_val             = 0x08,
 713         },
 714         [AB8500_LDO_ANAMIC2] = {
 715                 .desc = {
 716                         .name           = "LDO-ANAMIC2",
 717                         .ops            = &ab8500_regulator_ops,
 718                         .type           = REGULATOR_VOLTAGE,
 719                         .id             = AB8500_LDO_ANAMIC2,
 720                         .owner          = THIS_MODULE,
 721                         .n_voltages     = 1,
 722                         .enable_time    = 500,
 723                         .volt_table     = fixed_2050000_voltage,
 724                 },
 725                 .update_bank            = 0x03,
 726                 .update_reg             = 0x83,
 727                 .update_mask            = 0x10,
 728                 .update_val             = 0x10,
 729         },
 730         [AB8500_LDO_DMIC] = {
 731                 .desc = {
 732                         .name           = "LDO-DMIC",
 733                         .ops            = &ab8500_regulator_ops,
 734                         .type           = REGULATOR_VOLTAGE,
 735                         .id             = AB8500_LDO_DMIC,
 736                         .owner          = THIS_MODULE,
 737                         .n_voltages     = 1,
 738                         .enable_time    = 420,
 739                         .volt_table     = fixed_1800000_voltage,
 740                 },
 741                 .update_bank            = 0x03,
 742                 .update_reg             = 0x83,
 743                 .update_mask            = 0x04,
 744                 .update_val             = 0x04,
 745         },
 746
 747         /*
 748          * Regulators with fixed voltage and normal/idle modes
 749          */
 750         [AB8500_LDO_ANA] = {
 751                 .desc = {
 752                         .name           = "LDO-ANA",
 753                         .ops            = &ab8500_regulator_mode_ops,
 754                         .type           = REGULATOR_VOLTAGE,
 755                         .id             = AB8500_LDO_ANA,
 756                         .owner          = THIS_MODULE,
 757                         .n_voltages     = 1,
 758                         .enable_time    = 140,
 759                         .volt_table     = fixed_1200000_voltage,
 760                 },
 761                 .load_lp_uA             = 1000,
 762                 .update_bank            = 0x04,
 763                 .update_reg             = 0x06,
 764                 .update_mask            = 0x0c,
 765                 .update_val             = 0x04,
 766                 .update_val_idle        = 0x0c,
 767                 .update_val_normal      = 0x04,
 768         },
 769 };
 770
 771 /* AB8505 regulator information */
 772 static struct ab8500_regulator_info
 773                 ab8505_regulator_info[AB8505_NUM_REGULATORS] = {
 774         /*
 775          * Variable Voltage Regulators
 776          *   name, min mV, max mV,
 777          *   update bank, reg, mask, enable val
 778          *   volt bank, reg, mask
 779          */
 780         [AB8505_LDO_AUX1] = {
 781                 .desc = {
 782                         .name           = "LDO-AUX1",
 783                         .ops            = &ab8500_regulator_volt_mode_ops,
 784                         .type           = REGULATOR_VOLTAGE,
 785                         .id             = AB8505_LDO_AUX1,
 786                         .owner          = THIS_MODULE,
 787                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 788                         .volt_table     = ldo_vauxn_voltages,
 789                 },
 790                 .load_lp_uA             = 5000,
 791                 .update_bank            = 0x04,
 792                 .update_reg             = 0x09,
 793                 .update_mask            = 0x03,
 794                 .update_val             = 0x01,
 795                 .update_val_idle        = 0x03,
 796                 .update_val_normal      = 0x01,
 797                 .voltage_bank           = 0x04,
 798                 .voltage_reg            = 0x1f,
 799                 .voltage_mask           = 0x0f,
 800         },
 801         [AB8505_LDO_AUX2] = {
 802                 .desc = {
 803                         .name           = "LDO-AUX2",
 804                         .ops            = &ab8500_regulator_volt_mode_ops,
 805                         .type           = REGULATOR_VOLTAGE,
 806                         .id             = AB8505_LDO_AUX2,
 807                         .owner          = THIS_MODULE,
 808                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 809                         .volt_table     = ldo_vauxn_voltages,
 810                 },
 811                 .load_lp_uA             = 5000,
 812                 .update_bank            = 0x04,
 813                 .update_reg             = 0x09,
 814                 .update_mask            = 0x0c,
 815                 .update_val             = 0x04,
 816                 .update_val_idle        = 0x0c,
 817                 .update_val_normal      = 0x04,
 818                 .voltage_bank           = 0x04,
 819                 .voltage_reg            = 0x20,
 820                 .voltage_mask           = 0x0f,
 821         },
 822         [AB8505_LDO_AUX3] = {
 823                 .desc = {
 824                         .name           = "LDO-AUX3",
 825                         .ops            = &ab8500_regulator_volt_mode_ops,
 826                         .type           = REGULATOR_VOLTAGE,
 827                         .id             = AB8505_LDO_AUX3,
 828                         .owner          = THIS_MODULE,
 829                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
 830                         .volt_table     = ldo_vaux3_voltages,
 831                 },
 832                 .load_lp_uA             = 5000,
 833                 .update_bank            = 0x04,
 834                 .update_reg             = 0x0a,
 835                 .update_mask            = 0x03,
 836                 .update_val             = 0x01,
 837                 .update_val_idle        = 0x03,
 838                 .update_val_normal      = 0x01,
 839                 .voltage_bank           = 0x04,
 840                 .voltage_reg            = 0x21,
 841                 .voltage_mask           = 0x07,
 842         },
 843         [AB8505_LDO_AUX4] = {
 844                 .desc = {
 845                         .name           = "LDO-AUX4",
 846                         .ops            = &ab8500_regulator_volt_mode_ops,
 847                         .type           = REGULATOR_VOLTAGE,
 848                         .id             = AB8505_LDO_AUX4,
 849                         .owner          = THIS_MODULE,
 850                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 851                         .volt_table     = ldo_vauxn_voltages,
 852                 },
 853                 .load_lp_uA             = 5000,
 854                 /* values for Vaux4Regu register */
 855                 .update_bank            = 0x04,
 856                 .update_reg             = 0x2e,
 857                 .update_mask            = 0x03,
 858                 .update_val             = 0x01,
 859                 .update_val_idle        = 0x03,
 860                 .update_val_normal      = 0x01,
 861                 /* values for Vaux4SEL register */
 862                 .voltage_bank           = 0x04,
 863                 .voltage_reg            = 0x2f,
 864                 .voltage_mask           = 0x0f,
 865         },
 866         [AB8505_LDO_AUX5] = {
 867                 .desc = {
 868                         .name           = "LDO-AUX5",
 869                         .ops            = &ab8500_regulator_volt_mode_ops,
 870                         .type           = REGULATOR_VOLTAGE,
 871                         .id             = AB8505_LDO_AUX5,
 872                         .owner          = THIS_MODULE,
 873                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
 874                         .volt_table     = ldo_vaux56_voltages,
 875                 },
 876                 .load_lp_uA             = 2000,
 877                 /* values for CtrlVaux5 register */
 878                 .update_bank            = 0x01,
 879                 .update_reg             = 0x55,
 880                 .update_mask            = 0x18,
 881                 .update_val             = 0x10,
 882                 .update_val_idle        = 0x18,
 883                 .update_val_normal      = 0x10,
 884                 .voltage_bank           = 0x01,
 885                 .voltage_reg            = 0x55,
 886                 .voltage_mask           = 0x07,
 887         },
 888         [AB8505_LDO_AUX6] = {
 889                 .desc = {
 890                         .name           = "LDO-AUX6",
 891                         .ops            = &ab8500_regulator_volt_mode_ops,
 892                         .type           = REGULATOR_VOLTAGE,
 893                         .id             = AB8505_LDO_AUX6,
 894                         .owner          = THIS_MODULE,
 895                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
 896                         .volt_table     = ldo_vaux56_voltages,
 897                 },
 898                 .load_lp_uA             = 2000,
 899                 /* values for CtrlVaux6 register */
 900                 .update_bank            = 0x01,
 901                 .update_reg             = 0x56,
 902                 .update_mask            = 0x18,
 903                 .update_val             = 0x10,
 904                 .update_val_idle        = 0x18,
 905                 .update_val_normal      = 0x10,
 906                 .voltage_bank           = 0x01,
 907                 .voltage_reg            = 0x56,
 908                 .voltage_mask           = 0x07,
 909         },
 910         [AB8505_LDO_INTCORE] = {
 911                 .desc = {
 912                         .name           = "LDO-INTCORE",
 913                         .ops            = &ab8500_regulator_volt_mode_ops,
 914                         .type           = REGULATOR_VOLTAGE,
 915                         .id             = AB8505_LDO_INTCORE,
 916                         .owner          = THIS_MODULE,
 917                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
 918                         .volt_table     = ldo_vintcore_voltages,
 919                 },
 920                 .load_lp_uA             = 5000,
 921                 .update_bank            = 0x03,
 922                 .update_reg             = 0x80,
 923                 .update_mask            = 0x44,
 924                 .update_val             = 0x04,
 925                 .update_val_idle        = 0x44,
 926                 .update_val_normal      = 0x04,
 927                 .voltage_bank           = 0x03,
 928                 .voltage_reg            = 0x80,
 929                 .voltage_mask           = 0x38,
 930         },
 931
 932         /*
 933          * Fixed Voltage Regulators
 934          *   name, fixed mV,
 935          *   update bank, reg, mask, enable val
 936          */
 937         [AB8505_LDO_ADC] = {
 938                 .desc = {
 939                         .name           = "LDO-ADC",
 940                         .ops            = &ab8500_regulator_mode_ops,
 941                         .type           = REGULATOR_VOLTAGE,
 942                         .id             = AB8505_LDO_ADC,
 943                         .owner          = THIS_MODULE,
 944                         .n_voltages     = 1,
 945                         .volt_table     = fixed_2000000_voltage,
 946                         .enable_time    = 10000,
 947                 },
 948                 .load_lp_uA             = 1000,
 949                 .update_bank            = 0x03,
 950                 .update_reg             = 0x80,
 951                 .update_mask            = 0x82,
 952                 .update_val             = 0x02,
 953                 .update_val_idle        = 0x82,
 954                 .update_val_normal      = 0x02,
 955         },
 956         [AB8505_LDO_AUDIO] = {
 957                 .desc = {
 958                         .name           = "LDO-AUDIO",
 959                         .ops            = &ab8500_regulator_volt_ops,
 960                         .type           = REGULATOR_VOLTAGE,
 961                         .id             = AB8505_LDO_AUDIO,
 962                         .owner          = THIS_MODULE,
 963                         .n_voltages     = ARRAY_SIZE(ldo_vaudio_voltages),
 964                         .volt_table     = ldo_vaudio_voltages,
 965                 },
 966                 .update_bank            = 0x03,
 967                 .update_reg             = 0x83,
 968                 .update_mask            = 0x02,
 969                 .update_val             = 0x02,
 970                 .voltage_bank           = 0x01,
 971                 .voltage_reg            = 0x57,
 972                 .voltage_mask           = 0x70,
 973         },
 974         [AB8505_LDO_ANAMIC1] = {
 975                 .desc = {
 976                         .name           = "LDO-ANAMIC1",
 977                         .ops            = &ab8500_regulator_anamic_mode_ops,
 978                         .type           = REGULATOR_VOLTAGE,
 979                         .id             = AB8505_LDO_ANAMIC1,
 980                         .owner          = THIS_MODULE,
 981                         .n_voltages     = 1,
 982                         .volt_table     = fixed_2050000_voltage,
 983                 },
 984                 .shared_mode            = &ldo_anamic1_shared,
 985                 .update_bank            = 0x03,
 986                 .update_reg             = 0x83,
 987                 .update_mask            = 0x08,
 988                 .update_val             = 0x08,
 989                 .mode_bank              = 0x01,
 990                 .mode_reg               = 0x54,
 991                 .mode_mask              = 0x04,
 992                 .mode_val_idle          = 0x04,
 993                 .mode_val_normal        = 0x00,
 994         },
 995         [AB8505_LDO_ANAMIC2] = {
 996                 .desc = {
 997                         .name           = "LDO-ANAMIC2",
 998                         .ops            = &ab8500_regulator_anamic_mode_ops,
 999                         .type           = REGULATOR_VOLTAGE,
1000                         .id             = AB8505_LDO_ANAMIC2,
1001                         .owner          = THIS_MODULE,
1002                         .n_voltages     = 1,
1003                         .volt_table     = fixed_2050000_voltage,
1004                 },
1005                 .shared_mode            = &ldo_anamic2_shared,
1006                 .update_bank            = 0x03,
1007                 .update_reg             = 0x83,
1008                 .update_mask            = 0x10,
1009                 .update_val             = 0x10,
1010                 .mode_bank              = 0x01,
1011                 .mode_reg               = 0x54,
1012                 .mode_mask              = 0x04,
1013                 .mode_val_idle          = 0x04,
1014                 .mode_val_normal        = 0x00,
1015         },
1016         [AB8505_LDO_AUX8] = {
1017                 .desc = {
1018                         .name           = "LDO-AUX8",
1019                         .ops            = &ab8500_regulator_ops,
1020                         .type           = REGULATOR_VOLTAGE,
1021                         .id             = AB8505_LDO_AUX8,
1022                         .owner          = THIS_MODULE,
1023                         .n_voltages     = 1,
1024                         .volt_table     = fixed_1800000_voltage,
1025                 },
1026                 .update_bank            = 0x03,
1027                 .update_reg             = 0x83,
1028                 .update_mask            = 0x04,
1029                 .update_val             = 0x04,
1030         },
1031         /*
1032          * Regulators with fixed voltage and normal/idle modes
1033          */
1034         [AB8505_LDO_ANA] = {
1035                 .desc = {
1036                         .name           = "LDO-ANA",
1037                         .ops            = &ab8500_regulator_volt_mode_ops,
1038                         .type           = REGULATOR_VOLTAGE,
1039                         .id             = AB8505_LDO_ANA,
1040                         .owner          = THIS_MODULE,
1041                         .n_voltages     = ARRAY_SIZE(ldo_vana_voltages),
1042                         .volt_table     = ldo_vana_voltages,
1043                 },
1044                 .load_lp_uA             = 1000,
1045                 .update_bank            = 0x04,
1046                 .update_reg             = 0x06,
1047                 .update_mask            = 0x0c,
1048                 .update_val             = 0x04,
1049                 .update_val_idle        = 0x0c,
1050                 .update_val_normal      = 0x04,
1051                 .voltage_bank           = 0x04,
1052                 .voltage_reg            = 0x29,
1053                 .voltage_mask           = 0x7,
1054         },
1055 };
1056
1057 static struct ab8500_shared_mode ldo_anamic1_shared = {
1058         .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC2],
1059 };
1060
1061 static struct ab8500_shared_mode ldo_anamic2_shared = {
1062         .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC1],
1063 };
1064
1065 struct ab8500_reg_init {
1066         u8 bank;
1067         u8 addr;
1068         u8 mask;
1069 };
1070
1071 #define REG_INIT(_id, _bank, _addr, _mask)      \
1072         [_id] = {                               \
1073                 .bank = _bank,                  \
1074                 .addr = _addr,                  \
1075                 .mask = _mask,                  \
1076         }
1077
1078 /* AB8500 register init */
1079 static struct ab8500_reg_init ab8500_reg_init[] = {
1080         /*
1081          * 0x30, VanaRequestCtrl
1082          * 0xc0, VextSupply1RequestCtrl
1083          */
1084         REG_INIT(AB8500_REGUREQUESTCTRL2,       0x03, 0x04, 0xf0),
1085         /*
1086          * 0x03, VextSupply2RequestCtrl
1087          * 0x0c, VextSupply3RequestCtrl
1088          * 0x30, Vaux1RequestCtrl
1089          * 0xc0, Vaux2RequestCtrl
1090          */
1091         REG_INIT(AB8500_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
1092         /*
1093          * 0x03, Vaux3RequestCtrl
1094          * 0x04, SwHPReq
1095          */
1096         REG_INIT(AB8500_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
1097         /*
1098          * 0x08, VanaSysClkReq1HPValid
1099          * 0x20, Vaux1SysClkReq1HPValid
1100          * 0x40, Vaux2SysClkReq1HPValid
1101          * 0x80, Vaux3SysClkReq1HPValid
1102          */
1103         REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
1104         /*
1105          * 0x10, VextSupply1SysClkReq1HPValid
1106          * 0x20, VextSupply2SysClkReq1HPValid
1107          * 0x40, VextSupply3SysClkReq1HPValid
1108          */
1109         REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
1110         /*
1111          * 0x08, VanaHwHPReq1Valid
1112          * 0x20, Vaux1HwHPReq1Valid
1113          * 0x40, Vaux2HwHPReq1Valid
1114          * 0x80, Vaux3HwHPReq1Valid
1115          */
1116         REG_INIT(AB8500_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xe8),
1117         /*
1118          * 0x01, VextSupply1HwHPReq1Valid
1119          * 0x02, VextSupply2HwHPReq1Valid
1120          * 0x04, VextSupply3HwHPReq1Valid
1121          */
1122         REG_INIT(AB8500_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x07),
1123         /*
1124          * 0x08, VanaHwHPReq2Valid
1125          * 0x20, Vaux1HwHPReq2Valid
1126          * 0x40, Vaux2HwHPReq2Valid
1127          * 0x80, Vaux3HwHPReq2Valid
1128          */
1129         REG_INIT(AB8500_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xe8),
1130         /*
1131          * 0x01, VextSupply1HwHPReq2Valid
1132          * 0x02, VextSupply2HwHPReq2Valid
1133          * 0x04, VextSupply3HwHPReq2Valid
1134          */
1135         REG_INIT(AB8500_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x07),
1136         /*
1137          * 0x20, VanaSwHPReqValid
1138          * 0x80, Vaux1SwHPReqValid
1139          */
1140         REG_INIT(AB8500_REGUSWHPREQVALID1,      0x03, 0x0d, 0xa0),
1141         /*
1142          * 0x01, Vaux2SwHPReqValid
1143          * 0x02, Vaux3SwHPReqValid
1144          * 0x04, VextSupply1SwHPReqValid
1145          * 0x08, VextSupply2SwHPReqValid
1146          * 0x10, VextSupply3SwHPReqValid
1147          */
1148         REG_INIT(AB8500_REGUSWHPREQVALID2,      0x03, 0x0e, 0x1f),
1149         /*
1150          * 0x02, SysClkReq2Valid1
1151          * 0x04, SysClkReq3Valid1
1152          * 0x08, SysClkReq4Valid1
1153          * 0x10, SysClkReq5Valid1
1154          * 0x20, SysClkReq6Valid1
1155          * 0x40, SysClkReq7Valid1
1156          * 0x80, SysClkReq8Valid1
1157          */
1158         REG_INIT(AB8500_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xfe),
1159         /*
1160          * 0x02, SysClkReq2Valid2
1161          * 0x04, SysClkReq3Valid2
1162          * 0x08, SysClkReq4Valid2
1163          * 0x10, SysClkReq5Valid2
1164          * 0x20, SysClkReq6Valid2
1165          * 0x40, SysClkReq7Valid2
1166          * 0x80, SysClkReq8Valid2
1167          */
1168         REG_INIT(AB8500_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xfe),
1169         /*
1170          * 0x02, VTVoutEna
1171          * 0x04, Vintcore12Ena
1172          * 0x38, Vintcore12Sel
1173          * 0x40, Vintcore12LP
1174          * 0x80, VTVoutLP
1175          */
1176         REG_INIT(AB8500_REGUMISC1,              0x03, 0x80, 0xfe),
1177         /*
1178          * 0x02, VaudioEna
1179          * 0x04, VdmicEna
1180          * 0x08, Vamic1Ena
1181          * 0x10, Vamic2Ena
1182          */
1183         REG_INIT(AB8500_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
1184         /*
1185          * 0x01, Vamic1_dzout
1186          * 0x02, Vamic2_dzout
1187          */
1188         REG_INIT(AB8500_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
1189         /*
1190          * 0x03, VpllRegu (NOTE! PRCMU register bits)
1191          * 0x0c, VanaRegu
1192          */
1193         REG_INIT(AB8500_VPLLVANAREGU,           0x04, 0x06, 0x0f),
1194         /*
1195          * 0x01, VrefDDREna
1196          * 0x02, VrefDDRSleepMode
1197          */
1198         REG_INIT(AB8500_VREFDDR,                0x04, 0x07, 0x03),
1199         /*
1200          * 0x03, VextSupply1Regu
1201          * 0x0c, VextSupply2Regu
1202          * 0x30, VextSupply3Regu
1203          * 0x40, ExtSupply2Bypass
1204          * 0x80, ExtSupply3Bypass
1205          */
1206         REG_INIT(AB8500_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
1207         /*
1208          * 0x03, Vaux1Regu
1209          * 0x0c, Vaux2Regu
1210          */
1211         REG_INIT(AB8500_VAUX12REGU,             0x04, 0x09, 0x0f),
1212         /*
1213          * 0x03, Vaux3Regu
1214          */
1215         REG_INIT(AB8500_VRF1VAUX3REGU,          0x04, 0x0a, 0x03),
1216         /*
1217          * 0x0f, Vaux1Sel
1218          */
1219         REG_INIT(AB8500_VAUX1SEL,               0x04, 0x1f, 0x0f),
1220         /*
1221          * 0x0f, Vaux2Sel
1222          */
1223         REG_INIT(AB8500_VAUX2SEL,               0x04, 0x20, 0x0f),
1224         /*
1225          * 0x07, Vaux3Sel
1226          */
1227         REG_INIT(AB8500_VRF1VAUX3SEL,           0x04, 0x21, 0x07),
1228         /*
1229          * 0x01, VextSupply12LP
1230          */
1231         REG_INIT(AB8500_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
1232         /*
1233          * 0x04, Vaux1Disch
1234          * 0x08, Vaux2Disch
1235          * 0x10, Vaux3Disch
1236          * 0x20, Vintcore12Disch
1237          * 0x40, VTVoutDisch
1238          * 0x80, VaudioDisch
1239          */
1240         REG_INIT(AB8500_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
1241         /*
1242          * 0x02, VanaDisch
1243          * 0x04, VdmicPullDownEna
1244          * 0x10, VdmicDisch
1245          */
1246         REG_INIT(AB8500_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
1247 };
1248
1249 /* AB8505 register init */
1250 static struct ab8500_reg_init ab8505_reg_init[] = {
1251         /*
1252          * 0x03, VarmRequestCtrl
1253          * 0x0c, VsmpsCRequestCtrl
1254          * 0x30, VsmpsARequestCtrl
1255          * 0xc0, VsmpsBRequestCtrl
1256          */
1257         REG_INIT(AB8505_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
1258         /*
1259          * 0x03, VsafeRequestCtrl
1260          * 0x0c, VpllRequestCtrl
1261          * 0x30, VanaRequestCtrl
1262          */
1263         REG_INIT(AB8505_REGUREQUESTCTRL2,       0x03, 0x04, 0x3f),
1264         /*
1265          * 0x30, Vaux1RequestCtrl
1266          * 0xc0, Vaux2RequestCtrl
1267          */
1268         REG_INIT(AB8505_REGUREQUESTCTRL3,       0x03, 0x05, 0xf0),
1269         /*
1270          * 0x03, Vaux3RequestCtrl
1271          * 0x04, SwHPReq
1272          */
1273         REG_INIT(AB8505_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
1274         /*
1275          * 0x01, VsmpsASysClkReq1HPValid
1276          * 0x02, VsmpsBSysClkReq1HPValid
1277          * 0x04, VsafeSysClkReq1HPValid
1278          * 0x08, VanaSysClkReq1HPValid
1279          * 0x10, VpllSysClkReq1HPValid
1280          * 0x20, Vaux1SysClkReq1HPValid
1281          * 0x40, Vaux2SysClkReq1HPValid
1282          * 0x80, Vaux3SysClkReq1HPValid
1283          */
1284         REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
1285         /*
1286          * 0x01, VsmpsCSysClkReq1HPValid
1287          * 0x02, VarmSysClkReq1HPValid
1288          * 0x04, VbbSysClkReq1HPValid
1289          * 0x08, VsmpsMSysClkReq1HPValid
1290          */
1291         REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x0f),
1292         /*
1293          * 0x01, VsmpsAHwHPReq1Valid
1294          * 0x02, VsmpsBHwHPReq1Valid
1295          * 0x04, VsafeHwHPReq1Valid
1296          * 0x08, VanaHwHPReq1Valid
1297          * 0x10, VpllHwHPReq1Valid
1298          * 0x20, Vaux1HwHPReq1Valid
1299          * 0x40, Vaux2HwHPReq1Valid
1300          * 0x80, Vaux3HwHPReq1Valid
1301          */
1302         REG_INIT(AB8505_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
1303         /*
1304          * 0x08, VsmpsMHwHPReq1Valid
1305          */
1306         REG_INIT(AB8505_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x08),
1307         /*
1308          * 0x01, VsmpsAHwHPReq2Valid
1309          * 0x02, VsmpsBHwHPReq2Valid
1310          * 0x04, VsafeHwHPReq2Valid
1311          * 0x08, VanaHwHPReq2Valid
1312          * 0x10, VpllHwHPReq2Valid
1313          * 0x20, Vaux1HwHPReq2Valid
1314          * 0x40, Vaux2HwHPReq2Valid
1315          * 0x80, Vaux3HwHPReq2Valid
1316          */
1317         REG_INIT(AB8505_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
1318         /*
1319          * 0x08, VsmpsMHwHPReq2Valid
1320          */
1321         REG_INIT(AB8505_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x08),
1322         /*
1323          * 0x01, VsmpsCSwHPReqValid
1324          * 0x02, VarmSwHPReqValid
1325          * 0x04, VsmpsASwHPReqValid
1326          * 0x08, VsmpsBSwHPReqValid
1327          * 0x10, VsafeSwHPReqValid
1328          * 0x20, VanaSwHPReqValid
1329          * 0x40, VpllSwHPReqValid
1330          * 0x80, Vaux1SwHPReqValid
1331          */
1332         REG_INIT(AB8505_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
1333         /*
1334          * 0x01, Vaux2SwHPReqValid
1335          * 0x02, Vaux3SwHPReqValid
1336          * 0x20, VsmpsMSwHPReqValid
1337          */
1338         REG_INIT(AB8505_REGUSWHPREQVALID2,      0x03, 0x0e, 0x23),
1339         /*
1340          * 0x02, SysClkReq2Valid1
1341          * 0x04, SysClkReq3Valid1
1342          * 0x08, SysClkReq4Valid1
1343          */
1344         REG_INIT(AB8505_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0x0e),
1345         /*
1346          * 0x02, SysClkReq2Valid2
1347          * 0x04, SysClkReq3Valid2
1348          * 0x08, SysClkReq4Valid2
1349          */
1350         REG_INIT(AB8505_REGUSYSCLKREQVALID2,    0x03, 0x10, 0x0e),
1351         /*
1352          * 0x01, Vaux4SwHPReqValid
1353          * 0x02, Vaux4HwHPReq2Valid
1354          * 0x04, Vaux4HwHPReq1Valid
1355          * 0x08, Vaux4SysClkReq1HPValid
1356          */
1357         REG_INIT(AB8505_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
1358         /*
1359          * 0x02, VadcEna
1360          * 0x04, VintCore12Ena
1361          * 0x38, VintCore12Sel
1362          * 0x40, VintCore12LP
1363          * 0x80, VadcLP
1364          */
1365         REG_INIT(AB8505_REGUMISC1,              0x03, 0x80, 0xfe),
1366         /*
1367          * 0x02, VaudioEna
1368          * 0x04, VdmicEna
1369          * 0x08, Vamic1Ena
1370          * 0x10, Vamic2Ena
1371          */
1372         REG_INIT(AB8505_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
1373         /*
1374          * 0x01, Vamic1_dzout
1375          * 0x02, Vamic2_dzout
1376          */
1377         REG_INIT(AB8505_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
1378         /*
1379          * 0x03, VsmpsARegu
1380          * 0x0c, VsmpsASelCtrl
1381          * 0x10, VsmpsAAutoMode
1382          * 0x20, VsmpsAPWMMode
1383          */
1384         REG_INIT(AB8505_VSMPSAREGU,             0x04, 0x03, 0x3f),
1385         /*
1386          * 0x03, VsmpsBRegu
1387          * 0x0c, VsmpsBSelCtrl
1388          * 0x10, VsmpsBAutoMode
1389          * 0x20, VsmpsBPWMMode
1390          */
1391         REG_INIT(AB8505_VSMPSBREGU,             0x04, 0x04, 0x3f),
1392         /*
1393          * 0x03, VsafeRegu
1394          * 0x0c, VsafeSelCtrl
1395          * 0x10, VsafeAutoMode
1396          * 0x20, VsafePWMMode
1397          */
1398         REG_INIT(AB8505_VSAFEREGU,              0x04, 0x05, 0x3f),
1399         /*
1400          * 0x03, VpllRegu (NOTE! PRCMU register bits)
1401          * 0x0c, VanaRegu
1402          */
1403         REG_INIT(AB8505_VPLLVANAREGU,           0x04, 0x06, 0x0f),
1404         /*
1405          * 0x03, VextSupply1Regu
1406          * 0x0c, VextSupply2Regu
1407          * 0x30, VextSupply3Regu
1408          * 0x40, ExtSupply2Bypass
1409          * 0x80, ExtSupply3Bypass
1410          */
1411         REG_INIT(AB8505_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
1412         /*
1413          * 0x03, Vaux1Regu
1414          * 0x0c, Vaux2Regu
1415          */
1416         REG_INIT(AB8505_VAUX12REGU,             0x04, 0x09, 0x0f),
1417         /*
1418          * 0x0f, Vaux3Regu
1419          */
1420         REG_INIT(AB8505_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
1421         /*
1422          * 0x3f, VsmpsASel1
1423          */
1424         REG_INIT(AB8505_VSMPSASEL1,             0x04, 0x13, 0x3f),
1425         /*
1426          * 0x3f, VsmpsASel2
1427          */
1428         REG_INIT(AB8505_VSMPSASEL2,             0x04, 0x14, 0x3f),
1429         /*
1430          * 0x3f, VsmpsASel3
1431          */
1432         REG_INIT(AB8505_VSMPSASEL3,             0x04, 0x15, 0x3f),
1433         /*
1434          * 0x3f, VsmpsBSel1
1435          */
1436         REG_INIT(AB8505_VSMPSBSEL1,             0x04, 0x17, 0x3f),
1437         /*
1438          * 0x3f, VsmpsBSel2
1439          */
1440         REG_INIT(AB8505_VSMPSBSEL2,             0x04, 0x18, 0x3f),
1441         /*
1442          * 0x3f, VsmpsBSel3
1443          */
1444         REG_INIT(AB8505_VSMPSBSEL3,             0x04, 0x19, 0x3f),
1445         /*
1446          * 0x7f, VsafeSel1
1447          */
1448         REG_INIT(AB8505_VSAFESEL1,              0x04, 0x1b, 0x7f),
1449         /*
1450          * 0x3f, VsafeSel2
1451          */
1452         REG_INIT(AB8505_VSAFESEL2,              0x04, 0x1c, 0x7f),
1453         /*
1454          * 0x3f, VsafeSel3
1455          */
1456         REG_INIT(AB8505_VSAFESEL3,              0x04, 0x1d, 0x7f),
1457         /*
1458          * 0x0f, Vaux1Sel
1459          */
1460         REG_INIT(AB8505_VAUX1SEL,               0x04, 0x1f, 0x0f),
1461         /*
1462          * 0x0f, Vaux2Sel
1463          */
1464         REG_INIT(AB8505_VAUX2SEL,               0x04, 0x20, 0x0f),
1465         /*
1466          * 0x07, Vaux3Sel
1467          * 0x30, VRF1Sel
1468          */
1469         REG_INIT(AB8505_VRF1VAUX3SEL,           0x04, 0x21, 0x37),
1470         /*
1471          * 0x03, Vaux4RequestCtrl
1472          */
1473         REG_INIT(AB8505_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
1474         /*
1475          * 0x03, Vaux4Regu
1476          */
1477         REG_INIT(AB8505_VAUX4REGU,              0x04, 0x2e, 0x03),
1478         /*
1479          * 0x0f, Vaux4Sel
1480          */
1481         REG_INIT(AB8505_VAUX4SEL,               0x04, 0x2f, 0x0f),
1482         /*
1483          * 0x04, Vaux1Disch
1484          * 0x08, Vaux2Disch
1485          * 0x10, Vaux3Disch
1486          * 0x20, Vintcore12Disch
1487          * 0x40, VTVoutDisch
1488          * 0x80, VaudioDisch
1489          */
1490         REG_INIT(AB8505_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
1491         /*
1492          * 0x02, VanaDisch
1493          * 0x04, VdmicPullDownEna
1494          * 0x10, VdmicDisch
1495          */
1496         REG_INIT(AB8505_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
1497         /*
1498          * 0x01, Vaux4Disch
1499          */
1500         REG_INIT(AB8505_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
1501         /*
1502          * 0x07, Vaux5Sel
1503          * 0x08, Vaux5LP
1504          * 0x10, Vaux5Ena
1505          * 0x20, Vaux5Disch
1506          * 0x40, Vaux5DisSfst
1507          * 0x80, Vaux5DisPulld
1508          */
1509         REG_INIT(AB8505_CTRLVAUX5,              0x01, 0x55, 0xff),
1510         /*
1511          * 0x07, Vaux6Sel
1512          * 0x08, Vaux6LP
1513          * 0x10, Vaux6Ena
1514          * 0x80, Vaux6DisPulld
1515          */
1516         REG_INIT(AB8505_CTRLVAUX6,              0x01, 0x56, 0x9f),
1517 };
1518
1519 static struct of_regulator_match ab8500_regulator_match[] = {
1520         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8500_LDO_AUX1, },
1521         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8500_LDO_AUX2, },
1522         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8500_LDO_AUX3, },
1523         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
1524         { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB8500_LDO_TVOUT, },
1525         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8500_LDO_AUDIO, },
1526         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
1527         { .name = "ab8500_ldo_anamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
1528         { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB8500_LDO_DMIC, },
1529         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8500_LDO_ANA, },
1530 };
1531
1532 static struct of_regulator_match ab8505_regulator_match[] = {
1533         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8505_LDO_AUX1, },
1534         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8505_LDO_AUX2, },
1535         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8505_LDO_AUX3, },
1536         { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB8505_LDO_AUX4, },
1537         { .name = "ab8500_ldo_aux5",    .driver_data = (void *) AB8505_LDO_AUX5, },
1538         { .name = "ab8500_ldo_aux6",    .driver_data = (void *) AB8505_LDO_AUX6, },
1539         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8505_LDO_INTCORE, },
1540         { .name = "ab8500_ldo_adc",     .driver_data = (void *) AB8505_LDO_ADC, },
1541         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8505_LDO_AUDIO, },
1542         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8505_LDO_ANAMIC1, },
1543         { .name = "ab8500_ldo_anamic2", .driver_data = (void *) AB8505_LDO_ANAMIC2, },
1544         { .name = "ab8500_ldo_aux8",    .driver_data = (void *) AB8505_LDO_AUX8, },
1545         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8505_LDO_ANA, },
1546 };
1547
1548 static struct {
1549         struct ab8500_regulator_info *info;
1550         int info_size;
1551         struct ab8500_reg_init *init;
1552         int init_size;
1553         struct of_regulator_match *match;
1554         int match_size;
1555 } abx500_regulator;
1556
1557 static void abx500_get_regulator_info(struct ab8500 *ab8500)
1558 {
1559         if (is_ab8505(ab8500)) {
1560                 abx500_regulator.info = ab8505_regulator_info;
1561                 abx500_regulator.info_size = ARRAY_SIZE(ab8505_regulator_info);
1562                 abx500_regulator.init = ab8505_reg_init;
1563                 abx500_regulator.init_size = AB8505_NUM_REGULATOR_REGISTERS;
1564                 abx500_regulator.match = ab8505_regulator_match;
1565                 abx500_regulator.match_size = ARRAY_SIZE(ab8505_regulator_match);
1566         } else {
1567                 abx500_regulator.info = ab8500_regulator_info;
1568                 abx500_regulator.info_size = ARRAY_SIZE(ab8500_regulator_info);
1569                 abx500_regulator.init = ab8500_reg_init;
1570                 abx500_regulator.init_size = AB8500_NUM_REGULATOR_REGISTERS;
1571                 abx500_regulator.match = ab8500_regulator_match;
1572                 abx500_regulator.match_size = ARRAY_SIZE(ab8500_regulator_match);
1573         }
1574 }
1575
1576 static int ab8500_regulator_register(struct platform_device *pdev,
1577                                      struct regulator_init_data *init_data,
1578                                      int id, struct device_node *np)
1579 {
1580         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
1581         struct ab8500_regulator_info *info = NULL;
1582         struct regulator_config config = { };
1583         struct regulator_dev *rdev;
1584
1585         /* assign per-regulator data */
1586         info = &abx500_regulator.info[id];
1587         info->dev = &pdev->dev;
1588
1589         config.dev = &pdev->dev;
1590         config.init_data = init_data;
1591         config.driver_data = info;
1592         config.of_node = np;
1593
1594         /* fix for hardware before ab8500v2.0 */
1595         if (is_ab8500_1p1_or_earlier(ab8500)) {
1596                 if (info->desc.id == AB8500_LDO_AUX3) {
1597                         info->desc.n_voltages =
1598                                 ARRAY_SIZE(ldo_vauxn_voltages);
1599                         info->desc.volt_table = ldo_vauxn_voltages;
1600                         info->voltage_mask = 0xf;
1601                 }
1602         }
1603
1604         /* register regulator with framework */
1605         rdev = devm_regulator_register(&pdev->dev, &info->desc, &config);
1606         if (IS_ERR(rdev)) {
1607                 dev_err(&pdev->dev, "failed to register regulator %s\n",
1608                         info->desc.name);
1609                 return PTR_ERR(rdev);
1610         }
1611
1612         return 0;
1613 }
1614
1615 static int ab8500_regulator_probe(struct platform_device *pdev)
1616 {
1617         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
1618         struct device_node *np = pdev->dev.of_node;
1619         struct of_regulator_match *match;
1620         int err, i;
1621
1622         if (!ab8500) {
1623                 dev_err(&pdev->dev, "null mfd parent\n");
1624                 return -EINVAL;
1625         }
1626
1627         abx500_get_regulator_info(ab8500);
1628
1629         err = of_regulator_match(&pdev->dev, np,
1630                                  abx500_regulator.match,
1631                                  abx500_regulator.match_size);
1632         if (err < 0) {
1633                 dev_err(&pdev->dev,
1634                         "Error parsing regulator init data: %d\n", err);
1635                 return err;
1636         }
1637
1638         match = abx500_regulator.match;
1639         for (i = 0; i < abx500_regulator.info_size; i++) {
1640                 err = ab8500_regulator_register(pdev, match[i].init_data, i,
1641                                                 match[i].of_node);
1642                 if (err)
1643                         return err;
1644         }
1645
1646         return 0;
1647 }
1648
1649 static struct platform_driver ab8500_regulator_driver = {
1650         .probe = ab8500_regulator_probe,
1651         .driver         = {
1652                 .name   = "ab8500-regulator",
1653         },
1654 };
1655
1656 static int __init ab8500_regulator_init(void)
1657 {
1658         int ret;
1659
1660         ret = platform_driver_register(&ab8500_regulator_driver);
1661         if (ret != 0)
1662                 pr_err("Failed to register ab8500 regulator: %d\n", ret);
1663
1664         return ret;
1665 }
1666 subsys_initcall(ab8500_regulator_init);
1667
1668 static void __exit ab8500_regulator_exit(void)
1669 {
1670         platform_driver_unregister(&ab8500_regulator_driver);
1671 }
1672 module_exit(ab8500_regulator_exit);
1673
1674 MODULE_LICENSE("GPL v2");
1675 MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
1676 MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
1677 MODULE_AUTHOR("Daniel Willerud <daniel.willerud@stericsson.com>");
1678 MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
1679 MODULE_ALIAS("platform:ab8500-regulator");