drivers/phy/marvell/phy-berlin-usb.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2014 Marvell Technology Group Ltd.
   4  *
   5  * Antoine Tenart <antoine.tenart@free-electrons.com>
   6  * Jisheng Zhang <jszhang@marvell.com>
   7  */
   8
   9 #include <linux/io.h>
  10 #include <linux/module.h>
  11 #include <linux/of_device.h>
  12 #include <linux/phy/phy.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/reset.h>
  15
  16 #define USB_PHY_PLL             0x04
  17 #define USB_PHY_PLL_CONTROL     0x08
  18 #define USB_PHY_TX_CTRL0        0x10
  19 #define USB_PHY_TX_CTRL1        0x14
  20 #define USB_PHY_TX_CTRL2        0x18
  21 #define USB_PHY_RX_CTRL         0x20
  22 #define USB_PHY_ANALOG          0x34
  23
  24 /* USB_PHY_PLL */
  25 #define CLK_REF_DIV(x)          ((x) << 4)
  26 #define FEEDBACK_CLK_DIV(x)     ((x) << 8)
  27
  28 /* USB_PHY_PLL_CONTROL */
  29 #define CLK_STABLE              BIT(0)
  30 #define PLL_CTRL_PIN            BIT(1)
  31 #define PLL_CTRL_REG            BIT(2)
  32 #define PLL_ON                  BIT(3)
  33 #define PHASE_OFF_TOL_125       (0x0 << 5)
  34 #define PHASE_OFF_TOL_250       BIT(5)
  35 #define KVC0_CALIB              (0x0 << 9)
  36 #define KVC0_REG_CTRL           BIT(9)
  37 #define KVC0_HIGH               (0x0 << 10)
  38 #define KVC0_LOW                (0x3 << 10)
  39 #define CLK_BLK_EN              BIT(13)
  40
  41 /* USB_PHY_TX_CTRL0 */
  42 #define EXT_HS_RCAL_EN          BIT(3)
  43 #define EXT_FS_RCAL_EN          BIT(4)
  44 #define IMPCAL_VTH_DIV(x)       ((x) << 5)
  45 #define EXT_RS_RCAL_DIV(x)      ((x) << 8)
  46 #define EXT_FS_RCAL_DIV(x)      ((x) << 12)
  47
  48 /* USB_PHY_TX_CTRL1 */
  49 #define TX_VDD15_14             (0x0 << 4)
  50 #define TX_VDD15_15             BIT(4)
  51 #define TX_VDD15_16             (0x2 << 4)
  52 #define TX_VDD15_17             (0x3 << 4)
  53 #define TX_VDD12_VDD            (0x0 << 6)
  54 #define TX_VDD12_11             BIT(6)
  55 #define TX_VDD12_12             (0x2 << 6)
  56 #define TX_VDD12_13             (0x3 << 6)
  57 #define LOW_VDD_EN              BIT(8)
  58 #define TX_OUT_AMP(x)           ((x) << 9)
  59
  60 /* USB_PHY_TX_CTRL2 */
  61 #define TX_CHAN_CTRL_REG(x)     ((x) << 0)
  62 #define DRV_SLEWRATE(x)         ((x) << 4)
  63 #define IMP_CAL_FS_HS_DLY_0     (0x0 << 6)
  64 #define IMP_CAL_FS_HS_DLY_1     BIT(6)
  65 #define IMP_CAL_FS_HS_DLY_2     (0x2 << 6)
  66 #define IMP_CAL_FS_HS_DLY_3     (0x3 << 6)
  67 #define FS_DRV_EN_MASK(x)       ((x) << 8)
  68 #define HS_DRV_EN_MASK(x)       ((x) << 12)
  69
  70 /* USB_PHY_RX_CTRL */
  71 #define PHASE_FREEZE_DLY_2_CL   (0x0 << 0)
  72 #define PHASE_FREEZE_DLY_4_CL   BIT(0)
  73 #define ACK_LENGTH_8_CL         (0x0 << 2)
  74 #define ACK_LENGTH_12_CL        BIT(2)
  75 #define ACK_LENGTH_16_CL        (0x2 << 2)
  76 #define ACK_LENGTH_20_CL        (0x3 << 2)
  77 #define SQ_LENGTH_3             (0x0 << 4)
  78 #define SQ_LENGTH_6             BIT(4)
  79 #define SQ_LENGTH_9             (0x2 << 4)
  80 #define SQ_LENGTH_12            (0x3 << 4)
  81 #define DISCON_THRESHOLD_260    (0x0 << 6)
  82 #define DISCON_THRESHOLD_270    BIT(6)
  83 #define DISCON_THRESHOLD_280    (0x2 << 6)
  84 #define DISCON_THRESHOLD_290    (0x3 << 6)
  85 #define SQ_THRESHOLD(x)         ((x) << 8)
  86 #define LPF_COEF(x)             ((x) << 12)
  87 #define INTPL_CUR_10            (0x0 << 14)
  88 #define INTPL_CUR_20            BIT(14)
  89 #define INTPL_CUR_30            (0x2 << 14)
  90 #define INTPL_CUR_40            (0x3 << 14)
  91
  92 /* USB_PHY_ANALOG */
  93 #define ANA_PWR_UP              BIT(1)
  94 #define ANA_PWR_DOWN            BIT(2)
  95 #define V2I_VCO_RATIO(x)        ((x) << 7)
  96 #define R_ROTATE_90             (0x0 << 10)
  97 #define R_ROTATE_0              BIT(10)
  98 #define MODE_TEST_EN            BIT(11)
  99 #define ANA_TEST_DC_CTRL(x)     ((x) << 12)
 100
 101 static const u32 phy_berlin_pll_dividers[] = {
 102         /* Berlin 2 */
 103         CLK_REF_DIV(0x6) | FEEDBACK_CLK_DIV(0x55),
 104         /* Berlin 2CD/Q */
 105         CLK_REF_DIV(0xc) | FEEDBACK_CLK_DIV(0x54),
 106 };
 107
 108 struct phy_berlin_usb_priv {
 109         void __iomem            *base;
 110         struct reset_control    *rst_ctrl;
 111         u32                     pll_divider;
 112 };
 113
 114 static int phy_berlin_usb_power_on(struct phy *phy)
 115 {
 116         struct phy_berlin_usb_priv *priv = phy_get_drvdata(phy);
 117
 118         reset_control_reset(priv->rst_ctrl);
 119
 120         writel(priv->pll_divider,
 121                priv->base + USB_PHY_PLL);
 122         writel(CLK_STABLE | PLL_CTRL_REG | PHASE_OFF_TOL_250 | KVC0_REG_CTRL |
 123                CLK_BLK_EN, priv->base + USB_PHY_PLL_CONTROL);
 124         writel(V2I_VCO_RATIO(0x5) | R_ROTATE_0 | ANA_TEST_DC_CTRL(0x5),
 125                priv->base + USB_PHY_ANALOG);
 126         writel(PHASE_FREEZE_DLY_4_CL | ACK_LENGTH_16_CL | SQ_LENGTH_12 |
 127                DISCON_THRESHOLD_270 | SQ_THRESHOLD(0xa) | LPF_COEF(0x2) |
 128                INTPL_CUR_30, priv->base + USB_PHY_RX_CTRL);
 129
 130         writel(TX_VDD12_13 | TX_OUT_AMP(0x3), priv->base + USB_PHY_TX_CTRL1);
 131         writel(EXT_HS_RCAL_EN | IMPCAL_VTH_DIV(0x3) | EXT_RS_RCAL_DIV(0x4),
 132                priv->base + USB_PHY_TX_CTRL0);
 133
 134         writel(EXT_HS_RCAL_EN | IMPCAL_VTH_DIV(0x3) | EXT_RS_RCAL_DIV(0x4) |
 135                EXT_FS_RCAL_DIV(0x2), priv->base + USB_PHY_TX_CTRL0);
 136
 137         writel(EXT_HS_RCAL_EN | IMPCAL_VTH_DIV(0x3) | EXT_RS_RCAL_DIV(0x4),
 138                priv->base + USB_PHY_TX_CTRL0);
 139         writel(TX_CHAN_CTRL_REG(0xf) | DRV_SLEWRATE(0x3) | IMP_CAL_FS_HS_DLY_3 |
 140                FS_DRV_EN_MASK(0xd), priv->base + USB_PHY_TX_CTRL2);
 141
 142         return 0;
 143 }
 144
 145 static const struct phy_ops phy_berlin_usb_ops = {
 146         .power_on       = phy_berlin_usb_power_on,
 147         .owner          = THIS_MODULE,
 148 };
 149
 150 static const struct of_device_id phy_berlin_usb_of_match[] = {
 151         {
 152                 .compatible = "marvell,berlin2-usb-phy",
 153                 .data = &phy_berlin_pll_dividers[0],
 154         },
 155         {
 156                 .compatible = "marvell,berlin2cd-usb-phy",
 157                 .data = &phy_berlin_pll_dividers[1],
 158         },
 159         { },
 160 };
 161 MODULE_DEVICE_TABLE(of, phy_berlin_usb_of_match);
 162
 163 static int phy_berlin_usb_probe(struct platform_device *pdev)
 164 {
 165         const struct of_device_id *match =
 166                 of_match_device(phy_berlin_usb_of_match, &pdev->dev);
 167         struct phy_berlin_usb_priv *priv;
 168         struct resource *res;
 169         struct phy *phy;
 170         struct phy_provider *phy_provider;
 171
 172         priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
 173         if (!priv)
 174                 return -ENOMEM;
 175
 176         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 177         priv->base = devm_ioremap_resource(&pdev->dev, res);
 178         if (IS_ERR(priv->base))
 179                 return PTR_ERR(priv->base);
 180
 181         priv->rst_ctrl = devm_reset_control_get(&pdev->dev, NULL);
 182         if (IS_ERR(priv->rst_ctrl))
 183                 return PTR_ERR(priv->rst_ctrl);
 184
 185         priv->pll_divider = *((u32 *)match->data);
 186
 187         phy = devm_phy_create(&pdev->dev, NULL, &phy_berlin_usb_ops);
 188         if (IS_ERR(phy)) {
 189                 dev_err(&pdev->dev, "failed to create PHY\n");
 190                 return PTR_ERR(phy);
 191         }
 192
 193         phy_set_drvdata(phy, priv);
 194
 195         phy_provider =
 196                 devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate);
 197         return PTR_ERR_OR_ZERO(phy_provider);
 198 }
 199
 200 static struct platform_driver phy_berlin_usb_driver = {
 201         .probe  = phy_berlin_usb_probe,
 202         .driver = {
 203                 .name           = "phy-berlin-usb",
 204                 .of_match_table = phy_berlin_usb_of_match,
 205         },
 206 };
 207 module_platform_driver(phy_berlin_usb_driver);
 208
 209 MODULE_AUTHOR("Antoine Tenart <antoine.tenart@free-electrons.com>");
 210 MODULE_DESCRIPTION("Marvell Berlin PHY driver for USB");
 211 MODULE_LICENSE("GPL");