2 * Copyright (c) 2014 Redpine Signals Inc.
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 #ifndef __RSI_MGMT_H__
18 #define __RSI_MGMT_H__
20 #include <linux/sort.h>
21 #include "rsi_boot_params.h"
24 #define MAX_MGMT_PKT_SIZE 512
25 #define RSI_NEEDED_HEADROOM 80
26 #define RSI_RCV_BUFFER_LEN 2000
28 #define RSI_11B_MODE 0
29 #define RSI_11G_MODE BIT(7)
33 #define WMM_SHORT_SLOT_TIME 9
34 #define SIFS_DURATION 16
36 #define KEY_TYPE_CLEAR 0
37 #define RSI_PAIRWISE_KEY 1
38 #define RSI_GROUP_KEY 2
40 /* EPPROM_READ_ADDRESS */
41 #define WLAN_MAC_EEPROM_ADDR 40
42 #define WLAN_MAC_MAGIC_WORD_LEN 0x01
43 #define WLAN_HOST_MODE_LEN 0x04
44 #define WLAN_FW_VERSION_LEN 0x08
45 #define MAGIC_WORD 0x5A
46 #define WLAN_EEPROM_RFTYPE_ADDR 424
48 /* Receive Frame Types */
49 #define TA_CONFIRM_TYPE 0x01
50 #define RX_DOT11_MGMT 0x02
51 #define TX_STATUS_IND 0x04
52 #define BEACON_EVENT_IND 0x08
53 #define PROBEREQ_CONFIRM 2
54 #define CARD_READY_IND 0x00
56 #define RSI_DELETE_PEER 0x0
57 #define RSI_ADD_PEER 0x1
58 #define START_AMPDU_AGGR 0x1
59 #define STOP_AMPDU_AGGR 0x0
60 #define INTERNAL_MGMT_PKT 0x99
62 #define PUT_BBP_RESET 0
63 #define BBP_REG_WRITE 0
64 #define RF_RESET_ENABLE BIT(3)
65 #define RATE_INFO_ENABLE BIT(0)
66 #define MORE_DATA_PRESENT BIT(1)
67 #define RSI_BROADCAST_PKT BIT(9)
68 #define RSI_DESC_REQUIRE_CFM_TO_HOST BIT(2)
69 #define RSI_ADD_DELTA_TSF_VAP_ID BIT(3)
70 #define RSI_FETCH_RETRY_CNT_FRM_HST BIT(4)
71 #define RSI_QOS_ENABLE BIT(12)
72 #define RSI_REKEY_PURPOSE BIT(13)
73 #define RSI_ENCRYPT_PKT BIT(15)
74 #define RSI_SET_PS_ENABLE BIT(12)
76 #define RSI_CMDDESC_40MHZ BIT(4)
77 #define RSI_CMDDESC_UPPER_20_ENABLE BIT(5)
78 #define RSI_CMDDESC_LOWER_20_ENABLE BIT(6)
79 #define RSI_CMDDESC_FULL_40_ENABLE (BIT(5) | BIT(6))
80 #define UPPER_20_ENABLE (0x2 << 12)
81 #define LOWER_20_ENABLE (0x4 << 12)
82 #define FULL40M_ENABLE 0x6
84 #define RSI_LMAC_CLOCK_80MHZ 0x1
85 #define RSI_ENABLE_40MHZ (0x1 << 3)
86 #define ENABLE_SHORTGI_RATE BIT(9)
88 #define RX_BA_INDICATION 1
91 #define RSI_IFTYPE_STATION 0
93 #define STD_RATE_MCS7 0x07
94 #define STD_RATE_MCS6 0x06
95 #define STD_RATE_MCS5 0x05
96 #define STD_RATE_MCS4 0x04
97 #define STD_RATE_MCS3 0x03
98 #define STD_RATE_MCS2 0x02
99 #define STD_RATE_MCS1 0x01
100 #define STD_RATE_MCS0 0x00
101 #define STD_RATE_54 0x6c
102 #define STD_RATE_48 0x60
103 #define STD_RATE_36 0x48
104 #define STD_RATE_24 0x30
105 #define STD_RATE_18 0x24
106 #define STD_RATE_12 0x18
107 #define STD_RATE_11 0x16
108 #define STD_RATE_09 0x12
109 #define STD_RATE_06 0x0C
110 #define STD_RATE_5_5 0x0B
111 #define STD_RATE_02 0x04
112 #define STD_RATE_01 0x02
114 #define RSI_RF_TYPE 1
115 #define RSI_RATE_00 0x00
116 #define RSI_RATE_1 0x0
117 #define RSI_RATE_2 0x2
118 #define RSI_RATE_5_5 0x4
119 #define RSI_RATE_11 0x6
120 #define RSI_RATE_6 0x8b
121 #define RSI_RATE_9 0x8f
122 #define RSI_RATE_12 0x8a
123 #define RSI_RATE_18 0x8e
124 #define RSI_RATE_24 0x89
125 #define RSI_RATE_36 0x8d
126 #define RSI_RATE_48 0x88
127 #define RSI_RATE_54 0x8c
128 #define RSI_RATE_MCS0 0x100
129 #define RSI_RATE_MCS1 0x101
130 #define RSI_RATE_MCS2 0x102
131 #define RSI_RATE_MCS3 0x103
132 #define RSI_RATE_MCS4 0x104
133 #define RSI_RATE_MCS5 0x105
134 #define RSI_RATE_MCS6 0x106
135 #define RSI_RATE_MCS7 0x107
136 #define RSI_RATE_MCS7_SG 0x307
137 #define RSI_RATE_AUTO 0xffff
142 #define EP_2GHZ_20MHZ 0
143 #define EP_2GHZ_40MHZ 1
144 #define EP_5GHZ_20MHZ 2
145 #define EP_5GHZ_40MHZ 3
147 #define SIFS_TX_11N_VALUE 580
148 #define SIFS_TX_11B_VALUE 346
149 #define SHORT_SLOT_VALUE 360
150 #define LONG_SLOT_VALUE 640
151 #define OFDM_ACK_TOUT_VALUE 2720
152 #define CCK_ACK_TOUT_VALUE 9440
153 #define LONG_PREAMBLE 0x0000
154 #define SHORT_PREAMBLE 0x0001
156 #define RSI_SUPP_FILTERS (FIF_ALLMULTI | FIF_PROBE_REQ |\
157 FIF_BCN_PRBRESP_PROMISC)
159 #define ANTENNA_SEL_INT 0x02 /* RF_OUT_2 / Integerated */
160 #define ANTENNA_SEL_UFL 0x03 /* RF_OUT_1 / U.FL */
161 #define ANTENNA_MASK_VALUE 0x00ff
162 #define ANTENNA_SEL_TYPE 1
164 /* Rx filter word definitions */
165 #define PROMISCOUS_MODE BIT(0)
166 #define ALLOW_DATA_ASSOC_PEER BIT(1)
167 #define ALLOW_MGMT_ASSOC_PEER BIT(2)
168 #define ALLOW_CTRL_ASSOC_PEER BIT(3)
169 #define DISALLOW_BEACONS BIT(4)
170 #define ALLOW_CONN_PEER_MGMT_WHILE_BUF_FULL BIT(5)
171 #define DISALLOW_BROADCAST_DATA BIT(6)
173 #define RSI_MPDU_DENSITY 0x8
174 #define RSI_CHAN_RADAR BIT(7)
175 #define RSI_BEACON_INTERVAL 200
176 #define RSI_DTIM_COUNT 2
178 #define RSI_PS_DISABLE_IND BIT(15)
179 #define RSI_PS_ENABLE 1
180 #define RSI_PS_DISABLE 0
181 #define RSI_DEEP_SLEEP 1
182 #define RSI_CONNECTED_SLEEP 2
183 #define RSI_SLEEP_REQUEST 1
184 #define RSI_WAKEUP_REQUEST 2
186 #define RSI_IEEE80211_UAPSD_QUEUES \
187 (IEEE80211_WMM_IE_STA_QOSINFO_AC_VO | \
188 IEEE80211_WMM_IE_STA_QOSINFO_AC_VI | \
189 IEEE80211_WMM_IE_STA_QOSINFO_AC_BE | \
190 IEEE80211_WMM_IE_STA_QOSINFO_AC_BK)
192 #define RSI_DATA_DESC_MAC_BBP_INFO BIT(0)
193 #define RSI_DATA_DESC_NO_ACK_IND BIT(9)
194 #define RSI_DATA_DESC_QOS_EN BIT(12)
195 #define RSI_DATA_DESC_NORMAL_FRAME 0x00
196 #define RSI_DATA_DESC_DTIM_BEACON_GATED_FRAME BIT(10)
197 #define RSI_DATA_DESC_BEACON_FRAME BIT(11)
198 #define RSI_DATA_DESC_DTIM_BEACON (BIT(10) | BIT(11))
199 #define RSI_DATA_DESC_INSERT_TSF BIT(15)
200 #define RSI_DATA_DESC_INSERT_SEQ_NO BIT(2)
217 extern struct ieee80211_rate rsi_rates[12];
218 extern const u16 rsi_mcsrates[8];
220 enum sta_notify_events {
229 /* Send Frames Types */
230 enum cmd_frame_type {
234 BB_PROG_VALUES_REQUEST,
235 RF_PROG_VALUES_REQUEST,
236 WAKEUP_SLEEP_REQUEST,
243 BOOTUP_PARAMS_REQUEST,
251 BB_BUF_PROG_VALUES_REQ,
257 ANT_SEL_FRAME = 0x20,
258 VAP_DYNAMIC_UPDATE = 0x27,
259 COMMON_DEV_CONFIG = 0x28,
260 RADIO_PARAMS_UPDATE = 0x29
263 struct rsi_mac_frame {
267 #define PWR_SAVE_WAKEUP_IND BIT(0)
268 #define TCP_CHECK_SUM_OFFLOAD BIT(1)
269 #define CONFIRM_REQUIRED_TO_HOST BIT(2)
270 #define ADD_DELTA_TSF BIT(3)
271 #define FETCH_RETRY_CNT_FROM_HOST_DESC BIT(4)
272 #define EOSP_INDICATION BIT(5)
273 #define REQUIRE_TSF_SYNC_CONFIRM BIT(6)
274 #define ENCAP_MGMT_PKT BIT(7)
275 #define DESC_IMMEDIATE_WAKEUP BIT(15)
277 struct rsi_cmd_desc_dword0 {
283 struct rsi_cmd_desc_dword1 {
289 struct rsi_cmd_desc_dword2 {
290 __le32 pkt_info; /* Packet specific data */
293 struct rsi_cmd_desc_dword3 {
299 struct rsi_cmd_desc {
300 struct rsi_cmd_desc_dword0 desc_dword0;
301 struct rsi_cmd_desc_dword1 desc_dword1;
302 struct rsi_cmd_desc_dword2 desc_dword2;
303 struct rsi_cmd_desc_dword3 desc_dword3;
306 struct rsi_boot_params {
308 struct bootup_params bootup_params;
311 struct rsi_peer_notify {
312 struct rsi_cmd_desc desc;
320 /* Aggregation params flags */
321 #define RSI_AGGR_PARAMS_TID_MASK 0xf
322 #define RSI_AGGR_PARAMS_START BIT(4)
323 #define RSI_AGGR_PARAMS_RX_AGGR BIT(5)
324 struct rsi_aggr_params {
325 struct rsi_cmd_desc_dword0 desc_dword0;
326 struct rsi_cmd_desc_dword0 desc_dword1;
334 struct rsi_bb_rf_prog {
335 struct rsi_cmd_desc_dword0 desc_dword0;
346 struct rsi_chan_config {
347 struct rsi_cmd_desc_dword0 desc_dword0;
348 struct rsi_cmd_desc_dword1 desc_dword1;
350 u8 antenna_gain_offset_2g;
351 u8 antenna_gain_offset_5g;
358 struct rsi_vap_caps {
359 struct rsi_cmd_desc_dword0 desc_dword0;
370 __le16 keep_alive_period;
374 __le16 frag_threshold;
375 __le16 rts_threshold;
376 __le32 default_mgmt_rate;
377 __le16 default_ctrl_rate;
378 __le16 ctrl_rate_flags;
379 __le32 default_data_rate;
380 __le16 beacon_interval;
382 __le16 beacon_miss_threshold;
385 struct rsi_ant_sel_frame {
386 struct rsi_cmd_desc_dword0 desc_dword0;
394 struct rsi_dynamic_s {
395 struct rsi_cmd_desc_dword0 desc_dword0;
396 struct rsi_cmd_desc_dword1 desc_dword1;
397 struct rsi_cmd_desc_dword2 desc_dword2;
398 struct rsi_cmd_desc_dword3 desc_dword3;
402 __le16 keep_alive_period;
406 /* Key descriptor flags */
407 #define RSI_KEY_TYPE_BROADCAST BIT(1)
408 #define RSI_WEP_KEY BIT(2)
409 #define RSI_WEP_KEY_104 BIT(3)
410 #define RSI_CIPHER_WPA BIT(4)
411 #define RSI_CIPHER_TKIP BIT(5)
412 #define RSI_KEY_MODE_AP BIT(7)
413 #define RSI_PROTECT_DATA_FRAMES BIT(13)
414 #define RSI_KEY_ID_MASK 0xC0
415 #define RSI_KEY_ID_OFFSET 14
417 struct rsi_cmd_desc_dword0 desc_dword0;
418 struct rsi_cmd_desc_dword1 desc_dword1;
428 struct rsi_auto_rate {
429 struct rsi_cmd_desc desc;
430 __le16 failure_limit;
431 __le16 initial_boundary;
432 __le16 max_threshold_limt;
433 __le16 num_supported_rates;
435 __le16 moderate_rate_inx;
436 __le16 collision_tolerance;
437 __le16 supported_rates[40];
440 #define QUIET_INFO_VALID BIT(0)
441 #define QUIET_ENABLE BIT(1)
442 struct rsi_block_unblock_data {
443 struct rsi_cmd_desc_dword0 desc_dword0;
447 __le16 block_q_bitmap;
448 __le16 unblock_q_bitmap;
450 __le16 flush_q_bitmap;
454 __le16 cont_win_min_q;
455 __le16 cont_win_max_q;
460 struct rsi_radio_caps {
461 struct rsi_cmd_desc_dword0 desc_dword0;
462 struct rsi_cmd_desc_dword0 desc_dword1;
469 struct qos_params qos_params[MAX_HW_QUEUES];
472 __le16 gcpd_per_rate[20];
476 __le16 ofdm_ack_tout;
478 __le16 preamble_type;
482 #define RSI_GPIO_MOTION_SENSOR_ULP_WAKEUP BIT(0)
483 #define RSI_GPIO_SLEEP_IND_FROM_DEVICE BIT(1)
484 #define RSI_GPIO_2_ULP BIT(2)
485 #define RSI_GPIO_PUSH_BUTTON_ULP_WAKEUP BIT(3)
488 #define RSI_GPIO_0_PSPI_CSN_0 BIT(0)
489 #define RSI_GPIO_1_PSPI_CSN_1 BIT(1)
490 #define RSI_GPIO_2_HOST_WAKEUP_INTR BIT(2)
491 #define RSI_GPIO_3_PSPI_DATA_0 BIT(3)
492 #define RSI_GPIO_4_PSPI_DATA_1 BIT(4)
493 #define RSI_GPIO_5_PSPI_DATA_2 BIT(5)
494 #define RSI_GPIO_6_PSPI_DATA_3 BIT(6)
495 #define RSI_GPIO_7_I2C_SCL BIT(7)
496 #define RSI_GPIO_8_I2C_SDA BIT(8)
497 #define RSI_GPIO_9_UART1_RX BIT(9)
498 #define RSI_GPIO_10_UART1_TX BIT(10)
499 #define RSI_GPIO_11_UART1_RTS_I2S_CLK BIT(11)
500 #define RSI_GPIO_12_UART1_CTS_I2S_WS BIT(12)
501 #define RSI_GPIO_13_DBG_UART_RX_I2S_DIN BIT(13)
502 #define RSI_GPIO_14_DBG_UART_RX_I2S_DOUT BIT(14)
503 #define RSI_GPIO_15_LP_WAKEUP_BOOT_BYPASS BIT(15)
504 #define RSI_GPIO_16_LED_0 BIT(16)
505 #define RSI_GPIO_17_BTCOEX_WLAN_ACT_EXT_ANT_SEL BIT(17)
506 #define RSI_GPIO_18_BTCOEX_BT_PRIO_EXT_ANT_SEL BIT(18)
507 #define RSI_GPIO_19_BTCOEX_BT_ACT_EXT_ON_OFF BIT(19)
508 #define RSI_GPIO_20_RF_RESET BIT(20)
509 #define RSI_GPIO_21_SLEEP_IND_FROM_DEVICE BIT(21)
511 #define RSI_UNUSED_SOC_GPIO_BITMAP (RSI_GPIO_9_UART1_RX | \
512 RSI_GPIO_10_UART1_TX | \
513 RSI_GPIO_11_UART1_RTS_I2S_CLK | \
514 RSI_GPIO_12_UART1_CTS_I2S_WS | \
515 RSI_GPIO_13_DBG_UART_RX_I2S_DIN | \
516 RSI_GPIO_14_DBG_UART_RX_I2S_DOUT | \
517 RSI_GPIO_15_LP_WAKEUP_BOOT_BYPASS | \
518 RSI_GPIO_17_BTCOEX_WLAN_ACT_EXT_ANT_SEL | \
519 RSI_GPIO_18_BTCOEX_BT_PRIO_EXT_ANT_SEL | \
520 RSI_GPIO_19_BTCOEX_BT_ACT_EXT_ON_OFF | \
521 RSI_GPIO_21_SLEEP_IND_FROM_DEVICE)
523 #define RSI_UNUSED_ULP_GPIO_BITMAP (RSI_GPIO_MOTION_SENSOR_ULP_WAKEUP | \
524 RSI_GPIO_SLEEP_IND_FROM_DEVICE | \
526 RSI_GPIO_PUSH_BUTTON_ULP_WAKEUP);
527 struct rsi_config_vals {
534 u8 sleep_config_params; /* 0 for no handshake,
535 * 1 for GPIO based handshake,
539 __le32 unused_soc_gpio_bitmap;
540 u8 ext_pa_or_bt_coex_en;
544 u8 zigbee_rf_pwr_mode;
551 /* Packet info flags */
552 #define RSI_EEPROM_HDR_SIZE_OFFSET 8
553 #define RSI_EEPROM_HDR_SIZE_MASK 0x300
554 #define RSI_EEPROM_LEN_OFFSET 20
555 #define RSI_EEPROM_LEN_MASK 0xFFF00000
557 struct rsi_eeprom_read_frame {
562 __le32 eeprom_offset;
567 struct rsi_request_ps {
568 struct rsi_cmd_desc desc;
569 struct ps_sleep_params ps_sleep;
572 u8 ps_uapsd_wakeup_period;
574 __le32 ps_listen_interval;
575 __le32 ps_dtim_interval_duration;
576 __le16 ps_num_dtim_intervals;
579 static inline u32 rsi_get_queueno(u8 *addr, u16 offset)
581 return (le16_to_cpu(*(__le16 *)&addr[offset]) & 0x7000) >> 12;
584 static inline u32 rsi_get_length(u8 *addr, u16 offset)
586 return (le16_to_cpu(*(__le16 *)&addr[offset])) & 0x0fff;
589 static inline u8 rsi_get_extended_desc(u8 *addr, u16 offset)
591 return le16_to_cpu(*((__le16 *)&addr[offset + 4])) & 0x00ff;
594 static inline u8 rsi_get_rssi(u8 *addr)
596 return *(u8 *)(addr + FRAME_DESC_SZ);
599 static inline u8 rsi_get_channel(u8 *addr)
601 return *(char *)(addr + 15);
604 static inline void rsi_set_len_qno(__le16 *addr, u16 len, u8 qno)
606 *addr = cpu_to_le16(len | ((qno & 7) << 12));
609 int rsi_mgmt_pkt_recv(struct rsi_common *common, u8 *msg);
610 int rsi_set_vap_capabilities(struct rsi_common *common, enum opmode mode,
611 u8 *mac_addr, u8 vap_id, u8 vap_status);
612 int rsi_send_aggregation_params_frame(struct rsi_common *common, u16 tid,
613 u16 ssn, u8 buf_size, u8 event,
615 int rsi_hal_load_key(struct rsi_common *common, u8 *data, u16 key_len,
616 u8 key_type, u8 key_id, u32 cipher, s16 sta_id);
617 int rsi_set_channel(struct rsi_common *common,
618 struct ieee80211_channel *channel);
619 int rsi_send_vap_dynamic_update(struct rsi_common *common);
620 int rsi_send_block_unblock_frame(struct rsi_common *common, bool event);
621 void rsi_inform_bss_status(struct rsi_common *common, enum opmode opmode,
622 u8 status, const u8 *addr, u8 qos_enable, u16 aid,
623 struct ieee80211_sta *sta, u16 sta_id);
624 void rsi_indicate_pkt_to_os(struct rsi_common *common, struct sk_buff *skb);
625 int rsi_mac80211_attach(struct rsi_common *common);
626 void rsi_indicate_tx_status(struct rsi_hw *common, struct sk_buff *skb,
628 bool rsi_is_cipher_wep(struct rsi_common *common);
629 void rsi_core_qos_processor(struct rsi_common *common);
630 void rsi_core_xmit(struct rsi_common *common, struct sk_buff *skb);
631 int rsi_send_mgmt_pkt(struct rsi_common *common, struct sk_buff *skb);
632 int rsi_send_data_pkt(struct rsi_common *common, struct sk_buff *skb);
633 int rsi_band_check(struct rsi_common *common);
634 int rsi_send_rx_filter_frame(struct rsi_common *common, u16 rx_filter_word);
635 int rsi_send_radio_params_update(struct rsi_common *common);
636 int rsi_set_antenna(struct rsi_common *common, u8 antenna);