Linux-libre 5.7.5-gnu
[librecmc/linux-libre.git] / drivers / net / wireless / realtek / rtw88 / main.c
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019  Realtek Corporation
3  */
4
5 #include "main.h"
6 #include "regd.h"
7 #include "fw.h"
8 #include "ps.h"
9 #include "sec.h"
10 #include "mac.h"
11 #include "coex.h"
12 #include "phy.h"
13 #include "reg.h"
14 #include "efuse.h"
15 #include "tx.h"
16 #include "debug.h"
17 #include "bf.h"
18
19 unsigned int rtw_fw_lps_deep_mode;
20 EXPORT_SYMBOL(rtw_fw_lps_deep_mode);
21 bool rtw_bf_support = true;
22 unsigned int rtw_debug_mask;
23 EXPORT_SYMBOL(rtw_debug_mask);
24
25 module_param_named(lps_deep_mode, rtw_fw_lps_deep_mode, uint, 0644);
26 module_param_named(support_bf, rtw_bf_support, bool, 0644);
27 module_param_named(debug_mask, rtw_debug_mask, uint, 0644);
28
29 MODULE_PARM_DESC(lps_deep_mode, "Deeper PS mode. If 0, deep PS is disabled");
30 MODULE_PARM_DESC(support_bf, "Set Y to enable beamformee support");
31 MODULE_PARM_DESC(debug_mask, "Debugging mask");
32
33 static struct ieee80211_channel rtw_channeltable_2g[] = {
34         {.center_freq = 2412, .hw_value = 1,},
35         {.center_freq = 2417, .hw_value = 2,},
36         {.center_freq = 2422, .hw_value = 3,},
37         {.center_freq = 2427, .hw_value = 4,},
38         {.center_freq = 2432, .hw_value = 5,},
39         {.center_freq = 2437, .hw_value = 6,},
40         {.center_freq = 2442, .hw_value = 7,},
41         {.center_freq = 2447, .hw_value = 8,},
42         {.center_freq = 2452, .hw_value = 9,},
43         {.center_freq = 2457, .hw_value = 10,},
44         {.center_freq = 2462, .hw_value = 11,},
45         {.center_freq = 2467, .hw_value = 12,},
46         {.center_freq = 2472, .hw_value = 13,},
47         {.center_freq = 2484, .hw_value = 14,},
48 };
49
50 static struct ieee80211_channel rtw_channeltable_5g[] = {
51         {.center_freq = 5180, .hw_value = 36,},
52         {.center_freq = 5200, .hw_value = 40,},
53         {.center_freq = 5220, .hw_value = 44,},
54         {.center_freq = 5240, .hw_value = 48,},
55         {.center_freq = 5260, .hw_value = 52,},
56         {.center_freq = 5280, .hw_value = 56,},
57         {.center_freq = 5300, .hw_value = 60,},
58         {.center_freq = 5320, .hw_value = 64,},
59         {.center_freq = 5500, .hw_value = 100,},
60         {.center_freq = 5520, .hw_value = 104,},
61         {.center_freq = 5540, .hw_value = 108,},
62         {.center_freq = 5560, .hw_value = 112,},
63         {.center_freq = 5580, .hw_value = 116,},
64         {.center_freq = 5600, .hw_value = 120,},
65         {.center_freq = 5620, .hw_value = 124,},
66         {.center_freq = 5640, .hw_value = 128,},
67         {.center_freq = 5660, .hw_value = 132,},
68         {.center_freq = 5680, .hw_value = 136,},
69         {.center_freq = 5700, .hw_value = 140,},
70         {.center_freq = 5745, .hw_value = 149,},
71         {.center_freq = 5765, .hw_value = 153,},
72         {.center_freq = 5785, .hw_value = 157,},
73         {.center_freq = 5805, .hw_value = 161,},
74         {.center_freq = 5825, .hw_value = 165,
75          .flags = IEEE80211_CHAN_NO_HT40MINUS},
76 };
77
78 static struct ieee80211_rate rtw_ratetable[] = {
79         {.bitrate = 10, .hw_value = 0x00,},
80         {.bitrate = 20, .hw_value = 0x01,},
81         {.bitrate = 55, .hw_value = 0x02,},
82         {.bitrate = 110, .hw_value = 0x03,},
83         {.bitrate = 60, .hw_value = 0x04,},
84         {.bitrate = 90, .hw_value = 0x05,},
85         {.bitrate = 120, .hw_value = 0x06,},
86         {.bitrate = 180, .hw_value = 0x07,},
87         {.bitrate = 240, .hw_value = 0x08,},
88         {.bitrate = 360, .hw_value = 0x09,},
89         {.bitrate = 480, .hw_value = 0x0a,},
90         {.bitrate = 540, .hw_value = 0x0b,},
91 };
92
93 u16 rtw_desc_to_bitrate(u8 desc_rate)
94 {
95         struct ieee80211_rate rate;
96
97         if (WARN(desc_rate >= ARRAY_SIZE(rtw_ratetable), "invalid desc rate\n"))
98                 return 0;
99
100         rate = rtw_ratetable[desc_rate];
101
102         return rate.bitrate;
103 }
104
105 static struct ieee80211_supported_band rtw_band_2ghz = {
106         .band = NL80211_BAND_2GHZ,
107
108         .channels = rtw_channeltable_2g,
109         .n_channels = ARRAY_SIZE(rtw_channeltable_2g),
110
111         .bitrates = rtw_ratetable,
112         .n_bitrates = ARRAY_SIZE(rtw_ratetable),
113
114         .ht_cap = {0},
115         .vht_cap = {0},
116 };
117
118 static struct ieee80211_supported_band rtw_band_5ghz = {
119         .band = NL80211_BAND_5GHZ,
120
121         .channels = rtw_channeltable_5g,
122         .n_channels = ARRAY_SIZE(rtw_channeltable_5g),
123
124         /* 5G has no CCK rates */
125         .bitrates = rtw_ratetable + 4,
126         .n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4,
127
128         .ht_cap = {0},
129         .vht_cap = {0},
130 };
131
132 struct rtw_watch_dog_iter_data {
133         struct rtw_dev *rtwdev;
134         struct rtw_vif *rtwvif;
135 };
136
137 static void rtw_dynamic_csi_rate(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif)
138 {
139         struct rtw_bf_info *bf_info = &rtwdev->bf_info;
140         struct rtw_chip_info *chip = rtwdev->chip;
141         u8 fix_rate_enable = 0;
142         u8 new_csi_rate_idx;
143
144         if (rtwvif->bfee.role != RTW_BFEE_SU &&
145             rtwvif->bfee.role != RTW_BFEE_MU)
146                 return;
147
148         chip->ops->cfg_csi_rate(rtwdev, rtwdev->dm_info.min_rssi,
149                                 bf_info->cur_csi_rpt_rate,
150                                 fix_rate_enable, &new_csi_rate_idx);
151
152         if (new_csi_rate_idx != bf_info->cur_csi_rpt_rate)
153                 bf_info->cur_csi_rpt_rate = new_csi_rate_idx;
154 }
155
156 static void rtw_vif_watch_dog_iter(void *data, u8 *mac,
157                                    struct ieee80211_vif *vif)
158 {
159         struct rtw_watch_dog_iter_data *iter_data = data;
160         struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
161
162         if (vif->type == NL80211_IFTYPE_STATION)
163                 if (vif->bss_conf.assoc)
164                         iter_data->rtwvif = rtwvif;
165
166         rtw_dynamic_csi_rate(iter_data->rtwdev, rtwvif);
167
168         rtwvif->stats.tx_unicast = 0;
169         rtwvif->stats.rx_unicast = 0;
170         rtwvif->stats.tx_cnt = 0;
171         rtwvif->stats.rx_cnt = 0;
172 }
173
174 /* process TX/RX statistics periodically for hardware,
175  * the information helps hardware to enhance performance
176  */
177 static void rtw_watch_dog_work(struct work_struct *work)
178 {
179         struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
180                                               watch_dog_work.work);
181         struct rtw_traffic_stats *stats = &rtwdev->stats;
182         struct rtw_watch_dog_iter_data data = {};
183         bool busy_traffic = test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
184         bool ps_active;
185
186         mutex_lock(&rtwdev->mutex);
187
188         if (!test_bit(RTW_FLAG_RUNNING, rtwdev->flags))
189                 goto unlock;
190
191         ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
192                                      RTW_WATCH_DOG_DELAY_TIME);
193
194         if (rtwdev->stats.tx_cnt > 100 || rtwdev->stats.rx_cnt > 100)
195                 set_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
196         else
197                 clear_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags);
198
199         if (busy_traffic != test_bit(RTW_FLAG_BUSY_TRAFFIC, rtwdev->flags))
200                 rtw_coex_wl_status_change_notify(rtwdev);
201
202         if (stats->tx_cnt > RTW_LPS_THRESHOLD ||
203             stats->rx_cnt > RTW_LPS_THRESHOLD)
204                 ps_active = true;
205         else
206                 ps_active = false;
207
208         ewma_tp_add(&stats->tx_ewma_tp,
209                     (u32)(stats->tx_unicast >> RTW_TP_SHIFT));
210         ewma_tp_add(&stats->rx_ewma_tp,
211                     (u32)(stats->rx_unicast >> RTW_TP_SHIFT));
212         stats->tx_throughput = ewma_tp_read(&stats->tx_ewma_tp);
213         stats->rx_throughput = ewma_tp_read(&stats->rx_ewma_tp);
214
215         /* reset tx/rx statictics */
216         stats->tx_unicast = 0;
217         stats->rx_unicast = 0;
218         stats->tx_cnt = 0;
219         stats->rx_cnt = 0;
220
221         if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
222                 goto unlock;
223
224         /* make sure BB/RF is working for dynamic mech */
225         rtw_leave_lps(rtwdev);
226
227         rtw_phy_dynamic_mechanism(rtwdev);
228
229         data.rtwdev = rtwdev;
230         /* use atomic version to avoid taking local->iflist_mtx mutex */
231         rtw_iterate_vifs_atomic(rtwdev, rtw_vif_watch_dog_iter, &data);
232
233         /* fw supports only one station associated to enter lps, if there are
234          * more than two stations associated to the AP, then we can not enter
235          * lps, because fw does not handle the overlapped beacon interval
236          *
237          * mac80211 should iterate vifs and determine if driver can enter
238          * ps by passing IEEE80211_CONF_PS to us, all we need to do is to
239          * get that vif and check if device is having traffic more than the
240          * threshold.
241          */
242         if (rtwdev->ps_enabled && data.rtwvif && !ps_active)
243                 rtw_enter_lps(rtwdev, data.rtwvif->port);
244
245         rtwdev->watch_dog_cnt++;
246
247 unlock:
248         mutex_unlock(&rtwdev->mutex);
249 }
250
251 static void rtw_c2h_work(struct work_struct *work)
252 {
253         struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work);
254         struct sk_buff *skb, *tmp;
255
256         skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) {
257                 skb_unlink(skb, &rtwdev->c2h_queue);
258                 rtw_fw_c2h_cmd_handle(rtwdev, skb);
259                 dev_kfree_skb_any(skb);
260         }
261 }
262
263 struct rtw_txq_ba_iter_data {
264 };
265
266 static void rtw_txq_ba_iter(void *data, struct ieee80211_sta *sta)
267 {
268         struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv;
269         int ret;
270         u8 tid;
271
272         tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS);
273         while (tid != IEEE80211_NUM_TIDS) {
274                 clear_bit(tid, si->tid_ba);
275                 ret = ieee80211_start_tx_ba_session(sta, tid, 0);
276                 if (ret == -EINVAL) {
277                         struct ieee80211_txq *txq;
278                         struct rtw_txq *rtwtxq;
279
280                         txq = sta->txq[tid];
281                         rtwtxq = (struct rtw_txq *)txq->drv_priv;
282                         set_bit(RTW_TXQ_BLOCK_BA, &rtwtxq->flags);
283                 }
284
285                 tid = find_first_bit(si->tid_ba, IEEE80211_NUM_TIDS);
286         }
287 }
288
289 static void rtw_txq_ba_work(struct work_struct *work)
290 {
291         struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, ba_work);
292         struct rtw_txq_ba_iter_data data;
293
294         rtw_iterate_stas_atomic(rtwdev, rtw_txq_ba_iter, &data);
295 }
296
297 void rtw_get_channel_params(struct cfg80211_chan_def *chandef,
298                             struct rtw_channel_params *chan_params)
299 {
300         struct ieee80211_channel *channel = chandef->chan;
301         enum nl80211_chan_width width = chandef->width;
302         u8 *cch_by_bw = chan_params->cch_by_bw;
303         u32 primary_freq, center_freq;
304         u8 center_chan;
305         u8 bandwidth = RTW_CHANNEL_WIDTH_20;
306         u8 primary_chan_idx = 0;
307         u8 i;
308
309         center_chan = channel->hw_value;
310         primary_freq = channel->center_freq;
311         center_freq = chandef->center_freq1;
312
313         /* assign the center channel used while 20M bw is selected */
314         cch_by_bw[RTW_CHANNEL_WIDTH_20] = channel->hw_value;
315
316         switch (width) {
317         case NL80211_CHAN_WIDTH_20_NOHT:
318         case NL80211_CHAN_WIDTH_20:
319                 bandwidth = RTW_CHANNEL_WIDTH_20;
320                 primary_chan_idx = RTW_SC_DONT_CARE;
321                 break;
322         case NL80211_CHAN_WIDTH_40:
323                 bandwidth = RTW_CHANNEL_WIDTH_40;
324                 if (primary_freq > center_freq) {
325                         primary_chan_idx = RTW_SC_20_UPPER;
326                         center_chan -= 2;
327                 } else {
328                         primary_chan_idx = RTW_SC_20_LOWER;
329                         center_chan += 2;
330                 }
331                 break;
332         case NL80211_CHAN_WIDTH_80:
333                 bandwidth = RTW_CHANNEL_WIDTH_80;
334                 if (primary_freq > center_freq) {
335                         if (primary_freq - center_freq == 10) {
336                                 primary_chan_idx = RTW_SC_20_UPPER;
337                                 center_chan -= 2;
338                         } else {
339                                 primary_chan_idx = RTW_SC_20_UPMOST;
340                                 center_chan -= 6;
341                         }
342                         /* assign the center channel used
343                          * while 40M bw is selected
344                          */
345                         cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_chan + 4;
346                 } else {
347                         if (center_freq - primary_freq == 10) {
348                                 primary_chan_idx = RTW_SC_20_LOWER;
349                                 center_chan += 2;
350                         } else {
351                                 primary_chan_idx = RTW_SC_20_LOWEST;
352                                 center_chan += 6;
353                         }
354                         /* assign the center channel used
355                          * while 40M bw is selected
356                          */
357                         cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_chan - 4;
358                 }
359                 break;
360         default:
361                 center_chan = 0;
362                 break;
363         }
364
365         chan_params->center_chan = center_chan;
366         chan_params->bandwidth = bandwidth;
367         chan_params->primary_chan_idx = primary_chan_idx;
368
369         /* assign the center channel used while current bw is selected */
370         cch_by_bw[bandwidth] = center_chan;
371
372         for (i = bandwidth + 1; i <= RTW_MAX_CHANNEL_WIDTH; i++)
373                 cch_by_bw[i] = 0;
374 }
375
376 void rtw_set_channel(struct rtw_dev *rtwdev)
377 {
378         struct ieee80211_hw *hw = rtwdev->hw;
379         struct rtw_hal *hal = &rtwdev->hal;
380         struct rtw_chip_info *chip = rtwdev->chip;
381         struct rtw_channel_params ch_param;
382         u8 center_chan, bandwidth, primary_chan_idx;
383         u8 i;
384
385         rtw_get_channel_params(&hw->conf.chandef, &ch_param);
386         if (WARN(ch_param.center_chan == 0, "Invalid channel\n"))
387                 return;
388
389         center_chan = ch_param.center_chan;
390         bandwidth = ch_param.bandwidth;
391         primary_chan_idx = ch_param.primary_chan_idx;
392
393         hal->current_band_width = bandwidth;
394         hal->current_channel = center_chan;
395         hal->current_band_type = center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G;
396
397         for (i = RTW_CHANNEL_WIDTH_20; i <= RTW_MAX_CHANNEL_WIDTH; i++)
398                 hal->cch_by_bw[i] = ch_param.cch_by_bw[i];
399
400         chip->ops->set_channel(rtwdev, center_chan, bandwidth, primary_chan_idx);
401
402         if (hal->current_band_type == RTW_BAND_5G) {
403                 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_5G);
404         } else {
405                 if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags))
406                         rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G);
407                 else
408                         rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G_NOFORSCAN);
409         }
410
411         rtw_phy_set_tx_power_level(rtwdev, center_chan);
412 }
413
414 static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr)
415 {
416         int i;
417
418         for (i = 0; i < ETH_ALEN; i++)
419                 rtw_write8(rtwdev, start + i, addr[i]);
420 }
421
422 void rtw_vif_port_config(struct rtw_dev *rtwdev,
423                          struct rtw_vif *rtwvif,
424                          u32 config)
425 {
426         u32 addr, mask;
427
428         if (config & PORT_SET_MAC_ADDR) {
429                 addr = rtwvif->conf->mac_addr.addr;
430                 rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr);
431         }
432         if (config & PORT_SET_BSSID) {
433                 addr = rtwvif->conf->bssid.addr;
434                 rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid);
435         }
436         if (config & PORT_SET_NET_TYPE) {
437                 addr = rtwvif->conf->net_type.addr;
438                 mask = rtwvif->conf->net_type.mask;
439                 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type);
440         }
441         if (config & PORT_SET_AID) {
442                 addr = rtwvif->conf->aid.addr;
443                 mask = rtwvif->conf->aid.mask;
444                 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid);
445         }
446         if (config & PORT_SET_BCN_CTRL) {
447                 addr = rtwvif->conf->bcn_ctrl.addr;
448                 mask = rtwvif->conf->bcn_ctrl.mask;
449                 rtw_write8_mask(rtwdev, addr, mask, rtwvif->bcn_ctrl);
450         }
451 }
452
453 static u8 hw_bw_cap_to_bitamp(u8 bw_cap)
454 {
455         u8 bw = 0;
456
457         switch (bw_cap) {
458         case EFUSE_HW_CAP_IGNORE:
459         case EFUSE_HW_CAP_SUPP_BW80:
460                 bw |= BIT(RTW_CHANNEL_WIDTH_80);
461                 /* fall through */
462         case EFUSE_HW_CAP_SUPP_BW40:
463                 bw |= BIT(RTW_CHANNEL_WIDTH_40);
464                 /* fall through */
465         default:
466                 bw |= BIT(RTW_CHANNEL_WIDTH_20);
467                 break;
468         }
469
470         return bw;
471 }
472
473 static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num)
474 {
475         struct rtw_hal *hal = &rtwdev->hal;
476
477         if (hw_ant_num == EFUSE_HW_CAP_IGNORE ||
478             hw_ant_num >= hal->rf_path_num)
479                 return;
480
481         switch (hw_ant_num) {
482         case 1:
483                 hal->rf_type = RF_1T1R;
484                 hal->rf_path_num = 1;
485                 hal->antenna_tx = BB_PATH_A;
486                 hal->antenna_rx = BB_PATH_A;
487                 break;
488         default:
489                 WARN(1, "invalid hw configuration from efuse\n");
490                 break;
491         }
492 }
493
494 static u64 get_vht_ra_mask(struct ieee80211_sta *sta)
495 {
496         u64 ra_mask = 0;
497         u16 mcs_map = le16_to_cpu(sta->vht_cap.vht_mcs.rx_mcs_map);
498         u8 vht_mcs_cap;
499         int i, nss;
500
501         /* 4SS, every two bits for MCS7/8/9 */
502         for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) {
503                 vht_mcs_cap = mcs_map & 0x3;
504                 switch (vht_mcs_cap) {
505                 case 2: /* MCS9 */
506                         ra_mask |= 0x3ffULL << nss;
507                         break;
508                 case 1: /* MCS8 */
509                         ra_mask |= 0x1ffULL << nss;
510                         break;
511                 case 0: /* MCS7 */
512                         ra_mask |= 0x0ffULL << nss;
513                         break;
514                 default:
515                         break;
516                 }
517         }
518
519         return ra_mask;
520 }
521
522 static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num)
523 {
524         u8 rate_id = 0;
525
526         switch (wireless_set) {
527         case WIRELESS_CCK:
528                 rate_id = RTW_RATEID_B_20M;
529                 break;
530         case WIRELESS_OFDM:
531                 rate_id = RTW_RATEID_G;
532                 break;
533         case WIRELESS_CCK | WIRELESS_OFDM:
534                 rate_id = RTW_RATEID_BG;
535                 break;
536         case WIRELESS_OFDM | WIRELESS_HT:
537                 if (tx_num == 1)
538                         rate_id = RTW_RATEID_GN_N1SS;
539                 else if (tx_num == 2)
540                         rate_id = RTW_RATEID_GN_N2SS;
541                 else if (tx_num == 3)
542                         rate_id = RTW_RATEID_ARFR5_N_3SS;
543                 break;
544         case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT:
545                 if (bw_mode == RTW_CHANNEL_WIDTH_40) {
546                         if (tx_num == 1)
547                                 rate_id = RTW_RATEID_BGN_40M_1SS;
548                         else if (tx_num == 2)
549                                 rate_id = RTW_RATEID_BGN_40M_2SS;
550                         else if (tx_num == 3)
551                                 rate_id = RTW_RATEID_ARFR5_N_3SS;
552                         else if (tx_num == 4)
553                                 rate_id = RTW_RATEID_ARFR7_N_4SS;
554                 } else {
555                         if (tx_num == 1)
556                                 rate_id = RTW_RATEID_BGN_20M_1SS;
557                         else if (tx_num == 2)
558                                 rate_id = RTW_RATEID_BGN_20M_2SS;
559                         else if (tx_num == 3)
560                                 rate_id = RTW_RATEID_ARFR5_N_3SS;
561                         else if (tx_num == 4)
562                                 rate_id = RTW_RATEID_ARFR7_N_4SS;
563                 }
564                 break;
565         case WIRELESS_OFDM | WIRELESS_VHT:
566                 if (tx_num == 1)
567                         rate_id = RTW_RATEID_ARFR1_AC_1SS;
568                 else if (tx_num == 2)
569                         rate_id = RTW_RATEID_ARFR0_AC_2SS;
570                 else if (tx_num == 3)
571                         rate_id = RTW_RATEID_ARFR4_AC_3SS;
572                 else if (tx_num == 4)
573                         rate_id = RTW_RATEID_ARFR6_AC_4SS;
574                 break;
575         case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT:
576                 if (bw_mode >= RTW_CHANNEL_WIDTH_80) {
577                         if (tx_num == 1)
578                                 rate_id = RTW_RATEID_ARFR1_AC_1SS;
579                         else if (tx_num == 2)
580                                 rate_id = RTW_RATEID_ARFR0_AC_2SS;
581                         else if (tx_num == 3)
582                                 rate_id = RTW_RATEID_ARFR4_AC_3SS;
583                         else if (tx_num == 4)
584                                 rate_id = RTW_RATEID_ARFR6_AC_4SS;
585                 } else {
586                         if (tx_num == 1)
587                                 rate_id = RTW_RATEID_ARFR2_AC_2G_1SS;
588                         else if (tx_num == 2)
589                                 rate_id = RTW_RATEID_ARFR3_AC_2G_2SS;
590                         else if (tx_num == 3)
591                                 rate_id = RTW_RATEID_ARFR4_AC_3SS;
592                         else if (tx_num == 4)
593                                 rate_id = RTW_RATEID_ARFR6_AC_4SS;
594                 }
595                 break;
596         default:
597                 break;
598         }
599
600         return rate_id;
601 }
602
603 #define RA_MASK_CCK_RATES       0x0000f
604 #define RA_MASK_OFDM_RATES      0x00ff0
605 #define RA_MASK_HT_RATES_1SS    (0xff000ULL << 0)
606 #define RA_MASK_HT_RATES_2SS    (0xff000ULL << 8)
607 #define RA_MASK_HT_RATES_3SS    (0xff000ULL << 16)
608 #define RA_MASK_HT_RATES        (RA_MASK_HT_RATES_1SS | \
609                                  RA_MASK_HT_RATES_2SS | \
610                                  RA_MASK_HT_RATES_3SS)
611 #define RA_MASK_VHT_RATES_1SS   (0x3ff000ULL << 0)
612 #define RA_MASK_VHT_RATES_2SS   (0x3ff000ULL << 10)
613 #define RA_MASK_VHT_RATES_3SS   (0x3ff000ULL << 20)
614 #define RA_MASK_VHT_RATES       (RA_MASK_VHT_RATES_1SS | \
615                                  RA_MASK_VHT_RATES_2SS | \
616                                  RA_MASK_VHT_RATES_3SS)
617 #define RA_MASK_CCK_IN_HT       0x00005
618 #define RA_MASK_CCK_IN_VHT      0x00005
619 #define RA_MASK_OFDM_IN_VHT     0x00010
620 #define RA_MASK_OFDM_IN_HT_2G   0x00010
621 #define RA_MASK_OFDM_IN_HT_5G   0x00030
622
623 static u64 rtw_update_rate_mask(struct rtw_dev *rtwdev,
624                                 struct rtw_sta_info *si,
625                                 u64 ra_mask, bool is_vht_enable,
626                                 u8 wireless_set)
627 {
628         struct rtw_hal *hal = &rtwdev->hal;
629         const struct cfg80211_bitrate_mask *mask = si->mask;
630         u64 cfg_mask = GENMASK_ULL(63, 0);
631         u8 rssi_level, band;
632
633         if (wireless_set != WIRELESS_CCK) {
634                 rssi_level = si->rssi_level;
635                 if (rssi_level == 0)
636                         ra_mask &= 0xffffffffffffffffULL;
637                 else if (rssi_level == 1)
638                         ra_mask &= 0xfffffffffffffff0ULL;
639                 else if (rssi_level == 2)
640                         ra_mask &= 0xffffffffffffefe0ULL;
641                 else if (rssi_level == 3)
642                         ra_mask &= 0xffffffffffffcfc0ULL;
643                 else if (rssi_level == 4)
644                         ra_mask &= 0xffffffffffff8f80ULL;
645                 else if (rssi_level >= 5)
646                         ra_mask &= 0xffffffffffff0f00ULL;
647         }
648
649         if (!si->use_cfg_mask)
650                 return ra_mask;
651
652         band = hal->current_band_type;
653         if (band == RTW_BAND_2G) {
654                 band = NL80211_BAND_2GHZ;
655                 cfg_mask = mask->control[band].legacy;
656         } else if (band == RTW_BAND_5G) {
657                 band = NL80211_BAND_5GHZ;
658                 cfg_mask = u64_encode_bits(mask->control[band].legacy,
659                                            RA_MASK_OFDM_RATES);
660         }
661
662         if (!is_vht_enable) {
663                 if (ra_mask & RA_MASK_HT_RATES_1SS)
664                         cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0],
665                                                     RA_MASK_HT_RATES_1SS);
666                 if (ra_mask & RA_MASK_HT_RATES_2SS)
667                         cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1],
668                                                     RA_MASK_HT_RATES_2SS);
669         } else {
670                 if (ra_mask & RA_MASK_VHT_RATES_1SS)
671                         cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0],
672                                                     RA_MASK_VHT_RATES_1SS);
673                 if (ra_mask & RA_MASK_VHT_RATES_2SS)
674                         cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1],
675                                                     RA_MASK_VHT_RATES_2SS);
676         }
677
678         ra_mask &= cfg_mask;
679
680         return ra_mask;
681 }
682
683 void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si)
684 {
685         struct ieee80211_sta *sta = si->sta;
686         struct rtw_efuse *efuse = &rtwdev->efuse;
687         struct rtw_hal *hal = &rtwdev->hal;
688         u8 wireless_set;
689         u8 bw_mode;
690         u8 rate_id;
691         u8 rf_type = RF_1T1R;
692         u8 stbc_en = 0;
693         u8 ldpc_en = 0;
694         u8 tx_num = 1;
695         u64 ra_mask = 0;
696         bool is_vht_enable = false;
697         bool is_support_sgi = false;
698
699         if (sta->vht_cap.vht_supported) {
700                 is_vht_enable = true;
701                 ra_mask |= get_vht_ra_mask(sta);
702                 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK)
703                         stbc_en = VHT_STBC_EN;
704                 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)
705                         ldpc_en = VHT_LDPC_EN;
706                 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)
707                         is_support_sgi = true;
708         } else if (sta->ht_cap.ht_supported) {
709                 ra_mask |= (sta->ht_cap.mcs.rx_mask[1] << 20) |
710                            (sta->ht_cap.mcs.rx_mask[0] << 12);
711                 if (sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
712                         stbc_en = HT_STBC_EN;
713                 if (sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)
714                         ldpc_en = HT_LDPC_EN;
715                 if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20 ||
716                     sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40)
717                         is_support_sgi = true;
718         }
719
720         if (efuse->hw_cap.nss == 1)
721                 ra_mask &= RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS;
722
723         if (hal->current_band_type == RTW_BAND_5G) {
724                 ra_mask |= (u64)sta->supp_rates[NL80211_BAND_5GHZ] << 4;
725                 if (sta->vht_cap.vht_supported) {
726                         ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT;
727                         wireless_set = WIRELESS_OFDM | WIRELESS_VHT;
728                 } else if (sta->ht_cap.ht_supported) {
729                         ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G;
730                         wireless_set = WIRELESS_OFDM | WIRELESS_HT;
731                 } else {
732                         wireless_set = WIRELESS_OFDM;
733                 }
734         } else if (hal->current_band_type == RTW_BAND_2G) {
735                 ra_mask |= sta->supp_rates[NL80211_BAND_2GHZ];
736                 if (sta->vht_cap.vht_supported) {
737                         ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT |
738                                    RA_MASK_OFDM_IN_VHT;
739                         wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
740                                        WIRELESS_HT | WIRELESS_VHT;
741                 } else if (sta->ht_cap.ht_supported) {
742                         ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT |
743                                    RA_MASK_OFDM_IN_HT_2G;
744                         wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
745                                        WIRELESS_HT;
746                 } else if (sta->supp_rates[0] <= 0xf) {
747                         wireless_set = WIRELESS_CCK;
748                 } else {
749                         wireless_set = WIRELESS_CCK | WIRELESS_OFDM;
750                 }
751         } else {
752                 rtw_err(rtwdev, "Unknown band type\n");
753                 wireless_set = 0;
754         }
755
756         switch (sta->bandwidth) {
757         case IEEE80211_STA_RX_BW_80:
758                 bw_mode = RTW_CHANNEL_WIDTH_80;
759                 break;
760         case IEEE80211_STA_RX_BW_40:
761                 bw_mode = RTW_CHANNEL_WIDTH_40;
762                 break;
763         default:
764                 bw_mode = RTW_CHANNEL_WIDTH_20;
765                 break;
766         }
767
768         if (sta->vht_cap.vht_supported && ra_mask & 0xffc00000) {
769                 tx_num = 2;
770                 rf_type = RF_2T2R;
771         } else if (sta->ht_cap.ht_supported && ra_mask & 0xfff00000) {
772                 tx_num = 2;
773                 rf_type = RF_2T2R;
774         }
775
776         rate_id = get_rate_id(wireless_set, bw_mode, tx_num);
777
778         ra_mask = rtw_update_rate_mask(rtwdev, si, ra_mask, is_vht_enable,
779                                        wireless_set);
780
781         si->bw_mode = bw_mode;
782         si->stbc_en = stbc_en;
783         si->ldpc_en = ldpc_en;
784         si->rf_type = rf_type;
785         si->wireless_set = wireless_set;
786         si->sgi_enable = is_support_sgi;
787         si->vht_enable = is_vht_enable;
788         si->ra_mask = ra_mask;
789         si->rate_id = rate_id;
790
791         rtw_fw_send_ra_info(rtwdev, si);
792 }
793
794 static int rtw_wait_firmware_completion(struct rtw_dev *rtwdev)
795 {
796         struct rtw_chip_info *chip = rtwdev->chip;
797         struct rtw_fw_state *fw;
798
799         fw = &rtwdev->fw;
800         wait_for_completion(&fw->completion);
801         if (!fw->firmware)
802                 return -EINVAL;
803
804         if (chip->wow_fw_name) {
805                 fw = &rtwdev->wow_fw;
806                 wait_for_completion(&fw->completion);
807                 if (!fw->firmware)
808                         return -EINVAL;
809         }
810
811         return 0;
812 }
813
814 static int rtw_power_on(struct rtw_dev *rtwdev)
815 {
816         struct rtw_chip_info *chip = rtwdev->chip;
817         struct rtw_fw_state *fw = &rtwdev->fw;
818         bool wifi_only;
819         int ret;
820
821         ret = rtw_hci_setup(rtwdev);
822         if (ret) {
823                 rtw_err(rtwdev, "failed to setup hci\n");
824                 goto err;
825         }
826
827         /* power on MAC before firmware downloaded */
828         ret = rtw_mac_power_on(rtwdev);
829         if (ret) {
830                 rtw_err(rtwdev, "failed to power on mac\n");
831                 goto err;
832         }
833
834         ret = rtw_wait_firmware_completion(rtwdev);
835         if (ret) {
836                 rtw_err(rtwdev, "failed to wait firmware completion\n");
837                 goto err_off;
838         }
839
840         ret = rtw_download_firmware(rtwdev, fw);
841         if (ret) {
842                 rtw_err(rtwdev, "failed to download firmware\n");
843                 goto err_off;
844         }
845
846         /* config mac after firmware downloaded */
847         ret = rtw_mac_init(rtwdev);
848         if (ret) {
849                 rtw_err(rtwdev, "failed to configure mac\n");
850                 goto err_off;
851         }
852
853         chip->ops->phy_set_param(rtwdev);
854
855         ret = rtw_hci_start(rtwdev);
856         if (ret) {
857                 rtw_err(rtwdev, "failed to start hci\n");
858                 goto err_off;
859         }
860
861         /* send H2C after HCI has started */
862         rtw_fw_send_general_info(rtwdev);
863         rtw_fw_send_phydm_info(rtwdev);
864
865         wifi_only = !rtwdev->efuse.btcoex;
866         rtw_coex_power_on_setting(rtwdev);
867         rtw_coex_init_hw_config(rtwdev, wifi_only);
868
869         return 0;
870
871 err_off:
872         rtw_mac_power_off(rtwdev);
873
874 err:
875         return ret;
876 }
877
878 int rtw_core_start(struct rtw_dev *rtwdev)
879 {
880         int ret;
881
882         ret = rtw_power_on(rtwdev);
883         if (ret)
884                 return ret;
885
886         rtw_sec_enable_sec_engine(rtwdev);
887
888         /* rcr reset after powered on */
889         rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr);
890
891         ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
892                                      RTW_WATCH_DOG_DELAY_TIME);
893
894         set_bit(RTW_FLAG_RUNNING, rtwdev->flags);
895
896         return 0;
897 }
898
899 static void rtw_power_off(struct rtw_dev *rtwdev)
900 {
901         rtw_hci_stop(rtwdev);
902         rtw_mac_power_off(rtwdev);
903 }
904
905 void rtw_core_stop(struct rtw_dev *rtwdev)
906 {
907         struct rtw_coex *coex = &rtwdev->coex;
908
909         clear_bit(RTW_FLAG_RUNNING, rtwdev->flags);
910         clear_bit(RTW_FLAG_FW_RUNNING, rtwdev->flags);
911
912         mutex_unlock(&rtwdev->mutex);
913
914         cancel_work_sync(&rtwdev->c2h_work);
915         cancel_delayed_work_sync(&rtwdev->watch_dog_work);
916         cancel_delayed_work_sync(&coex->bt_relink_work);
917         cancel_delayed_work_sync(&coex->bt_reenable_work);
918         cancel_delayed_work_sync(&coex->defreeze_work);
919
920         mutex_lock(&rtwdev->mutex);
921
922         rtw_power_off(rtwdev);
923 }
924
925 static void rtw_init_ht_cap(struct rtw_dev *rtwdev,
926                             struct ieee80211_sta_ht_cap *ht_cap)
927 {
928         struct rtw_efuse *efuse = &rtwdev->efuse;
929
930         ht_cap->ht_supported = true;
931         ht_cap->cap = 0;
932         ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
933                         IEEE80211_HT_CAP_MAX_AMSDU |
934                         IEEE80211_HT_CAP_LDPC_CODING |
935                         (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
936         if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40))
937                 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
938                                 IEEE80211_HT_CAP_DSSSCCK40 |
939                                 IEEE80211_HT_CAP_SGI_40;
940         ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
941         ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16;
942         ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
943         if (efuse->hw_cap.nss > 1) {
944                 ht_cap->mcs.rx_mask[0] = 0xFF;
945                 ht_cap->mcs.rx_mask[1] = 0xFF;
946                 ht_cap->mcs.rx_mask[4] = 0x01;
947                 ht_cap->mcs.rx_highest = cpu_to_le16(300);
948         } else {
949                 ht_cap->mcs.rx_mask[0] = 0xFF;
950                 ht_cap->mcs.rx_mask[1] = 0x00;
951                 ht_cap->mcs.rx_mask[4] = 0x01;
952                 ht_cap->mcs.rx_highest = cpu_to_le16(150);
953         }
954 }
955
956 static void rtw_init_vht_cap(struct rtw_dev *rtwdev,
957                              struct ieee80211_sta_vht_cap *vht_cap)
958 {
959         struct rtw_efuse *efuse = &rtwdev->efuse;
960         u16 mcs_map;
961         __le16 highest;
962
963         if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE &&
964             efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT)
965                 return;
966
967         vht_cap->vht_supported = true;
968         vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
969                        IEEE80211_VHT_CAP_RXLDPC |
970                        IEEE80211_VHT_CAP_SHORT_GI_80 |
971                        IEEE80211_VHT_CAP_TXSTBC |
972                        IEEE80211_VHT_CAP_RXSTBC_1 |
973                        IEEE80211_VHT_CAP_HTC_VHT |
974                        IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
975                        0;
976
977         vht_cap->cap |= IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE |
978                         IEEE80211_VHT_CAP_SU_BEAMFORMEE_CAPABLE;
979         vht_cap->cap |= (rtwdev->hal.bfee_sts_cap <<
980                         IEEE80211_VHT_CAP_BEAMFORMEE_STS_SHIFT);
981
982         mcs_map = IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
983                   IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
984                   IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
985                   IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
986                   IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
987                   IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
988                   IEEE80211_VHT_MCS_NOT_SUPPORTED << 14;
989         if (efuse->hw_cap.nss > 1) {
990                 highest = cpu_to_le16(780);
991                 mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << 2;
992         } else {
993                 highest = cpu_to_le16(390);
994                 mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << 2;
995         }
996
997         vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map);
998         vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map);
999         vht_cap->vht_mcs.rx_highest = highest;
1000         vht_cap->vht_mcs.tx_highest = highest;
1001 }
1002
1003 static void rtw_set_supported_band(struct ieee80211_hw *hw,
1004                                    struct rtw_chip_info *chip)
1005 {
1006         struct rtw_dev *rtwdev = hw->priv;
1007         struct ieee80211_supported_band *sband;
1008
1009         if (chip->band & RTW_BAND_2G) {
1010                 sband = kmemdup(&rtw_band_2ghz, sizeof(*sband), GFP_KERNEL);
1011                 if (!sband)
1012                         goto err_out;
1013                 if (chip->ht_supported)
1014                         rtw_init_ht_cap(rtwdev, &sband->ht_cap);
1015                 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband;
1016         }
1017
1018         if (chip->band & RTW_BAND_5G) {
1019                 sband = kmemdup(&rtw_band_5ghz, sizeof(*sband), GFP_KERNEL);
1020                 if (!sband)
1021                         goto err_out;
1022                 if (chip->ht_supported)
1023                         rtw_init_ht_cap(rtwdev, &sband->ht_cap);
1024                 if (chip->vht_supported)
1025                         rtw_init_vht_cap(rtwdev, &sband->vht_cap);
1026                 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband;
1027         }
1028
1029         return;
1030
1031 err_out:
1032         rtw_err(rtwdev, "failed to set supported band\n");
1033         kfree(sband);
1034 }
1035
1036 static void rtw_unset_supported_band(struct ieee80211_hw *hw,
1037                                      struct rtw_chip_info *chip)
1038 {
1039         kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
1040         kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
1041 }
1042
1043 static void rtw_load_firmware_cb(const struct firmware *firmware, void *context)
1044 {
1045         struct rtw_fw_state *fw = context;
1046         struct rtw_dev *rtwdev = fw->rtwdev;
1047         const struct rtw_fw_hdr *fw_hdr;
1048
1049         if (!firmware || !firmware->data) {
1050                 rtw_err(rtwdev, "failed to request firmware\n");
1051                 complete_all(&fw->completion);
1052                 return;
1053         }
1054
1055         fw_hdr = (const struct rtw_fw_hdr *)firmware->data;
1056         fw->h2c_version = le16_to_cpu(fw_hdr->h2c_fmt_ver);
1057         fw->version = le16_to_cpu(fw_hdr->version);
1058         fw->sub_version = fw_hdr->subversion;
1059         fw->sub_index = fw_hdr->subindex;
1060
1061         fw->firmware = firmware;
1062         complete_all(&fw->completion);
1063
1064         rtw_info(rtwdev, "Firmware version %u.%u.%u, H2C version %u\n",
1065                  fw->version, fw->sub_version, fw->sub_index, fw->h2c_version);
1066 }
1067
1068 static int rtw_load_firmware(struct rtw_dev *rtwdev, enum rtw_fw_type type)
1069 {
1070         const char *fw_name;
1071         struct rtw_fw_state *fw;
1072         int ret;
1073
1074         switch (type) {
1075         case RTW_WOWLAN_FW:
1076                 fw = &rtwdev->wow_fw;
1077                 fw_name = rtwdev->chip->wow_fw_name;
1078                 break;
1079
1080         case RTW_NORMAL_FW:
1081                 fw = &rtwdev->fw;
1082                 fw_name = rtwdev->chip->fw_name;
1083                 break;
1084
1085         default:
1086                 rtw_warn(rtwdev, "unsupported firmware type\n");
1087                 return -ENOENT;
1088         }
1089
1090         fw->rtwdev = rtwdev;
1091         init_completion(&fw->completion);
1092
1093         ret = reject_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev,
1094                                       GFP_KERNEL, fw, rtw_load_firmware_cb);
1095         if (ret) {
1096                 rtw_err(rtwdev, "failed to async firmware request\n");
1097                 return ret;
1098         }
1099
1100         return 0;
1101 }
1102
1103 static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev)
1104 {
1105         struct rtw_chip_info *chip = rtwdev->chip;
1106         struct rtw_hal *hal = &rtwdev->hal;
1107         struct rtw_efuse *efuse = &rtwdev->efuse;
1108         int ret = 0;
1109
1110         switch (rtw_hci_type(rtwdev)) {
1111         case RTW_HCI_TYPE_PCIE:
1112                 rtwdev->hci.rpwm_addr = 0x03d9;
1113                 rtwdev->hci.cpwm_addr = 0x03da;
1114                 break;
1115         default:
1116                 rtw_err(rtwdev, "unsupported hci type\n");
1117                 return -EINVAL;
1118         }
1119
1120         hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1);
1121         hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version);
1122         hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1;
1123         if (hal->chip_version & BIT_RF_TYPE_ID) {
1124                 hal->rf_type = RF_2T2R;
1125                 hal->rf_path_num = 2;
1126                 hal->antenna_tx = BB_PATH_AB;
1127                 hal->antenna_rx = BB_PATH_AB;
1128         } else {
1129                 hal->rf_type = RF_1T1R;
1130                 hal->rf_path_num = 1;
1131                 hal->antenna_tx = BB_PATH_A;
1132                 hal->antenna_rx = BB_PATH_A;
1133         }
1134
1135         efuse->physical_size = chip->phy_efuse_size;
1136         efuse->logical_size = chip->log_efuse_size;
1137         efuse->protect_size = chip->ptct_efuse_size;
1138
1139         /* default use ack */
1140         rtwdev->hal.rcr |= BIT_VHT_DACK;
1141
1142         hal->bfee_sts_cap = 3;
1143
1144         return ret;
1145 }
1146
1147 static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev)
1148 {
1149         struct rtw_fw_state *fw = &rtwdev->fw;
1150         int ret;
1151
1152         ret = rtw_hci_setup(rtwdev);
1153         if (ret) {
1154                 rtw_err(rtwdev, "failed to setup hci\n");
1155                 goto err;
1156         }
1157
1158         ret = rtw_mac_power_on(rtwdev);
1159         if (ret) {
1160                 rtw_err(rtwdev, "failed to power on mac\n");
1161                 goto err;
1162         }
1163
1164         rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP);
1165
1166         wait_for_completion(&fw->completion);
1167         if (!fw->firmware) {
1168                 ret = -EINVAL;
1169                 rtw_err(rtwdev, "failed to load firmware\n");
1170                 goto err;
1171         }
1172
1173         ret = rtw_download_firmware(rtwdev, fw);
1174         if (ret) {
1175                 rtw_err(rtwdev, "failed to download firmware\n");
1176                 goto err_off;
1177         }
1178
1179         return 0;
1180
1181 err_off:
1182         rtw_mac_power_off(rtwdev);
1183
1184 err:
1185         return ret;
1186 }
1187
1188 static int rtw_dump_hw_feature(struct rtw_dev *rtwdev)
1189 {
1190         struct rtw_efuse *efuse = &rtwdev->efuse;
1191         u8 hw_feature[HW_FEATURE_LEN];
1192         u8 id;
1193         u8 bw;
1194         int i;
1195
1196         id = rtw_read8(rtwdev, REG_C2HEVT);
1197         if (id != C2H_HW_FEATURE_REPORT) {
1198                 rtw_err(rtwdev, "failed to read hw feature report\n");
1199                 return -EBUSY;
1200         }
1201
1202         for (i = 0; i < HW_FEATURE_LEN; i++)
1203                 hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i);
1204
1205         rtw_write8(rtwdev, REG_C2HEVT, 0);
1206
1207         bw = GET_EFUSE_HW_CAP_BW(hw_feature);
1208         efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw);
1209         efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature);
1210         efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature);
1211         efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature);
1212         efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature);
1213
1214         rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num);
1215
1216         if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE ||
1217             efuse->hw_cap.nss > rtwdev->hal.rf_path_num)
1218                 efuse->hw_cap.nss = rtwdev->hal.rf_path_num;
1219
1220         rtw_dbg(rtwdev, RTW_DBG_EFUSE,
1221                 "hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n",
1222                 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl,
1223                 efuse->hw_cap.ant_num, efuse->hw_cap.nss);
1224
1225         return 0;
1226 }
1227
1228 static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev)
1229 {
1230         rtw_hci_stop(rtwdev);
1231         rtw_mac_power_off(rtwdev);
1232 }
1233
1234 static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev)
1235 {
1236         struct rtw_efuse *efuse = &rtwdev->efuse;
1237         int ret;
1238
1239         mutex_lock(&rtwdev->mutex);
1240
1241         /* power on mac to read efuse */
1242         ret = rtw_chip_efuse_enable(rtwdev);
1243         if (ret)
1244                 goto out_unlock;
1245
1246         ret = rtw_parse_efuse_map(rtwdev);
1247         if (ret)
1248                 goto out_disable;
1249
1250         ret = rtw_dump_hw_feature(rtwdev);
1251         if (ret)
1252                 goto out_disable;
1253
1254         ret = rtw_check_supported_rfe(rtwdev);
1255         if (ret)
1256                 goto out_disable;
1257
1258         if (efuse->crystal_cap == 0xff)
1259                 efuse->crystal_cap = 0;
1260         if (efuse->pa_type_2g == 0xff)
1261                 efuse->pa_type_2g = 0;
1262         if (efuse->pa_type_5g == 0xff)
1263                 efuse->pa_type_5g = 0;
1264         if (efuse->lna_type_2g == 0xff)
1265                 efuse->lna_type_2g = 0;
1266         if (efuse->lna_type_5g == 0xff)
1267                 efuse->lna_type_5g = 0;
1268         if (efuse->channel_plan == 0xff)
1269                 efuse->channel_plan = 0x7f;
1270         if (efuse->rf_board_option == 0xff)
1271                 efuse->rf_board_option = 0;
1272         if (efuse->bt_setting & BIT(0))
1273                 efuse->share_ant = true;
1274         if (efuse->regd == 0xff)
1275                 efuse->regd = 0;
1276
1277         efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20;
1278         efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0;
1279         efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0;
1280         efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0;
1281         efuse->ext_lna_2g = efuse->lna_type_5g & BIT(3) ? 1 : 0;
1282
1283 out_disable:
1284         rtw_chip_efuse_disable(rtwdev);
1285
1286 out_unlock:
1287         mutex_unlock(&rtwdev->mutex);
1288         return ret;
1289 }
1290
1291 static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev)
1292 {
1293         struct rtw_hal *hal = &rtwdev->hal;
1294         const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev);
1295
1296         if (!rfe_def)
1297                 return -ENODEV;
1298
1299         rtw_phy_setup_phy_cond(rtwdev, 0);
1300
1301         rtw_phy_init_tx_power(rtwdev);
1302         rtw_load_table(rtwdev, rfe_def->phy_pg_tbl);
1303         rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl);
1304         rtw_phy_tx_power_by_rate_config(hal);
1305         rtw_phy_tx_power_limit_config(hal);
1306
1307         return 0;
1308 }
1309
1310 int rtw_chip_info_setup(struct rtw_dev *rtwdev)
1311 {
1312         int ret;
1313
1314         ret = rtw_chip_parameter_setup(rtwdev);
1315         if (ret) {
1316                 rtw_err(rtwdev, "failed to setup chip parameters\n");
1317                 goto err_out;
1318         }
1319
1320         ret = rtw_chip_efuse_info_setup(rtwdev);
1321         if (ret) {
1322                 rtw_err(rtwdev, "failed to setup chip efuse info\n");
1323                 goto err_out;
1324         }
1325
1326         ret = rtw_chip_board_info_setup(rtwdev);
1327         if (ret) {
1328                 rtw_err(rtwdev, "failed to setup chip board info\n");
1329                 goto err_out;
1330         }
1331
1332         return 0;
1333
1334 err_out:
1335         return ret;
1336 }
1337 EXPORT_SYMBOL(rtw_chip_info_setup);
1338
1339 static void rtw_stats_init(struct rtw_dev *rtwdev)
1340 {
1341         struct rtw_traffic_stats *stats = &rtwdev->stats;
1342         struct rtw_dm_info *dm_info = &rtwdev->dm_info;
1343         int i;
1344
1345         ewma_tp_init(&stats->tx_ewma_tp);
1346         ewma_tp_init(&stats->rx_ewma_tp);
1347
1348         for (i = 0; i < RTW_EVM_NUM; i++)
1349                 ewma_evm_init(&dm_info->ewma_evm[i]);
1350         for (i = 0; i < RTW_SNR_NUM; i++)
1351                 ewma_snr_init(&dm_info->ewma_snr[i]);
1352 }
1353
1354 int rtw_core_init(struct rtw_dev *rtwdev)
1355 {
1356         struct rtw_chip_info *chip = rtwdev->chip;
1357         struct rtw_coex *coex = &rtwdev->coex;
1358         int ret;
1359
1360         INIT_LIST_HEAD(&rtwdev->rsvd_page_list);
1361         INIT_LIST_HEAD(&rtwdev->txqs);
1362
1363         timer_setup(&rtwdev->tx_report.purge_timer,
1364                     rtw_tx_report_purge_timer, 0);
1365         tasklet_init(&rtwdev->tx_tasklet, rtw_tx_tasklet,
1366                      (unsigned long)rtwdev);
1367
1368         INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work);
1369         INIT_DELAYED_WORK(&coex->bt_relink_work, rtw_coex_bt_relink_work);
1370         INIT_DELAYED_WORK(&coex->bt_reenable_work, rtw_coex_bt_reenable_work);
1371         INIT_DELAYED_WORK(&coex->defreeze_work, rtw_coex_defreeze_work);
1372         INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work);
1373         INIT_WORK(&rtwdev->ba_work, rtw_txq_ba_work);
1374         skb_queue_head_init(&rtwdev->c2h_queue);
1375         skb_queue_head_init(&rtwdev->coex.queue);
1376         skb_queue_head_init(&rtwdev->tx_report.queue);
1377
1378         spin_lock_init(&rtwdev->rf_lock);
1379         spin_lock_init(&rtwdev->h2c.lock);
1380         spin_lock_init(&rtwdev->txq_lock);
1381         spin_lock_init(&rtwdev->tx_report.q_lock);
1382
1383         mutex_init(&rtwdev->mutex);
1384         mutex_init(&rtwdev->coex.mutex);
1385         mutex_init(&rtwdev->hal.tx_power_mutex);
1386
1387         init_waitqueue_head(&rtwdev->coex.wait);
1388
1389         rtwdev->sec.total_cam_num = 32;
1390         rtwdev->hal.current_channel = 1;
1391         set_bit(RTW_BC_MC_MACID, rtwdev->mac_id_map);
1392         if (!(BIT(rtw_fw_lps_deep_mode) & chip->lps_deep_mode_supported))
1393                 rtwdev->lps_conf.deep_mode = LPS_DEEP_MODE_NONE;
1394         else
1395                 rtwdev->lps_conf.deep_mode = rtw_fw_lps_deep_mode;
1396
1397         rtw_stats_init(rtwdev);
1398
1399         /* default rx filter setting */
1400         rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV |
1401                           BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS |
1402                           BIT_AB | BIT_AM | BIT_APM;
1403
1404         ret = rtw_load_firmware(rtwdev, RTW_NORMAL_FW);
1405         if (ret) {
1406                 rtw_warn(rtwdev, "no firmware loaded\n");
1407                 return ret;
1408         }
1409
1410         if (chip->wow_fw_name) {
1411                 ret = rtw_load_firmware(rtwdev, RTW_WOWLAN_FW);
1412                 if (ret) {
1413                         rtw_warn(rtwdev, "no wow firmware loaded\n");
1414                         return ret;
1415                 }
1416         }
1417         return 0;
1418 }
1419 EXPORT_SYMBOL(rtw_core_init);
1420
1421 void rtw_core_deinit(struct rtw_dev *rtwdev)
1422 {
1423         struct rtw_fw_state *fw = &rtwdev->fw;
1424         struct rtw_fw_state *wow_fw = &rtwdev->wow_fw;
1425         struct rtw_rsvd_page *rsvd_pkt, *tmp;
1426         unsigned long flags;
1427
1428         if (fw->firmware)
1429                 release_firmware(fw->firmware);
1430
1431         if (wow_fw->firmware)
1432                 release_firmware(wow_fw->firmware);
1433
1434         tasklet_kill(&rtwdev->tx_tasklet);
1435         spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags);
1436         skb_queue_purge(&rtwdev->tx_report.queue);
1437         spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags);
1438
1439         list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list,
1440                                  build_list) {
1441                 list_del(&rsvd_pkt->build_list);
1442                 kfree(rsvd_pkt);
1443         }
1444
1445         mutex_destroy(&rtwdev->mutex);
1446         mutex_destroy(&rtwdev->coex.mutex);
1447         mutex_destroy(&rtwdev->hal.tx_power_mutex);
1448 }
1449 EXPORT_SYMBOL(rtw_core_deinit);
1450
1451 int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
1452 {
1453         int max_tx_headroom = 0;
1454         int ret;
1455
1456         /* TODO: USB & SDIO may need extra room? */
1457         max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz;
1458
1459         hw->extra_tx_headroom = max_tx_headroom;
1460         hw->queues = IEEE80211_NUM_ACS;
1461         hw->txq_data_size = sizeof(struct rtw_txq);
1462         hw->sta_data_size = sizeof(struct rtw_sta_info);
1463         hw->vif_data_size = sizeof(struct rtw_vif);
1464
1465         ieee80211_hw_set(hw, SIGNAL_DBM);
1466         ieee80211_hw_set(hw, RX_INCLUDES_FCS);
1467         ieee80211_hw_set(hw, AMPDU_AGGREGATION);
1468         ieee80211_hw_set(hw, MFP_CAPABLE);
1469         ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
1470         ieee80211_hw_set(hw, SUPPORTS_PS);
1471         ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
1472         ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
1473         ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);
1474         ieee80211_hw_set(hw, HAS_RATE_CONTROL);
1475         ieee80211_hw_set(hw, TX_AMSDU);
1476
1477         hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1478                                      BIT(NL80211_IFTYPE_AP) |
1479                                      BIT(NL80211_IFTYPE_ADHOC) |
1480                                      BIT(NL80211_IFTYPE_MESH_POINT);
1481
1482         hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS |
1483                             WIPHY_FLAG_TDLS_EXTERNAL_SETUP;
1484
1485         hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
1486
1487         wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0);
1488
1489 #ifdef CONFIG_PM
1490         hw->wiphy->wowlan = rtwdev->chip->wowlan_stub;
1491         hw->wiphy->max_sched_scan_ssids = rtwdev->chip->max_sched_scan_ssids;
1492 #endif
1493         rtw_set_supported_band(hw, rtwdev->chip);
1494         SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr);
1495
1496         rtw_regd_init(rtwdev, rtw_regd_notifier);
1497
1498         ret = ieee80211_register_hw(hw);
1499         if (ret) {
1500                 rtw_err(rtwdev, "failed to register hw\n");
1501                 return ret;
1502         }
1503
1504         if (regulatory_hint(hw->wiphy, rtwdev->regd.alpha2))
1505                 rtw_err(rtwdev, "regulatory_hint fail\n");
1506
1507         rtw_debugfs_init(rtwdev);
1508
1509         rtwdev->bf_info.bfer_mu_cnt = 0;
1510         rtwdev->bf_info.bfer_su_cnt = 0;
1511
1512         return 0;
1513 }
1514 EXPORT_SYMBOL(rtw_register_hw);
1515
1516 void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
1517 {
1518         struct rtw_chip_info *chip = rtwdev->chip;
1519
1520         ieee80211_unregister_hw(hw);
1521         rtw_unset_supported_band(hw, chip);
1522 }
1523 EXPORT_SYMBOL(rtw_unregister_hw);
1524
1525 MODULE_AUTHOR("Realtek Corporation");
1526 MODULE_DESCRIPTION("Realtek 802.11ac wireless core module");
1527 MODULE_LICENSE("Dual BSD/GPL");