1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
17 static bool rtw_fw_support_lps;
18 unsigned int rtw_debug_mask;
19 EXPORT_SYMBOL(rtw_debug_mask);
21 module_param_named(support_lps, rtw_fw_support_lps, bool, 0644);
22 module_param_named(debug_mask, rtw_debug_mask, uint, 0644);
24 MODULE_PARM_DESC(support_lps, "Set Y to enable Leisure Power Save support, to turn radio off between beacons");
25 MODULE_PARM_DESC(debug_mask, "Debugging mask");
27 static struct ieee80211_channel rtw_channeltable_2g[] = {
28 {.center_freq = 2412, .hw_value = 1,},
29 {.center_freq = 2417, .hw_value = 2,},
30 {.center_freq = 2422, .hw_value = 3,},
31 {.center_freq = 2427, .hw_value = 4,},
32 {.center_freq = 2432, .hw_value = 5,},
33 {.center_freq = 2437, .hw_value = 6,},
34 {.center_freq = 2442, .hw_value = 7,},
35 {.center_freq = 2447, .hw_value = 8,},
36 {.center_freq = 2452, .hw_value = 9,},
37 {.center_freq = 2457, .hw_value = 10,},
38 {.center_freq = 2462, .hw_value = 11,},
39 {.center_freq = 2467, .hw_value = 12,},
40 {.center_freq = 2472, .hw_value = 13,},
41 {.center_freq = 2484, .hw_value = 14,},
44 static struct ieee80211_channel rtw_channeltable_5g[] = {
45 {.center_freq = 5180, .hw_value = 36,},
46 {.center_freq = 5200, .hw_value = 40,},
47 {.center_freq = 5220, .hw_value = 44,},
48 {.center_freq = 5240, .hw_value = 48,},
49 {.center_freq = 5260, .hw_value = 52,},
50 {.center_freq = 5280, .hw_value = 56,},
51 {.center_freq = 5300, .hw_value = 60,},
52 {.center_freq = 5320, .hw_value = 64,},
53 {.center_freq = 5500, .hw_value = 100,},
54 {.center_freq = 5520, .hw_value = 104,},
55 {.center_freq = 5540, .hw_value = 108,},
56 {.center_freq = 5560, .hw_value = 112,},
57 {.center_freq = 5580, .hw_value = 116,},
58 {.center_freq = 5600, .hw_value = 120,},
59 {.center_freq = 5620, .hw_value = 124,},
60 {.center_freq = 5640, .hw_value = 128,},
61 {.center_freq = 5660, .hw_value = 132,},
62 {.center_freq = 5680, .hw_value = 136,},
63 {.center_freq = 5700, .hw_value = 140,},
64 {.center_freq = 5745, .hw_value = 149,},
65 {.center_freq = 5765, .hw_value = 153,},
66 {.center_freq = 5785, .hw_value = 157,},
67 {.center_freq = 5805, .hw_value = 161,},
68 {.center_freq = 5825, .hw_value = 165,
69 .flags = IEEE80211_CHAN_NO_HT40MINUS},
72 static struct ieee80211_rate rtw_ratetable[] = {
73 {.bitrate = 10, .hw_value = 0x00,},
74 {.bitrate = 20, .hw_value = 0x01,},
75 {.bitrate = 55, .hw_value = 0x02,},
76 {.bitrate = 110, .hw_value = 0x03,},
77 {.bitrate = 60, .hw_value = 0x04,},
78 {.bitrate = 90, .hw_value = 0x05,},
79 {.bitrate = 120, .hw_value = 0x06,},
80 {.bitrate = 180, .hw_value = 0x07,},
81 {.bitrate = 240, .hw_value = 0x08,},
82 {.bitrate = 360, .hw_value = 0x09,},
83 {.bitrate = 480, .hw_value = 0x0a,},
84 {.bitrate = 540, .hw_value = 0x0b,},
87 static struct ieee80211_supported_band rtw_band_2ghz = {
88 .band = NL80211_BAND_2GHZ,
90 .channels = rtw_channeltable_2g,
91 .n_channels = ARRAY_SIZE(rtw_channeltable_2g),
93 .bitrates = rtw_ratetable,
94 .n_bitrates = ARRAY_SIZE(rtw_ratetable),
100 static struct ieee80211_supported_band rtw_band_5ghz = {
101 .band = NL80211_BAND_5GHZ,
103 .channels = rtw_channeltable_5g,
104 .n_channels = ARRAY_SIZE(rtw_channeltable_5g),
106 /* 5G has no CCK rates */
107 .bitrates = rtw_ratetable + 4,
108 .n_bitrates = ARRAY_SIZE(rtw_ratetable) - 4,
114 struct rtw_watch_dog_iter_data {
115 struct rtw_vif *rtwvif;
120 static void rtw_vif_watch_dog_iter(void *data, u8 *mac,
121 struct ieee80211_vif *vif)
123 struct rtw_watch_dog_iter_data *iter_data = data;
124 struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv;
126 if (vif->type == NL80211_IFTYPE_STATION) {
127 if (vif->bss_conf.assoc) {
128 iter_data->assoc_cnt++;
129 iter_data->rtwvif = rtwvif;
131 if (rtwvif->stats.tx_cnt > RTW_LPS_THRESHOLD ||
132 rtwvif->stats.rx_cnt > RTW_LPS_THRESHOLD)
133 iter_data->active = true;
135 /* only STATION mode can enter lps */
136 iter_data->active = true;
139 rtwvif->stats.tx_unicast = 0;
140 rtwvif->stats.rx_unicast = 0;
141 rtwvif->stats.tx_cnt = 0;
142 rtwvif->stats.rx_cnt = 0;
145 /* process TX/RX statistics periodically for hardware,
146 * the information helps hardware to enhance performance
148 static void rtw_watch_dog_work(struct work_struct *work)
150 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev,
151 watch_dog_work.work);
152 struct rtw_watch_dog_iter_data data = {};
153 bool busy_traffic = rtw_flag_check(rtwdev, RTW_FLAG_BUSY_TRAFFIC);
155 if (!rtw_flag_check(rtwdev, RTW_FLAG_RUNNING))
158 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
159 RTW_WATCH_DOG_DELAY_TIME);
161 if (rtwdev->stats.tx_cnt > 100 || rtwdev->stats.rx_cnt > 100)
162 rtw_flag_set(rtwdev, RTW_FLAG_BUSY_TRAFFIC);
164 rtw_flag_clear(rtwdev, RTW_FLAG_BUSY_TRAFFIC);
166 if (busy_traffic != rtw_flag_check(rtwdev, RTW_FLAG_BUSY_TRAFFIC))
167 rtw_coex_wl_status_change_notify(rtwdev);
169 /* reset tx/rx statictics */
170 rtwdev->stats.tx_unicast = 0;
171 rtwdev->stats.rx_unicast = 0;
172 rtwdev->stats.tx_cnt = 0;
173 rtwdev->stats.rx_cnt = 0;
175 /* use atomic version to avoid taking local->iflist_mtx mutex */
176 rtw_iterate_vifs_atomic(rtwdev, rtw_vif_watch_dog_iter, &data);
178 /* fw supports only one station associated to enter lps, if there are
179 * more than two stations associated to the AP, then we can not enter
180 * lps, because fw does not handle the overlapped beacon interval
182 if (rtw_fw_support_lps &&
183 data.rtwvif && !data.active && data.assoc_cnt == 1)
184 rtw_enter_lps(rtwdev, data.rtwvif);
186 if (rtw_flag_check(rtwdev, RTW_FLAG_SCANNING))
189 rtw_phy_dynamic_mechanism(rtwdev);
191 rtwdev->watch_dog_cnt++;
194 static void rtw_c2h_work(struct work_struct *work)
196 struct rtw_dev *rtwdev = container_of(work, struct rtw_dev, c2h_work);
197 struct sk_buff *skb, *tmp;
199 skb_queue_walk_safe(&rtwdev->c2h_queue, skb, tmp) {
200 skb_unlink(skb, &rtwdev->c2h_queue);
201 rtw_fw_c2h_cmd_handle(rtwdev, skb);
202 dev_kfree_skb_any(skb);
206 void rtw_get_channel_params(struct cfg80211_chan_def *chandef,
207 struct rtw_channel_params *chan_params)
209 struct ieee80211_channel *channel = chandef->chan;
210 enum nl80211_chan_width width = chandef->width;
211 u8 *cch_by_bw = chan_params->cch_by_bw;
212 u32 primary_freq, center_freq;
214 u8 bandwidth = RTW_CHANNEL_WIDTH_20;
215 u8 primary_chan_idx = 0;
218 center_chan = channel->hw_value;
219 primary_freq = channel->center_freq;
220 center_freq = chandef->center_freq1;
222 /* assign the center channel used while 20M bw is selected */
223 cch_by_bw[RTW_CHANNEL_WIDTH_20] = channel->hw_value;
226 case NL80211_CHAN_WIDTH_20_NOHT:
227 case NL80211_CHAN_WIDTH_20:
228 bandwidth = RTW_CHANNEL_WIDTH_20;
229 primary_chan_idx = 0;
231 case NL80211_CHAN_WIDTH_40:
232 bandwidth = RTW_CHANNEL_WIDTH_40;
233 if (primary_freq > center_freq) {
234 primary_chan_idx = 1;
237 primary_chan_idx = 2;
241 case NL80211_CHAN_WIDTH_80:
242 bandwidth = RTW_CHANNEL_WIDTH_80;
243 if (primary_freq > center_freq) {
244 if (primary_freq - center_freq == 10) {
245 primary_chan_idx = 1;
248 primary_chan_idx = 3;
251 /* assign the center channel used
252 * while 40M bw is selected
254 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_chan + 4;
256 if (center_freq - primary_freq == 10) {
257 primary_chan_idx = 2;
260 primary_chan_idx = 4;
263 /* assign the center channel used
264 * while 40M bw is selected
266 cch_by_bw[RTW_CHANNEL_WIDTH_40] = center_chan - 4;
274 chan_params->center_chan = center_chan;
275 chan_params->bandwidth = bandwidth;
276 chan_params->primary_chan_idx = primary_chan_idx;
278 /* assign the center channel used while current bw is selected */
279 cch_by_bw[bandwidth] = center_chan;
281 for (i = bandwidth + 1; i <= RTW_MAX_CHANNEL_WIDTH; i++)
285 void rtw_set_channel(struct rtw_dev *rtwdev)
287 struct ieee80211_hw *hw = rtwdev->hw;
288 struct rtw_hal *hal = &rtwdev->hal;
289 struct rtw_chip_info *chip = rtwdev->chip;
290 struct rtw_channel_params ch_param;
291 u8 center_chan, bandwidth, primary_chan_idx;
294 rtw_get_channel_params(&hw->conf.chandef, &ch_param);
295 if (WARN(ch_param.center_chan == 0, "Invalid channel\n"))
298 center_chan = ch_param.center_chan;
299 bandwidth = ch_param.bandwidth;
300 primary_chan_idx = ch_param.primary_chan_idx;
302 hal->current_band_width = bandwidth;
303 hal->current_channel = center_chan;
304 hal->current_band_type = center_chan > 14 ? RTW_BAND_5G : RTW_BAND_2G;
306 for (i = RTW_CHANNEL_WIDTH_20; i <= RTW_MAX_CHANNEL_WIDTH; i++)
307 hal->cch_by_bw[i] = ch_param.cch_by_bw[i];
309 chip->ops->set_channel(rtwdev, center_chan, bandwidth, primary_chan_idx);
311 if (hal->current_band_type == RTW_BAND_5G) {
312 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_5G);
314 if (rtw_flag_check(rtwdev, RTW_FLAG_SCANNING))
315 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G);
317 rtw_coex_switchband_notify(rtwdev, COEX_SWITCH_TO_24G_NOFORSCAN);
320 rtw_phy_set_tx_power_level(rtwdev, center_chan);
323 static void rtw_vif_write_addr(struct rtw_dev *rtwdev, u32 start, u8 *addr)
327 for (i = 0; i < ETH_ALEN; i++)
328 rtw_write8(rtwdev, start + i, addr[i]);
331 void rtw_vif_port_config(struct rtw_dev *rtwdev,
332 struct rtw_vif *rtwvif,
337 if (config & PORT_SET_MAC_ADDR) {
338 addr = rtwvif->conf->mac_addr.addr;
339 rtw_vif_write_addr(rtwdev, addr, rtwvif->mac_addr);
341 if (config & PORT_SET_BSSID) {
342 addr = rtwvif->conf->bssid.addr;
343 rtw_vif_write_addr(rtwdev, addr, rtwvif->bssid);
345 if (config & PORT_SET_NET_TYPE) {
346 addr = rtwvif->conf->net_type.addr;
347 mask = rtwvif->conf->net_type.mask;
348 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type);
350 if (config & PORT_SET_AID) {
351 addr = rtwvif->conf->aid.addr;
352 mask = rtwvif->conf->aid.mask;
353 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid);
355 if (config & PORT_SET_BCN_CTRL) {
356 addr = rtwvif->conf->bcn_ctrl.addr;
357 mask = rtwvif->conf->bcn_ctrl.mask;
358 rtw_write8_mask(rtwdev, addr, mask, rtwvif->bcn_ctrl);
362 static u8 hw_bw_cap_to_bitamp(u8 bw_cap)
367 case EFUSE_HW_CAP_IGNORE:
368 case EFUSE_HW_CAP_SUPP_BW80:
369 bw |= BIT(RTW_CHANNEL_WIDTH_80);
371 case EFUSE_HW_CAP_SUPP_BW40:
372 bw |= BIT(RTW_CHANNEL_WIDTH_40);
375 bw |= BIT(RTW_CHANNEL_WIDTH_20);
382 static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num)
384 struct rtw_hal *hal = &rtwdev->hal;
386 if (hw_ant_num == EFUSE_HW_CAP_IGNORE ||
387 hw_ant_num >= hal->rf_path_num)
390 switch (hw_ant_num) {
392 hal->rf_type = RF_1T1R;
393 hal->rf_path_num = 1;
394 hal->antenna_tx = BB_PATH_A;
395 hal->antenna_rx = BB_PATH_A;
398 WARN(1, "invalid hw configuration from efuse\n");
403 static u64 get_vht_ra_mask(struct ieee80211_sta *sta)
406 u16 mcs_map = le16_to_cpu(sta->vht_cap.vht_mcs.rx_mcs_map);
410 /* 4SS, every two bits for MCS7/8/9 */
411 for (i = 0, nss = 12; i < 4; i++, mcs_map >>= 2, nss += 10) {
412 vht_mcs_cap = mcs_map & 0x3;
413 switch (vht_mcs_cap) {
415 ra_mask |= 0x3ffULL << nss;
418 ra_mask |= 0x1ffULL << nss;
421 ra_mask |= 0x0ffULL << nss;
431 static u8 get_rate_id(u8 wireless_set, enum rtw_bandwidth bw_mode, u8 tx_num)
435 switch (wireless_set) {
437 rate_id = RTW_RATEID_B_20M;
440 rate_id = RTW_RATEID_G;
442 case WIRELESS_CCK | WIRELESS_OFDM:
443 rate_id = RTW_RATEID_BG;
445 case WIRELESS_OFDM | WIRELESS_HT:
447 rate_id = RTW_RATEID_GN_N1SS;
448 else if (tx_num == 2)
449 rate_id = RTW_RATEID_GN_N2SS;
450 else if (tx_num == 3)
451 rate_id = RTW_RATEID_ARFR5_N_3SS;
453 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_HT:
454 if (bw_mode == RTW_CHANNEL_WIDTH_40) {
456 rate_id = RTW_RATEID_BGN_40M_1SS;
457 else if (tx_num == 2)
458 rate_id = RTW_RATEID_BGN_40M_2SS;
459 else if (tx_num == 3)
460 rate_id = RTW_RATEID_ARFR5_N_3SS;
461 else if (tx_num == 4)
462 rate_id = RTW_RATEID_ARFR7_N_4SS;
465 rate_id = RTW_RATEID_BGN_20M_1SS;
466 else if (tx_num == 2)
467 rate_id = RTW_RATEID_BGN_20M_2SS;
468 else if (tx_num == 3)
469 rate_id = RTW_RATEID_ARFR5_N_3SS;
470 else if (tx_num == 4)
471 rate_id = RTW_RATEID_ARFR7_N_4SS;
474 case WIRELESS_OFDM | WIRELESS_VHT:
476 rate_id = RTW_RATEID_ARFR1_AC_1SS;
477 else if (tx_num == 2)
478 rate_id = RTW_RATEID_ARFR0_AC_2SS;
479 else if (tx_num == 3)
480 rate_id = RTW_RATEID_ARFR4_AC_3SS;
481 else if (tx_num == 4)
482 rate_id = RTW_RATEID_ARFR6_AC_4SS;
484 case WIRELESS_CCK | WIRELESS_OFDM | WIRELESS_VHT:
485 if (bw_mode >= RTW_CHANNEL_WIDTH_80) {
487 rate_id = RTW_RATEID_ARFR1_AC_1SS;
488 else if (tx_num == 2)
489 rate_id = RTW_RATEID_ARFR0_AC_2SS;
490 else if (tx_num == 3)
491 rate_id = RTW_RATEID_ARFR4_AC_3SS;
492 else if (tx_num == 4)
493 rate_id = RTW_RATEID_ARFR6_AC_4SS;
496 rate_id = RTW_RATEID_ARFR2_AC_2G_1SS;
497 else if (tx_num == 2)
498 rate_id = RTW_RATEID_ARFR3_AC_2G_2SS;
499 else if (tx_num == 3)
500 rate_id = RTW_RATEID_ARFR4_AC_3SS;
501 else if (tx_num == 4)
502 rate_id = RTW_RATEID_ARFR6_AC_4SS;
512 #define RA_MASK_CCK_RATES 0x0000f
513 #define RA_MASK_OFDM_RATES 0x00ff0
514 #define RA_MASK_HT_RATES_1SS (0xff000ULL << 0)
515 #define RA_MASK_HT_RATES_2SS (0xff000ULL << 8)
516 #define RA_MASK_HT_RATES_3SS (0xff000ULL << 16)
517 #define RA_MASK_HT_RATES (RA_MASK_HT_RATES_1SS | \
518 RA_MASK_HT_RATES_2SS | \
519 RA_MASK_HT_RATES_3SS)
520 #define RA_MASK_VHT_RATES_1SS (0x3ff000ULL << 0)
521 #define RA_MASK_VHT_RATES_2SS (0x3ff000ULL << 10)
522 #define RA_MASK_VHT_RATES_3SS (0x3ff000ULL << 20)
523 #define RA_MASK_VHT_RATES (RA_MASK_VHT_RATES_1SS | \
524 RA_MASK_VHT_RATES_2SS | \
525 RA_MASK_VHT_RATES_3SS)
526 #define RA_MASK_CCK_IN_HT 0x00005
527 #define RA_MASK_CCK_IN_VHT 0x00005
528 #define RA_MASK_OFDM_IN_VHT 0x00010
529 #define RA_MASK_OFDM_IN_HT_2G 0x00010
530 #define RA_MASK_OFDM_IN_HT_5G 0x00030
532 void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si)
534 struct ieee80211_sta *sta = si->sta;
535 struct rtw_efuse *efuse = &rtwdev->efuse;
536 struct rtw_hal *hal = &rtwdev->hal;
541 u8 rf_type = RF_1T1R;
546 bool is_vht_enable = false;
547 bool is_support_sgi = false;
549 if (sta->vht_cap.vht_supported) {
550 is_vht_enable = true;
551 ra_mask |= get_vht_ra_mask(sta);
552 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK)
553 stbc_en = VHT_STBC_EN;
554 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC)
555 ldpc_en = VHT_LDPC_EN;
556 if (sta->vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80)
557 is_support_sgi = true;
558 } else if (sta->ht_cap.ht_supported) {
559 ra_mask |= (sta->ht_cap.mcs.rx_mask[1] << 20) |
560 (sta->ht_cap.mcs.rx_mask[0] << 12);
561 if (sta->ht_cap.cap & IEEE80211_HT_CAP_RX_STBC)
562 stbc_en = HT_STBC_EN;
563 if (sta->ht_cap.cap & IEEE80211_HT_CAP_LDPC_CODING)
564 ldpc_en = HT_LDPC_EN;
565 if (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_20 ||
566 sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40)
567 is_support_sgi = true;
570 if (efuse->hw_cap.nss == 1)
571 ra_mask &= RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS;
573 if (hal->current_band_type == RTW_BAND_5G) {
574 ra_mask |= (u64)sta->supp_rates[NL80211_BAND_5GHZ] << 4;
575 if (sta->vht_cap.vht_supported) {
576 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT;
577 wireless_set = WIRELESS_OFDM | WIRELESS_VHT;
578 } else if (sta->ht_cap.ht_supported) {
579 ra_mask &= RA_MASK_HT_RATES | RA_MASK_OFDM_IN_HT_5G;
580 wireless_set = WIRELESS_OFDM | WIRELESS_HT;
582 wireless_set = WIRELESS_OFDM;
584 } else if (hal->current_band_type == RTW_BAND_2G) {
585 ra_mask |= sta->supp_rates[NL80211_BAND_2GHZ];
586 if (sta->vht_cap.vht_supported) {
587 ra_mask &= RA_MASK_VHT_RATES | RA_MASK_CCK_IN_VHT |
589 wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
590 WIRELESS_HT | WIRELESS_VHT;
591 } else if (sta->ht_cap.ht_supported) {
592 ra_mask &= RA_MASK_HT_RATES | RA_MASK_CCK_IN_HT |
593 RA_MASK_OFDM_IN_HT_2G;
594 wireless_set = WIRELESS_CCK | WIRELESS_OFDM |
596 } else if (sta->supp_rates[0] <= 0xf) {
597 wireless_set = WIRELESS_CCK;
599 wireless_set = WIRELESS_CCK | WIRELESS_OFDM;
602 rtw_err(rtwdev, "Unknown band type\n");
606 switch (sta->bandwidth) {
607 case IEEE80211_STA_RX_BW_80:
608 bw_mode = RTW_CHANNEL_WIDTH_80;
610 case IEEE80211_STA_RX_BW_40:
611 bw_mode = RTW_CHANNEL_WIDTH_40;
614 bw_mode = RTW_CHANNEL_WIDTH_20;
618 if (sta->vht_cap.vht_supported && ra_mask & 0xffc00000) {
621 } else if (sta->ht_cap.ht_supported && ra_mask & 0xfff00000) {
626 rate_id = get_rate_id(wireless_set, bw_mode, tx_num);
628 if (wireless_set != WIRELESS_CCK) {
629 rssi_level = si->rssi_level;
631 ra_mask &= 0xffffffffffffffffULL;
632 else if (rssi_level == 1)
633 ra_mask &= 0xfffffffffffffff0ULL;
634 else if (rssi_level == 2)
635 ra_mask &= 0xffffffffffffefe0ULL;
636 else if (rssi_level == 3)
637 ra_mask &= 0xffffffffffffcfc0ULL;
638 else if (rssi_level == 4)
639 ra_mask &= 0xffffffffffff8f80ULL;
640 else if (rssi_level >= 5)
641 ra_mask &= 0xffffffffffff0f00ULL;
644 si->bw_mode = bw_mode;
645 si->stbc_en = stbc_en;
646 si->ldpc_en = ldpc_en;
647 si->rf_type = rf_type;
648 si->wireless_set = wireless_set;
649 si->sgi_enable = is_support_sgi;
650 si->vht_enable = is_vht_enable;
651 si->ra_mask = ra_mask;
652 si->rate_id = rate_id;
654 rtw_fw_send_ra_info(rtwdev, si);
657 static int rtw_power_on(struct rtw_dev *rtwdev)
659 struct rtw_chip_info *chip = rtwdev->chip;
660 struct rtw_fw_state *fw = &rtwdev->fw;
664 ret = rtw_hci_setup(rtwdev);
666 rtw_err(rtwdev, "failed to setup hci\n");
670 /* power on MAC before firmware downloaded */
671 ret = rtw_mac_power_on(rtwdev);
673 rtw_err(rtwdev, "failed to power on mac\n");
677 wait_for_completion(&fw->completion);
680 rtw_err(rtwdev, "failed to load firmware\n");
684 ret = rtw_download_firmware(rtwdev, fw);
686 rtw_err(rtwdev, "failed to download firmware\n");
690 /* config mac after firmware downloaded */
691 ret = rtw_mac_init(rtwdev);
693 rtw_err(rtwdev, "failed to configure mac\n");
697 chip->ops->phy_set_param(rtwdev);
699 ret = rtw_hci_start(rtwdev);
701 rtw_err(rtwdev, "failed to start hci\n");
705 /* send H2C after HCI has started */
706 rtw_fw_send_general_info(rtwdev);
707 rtw_fw_send_phydm_info(rtwdev);
709 wifi_only = !rtwdev->efuse.btcoex;
710 rtw_coex_power_on_setting(rtwdev);
711 rtw_coex_init_hw_config(rtwdev, wifi_only);
716 rtw_mac_power_off(rtwdev);
722 int rtw_core_start(struct rtw_dev *rtwdev)
726 ret = rtw_power_on(rtwdev);
730 rtw_sec_enable_sec_engine(rtwdev);
732 /* rcr reset after powered on */
733 rtw_write32(rtwdev, REG_RCR, rtwdev->hal.rcr);
735 ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->watch_dog_work,
736 RTW_WATCH_DOG_DELAY_TIME);
738 rtw_flag_set(rtwdev, RTW_FLAG_RUNNING);
743 static void rtw_power_off(struct rtw_dev *rtwdev)
745 rtwdev->hci.ops->stop(rtwdev);
746 rtw_mac_power_off(rtwdev);
749 void rtw_core_stop(struct rtw_dev *rtwdev)
751 struct rtw_coex *coex = &rtwdev->coex;
753 rtw_flag_clear(rtwdev, RTW_FLAG_RUNNING);
754 rtw_flag_clear(rtwdev, RTW_FLAG_FW_RUNNING);
756 cancel_delayed_work_sync(&rtwdev->watch_dog_work);
757 cancel_delayed_work_sync(&coex->bt_relink_work);
758 cancel_delayed_work_sync(&coex->bt_reenable_work);
759 cancel_delayed_work_sync(&coex->defreeze_work);
761 rtw_power_off(rtwdev);
764 static void rtw_init_ht_cap(struct rtw_dev *rtwdev,
765 struct ieee80211_sta_ht_cap *ht_cap)
767 struct rtw_efuse *efuse = &rtwdev->efuse;
769 ht_cap->ht_supported = true;
771 ht_cap->cap |= IEEE80211_HT_CAP_SGI_20 |
772 IEEE80211_HT_CAP_MAX_AMSDU |
773 IEEE80211_HT_CAP_LDPC_CODING |
774 (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
775 if (efuse->hw_cap.bw & BIT(RTW_CHANNEL_WIDTH_40))
776 ht_cap->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
777 IEEE80211_HT_CAP_DSSSCCK40 |
778 IEEE80211_HT_CAP_SGI_40;
779 ht_cap->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
780 ht_cap->ampdu_density = IEEE80211_HT_MPDU_DENSITY_16;
781 ht_cap->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
782 if (efuse->hw_cap.nss > 1) {
783 ht_cap->mcs.rx_mask[0] = 0xFF;
784 ht_cap->mcs.rx_mask[1] = 0xFF;
785 ht_cap->mcs.rx_mask[4] = 0x01;
786 ht_cap->mcs.rx_highest = cpu_to_le16(300);
788 ht_cap->mcs.rx_mask[0] = 0xFF;
789 ht_cap->mcs.rx_mask[1] = 0x00;
790 ht_cap->mcs.rx_mask[4] = 0x01;
791 ht_cap->mcs.rx_highest = cpu_to_le16(150);
795 static void rtw_init_vht_cap(struct rtw_dev *rtwdev,
796 struct ieee80211_sta_vht_cap *vht_cap)
798 struct rtw_efuse *efuse = &rtwdev->efuse;
802 if (efuse->hw_cap.ptcl != EFUSE_HW_CAP_IGNORE &&
803 efuse->hw_cap.ptcl != EFUSE_HW_CAP_PTCL_VHT)
806 vht_cap->vht_supported = true;
807 vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
808 IEEE80211_VHT_CAP_RXLDPC |
809 IEEE80211_VHT_CAP_SHORT_GI_80 |
810 IEEE80211_VHT_CAP_TXSTBC |
811 IEEE80211_VHT_CAP_RXSTBC_1 |
812 IEEE80211_VHT_CAP_HTC_VHT |
813 IEEE80211_VHT_CAP_MAX_A_MPDU_LENGTH_EXPONENT_MASK |
815 mcs_map = IEEE80211_VHT_MCS_SUPPORT_0_9 << 0 |
816 IEEE80211_VHT_MCS_NOT_SUPPORTED << 4 |
817 IEEE80211_VHT_MCS_NOT_SUPPORTED << 6 |
818 IEEE80211_VHT_MCS_NOT_SUPPORTED << 8 |
819 IEEE80211_VHT_MCS_NOT_SUPPORTED << 10 |
820 IEEE80211_VHT_MCS_NOT_SUPPORTED << 12 |
821 IEEE80211_VHT_MCS_NOT_SUPPORTED << 14;
822 if (efuse->hw_cap.nss > 1) {
823 highest = cpu_to_le16(780);
824 mcs_map |= IEEE80211_VHT_MCS_SUPPORT_0_9 << 2;
826 highest = cpu_to_le16(390);
827 mcs_map |= IEEE80211_VHT_MCS_NOT_SUPPORTED << 2;
830 vht_cap->vht_mcs.rx_mcs_map = cpu_to_le16(mcs_map);
831 vht_cap->vht_mcs.tx_mcs_map = cpu_to_le16(mcs_map);
832 vht_cap->vht_mcs.rx_highest = highest;
833 vht_cap->vht_mcs.tx_highest = highest;
836 static void rtw_set_supported_band(struct ieee80211_hw *hw,
837 struct rtw_chip_info *chip)
839 struct rtw_dev *rtwdev = hw->priv;
840 struct ieee80211_supported_band *sband;
842 if (chip->band & RTW_BAND_2G) {
843 sband = kmemdup(&rtw_band_2ghz, sizeof(*sband), GFP_KERNEL);
846 if (chip->ht_supported)
847 rtw_init_ht_cap(rtwdev, &sband->ht_cap);
848 hw->wiphy->bands[NL80211_BAND_2GHZ] = sband;
851 if (chip->band & RTW_BAND_5G) {
852 sband = kmemdup(&rtw_band_5ghz, sizeof(*sband), GFP_KERNEL);
855 if (chip->ht_supported)
856 rtw_init_ht_cap(rtwdev, &sband->ht_cap);
857 if (chip->vht_supported)
858 rtw_init_vht_cap(rtwdev, &sband->vht_cap);
859 hw->wiphy->bands[NL80211_BAND_5GHZ] = sband;
865 rtw_err(rtwdev, "failed to set supported band\n");
869 static void rtw_unset_supported_band(struct ieee80211_hw *hw,
870 struct rtw_chip_info *chip)
872 kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]);
873 kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]);
876 static void rtw_load_firmware_cb(const struct firmware *firmware, void *context)
878 struct rtw_dev *rtwdev = context;
879 struct rtw_fw_state *fw = &rtwdev->fw;
882 rtw_err(rtwdev, "failed to request firmware\n");
884 fw->firmware = firmware;
885 complete_all(&fw->completion);
888 static int rtw_load_firmware(struct rtw_dev *rtwdev, const char *fw_name)
890 struct rtw_fw_state *fw = &rtwdev->fw;
893 init_completion(&fw->completion);
895 ret = reject_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev,
896 GFP_KERNEL, rtwdev, rtw_load_firmware_cb);
898 rtw_err(rtwdev, "async firmware request failed\n");
905 static int rtw_chip_parameter_setup(struct rtw_dev *rtwdev)
907 struct rtw_chip_info *chip = rtwdev->chip;
908 struct rtw_hal *hal = &rtwdev->hal;
909 struct rtw_efuse *efuse = &rtwdev->efuse;
912 switch (rtw_hci_type(rtwdev)) {
913 case RTW_HCI_TYPE_PCIE:
914 rtwdev->hci.rpwm_addr = 0x03d9;
917 rtw_err(rtwdev, "unsupported hci type\n");
921 hal->chip_version = rtw_read32(rtwdev, REG_SYS_CFG1);
922 hal->fab_version = BIT_GET_VENDOR_ID(hal->chip_version) >> 2;
923 hal->cut_version = BIT_GET_CHIP_VER(hal->chip_version);
924 hal->mp_chip = (hal->chip_version & BIT_RTL_ID) ? 0 : 1;
925 if (hal->chip_version & BIT_RF_TYPE_ID) {
926 hal->rf_type = RF_2T2R;
927 hal->rf_path_num = 2;
928 hal->antenna_tx = BB_PATH_AB;
929 hal->antenna_rx = BB_PATH_AB;
931 hal->rf_type = RF_1T1R;
932 hal->rf_path_num = 1;
933 hal->antenna_tx = BB_PATH_A;
934 hal->antenna_rx = BB_PATH_A;
937 if (hal->fab_version == 2)
938 hal->fab_version = 1;
939 else if (hal->fab_version == 1)
940 hal->fab_version = 2;
942 efuse->physical_size = chip->phy_efuse_size;
943 efuse->logical_size = chip->log_efuse_size;
944 efuse->protect_size = chip->ptct_efuse_size;
946 /* default use ack */
947 rtwdev->hal.rcr |= BIT_VHT_DACK;
952 static int rtw_chip_efuse_enable(struct rtw_dev *rtwdev)
954 struct rtw_fw_state *fw = &rtwdev->fw;
957 ret = rtw_hci_setup(rtwdev);
959 rtw_err(rtwdev, "failed to setup hci\n");
963 ret = rtw_mac_power_on(rtwdev);
965 rtw_err(rtwdev, "failed to power on mac\n");
969 rtw_write8(rtwdev, REG_C2HEVT, C2H_HW_FEATURE_DUMP);
971 wait_for_completion(&fw->completion);
974 rtw_err(rtwdev, "failed to load firmware\n");
978 ret = rtw_download_firmware(rtwdev, fw);
980 rtw_err(rtwdev, "failed to download firmware\n");
987 rtw_mac_power_off(rtwdev);
993 static int rtw_dump_hw_feature(struct rtw_dev *rtwdev)
995 struct rtw_efuse *efuse = &rtwdev->efuse;
996 u8 hw_feature[HW_FEATURE_LEN];
1001 id = rtw_read8(rtwdev, REG_C2HEVT);
1002 if (id != C2H_HW_FEATURE_REPORT) {
1003 rtw_err(rtwdev, "failed to read hw feature report\n");
1007 for (i = 0; i < HW_FEATURE_LEN; i++)
1008 hw_feature[i] = rtw_read8(rtwdev, REG_C2HEVT + 2 + i);
1010 rtw_write8(rtwdev, REG_C2HEVT, 0);
1012 bw = GET_EFUSE_HW_CAP_BW(hw_feature);
1013 efuse->hw_cap.bw = hw_bw_cap_to_bitamp(bw);
1014 efuse->hw_cap.hci = GET_EFUSE_HW_CAP_HCI(hw_feature);
1015 efuse->hw_cap.nss = GET_EFUSE_HW_CAP_NSS(hw_feature);
1016 efuse->hw_cap.ptcl = GET_EFUSE_HW_CAP_PTCL(hw_feature);
1017 efuse->hw_cap.ant_num = GET_EFUSE_HW_CAP_ANT_NUM(hw_feature);
1019 rtw_hw_config_rf_ant_num(rtwdev, efuse->hw_cap.ant_num);
1021 if (efuse->hw_cap.nss == EFUSE_HW_CAP_IGNORE ||
1022 efuse->hw_cap.nss > rtwdev->hal.rf_path_num)
1023 efuse->hw_cap.nss = rtwdev->hal.rf_path_num;
1025 rtw_dbg(rtwdev, RTW_DBG_EFUSE,
1026 "hw cap: hci=0x%02x, bw=0x%02x, ptcl=0x%02x, ant_num=%d, nss=%d\n",
1027 efuse->hw_cap.hci, efuse->hw_cap.bw, efuse->hw_cap.ptcl,
1028 efuse->hw_cap.ant_num, efuse->hw_cap.nss);
1033 static void rtw_chip_efuse_disable(struct rtw_dev *rtwdev)
1035 rtw_hci_stop(rtwdev);
1036 rtw_mac_power_off(rtwdev);
1039 static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev)
1041 struct rtw_efuse *efuse = &rtwdev->efuse;
1044 mutex_lock(&rtwdev->mutex);
1046 /* power on mac to read efuse */
1047 ret = rtw_chip_efuse_enable(rtwdev);
1051 ret = rtw_parse_efuse_map(rtwdev);
1055 ret = rtw_dump_hw_feature(rtwdev);
1059 ret = rtw_check_supported_rfe(rtwdev);
1063 if (efuse->crystal_cap == 0xff)
1064 efuse->crystal_cap = 0;
1065 if (efuse->pa_type_2g == 0xff)
1066 efuse->pa_type_2g = 0;
1067 if (efuse->pa_type_5g == 0xff)
1068 efuse->pa_type_5g = 0;
1069 if (efuse->lna_type_2g == 0xff)
1070 efuse->lna_type_2g = 0;
1071 if (efuse->lna_type_5g == 0xff)
1072 efuse->lna_type_5g = 0;
1073 if (efuse->channel_plan == 0xff)
1074 efuse->channel_plan = 0x7f;
1075 if (efuse->rf_board_option == 0xff)
1076 efuse->rf_board_option = 0;
1077 if (efuse->bt_setting & BIT(0))
1078 efuse->share_ant = true;
1079 if (efuse->regd == 0xff)
1082 efuse->btcoex = (efuse->rf_board_option & 0xe0) == 0x20;
1083 efuse->ext_pa_2g = efuse->pa_type_2g & BIT(4) ? 1 : 0;
1084 efuse->ext_lna_2g = efuse->lna_type_2g & BIT(3) ? 1 : 0;
1085 efuse->ext_pa_5g = efuse->pa_type_5g & BIT(0) ? 1 : 0;
1086 efuse->ext_lna_2g = efuse->lna_type_5g & BIT(3) ? 1 : 0;
1089 rtw_chip_efuse_disable(rtwdev);
1092 mutex_unlock(&rtwdev->mutex);
1096 static int rtw_chip_board_info_setup(struct rtw_dev *rtwdev)
1098 struct rtw_hal *hal = &rtwdev->hal;
1099 const struct rtw_rfe_def *rfe_def = rtw_get_rfe_def(rtwdev);
1104 rtw_phy_setup_phy_cond(rtwdev, 0);
1106 rtw_phy_init_tx_power(rtwdev);
1107 rtw_load_table(rtwdev, rfe_def->phy_pg_tbl);
1108 rtw_load_table(rtwdev, rfe_def->txpwr_lmt_tbl);
1109 rtw_phy_tx_power_by_rate_config(hal);
1110 rtw_phy_tx_power_limit_config(hal);
1115 int rtw_chip_info_setup(struct rtw_dev *rtwdev)
1119 ret = rtw_chip_parameter_setup(rtwdev);
1121 rtw_err(rtwdev, "failed to setup chip parameters\n");
1125 ret = rtw_chip_efuse_info_setup(rtwdev);
1127 rtw_err(rtwdev, "failed to setup chip efuse info\n");
1131 ret = rtw_chip_board_info_setup(rtwdev);
1133 rtw_err(rtwdev, "failed to setup chip board info\n");
1142 EXPORT_SYMBOL(rtw_chip_info_setup);
1144 int rtw_core_init(struct rtw_dev *rtwdev)
1146 struct rtw_coex *coex = &rtwdev->coex;
1149 INIT_LIST_HEAD(&rtwdev->rsvd_page_list);
1151 timer_setup(&rtwdev->tx_report.purge_timer,
1152 rtw_tx_report_purge_timer, 0);
1154 INIT_DELAYED_WORK(&rtwdev->watch_dog_work, rtw_watch_dog_work);
1155 INIT_DELAYED_WORK(&rtwdev->lps_work, rtw_lps_work);
1156 INIT_DELAYED_WORK(&coex->bt_relink_work, rtw_coex_bt_relink_work);
1157 INIT_DELAYED_WORK(&coex->bt_reenable_work, rtw_coex_bt_reenable_work);
1158 INIT_DELAYED_WORK(&coex->defreeze_work, rtw_coex_defreeze_work);
1159 INIT_WORK(&rtwdev->c2h_work, rtw_c2h_work);
1160 skb_queue_head_init(&rtwdev->c2h_queue);
1161 skb_queue_head_init(&rtwdev->coex.queue);
1162 skb_queue_head_init(&rtwdev->tx_report.queue);
1164 spin_lock_init(&rtwdev->dm_lock);
1165 spin_lock_init(&rtwdev->rf_lock);
1166 spin_lock_init(&rtwdev->h2c.lock);
1167 spin_lock_init(&rtwdev->tx_report.q_lock);
1169 mutex_init(&rtwdev->mutex);
1170 mutex_init(&rtwdev->coex.mutex);
1171 mutex_init(&rtwdev->hal.tx_power_mutex);
1173 init_waitqueue_head(&rtwdev->coex.wait);
1175 rtwdev->sec.total_cam_num = 32;
1176 rtwdev->hal.current_channel = 1;
1177 set_bit(RTW_BC_MC_MACID, rtwdev->mac_id_map);
1179 mutex_lock(&rtwdev->mutex);
1180 rtw_add_rsvd_page(rtwdev, RSVD_BEACON, false);
1181 mutex_unlock(&rtwdev->mutex);
1183 /* default rx filter setting */
1184 rtwdev->hal.rcr = BIT_APP_FCS | BIT_APP_MIC | BIT_APP_ICV |
1185 BIT_HTC_LOC_CTRL | BIT_APP_PHYSTS |
1186 BIT_AB | BIT_AM | BIT_APM;
1188 ret = rtw_load_firmware(rtwdev, rtwdev->chip->fw_name);
1190 rtw_warn(rtwdev, "no firmware loaded\n");
1196 EXPORT_SYMBOL(rtw_core_init);
1198 void rtw_core_deinit(struct rtw_dev *rtwdev)
1200 struct rtw_fw_state *fw = &rtwdev->fw;
1201 struct rtw_rsvd_page *rsvd_pkt, *tmp;
1202 unsigned long flags;
1205 release_firmware(fw->firmware);
1207 spin_lock_irqsave(&rtwdev->tx_report.q_lock, flags);
1208 skb_queue_purge(&rtwdev->tx_report.queue);
1209 spin_unlock_irqrestore(&rtwdev->tx_report.q_lock, flags);
1211 list_for_each_entry_safe(rsvd_pkt, tmp, &rtwdev->rsvd_page_list, list) {
1212 list_del(&rsvd_pkt->list);
1216 mutex_destroy(&rtwdev->mutex);
1217 mutex_destroy(&rtwdev->coex.mutex);
1218 mutex_destroy(&rtwdev->hal.tx_power_mutex);
1220 EXPORT_SYMBOL(rtw_core_deinit);
1222 int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
1224 int max_tx_headroom = 0;
1227 /* TODO: USB & SDIO may need extra room? */
1228 max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz;
1230 hw->extra_tx_headroom = max_tx_headroom;
1231 hw->queues = IEEE80211_NUM_ACS;
1232 hw->sta_data_size = sizeof(struct rtw_sta_info);
1233 hw->vif_data_size = sizeof(struct rtw_vif);
1235 ieee80211_hw_set(hw, SIGNAL_DBM);
1236 ieee80211_hw_set(hw, RX_INCLUDES_FCS);
1237 ieee80211_hw_set(hw, AMPDU_AGGREGATION);
1238 ieee80211_hw_set(hw, MFP_CAPABLE);
1239 ieee80211_hw_set(hw, REPORTS_TX_ACK_STATUS);
1240 ieee80211_hw_set(hw, SUPPORTS_PS);
1241 ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS);
1242 ieee80211_hw_set(hw, SUPPORT_FAST_XMIT);
1243 ieee80211_hw_set(hw, SUPPORTS_AMSDU_IN_AMPDU);
1245 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1246 BIT(NL80211_IFTYPE_AP) |
1247 BIT(NL80211_IFTYPE_ADHOC) |
1248 BIT(NL80211_IFTYPE_MESH_POINT);
1250 hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS |
1251 WIPHY_FLAG_TDLS_EXTERNAL_SETUP;
1253 hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR;
1255 rtw_set_supported_band(hw, rtwdev->chip);
1256 SET_IEEE80211_PERM_ADDR(hw, rtwdev->efuse.addr);
1258 rtw_regd_init(rtwdev, rtw_regd_notifier);
1260 ret = ieee80211_register_hw(hw);
1262 rtw_err(rtwdev, "failed to register hw\n");
1266 if (regulatory_hint(hw->wiphy, rtwdev->regd.alpha2))
1267 rtw_err(rtwdev, "regulatory_hint fail\n");
1269 rtw_debugfs_init(rtwdev);
1273 EXPORT_SYMBOL(rtw_register_hw);
1275 void rtw_unregister_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw)
1277 struct rtw_chip_info *chip = rtwdev->chip;
1279 ieee80211_unregister_hw(hw);
1280 rtw_unset_supported_band(hw, chip);
1282 EXPORT_SYMBOL(rtw_unregister_hw);
1284 MODULE_AUTHOR("Realtek Corporation");
1285 MODULE_DESCRIPTION("Realtek 802.11ac wireless core module");
1286 MODULE_LICENSE("Dual BSD/GPL");