drivers/net/wireless/realtek/rtlwifi/pci.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2012  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * The full GNU General Public License is included in this distribution in the
  15  * file called LICENSE.
  16  *
  17  * Contact Information:
  18  * wlanfae <wlanfae@realtek.com>
  19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20  * Hsinchu 300, Taiwan.
  21  *
  22  * Larry Finger <Larry.Finger@lwfinger.net>
  23  *
  24  *****************************************************************************/
  25
  26 #include "wifi.h"
  27 #include "core.h"
  28 #include "pci.h"
  29 #include "base.h"
  30 #include "ps.h"
  31 #include "efuse.h"
  32 #include <linux/interrupt.h>
  33 #include <linux/export.h>
  34 #include <linux/kmemleak.h>
  35 #include <linux/module.h>
  36
  37 MODULE_AUTHOR("lizhaoming       <chaoming_li@realsil.com.cn>");
  38 MODULE_AUTHOR("Realtek WlanFAE  <wlanfae@realtek.com>");
  39 MODULE_AUTHOR("Larry Finger     <Larry.FInger@lwfinger.net>");
  40 MODULE_LICENSE("GPL");
  41 MODULE_DESCRIPTION("PCI basic driver for rtlwifi");
  42
  43 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
  44         INTEL_VENDOR_ID,
  45         ATI_VENDOR_ID,
  46         AMD_VENDOR_ID,
  47         SIS_VENDOR_ID
  48 };
  49
  50 static const u8 ac_to_hwq[] = {
  51         VO_QUEUE,
  52         VI_QUEUE,
  53         BE_QUEUE,
  54         BK_QUEUE
  55 };
  56
  57 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
  58                        struct sk_buff *skb)
  59 {
  60         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  61         __le16 fc = rtl_get_fc(skb);
  62         u8 queue_index = skb_get_queue_mapping(skb);
  63
  64         if (unlikely(ieee80211_is_beacon(fc)))
  65                 return BEACON_QUEUE;
  66         if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
  67                 return MGNT_QUEUE;
  68         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
  69                 if (ieee80211_is_nullfunc(fc))
  70                         return HIGH_QUEUE;
  71
  72         return ac_to_hwq[queue_index];
  73 }
  74
  75 /* Update PCI dependent default settings*/
  76 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
  77 {
  78         struct rtl_priv *rtlpriv = rtl_priv(hw);
  79         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
  80         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  81         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  82         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
  83         u8 init_aspm;
  84
  85         ppsc->reg_rfps_level = 0;
  86         ppsc->support_aspm = false;
  87
  88         /*Update PCI ASPM setting */
  89         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
  90         switch (rtlpci->const_pci_aspm) {
  91         case 0:
  92                 /*No ASPM */
  93                 break;
  94
  95         case 1:
  96                 /*ASPM dynamically enabled/disable. */
  97                 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
  98                 break;
  99
 100         case 2:
 101                 /*ASPM with Clock Req dynamically enabled/disable. */
 102                 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
 103                                          RT_RF_OFF_LEVL_CLK_REQ);
 104                 break;
 105
 106         case 3:
 107                 /*
 108                  * Always enable ASPM and Clock Req
 109                  * from initialization to halt.
 110                  * */
 111                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
 112                 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
 113                                          RT_RF_OFF_LEVL_CLK_REQ);
 114                 break;
 115
 116         case 4:
 117                 /*
 118                  * Always enable ASPM without Clock Req
 119                  * from initialization to halt.
 120                  * */
 121                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
 122                                           RT_RF_OFF_LEVL_CLK_REQ);
 123                 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
 124                 break;
 125         }
 126
 127         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 128
 129         /*Update Radio OFF setting */
 130         switch (rtlpci->const_hwsw_rfoff_d3) {
 131         case 1:
 132                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 133                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 134                 break;
 135
 136         case 2:
 137                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 138                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 139                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 140                 break;
 141
 142         case 3:
 143                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
 144                 break;
 145         }
 146
 147         /*Set HW definition to determine if it supports ASPM. */
 148         switch (rtlpci->const_support_pciaspm) {
 149         case 0:{
 150                         /*Not support ASPM. */
 151                         bool support_aspm = false;
 152                         ppsc->support_aspm = support_aspm;
 153                         break;
 154                 }
 155         case 1:{
 156                         /*Support ASPM. */
 157                         bool support_aspm = true;
 158                         bool support_backdoor = true;
 159                         ppsc->support_aspm = support_aspm;
 160
 161                         /*if (priv->oem_id == RT_CID_TOSHIBA &&
 162                            !priv->ndis_adapter.amd_l1_patch)
 163                            support_backdoor = false; */
 164
 165                         ppsc->support_backdoor = support_backdoor;
 166
 167                         break;
 168                 }
 169         case 2:
 170                 /*ASPM value set by chipset. */
 171                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
 172                         bool support_aspm = true;
 173                         ppsc->support_aspm = support_aspm;
 174                 }
 175                 break;
 176         default:
 177                 pr_err("switch case %#x not processed\n",
 178                        rtlpci->const_support_pciaspm);
 179                 break;
 180         }
 181
 182         /* toshiba aspm issue, toshiba will set aspm selfly
 183          * so we should not set aspm in driver */
 184         pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
 185         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
 186                 init_aspm == 0x43)
 187                 ppsc->support_aspm = false;
 188 }
 189
 190 static bool _rtl_pci_platform_switch_device_pci_aspm(
 191                         struct ieee80211_hw *hw,
 192                         u8 value)
 193 {
 194         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 195         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 196
 197         if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
 198                 value |= 0x40;
 199
 200         pci_write_config_byte(rtlpci->pdev, 0x80, value);
 201
 202         return false;
 203 }
 204
 205 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
 206 static void _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
 207 {
 208         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 209         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 210
 211         pci_write_config_byte(rtlpci->pdev, 0x81, value);
 212
 213         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
 214                 udelay(100);
 215 }
 216
 217 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
 218 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
 219 {
 220         struct rtl_priv *rtlpriv = rtl_priv(hw);
 221         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 222         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 223         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 224         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 225         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 226         /*Retrieve original configuration settings. */
 227         u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
 228         u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
 229                                 pcibridge_linkctrlreg;
 230         u16 aspmlevel = 0;
 231         u8 tmp_u1b = 0;
 232
 233         if (!ppsc->support_aspm)
 234                 return;
 235
 236         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 237                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 238                          "PCI(Bridge) UNKNOWN\n");
 239
 240                 return;
 241         }
 242
 243         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 244                 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 245                 _rtl_pci_switch_clk_req(hw, 0x0);
 246         }
 247
 248         /*for promising device will in L0 state after an I/O. */
 249         pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
 250
 251         /*Set corresponding value. */
 252         aspmlevel |= BIT(0) | BIT(1);
 253         linkctrl_reg &= ~aspmlevel;
 254         pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
 255
 256         _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
 257         udelay(50);
 258
 259         /*4 Disable Pci Bridge ASPM */
 260         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 261                               pcibridge_linkctrlreg);
 262
 263         udelay(50);
 264 }
 265
 266 /*
 267  *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
 268  *power saving We should follow the sequence to enable
 269  *RTL8192SE first then enable Pci Bridge ASPM
 270  *or the system will show bluescreen.
 271  */
 272 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
 273 {
 274         struct rtl_priv *rtlpriv = rtl_priv(hw);
 275         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 276         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 277         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 278         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 279         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 280         u16 aspmlevel;
 281         u8 u_pcibridge_aspmsetting;
 282         u8 u_device_aspmsetting;
 283
 284         if (!ppsc->support_aspm)
 285                 return;
 286
 287         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 288                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 289                          "PCI(Bridge) UNKNOWN\n");
 290                 return;
 291         }
 292
 293         /*4 Enable Pci Bridge ASPM */
 294
 295         u_pcibridge_aspmsetting =
 296             pcipriv->ndis_adapter.pcibridge_linkctrlreg |
 297             rtlpci->const_hostpci_aspm_setting;
 298
 299         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 300                 u_pcibridge_aspmsetting &= ~BIT(0);
 301
 302         pci_write_config_byte(rtlpci->pdev, (num4bytes << 2),
 303                               u_pcibridge_aspmsetting);
 304
 305         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 306                  "PlatformEnableASPM(): Write reg[%x] = %x\n",
 307                  (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
 308                  u_pcibridge_aspmsetting);
 309
 310         udelay(50);
 311
 312         /*Get ASPM level (with/without Clock Req) */
 313         aspmlevel = rtlpci->const_devicepci_aspm_setting;
 314         u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
 315
 316         /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
 317         /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
 318
 319         u_device_aspmsetting |= aspmlevel;
 320
 321         _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
 322
 323         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 324                 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
 325                                              RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
 326                 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 327         }
 328         udelay(100);
 329 }
 330
 331 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
 332 {
 333         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 334
 335         bool status = false;
 336         u8 offset_e0;
 337         unsigned offset_e4;
 338
 339         pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0);
 340
 341         pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0);
 342
 343         if (offset_e0 == 0xA0) {
 344                 pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4);
 345                 if (offset_e4 & BIT(23))
 346                         status = true;
 347         }
 348
 349         return status;
 350 }
 351
 352 static bool rtl_pci_check_buddy_priv(struct ieee80211_hw *hw,
 353                                      struct rtl_priv **buddy_priv)
 354 {
 355         struct rtl_priv *rtlpriv = rtl_priv(hw);
 356         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 357         bool find_buddy_priv = false;
 358         struct rtl_priv *tpriv;
 359         struct rtl_pci_priv *tpcipriv = NULL;
 360
 361         if (!list_empty(&rtlpriv->glb_var->glb_priv_list)) {
 362                 list_for_each_entry(tpriv, &rtlpriv->glb_var->glb_priv_list,
 363                                     list) {
 364                         tpcipriv = (struct rtl_pci_priv *)tpriv->priv;
 365                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 366                                  "pcipriv->ndis_adapter.funcnumber %x\n",
 367                                 pcipriv->ndis_adapter.funcnumber);
 368                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 369                                  "tpcipriv->ndis_adapter.funcnumber %x\n",
 370                                 tpcipriv->ndis_adapter.funcnumber);
 371
 372                         if ((pcipriv->ndis_adapter.busnumber ==
 373                              tpcipriv->ndis_adapter.busnumber) &&
 374                             (pcipriv->ndis_adapter.devnumber ==
 375                             tpcipriv->ndis_adapter.devnumber) &&
 376                             (pcipriv->ndis_adapter.funcnumber !=
 377                             tpcipriv->ndis_adapter.funcnumber)) {
 378                                 find_buddy_priv = true;
 379                                 break;
 380                         }
 381                 }
 382         }
 383
 384         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 385                  "find_buddy_priv %d\n", find_buddy_priv);
 386
 387         if (find_buddy_priv)
 388                 *buddy_priv = tpriv;
 389
 390         return find_buddy_priv;
 391 }
 392
 393 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
 394 {
 395         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 396         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
 397         u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
 398         u8 linkctrl_reg;
 399         u8 num4bbytes;
 400
 401         num4bbytes = (capabilityoffset + 0x10) / 4;
 402
 403         /*Read  Link Control Register */
 404         pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg);
 405
 406         pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
 407 }
 408
 409 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
 410                 struct ieee80211_hw *hw)
 411 {
 412         struct rtl_priv *rtlpriv = rtl_priv(hw);
 413         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 414
 415         u8 tmp;
 416         u16 linkctrl_reg;
 417
 418         /*Link Control Register */
 419         pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &linkctrl_reg);
 420         pcipriv->ndis_adapter.linkctrl_reg = (u8)linkctrl_reg;
 421
 422         RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Link Control Register =%x\n",
 423                  pcipriv->ndis_adapter.linkctrl_reg);
 424
 425         pci_read_config_byte(pdev, 0x98, &tmp);
 426         tmp |= BIT(4);
 427         pci_write_config_byte(pdev, 0x98, tmp);
 428
 429         tmp = 0x17;
 430         pci_write_config_byte(pdev, 0x70f, tmp);
 431 }
 432
 433 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
 434 {
 435         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 436
 437         _rtl_pci_update_default_setting(hw);
 438
 439         if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
 440                 /*Always enable ASPM & Clock Req. */
 441                 rtl_pci_enable_aspm(hw);
 442                 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
 443         }
 444
 445 }
 446
 447 static void _rtl_pci_io_handler_init(struct device *dev,
 448                                      struct ieee80211_hw *hw)
 449 {
 450         struct rtl_priv *rtlpriv = rtl_priv(hw);
 451
 452         rtlpriv->io.dev = dev;
 453
 454         rtlpriv->io.write8_async = pci_write8_async;
 455         rtlpriv->io.write16_async = pci_write16_async;
 456         rtlpriv->io.write32_async = pci_write32_async;
 457
 458         rtlpriv->io.read8_sync = pci_read8_sync;
 459         rtlpriv->io.read16_sync = pci_read16_sync;
 460         rtlpriv->io.read32_sync = pci_read32_sync;
 461
 462 }
 463
 464 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
 465                 struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc, u8 tid)
 466 {
 467         struct rtl_priv *rtlpriv = rtl_priv(hw);
 468         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 469         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 470         struct sk_buff *next_skb;
 471         u8 additionlen = FCS_LEN;
 472
 473         /* here open is 4, wep/tkip is 8, aes is 12*/
 474         if (info->control.hw_key)
 475                 additionlen += info->control.hw_key->icv_len;
 476
 477         /* The most skb num is 6 */
 478         tcb_desc->empkt_num = 0;
 479         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 480         skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
 481                 struct ieee80211_tx_info *next_info;
 482
 483                 next_info = IEEE80211_SKB_CB(next_skb);
 484                 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
 485                         tcb_desc->empkt_len[tcb_desc->empkt_num] =
 486                                 next_skb->len + additionlen;
 487                         tcb_desc->empkt_num++;
 488                 } else {
 489                         break;
 490                 }
 491
 492                 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
 493                                       next_skb))
 494                         break;
 495
 496                 if (tcb_desc->empkt_num >= rtlhal->max_earlymode_num)
 497                         break;
 498         }
 499         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 500
 501         return true;
 502 }
 503
 504 /* just for early mode now */
 505 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
 506 {
 507         struct rtl_priv *rtlpriv = rtl_priv(hw);
 508         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 509         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 510         struct sk_buff *skb = NULL;
 511         struct ieee80211_tx_info *info = NULL;
 512         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 513         int tid;
 514
 515         if (!rtlpriv->rtlhal.earlymode_enable)
 516                 return;
 517
 518         if (rtlpriv->dm.supp_phymode_switch &&
 519             (rtlpriv->easy_concurrent_ctl.switch_in_process ||
 520             (rtlpriv->buddy_priv &&
 521             rtlpriv->buddy_priv->easy_concurrent_ctl.switch_in_process)))
 522                 return;
 523         /* we juse use em for BE/BK/VI/VO */
 524         for (tid = 7; tid >= 0; tid--) {
 525                 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(tid)];
 526                 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
 527                 while (!mac->act_scanning &&
 528                        rtlpriv->psc.rfpwr_state == ERFON) {
 529                         struct rtl_tcb_desc tcb_desc;
 530                         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 531
 532                         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 533                         if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
 534                             (ring->entries - skb_queue_len(&ring->queue) >
 535                              rtlhal->max_earlymode_num)) {
 536                                 skb = skb_dequeue(&mac->skb_waitq[tid]);
 537                         } else {
 538                                 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 539                                 break;
 540                         }
 541                         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 542
 543                         /* Some macaddr can't do early mode. like
 544                          * multicast/broadcast/no_qos data */
 545                         info = IEEE80211_SKB_CB(skb);
 546                         if (info->flags & IEEE80211_TX_CTL_AMPDU)
 547                                 _rtl_update_earlymode_info(hw, skb,
 548                                                            &tcb_desc, tid);
 549
 550                         rtlpriv->intf_ops->adapter_tx(hw, NULL, skb, &tcb_desc);
 551                 }
 552         }
 553 }
 554
 555
 556 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 557 {
 558         struct rtl_priv *rtlpriv = rtl_priv(hw);
 559         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 560
 561         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
 562
 563         while (skb_queue_len(&ring->queue)) {
 564                 struct sk_buff *skb;
 565                 struct ieee80211_tx_info *info;
 566                 __le16 fc;
 567                 u8 tid;
 568                 u8 *entry;
 569
 570                 if (rtlpriv->use_new_trx_flow)
 571                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
 572                 else
 573                         entry = (u8 *)(&ring->desc[ring->idx]);
 574
 575                 if (rtlpriv->cfg->ops->get_available_desc &&
 576                     rtlpriv->cfg->ops->get_available_desc(hw, prio) <= 1) {
 577                         RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_DMESG,
 578                                  "no available desc!\n");
 579                         return;
 580                 }
 581
 582                 if (!rtlpriv->cfg->ops->is_tx_desc_closed(hw, prio, ring->idx))
 583                         return;
 584                 ring->idx = (ring->idx + 1) % ring->entries;
 585
 586                 skb = __skb_dequeue(&ring->queue);
 587                 pci_unmap_single(rtlpci->pdev,
 588                                  rtlpriv->cfg->ops->
 589                                              get_desc((u8 *)entry, true,
 590                                                       HW_DESC_TXBUFF_ADDR),
 591                                  skb->len, PCI_DMA_TODEVICE);
 592
 593                 /* remove early mode header */
 594                 if (rtlpriv->rtlhal.earlymode_enable)
 595                         skb_pull(skb, EM_HDR_LEN);
 596
 597                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
 598                          "new ring->idx:%d, free: skb_queue_len:%d, free: seq:%x\n",
 599                          ring->idx,
 600                          skb_queue_len(&ring->queue),
 601                          *(u16 *)(skb->data + 22));
 602
 603                 if (prio == TXCMD_QUEUE) {
 604                         dev_kfree_skb(skb);
 605                         goto tx_status_ok;
 606
 607                 }
 608
 609                 /* for sw LPS, just after NULL skb send out, we can
 610                  * sure AP knows we are sleeping, we should not let
 611                  * rf sleep
 612                  */
 613                 fc = rtl_get_fc(skb);
 614                 if (ieee80211_is_nullfunc(fc)) {
 615                         if (ieee80211_has_pm(fc)) {
 616                                 rtlpriv->mac80211.offchan_delay = true;
 617                                 rtlpriv->psc.state_inap = true;
 618                         } else {
 619                                 rtlpriv->psc.state_inap = false;
 620                         }
 621                 }
 622                 if (ieee80211_is_action(fc)) {
 623                         struct ieee80211_mgmt *action_frame =
 624                                 (struct ieee80211_mgmt *)skb->data;
 625                         if (action_frame->u.action.u.ht_smps.action ==
 626                             WLAN_HT_ACTION_SMPS) {
 627                                 dev_kfree_skb(skb);
 628                                 goto tx_status_ok;
 629                         }
 630                 }
 631
 632                 /* update tid tx pkt num */
 633                 tid = rtl_get_tid(skb);
 634                 if (tid <= 7)
 635                         rtlpriv->link_info.tidtx_inperiod[tid]++;
 636
 637                 info = IEEE80211_SKB_CB(skb);
 638                 ieee80211_tx_info_clear_status(info);
 639
 640                 info->flags |= IEEE80211_TX_STAT_ACK;
 641                 /*info->status.rates[0].count = 1; */
 642
 643                 ieee80211_tx_status_irqsafe(hw, skb);
 644
 645                 if ((ring->entries - skb_queue_len(&ring->queue)) <= 4) {
 646
 647                         RT_TRACE(rtlpriv, COMP_ERR, DBG_DMESG,
 648                                  "more desc left, wake skb_queue@%d, ring->idx = %d, skb_queue_len = 0x%x\n",
 649                                  prio, ring->idx,
 650                                  skb_queue_len(&ring->queue));
 651
 652                         ieee80211_wake_queue(hw,
 653                                         skb_get_queue_mapping
 654                                         (skb));
 655                 }
 656 tx_status_ok:
 657                 skb = NULL;
 658         }
 659
 660         if (((rtlpriv->link_info.num_rx_inperiod +
 661               rtlpriv->link_info.num_tx_inperiod) > 8) ||
 662               (rtlpriv->link_info.num_rx_inperiod > 2))
 663                 rtl_lps_leave(hw);
 664 }
 665
 666 static int _rtl_pci_init_one_rxdesc(struct ieee80211_hw *hw,
 667                                     struct sk_buff *new_skb, u8 *entry,
 668                                     int rxring_idx, int desc_idx)
 669 {
 670         struct rtl_priv *rtlpriv = rtl_priv(hw);
 671         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 672         u32 bufferaddress;
 673         u8 tmp_one = 1;
 674         struct sk_buff *skb;
 675
 676         if (likely(new_skb)) {
 677                 skb = new_skb;
 678                 goto remap;
 679         }
 680         skb = dev_alloc_skb(rtlpci->rxbuffersize);
 681         if (!skb)
 682                 return 0;
 683
 684 remap:
 685         /* just set skb->cb to mapping addr for pci_unmap_single use */
 686         *((dma_addr_t *)skb->cb) =
 687                 pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
 688                                rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 689         bufferaddress = *((dma_addr_t *)skb->cb);
 690         if (pci_dma_mapping_error(rtlpci->pdev, bufferaddress))
 691                 return 0;
 692         rtlpci->rx_ring[rxring_idx].rx_buf[desc_idx] = skb;
 693         if (rtlpriv->use_new_trx_flow) {
 694                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 695                                             HW_DESC_RX_PREPARE,
 696                                             (u8 *)&bufferaddress);
 697         } else {
 698                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 699                                             HW_DESC_RXBUFF_ADDR,
 700                                             (u8 *)&bufferaddress);
 701                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 702                                             HW_DESC_RXPKT_LEN,
 703                                             (u8 *)&rtlpci->rxbuffersize);
 704                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
 705                                             HW_DESC_RXOWN,
 706                                             (u8 *)&tmp_one);
 707         }
 708         return 1;
 709 }
 710
 711 /* inorder to receive 8K AMSDU we have set skb to
 712  * 9100bytes in init rx ring, but if this packet is
 713  * not a AMSDU, this large packet will be sent to
 714  * TCP/IP directly, this cause big packet ping fail
 715  * like: "ping -s 65507", so here we will realloc skb
 716  * based on the true size of packet, Mac80211
 717  * Probably will do it better, but does not yet.
 718  *
 719  * Some platform will fail when alloc skb sometimes.
 720  * in this condition, we will send the old skb to
 721  * mac80211 directly, this will not cause any other
 722  * issues, but only this packet will be lost by TCP/IP
 723  */
 724 static void _rtl_pci_rx_to_mac80211(struct ieee80211_hw *hw,
 725                                     struct sk_buff *skb,
 726                                     struct ieee80211_rx_status rx_status)
 727 {
 728         if (unlikely(!rtl_action_proc(hw, skb, false))) {
 729                 dev_kfree_skb_any(skb);
 730         } else {
 731                 struct sk_buff *uskb = NULL;
 732
 733                 uskb = dev_alloc_skb(skb->len + 128);
 734                 if (likely(uskb)) {
 735                         memcpy(IEEE80211_SKB_RXCB(uskb), &rx_status,
 736                                sizeof(rx_status));
 737                         skb_put_data(uskb, skb->data, skb->len);
 738                         dev_kfree_skb_any(skb);
 739                         ieee80211_rx_irqsafe(hw, uskb);
 740                 } else {
 741                         ieee80211_rx_irqsafe(hw, skb);
 742                 }
 743         }
 744 }
 745
 746 /*hsisr interrupt handler*/
 747 static void _rtl_pci_hs_interrupt(struct ieee80211_hw *hw)
 748 {
 749         struct rtl_priv *rtlpriv = rtl_priv(hw);
 750         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 751
 752         rtl_write_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR],
 753                        rtl_read_byte(rtlpriv, rtlpriv->cfg->maps[MAC_HSISR]) |
 754                        rtlpci->sys_irq_mask);
 755 }
 756
 757 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 758 {
 759         struct rtl_priv *rtlpriv = rtl_priv(hw);
 760         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 761         int rxring_idx = RTL_PCI_RX_MPDU_QUEUE;
 762         struct ieee80211_rx_status rx_status = { 0 };
 763         unsigned int count = rtlpci->rxringcount;
 764         u8 own;
 765         u8 tmp_one;
 766         bool unicast = false;
 767         u8 hw_queue = 0;
 768         unsigned int rx_remained_cnt;
 769         struct rtl_stats stats = {
 770                 .signal = 0,
 771                 .rate = 0,
 772         };
 773
 774         /*RX NORMAL PKT */
 775         while (count--) {
 776                 struct ieee80211_hdr *hdr;
 777                 __le16 fc;
 778                 u16 len;
 779                 /*rx buffer descriptor */
 780                 struct rtl_rx_buffer_desc *buffer_desc = NULL;
 781                 /*if use new trx flow, it means wifi info */
 782                 struct rtl_rx_desc *pdesc = NULL;
 783                 /*rx pkt */
 784                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[
 785                                       rtlpci->rx_ring[rxring_idx].idx];
 786                 struct sk_buff *new_skb;
 787
 788                 if (rtlpriv->use_new_trx_flow) {
 789                         rx_remained_cnt =
 790                                 rtlpriv->cfg->ops->rx_desc_buff_remained_cnt(hw,
 791                                                                       hw_queue);
 792                         if (rx_remained_cnt == 0)
 793                                 return;
 794                         buffer_desc = &rtlpci->rx_ring[rxring_idx].buffer_desc[
 795                                 rtlpci->rx_ring[rxring_idx].idx];
 796                         pdesc = (struct rtl_rx_desc *)skb->data;
 797                 } else {        /* rx descriptor */
 798                         pdesc = &rtlpci->rx_ring[rxring_idx].desc[
 799                                 rtlpci->rx_ring[rxring_idx].idx];
 800
 801                         own = (u8)rtlpriv->cfg->ops->get_desc((u8 *)pdesc,
 802                                                               false,
 803                                                               HW_DESC_OWN);
 804                         if (own) /* wait data to be filled by hardware */
 805                                 return;
 806                 }
 807
 808                 /* Reaching this point means: data is filled already
 809                  * AAAAAAttention !!!
 810                  * We can NOT access 'skb' before 'pci_unmap_single'
 811                  */
 812                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
 813                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
 814
 815                 /* get a new skb - if fail, old one will be reused */
 816                 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
 817                 if (unlikely(!new_skb))
 818                         goto no_new;
 819                 memset(&rx_status , 0 , sizeof(rx_status));
 820                 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
 821                                                  &rx_status, (u8 *)pdesc, skb);
 822
 823                 if (rtlpriv->use_new_trx_flow)
 824                         rtlpriv->cfg->ops->rx_check_dma_ok(hw,
 825                                                            (u8 *)buffer_desc,
 826                                                            hw_queue);
 827
 828                 len = rtlpriv->cfg->ops->get_desc((u8 *)pdesc, false,
 829                                                   HW_DESC_RXPKT_LEN);
 830
 831                 if (skb->end - skb->tail > len) {
 832                         skb_put(skb, len);
 833                         if (rtlpriv->use_new_trx_flow)
 834                                 skb_reserve(skb, stats.rx_drvinfo_size +
 835                                             stats.rx_bufshift + 24);
 836                         else
 837                                 skb_reserve(skb, stats.rx_drvinfo_size +
 838                                             stats.rx_bufshift);
 839                 } else {
 840                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
 841                                  "skb->end - skb->tail = %d, len is %d\n",
 842                                  skb->end - skb->tail, len);
 843                         dev_kfree_skb_any(skb);
 844                         goto new_trx_end;
 845                 }
 846                 /* handle command packet here */
 847                 if (rtlpriv->cfg->ops->rx_command_packet &&
 848                     rtlpriv->cfg->ops->rx_command_packet(hw, &stats, skb)) {
 849                                 dev_kfree_skb_any(skb);
 850                                 goto new_trx_end;
 851                 }
 852
 853                 /*
 854                  * NOTICE This can not be use for mac80211,
 855                  * this is done in mac80211 code,
 856                  * if done here sec DHCP will fail
 857                  * skb_trim(skb, skb->len - 4);
 858                  */
 859
 860                 hdr = rtl_get_hdr(skb);
 861                 fc = rtl_get_fc(skb);
 862
 863                 if (!stats.crc && !stats.hwerror) {
 864                         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
 865                                sizeof(rx_status));
 866
 867                         if (is_broadcast_ether_addr(hdr->addr1)) {
 868                                 ;/*TODO*/
 869                         } else if (is_multicast_ether_addr(hdr->addr1)) {
 870                                 ;/*TODO*/
 871                         } else {
 872                                 unicast = true;
 873                                 rtlpriv->stats.rxbytesunicast += skb->len;
 874                         }
 875                         rtl_is_special_data(hw, skb, false, true);
 876
 877                         if (ieee80211_is_data(fc)) {
 878                                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
 879                                 if (unicast)
 880                                         rtlpriv->link_info.num_rx_inperiod++;
 881                         }
 882
 883                         rtl_collect_scan_list(hw, skb);
 884
 885                         /* static bcn for roaming */
 886                         rtl_beacon_statistic(hw, skb);
 887                         rtl_p2p_info(hw, (void *)skb->data, skb->len);
 888                         /* for sw lps */
 889                         rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
 890                         rtl_recognize_peer(hw, (void *)skb->data, skb->len);
 891                         if ((rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP) &&
 892                             (rtlpriv->rtlhal.current_bandtype ==
 893                              BAND_ON_2_4G) &&
 894                             (ieee80211_is_beacon(fc) ||
 895                              ieee80211_is_probe_resp(fc))) {
 896                                 dev_kfree_skb_any(skb);
 897                         } else {
 898                                 _rtl_pci_rx_to_mac80211(hw, skb, rx_status);
 899                         }
 900                 } else {
 901                         dev_kfree_skb_any(skb);
 902                 }
 903 new_trx_end:
 904                 if (rtlpriv->use_new_trx_flow) {
 905                         rtlpci->rx_ring[hw_queue].next_rx_rp += 1;
 906                         rtlpci->rx_ring[hw_queue].next_rx_rp %=
 907                                         RTL_PCI_MAX_RX_COUNT;
 908
 909                         rx_remained_cnt--;
 910                         rtl_write_word(rtlpriv, 0x3B4,
 911                                        rtlpci->rx_ring[hw_queue].next_rx_rp);
 912                 }
 913                 if (((rtlpriv->link_info.num_rx_inperiod +
 914                       rtlpriv->link_info.num_tx_inperiod) > 8) ||
 915                       (rtlpriv->link_info.num_rx_inperiod > 2))
 916                         rtl_lps_leave(hw);
 917                 skb = new_skb;
 918 no_new:
 919                 if (rtlpriv->use_new_trx_flow) {
 920                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)buffer_desc,
 921                                                  rxring_idx,
 922                                                  rtlpci->rx_ring[rxring_idx].idx);
 923                 } else {
 924                         _rtl_pci_init_one_rxdesc(hw, skb, (u8 *)pdesc,
 925                                                  rxring_idx,
 926                                                  rtlpci->rx_ring[rxring_idx].idx);
 927                         if (rtlpci->rx_ring[rxring_idx].idx ==
 928                             rtlpci->rxringcount - 1)
 929                                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc,
 930                                                             false,
 931                                                             HW_DESC_RXERO,
 932                                                             (u8 *)&tmp_one);
 933                 }
 934                 rtlpci->rx_ring[rxring_idx].idx =
 935                                 (rtlpci->rx_ring[rxring_idx].idx + 1) %
 936                                 rtlpci->rxringcount;
 937         }
 938 }
 939
 940 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 941 {
 942         struct ieee80211_hw *hw = dev_id;
 943         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 944         struct rtl_priv *rtlpriv = rtl_priv(hw);
 945         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 946         unsigned long flags;
 947         u32 inta = 0;
 948         u32 intb = 0;
 949         irqreturn_t ret = IRQ_HANDLED;
 950
 951         if (rtlpci->irq_enabled == 0)
 952                 return ret;
 953
 954         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock , flags);
 955         rtlpriv->cfg->ops->disable_interrupt(hw);
 956
 957         /*read ISR: 4/8bytes */
 958         rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
 959
 960         /*Shared IRQ or HW disappared */
 961         if (!inta || inta == 0xffff)
 962                 goto done;
 963
 964         /*<1> beacon related */
 965         if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
 966                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 967                          "beacon ok interrupt!\n");
 968         }
 969
 970         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
 971                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 972                          "beacon err interrupt!\n");
 973         }
 974
 975         if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) {
 976                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "beacon interrupt!\n");
 977         }
 978
 979         if (inta & rtlpriv->cfg->maps[RTL_IMR_BCNINT]) {
 980                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 981                          "prepare beacon for interrupt!\n");
 982                 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
 983         }
 984
 985         /*<2> Tx related */
 986         if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
 987                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "IMR_TXFOVW!\n");
 988
 989         if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
 990                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 991                          "Manage ok interrupt!\n");
 992                 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
 993         }
 994
 995         if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
 996                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 997                          "HIGH_QUEUE ok interrupt!\n");
 998                 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
 999         }
1000
1001         if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
1002                 rtlpriv->link_info.num_tx_inperiod++;
1003
1004                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1005                          "BK Tx OK interrupt!\n");
1006                 _rtl_pci_tx_isr(hw, BK_QUEUE);
1007         }
1008
1009         if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
1010                 rtlpriv->link_info.num_tx_inperiod++;
1011
1012                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1013                          "BE TX OK interrupt!\n");
1014                 _rtl_pci_tx_isr(hw, BE_QUEUE);
1015         }
1016
1017         if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
1018                 rtlpriv->link_info.num_tx_inperiod++;
1019
1020                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1021                          "VI TX OK interrupt!\n");
1022                 _rtl_pci_tx_isr(hw, VI_QUEUE);
1023         }
1024
1025         if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
1026                 rtlpriv->link_info.num_tx_inperiod++;
1027
1028                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1029                          "Vo TX OK interrupt!\n");
1030                 _rtl_pci_tx_isr(hw, VO_QUEUE);
1031         }
1032
1033         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
1034                 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
1035                         rtlpriv->link_info.num_tx_inperiod++;
1036
1037                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1038                                  "CMD TX OK interrupt!\n");
1039                         _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
1040                 }
1041         }
1042
1043         /*<3> Rx related */
1044         if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
1045                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, "Rx ok interrupt!\n");
1046                 _rtl_pci_rx_interrupt(hw);
1047         }
1048
1049         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
1050                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1051                          "rx descriptor unavailable!\n");
1052                 _rtl_pci_rx_interrupt(hw);
1053         }
1054
1055         if (unlikely(intb & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
1056                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, "rx overflow !\n");
1057                 _rtl_pci_rx_interrupt(hw);
1058         }
1059
1060         /*<4> fw related*/
1061         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8723AE) {
1062                 if (inta & rtlpriv->cfg->maps[RTL_IMR_C2HCMD]) {
1063                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1064                                  "firmware interrupt!\n");
1065                         queue_delayed_work(rtlpriv->works.rtl_wq,
1066                                            &rtlpriv->works.fwevt_wq, 0);
1067                 }
1068         }
1069
1070         /*<5> hsisr related*/
1071         /* Only 8188EE & 8723BE Supported.
1072          * If Other ICs Come in, System will corrupt,
1073          * because maps[RTL_IMR_HSISR_IND] & maps[MAC_HSISR]
1074          * are not initialized
1075          */
1076         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8188EE ||
1077             rtlhal->hw_type == HARDWARE_TYPE_RTL8723BE) {
1078                 if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_HSISR_IND])) {
1079                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
1080                                  "hsisr interrupt!\n");
1081                         _rtl_pci_hs_interrupt(hw);
1082                 }
1083         }
1084
1085         if (rtlpriv->rtlhal.earlymode_enable)
1086                 tasklet_schedule(&rtlpriv->works.irq_tasklet);
1087
1088 done:
1089         rtlpriv->cfg->ops->enable_interrupt(hw);
1090         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1091         return ret;
1092 }
1093
1094 static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
1095 {
1096         _rtl_pci_tx_chk_waitq(hw);
1097 }
1098
1099 static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
1100 {
1101         struct rtl_priv *rtlpriv = rtl_priv(hw);
1102         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1103         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1104         struct rtl8192_tx_ring *ring = NULL;
1105         struct ieee80211_hdr *hdr = NULL;
1106         struct ieee80211_tx_info *info = NULL;
1107         struct sk_buff *pskb = NULL;
1108         struct rtl_tx_desc *pdesc = NULL;
1109         struct rtl_tcb_desc tcb_desc;
1110         /*This is for new trx flow*/
1111         struct rtl_tx_buffer_desc *pbuffer_desc = NULL;
1112         u8 temp_one = 1;
1113         u8 *entry;
1114
1115         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
1116         ring = &rtlpci->tx_ring[BEACON_QUEUE];
1117         pskb = __skb_dequeue(&ring->queue);
1118         if (rtlpriv->use_new_trx_flow)
1119                 entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1120         else
1121                 entry = (u8 *)(&ring->desc[ring->idx]);
1122         if (pskb) {
1123                 pci_unmap_single(rtlpci->pdev,
1124                                  rtlpriv->cfg->ops->get_desc(
1125                                  (u8 *)entry, true, HW_DESC_TXBUFF_ADDR),
1126                                  pskb->len, PCI_DMA_TODEVICE);
1127                 kfree_skb(pskb);
1128         }
1129
1130         /*NB: the beacon data buffer must be 32-bit aligned. */
1131         pskb = ieee80211_beacon_get(hw, mac->vif);
1132         if (pskb == NULL)
1133                 return;
1134         hdr = rtl_get_hdr(pskb);
1135         info = IEEE80211_SKB_CB(pskb);
1136         pdesc = &ring->desc[0];
1137         if (rtlpriv->use_new_trx_flow)
1138                 pbuffer_desc = &ring->buffer_desc[0];
1139
1140         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1141                                         (u8 *)pbuffer_desc, info, NULL, pskb,
1142                                         BEACON_QUEUE, &tcb_desc);
1143
1144         __skb_queue_tail(&ring->queue, pskb);
1145
1146         if (rtlpriv->use_new_trx_flow) {
1147                 temp_one = 4;
1148                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pbuffer_desc, true,
1149                                             HW_DESC_OWN, (u8 *)&temp_one);
1150         } else {
1151                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true, HW_DESC_OWN,
1152                                             &temp_one);
1153         }
1154         return;
1155 }
1156
1157 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
1158 {
1159         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1160         struct rtl_priv *rtlpriv = rtl_priv(hw);
1161         struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
1162         u8 i;
1163         u16 desc_num;
1164
1165         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
1166                 desc_num = TX_DESC_NUM_92E;
1167         else
1168                 desc_num = RT_TXDESC_NUM;
1169
1170         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1171                 rtlpci->txringcount[i] = desc_num;
1172
1173         /*
1174          *we just alloc 2 desc for beacon queue,
1175          *because we just need first desc in hw beacon.
1176          */
1177         rtlpci->txringcount[BEACON_QUEUE] = 2;
1178
1179         /*BE queue need more descriptor for performance
1180          *consideration or, No more tx desc will happen,
1181          *and may cause mac80211 mem leakage.
1182          */
1183         if (!rtl_priv(hw)->use_new_trx_flow)
1184                 rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
1185
1186         rtlpci->rxbuffersize = 9100;    /*2048/1024; */
1187         rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
1188 }
1189
1190 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
1191                 struct pci_dev *pdev)
1192 {
1193         struct rtl_priv *rtlpriv = rtl_priv(hw);
1194         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1195         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1196         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1197
1198         rtlpci->up_first_time = true;
1199         rtlpci->being_init_adapter = false;
1200
1201         rtlhal->hw = hw;
1202         rtlpci->pdev = pdev;
1203
1204         /*Tx/Rx related var */
1205         _rtl_pci_init_trx_var(hw);
1206
1207         /*IBSS*/
1208         mac->beacon_interval = 100;
1209
1210         /*AMPDU*/
1211         mac->min_space_cfg = 0;
1212         mac->max_mss_density = 0;
1213         /*set sane AMPDU defaults */
1214         mac->current_ampdu_density = 7;
1215         mac->current_ampdu_factor = 3;
1216
1217         /*Retry Limit*/
1218         mac->retry_short = 7;
1219         mac->retry_long = 7;
1220
1221         /*QOS*/
1222         rtlpci->acm_method = EACMWAY2_SW;
1223
1224         /*task */
1225         tasklet_init(&rtlpriv->works.irq_tasklet,
1226                      (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1227                      (unsigned long)hw);
1228         tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1229                      (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1230                      (unsigned long)hw);
1231         INIT_WORK(&rtlpriv->works.lps_change_work,
1232                   rtl_lps_change_work_callback);
1233 }
1234
1235 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1236                                  unsigned int prio, unsigned int entries)
1237 {
1238         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1239         struct rtl_priv *rtlpriv = rtl_priv(hw);
1240         struct rtl_tx_buffer_desc *buffer_desc;
1241         struct rtl_tx_desc *desc;
1242         dma_addr_t buffer_desc_dma, desc_dma;
1243         u32 nextdescaddress;
1244         int i;
1245
1246         /* alloc tx buffer desc for new trx flow*/
1247         if (rtlpriv->use_new_trx_flow) {
1248                 buffer_desc =
1249                    pci_zalloc_consistent(rtlpci->pdev,
1250                                          sizeof(*buffer_desc) * entries,
1251                                          &buffer_desc_dma);
1252
1253                 if (!buffer_desc || (unsigned long)buffer_desc & 0xFF) {
1254                         pr_err("Cannot allocate TX ring (prio = %d)\n",
1255                                prio);
1256                         return -ENOMEM;
1257                 }
1258
1259                 rtlpci->tx_ring[prio].buffer_desc = buffer_desc;
1260                 rtlpci->tx_ring[prio].buffer_desc_dma = buffer_desc_dma;
1261
1262                 rtlpci->tx_ring[prio].cur_tx_rp = 0;
1263                 rtlpci->tx_ring[prio].cur_tx_wp = 0;
1264                 rtlpci->tx_ring[prio].avl_desc = entries;
1265         }
1266
1267         /* alloc dma for this ring */
1268         desc = pci_zalloc_consistent(rtlpci->pdev,
1269                                      sizeof(*desc) * entries, &desc_dma);
1270
1271         if (!desc || (unsigned long)desc & 0xFF) {
1272                 pr_err("Cannot allocate TX ring (prio = %d)\n", prio);
1273                 return -ENOMEM;
1274         }
1275
1276         rtlpci->tx_ring[prio].desc = desc;
1277         rtlpci->tx_ring[prio].dma = desc_dma;
1278
1279         rtlpci->tx_ring[prio].idx = 0;
1280         rtlpci->tx_ring[prio].entries = entries;
1281         skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1282
1283         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "queue:%d, ring_addr:%p\n",
1284                  prio, desc);
1285
1286         /* init every desc in this ring */
1287         if (!rtlpriv->use_new_trx_flow) {
1288                 for (i = 0; i < entries; i++) {
1289                         nextdescaddress = (u32)desc_dma +
1290                                           ((i + 1) % entries) *
1291                                           sizeof(*desc);
1292
1293                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)&desc[i],
1294                                                     true,
1295                                                     HW_DESC_TX_NEXTDESC_ADDR,
1296                                                     (u8 *)&nextdescaddress);
1297                 }
1298         }
1299         return 0;
1300 }
1301
1302 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1303 {
1304         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1305         struct rtl_priv *rtlpriv = rtl_priv(hw);
1306         int i;
1307
1308         if (rtlpriv->use_new_trx_flow) {
1309                 struct rtl_rx_buffer_desc *entry = NULL;
1310                 /* alloc dma for this ring */
1311                 rtlpci->rx_ring[rxring_idx].buffer_desc =
1312                     pci_zalloc_consistent(rtlpci->pdev,
1313                                           sizeof(*rtlpci->rx_ring[rxring_idx].
1314                                                  buffer_desc) *
1315                                                  rtlpci->rxringcount,
1316                                           &rtlpci->rx_ring[rxring_idx].dma);
1317                 if (!rtlpci->rx_ring[rxring_idx].buffer_desc ||
1318                     (ulong)rtlpci->rx_ring[rxring_idx].buffer_desc & 0xFF) {
1319                         pr_err("Cannot allocate RX ring\n");
1320                         return -ENOMEM;
1321                 }
1322
1323                 /* init every desc in this ring */
1324                 rtlpci->rx_ring[rxring_idx].idx = 0;
1325                 for (i = 0; i < rtlpci->rxringcount; i++) {
1326                         entry = &rtlpci->rx_ring[rxring_idx].buffer_desc[i];
1327                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1328                                                       rxring_idx, i))
1329                                 return -ENOMEM;
1330                 }
1331         } else {
1332                 struct rtl_rx_desc *entry = NULL;
1333                 u8 tmp_one = 1;
1334                 /* alloc dma for this ring */
1335                 rtlpci->rx_ring[rxring_idx].desc =
1336                     pci_zalloc_consistent(rtlpci->pdev,
1337                                           sizeof(*rtlpci->rx_ring[rxring_idx].
1338                                           desc) * rtlpci->rxringcount,
1339                                           &rtlpci->rx_ring[rxring_idx].dma);
1340                 if (!rtlpci->rx_ring[rxring_idx].desc ||
1341                     (unsigned long)rtlpci->rx_ring[rxring_idx].desc & 0xFF) {
1342                         pr_err("Cannot allocate RX ring\n");
1343                         return -ENOMEM;
1344                 }
1345
1346                 /* init every desc in this ring */
1347                 rtlpci->rx_ring[rxring_idx].idx = 0;
1348
1349                 for (i = 0; i < rtlpci->rxringcount; i++) {
1350                         entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1351                         if (!_rtl_pci_init_one_rxdesc(hw, NULL, (u8 *)entry,
1352                                                       rxring_idx, i))
1353                                 return -ENOMEM;
1354                 }
1355
1356                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1357                                             HW_DESC_RXERO, &tmp_one);
1358         }
1359         return 0;
1360 }
1361
1362 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1363                 unsigned int prio)
1364 {
1365         struct rtl_priv *rtlpriv = rtl_priv(hw);
1366         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1367         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1368
1369         /* free every desc in this ring */
1370         while (skb_queue_len(&ring->queue)) {
1371                 u8 *entry;
1372                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1373
1374                 if (rtlpriv->use_new_trx_flow)
1375                         entry = (u8 *)(&ring->buffer_desc[ring->idx]);
1376                 else
1377                         entry = (u8 *)(&ring->desc[ring->idx]);
1378
1379                 pci_unmap_single(rtlpci->pdev,
1380                                  rtlpriv->cfg->
1381                                              ops->get_desc((u8 *)entry, true,
1382                                                    HW_DESC_TXBUFF_ADDR),
1383                                  skb->len, PCI_DMA_TODEVICE);
1384                 kfree_skb(skb);
1385                 ring->idx = (ring->idx + 1) % ring->entries;
1386         }
1387
1388         /* free dma of this ring */
1389         pci_free_consistent(rtlpci->pdev,
1390                             sizeof(*ring->desc) * ring->entries,
1391                             ring->desc, ring->dma);
1392         ring->desc = NULL;
1393         if (rtlpriv->use_new_trx_flow) {
1394                 pci_free_consistent(rtlpci->pdev,
1395                                     sizeof(*ring->buffer_desc) * ring->entries,
1396                                     ring->buffer_desc, ring->buffer_desc_dma);
1397                 ring->buffer_desc = NULL;
1398         }
1399 }
1400
1401 static void _rtl_pci_free_rx_ring(struct ieee80211_hw *hw, int rxring_idx)
1402 {
1403         struct rtl_priv *rtlpriv = rtl_priv(hw);
1404         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1405         int i;
1406
1407         /* free every desc in this ring */
1408         for (i = 0; i < rtlpci->rxringcount; i++) {
1409                 struct sk_buff *skb = rtlpci->rx_ring[rxring_idx].rx_buf[i];
1410
1411                 if (!skb)
1412                         continue;
1413                 pci_unmap_single(rtlpci->pdev, *((dma_addr_t *)skb->cb),
1414                                  rtlpci->rxbuffersize, PCI_DMA_FROMDEVICE);
1415                 kfree_skb(skb);
1416         }
1417
1418         /* free dma of this ring */
1419         if (rtlpriv->use_new_trx_flow) {
1420                 pci_free_consistent(rtlpci->pdev,
1421                                     sizeof(*rtlpci->rx_ring[rxring_idx].
1422                                     buffer_desc) * rtlpci->rxringcount,
1423                                     rtlpci->rx_ring[rxring_idx].buffer_desc,
1424                                     rtlpci->rx_ring[rxring_idx].dma);
1425                 rtlpci->rx_ring[rxring_idx].buffer_desc = NULL;
1426         } else {
1427                 pci_free_consistent(rtlpci->pdev,
1428                                     sizeof(*rtlpci->rx_ring[rxring_idx].desc) *
1429                                     rtlpci->rxringcount,
1430                                     rtlpci->rx_ring[rxring_idx].desc,
1431                                     rtlpci->rx_ring[rxring_idx].dma);
1432                 rtlpci->rx_ring[rxring_idx].desc = NULL;
1433         }
1434 }
1435
1436 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1437 {
1438         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1439         int ret;
1440         int i, rxring_idx;
1441
1442         /* rxring_idx 0:RX_MPDU_QUEUE
1443          * rxring_idx 1:RX_CMD_QUEUE
1444          */
1445         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1446                 ret = _rtl_pci_init_rx_ring(hw, rxring_idx);
1447                 if (ret)
1448                         return ret;
1449         }
1450
1451         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1452                 ret = _rtl_pci_init_tx_ring(hw, i,
1453                                  rtlpci->txringcount[i]);
1454                 if (ret)
1455                         goto err_free_rings;
1456         }
1457
1458         return 0;
1459
1460 err_free_rings:
1461         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1462                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1463
1464         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1465                 if (rtlpci->tx_ring[i].desc ||
1466                     rtlpci->tx_ring[i].buffer_desc)
1467                         _rtl_pci_free_tx_ring(hw, i);
1468
1469         return 1;
1470 }
1471
1472 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1473 {
1474         u32 i, rxring_idx;
1475
1476         /*free rx rings */
1477         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++)
1478                 _rtl_pci_free_rx_ring(hw, rxring_idx);
1479
1480         /*free tx rings */
1481         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1482                 _rtl_pci_free_tx_ring(hw, i);
1483
1484         return 0;
1485 }
1486
1487 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1488 {
1489         struct rtl_priv *rtlpriv = rtl_priv(hw);
1490         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1491         int i, rxring_idx;
1492         unsigned long flags;
1493         u8 tmp_one = 1;
1494         u32 bufferaddress;
1495         /* rxring_idx 0:RX_MPDU_QUEUE */
1496         /* rxring_idx 1:RX_CMD_QUEUE */
1497         for (rxring_idx = 0; rxring_idx < RTL_PCI_MAX_RX_QUEUE; rxring_idx++) {
1498                 /* force the rx_ring[RX_MPDU_QUEUE/
1499                  * RX_CMD_QUEUE].idx to the first one
1500                  *new trx flow, do nothing
1501                 */
1502                 if (!rtlpriv->use_new_trx_flow &&
1503                     rtlpci->rx_ring[rxring_idx].desc) {
1504                         struct rtl_rx_desc *entry = NULL;
1505
1506                         rtlpci->rx_ring[rxring_idx].idx = 0;
1507                         for (i = 0; i < rtlpci->rxringcount; i++) {
1508                                 entry = &rtlpci->rx_ring[rxring_idx].desc[i];
1509                                 bufferaddress =
1510                                   rtlpriv->cfg->ops->get_desc((u8 *)entry,
1511                                   false , HW_DESC_RXBUFF_ADDR);
1512                                 memset((u8 *)entry , 0 ,
1513                                        sizeof(*rtlpci->rx_ring
1514                                        [rxring_idx].desc));/*clear one entry*/
1515                                 if (rtlpriv->use_new_trx_flow) {
1516                                         rtlpriv->cfg->ops->set_desc(hw,
1517                                             (u8 *)entry, false,
1518                                             HW_DESC_RX_PREPARE,
1519                                             (u8 *)&bufferaddress);
1520                                 } else {
1521                                         rtlpriv->cfg->ops->set_desc(hw,
1522                                             (u8 *)entry, false,
1523                                             HW_DESC_RXBUFF_ADDR,
1524                                             (u8 *)&bufferaddress);
1525                                         rtlpriv->cfg->ops->set_desc(hw,
1526                                             (u8 *)entry, false,
1527                                             HW_DESC_RXPKT_LEN,
1528                                             (u8 *)&rtlpci->rxbuffersize);
1529                                         rtlpriv->cfg->ops->set_desc(hw,
1530                                             (u8 *)entry, false,
1531                                             HW_DESC_RXOWN,
1532                                             (u8 *)&tmp_one);
1533                                 }
1534                         }
1535                         rtlpriv->cfg->ops->set_desc(hw, (u8 *)entry, false,
1536                                             HW_DESC_RXERO, (u8 *)&tmp_one);
1537                 }
1538                 rtlpci->rx_ring[rxring_idx].idx = 0;
1539         }
1540
1541         /*
1542          *after reset, release previous pending packet,
1543          *and force the  tx idx to the first one
1544          */
1545         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1546         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1547                 if (rtlpci->tx_ring[i].desc ||
1548                     rtlpci->tx_ring[i].buffer_desc) {
1549                         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1550
1551                         while (skb_queue_len(&ring->queue)) {
1552                                 u8 *entry;
1553                                 struct sk_buff *skb =
1554                                         __skb_dequeue(&ring->queue);
1555                                 if (rtlpriv->use_new_trx_flow)
1556                                         entry = (u8 *)(&ring->buffer_desc
1557                                                                 [ring->idx]);
1558                                 else
1559                                         entry = (u8 *)(&ring->desc[ring->idx]);
1560
1561                                 pci_unmap_single(rtlpci->pdev,
1562                                                  rtlpriv->cfg->ops->
1563                                                          get_desc((u8 *)
1564                                                          entry,
1565                                                          true,
1566                                                          HW_DESC_TXBUFF_ADDR),
1567                                                  skb->len, PCI_DMA_TODEVICE);
1568                                 dev_kfree_skb_irq(skb);
1569                                 ring->idx = (ring->idx + 1) % ring->entries;
1570                         }
1571
1572                         if (rtlpriv->use_new_trx_flow) {
1573                                 rtlpci->tx_ring[i].cur_tx_rp = 0;
1574                                 rtlpci->tx_ring[i].cur_tx_wp = 0;
1575                         }
1576
1577                         ring->idx = 0;
1578                         ring->entries = rtlpci->txringcount[i];
1579                 }
1580         }
1581         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1582
1583         return 0;
1584 }
1585
1586 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1587                                         struct ieee80211_sta *sta,
1588                                         struct sk_buff *skb)
1589 {
1590         struct rtl_priv *rtlpriv = rtl_priv(hw);
1591         struct rtl_sta_info *sta_entry = NULL;
1592         u8 tid = rtl_get_tid(skb);
1593         __le16 fc = rtl_get_fc(skb);
1594
1595         if (!sta)
1596                 return false;
1597         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1598
1599         if (!rtlpriv->rtlhal.earlymode_enable)
1600                 return false;
1601         if (ieee80211_is_nullfunc(fc))
1602                 return false;
1603         if (ieee80211_is_qos_nullfunc(fc))
1604                 return false;
1605         if (ieee80211_is_pspoll(fc))
1606                 return false;
1607         if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1608                 return false;
1609         if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1610                 return false;
1611         if (tid > 7)
1612                 return false;
1613
1614         /* maybe every tid should be checked */
1615         if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1616                 return false;
1617
1618         spin_lock_bh(&rtlpriv->locks.waitq_lock);
1619         skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1620         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1621
1622         return true;
1623 }
1624
1625 static int rtl_pci_tx(struct ieee80211_hw *hw,
1626                       struct ieee80211_sta *sta,
1627                       struct sk_buff *skb,
1628                       struct rtl_tcb_desc *ptcb_desc)
1629 {
1630         struct rtl_priv *rtlpriv = rtl_priv(hw);
1631         struct rtl_sta_info *sta_entry = NULL;
1632         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1633         struct rtl8192_tx_ring *ring;
1634         struct rtl_tx_desc *pdesc;
1635         struct rtl_tx_buffer_desc *ptx_bd_desc = NULL;
1636         u16 idx;
1637         u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1638         unsigned long flags;
1639         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1640         __le16 fc = rtl_get_fc(skb);
1641         u8 *pda_addr = hdr->addr1;
1642         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1643         /*ssn */
1644         u8 tid = 0;
1645         u16 seq_number = 0;
1646         u8 own;
1647         u8 temp_one = 1;
1648
1649         if (ieee80211_is_mgmt(fc))
1650                 rtl_tx_mgmt_proc(hw, skb);
1651
1652         if (rtlpriv->psc.sw_ps_enabled) {
1653                 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1654                         !ieee80211_has_pm(fc))
1655                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1656         }
1657
1658         rtl_action_proc(hw, skb, true);
1659
1660         if (is_multicast_ether_addr(pda_addr))
1661                 rtlpriv->stats.txbytesmulticast += skb->len;
1662         else if (is_broadcast_ether_addr(pda_addr))
1663                 rtlpriv->stats.txbytesbroadcast += skb->len;
1664         else
1665                 rtlpriv->stats.txbytesunicast += skb->len;
1666
1667         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1668         ring = &rtlpci->tx_ring[hw_queue];
1669         if (hw_queue != BEACON_QUEUE) {
1670                 if (rtlpriv->use_new_trx_flow)
1671                         idx = ring->cur_tx_wp;
1672                 else
1673                         idx = (ring->idx + skb_queue_len(&ring->queue)) %
1674                               ring->entries;
1675         } else {
1676                 idx = 0;
1677         }
1678
1679         pdesc = &ring->desc[idx];
1680         if (rtlpriv->use_new_trx_flow) {
1681                 ptx_bd_desc = &ring->buffer_desc[idx];
1682         } else {
1683                 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *)pdesc,
1684                                 true, HW_DESC_OWN);
1685
1686                 if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
1687                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1688                                  "No more TX desc@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1689                                  hw_queue, ring->idx, idx,
1690                                  skb_queue_len(&ring->queue));
1691
1692                         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1693                                                flags);
1694                         return skb->len;
1695                 }
1696         }
1697
1698         if (rtlpriv->cfg->ops->get_available_desc &&
1699             rtlpriv->cfg->ops->get_available_desc(hw, hw_queue) == 0) {
1700                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1701                                  "get_available_desc fail\n");
1702                         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock,
1703                                                flags);
1704                         return skb->len;
1705         }
1706
1707         if (ieee80211_is_data_qos(fc)) {
1708                 tid = rtl_get_tid(skb);
1709                 if (sta) {
1710                         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1711                         seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1712                                       IEEE80211_SCTL_SEQ) >> 4;
1713                         seq_number += 1;
1714
1715                         if (!ieee80211_has_morefrags(hdr->frame_control))
1716                                 sta_entry->tids[tid].seq_number = seq_number;
1717                 }
1718         }
1719
1720         if (ieee80211_is_data(fc))
1721                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1722
1723         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1724                         (u8 *)ptx_bd_desc, info, sta, skb, hw_queue, ptcb_desc);
1725
1726         __skb_queue_tail(&ring->queue, skb);
1727
1728         if (rtlpriv->use_new_trx_flow) {
1729                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1730                                             HW_DESC_OWN, &hw_queue);
1731         } else {
1732                 rtlpriv->cfg->ops->set_desc(hw, (u8 *)pdesc, true,
1733                                             HW_DESC_OWN, &temp_one);
1734         }
1735
1736         if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1737             hw_queue != BEACON_QUEUE) {
1738                 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1739                          "less desc left, stop skb_queue@%d, ring->idx = %d, idx = %d, skb_queue_len = 0x%x\n",
1740                          hw_queue, ring->idx, idx,
1741                          skb_queue_len(&ring->queue));
1742
1743                 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1744         }
1745
1746         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1747
1748         rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1749
1750         return 0;
1751 }
1752
1753 static void rtl_pci_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1754 {
1755         struct rtl_priv *rtlpriv = rtl_priv(hw);
1756         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1757         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1758         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
1759         u16 i = 0;
1760         int queue_id;
1761         struct rtl8192_tx_ring *ring;
1762
1763         if (mac->skip_scan)
1764                 return;
1765
1766         for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1767                 u32 queue_len;
1768
1769                 if (((queues >> queue_id) & 0x1) == 0) {
1770                         queue_id--;
1771                         continue;
1772                 }
1773                 ring = &pcipriv->dev.tx_ring[queue_id];
1774                 queue_len = skb_queue_len(&ring->queue);
1775                 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1776                         queue_id == TXCMD_QUEUE) {
1777                         queue_id--;
1778                         continue;
1779                 } else {
1780                         msleep(20);
1781                         i++;
1782                 }
1783
1784                 /* we just wait 1s for all queues */
1785                 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1786                         is_hal_stop(rtlhal) || i >= 200)
1787                         return;
1788         }
1789 }
1790
1791 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1792 {
1793         struct rtl_priv *rtlpriv = rtl_priv(hw);
1794         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1795
1796         _rtl_pci_deinit_trx_ring(hw);
1797
1798         synchronize_irq(rtlpci->pdev->irq);
1799         tasklet_kill(&rtlpriv->works.irq_tasklet);
1800         cancel_work_sync(&rtlpriv->works.lps_change_work);
1801
1802         flush_workqueue(rtlpriv->works.rtl_wq);
1803         destroy_workqueue(rtlpriv->works.rtl_wq);
1804
1805 }
1806
1807 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1808 {
1809         int err;
1810
1811         _rtl_pci_init_struct(hw, pdev);
1812
1813         err = _rtl_pci_init_trx_ring(hw);
1814         if (err) {
1815                 pr_err("tx ring initialization failed\n");
1816                 return err;
1817         }
1818
1819         return 0;
1820 }
1821
1822 static int rtl_pci_start(struct ieee80211_hw *hw)
1823 {
1824         struct rtl_priv *rtlpriv = rtl_priv(hw);
1825         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1826         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1827         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1828         struct rtl_mac *rtlmac = rtl_mac(rtl_priv(hw));
1829
1830         int err;
1831
1832         rtl_pci_reset_trx_ring(hw);
1833
1834         rtlpci->driver_is_goingto_unload = false;
1835         if (rtlpriv->cfg->ops->get_btc_status &&
1836             rtlpriv->cfg->ops->get_btc_status()) {
1837                 rtlpriv->btcoexist.btc_info.ap_num = 36;
1838                 rtlpriv->btcoexist.btc_ops->btc_init_variables(rtlpriv);
1839                 rtlpriv->btcoexist.btc_ops->btc_init_hal_vars(rtlpriv);
1840         }
1841         err = rtlpriv->cfg->ops->hw_init(hw);
1842         if (err) {
1843                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1844                          "Failed to config hardware!\n");
1845                 return err;
1846         }
1847         rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RETRY_LIMIT,
1848                         &rtlmac->retry_long);
1849
1850         rtlpriv->cfg->ops->enable_interrupt(hw);
1851         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "enable_interrupt OK\n");
1852
1853         rtl_init_rx_config(hw);
1854
1855         /*should be after adapter start and interrupt enable. */
1856         set_hal_start(rtlhal);
1857
1858         RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1859
1860         rtlpci->up_first_time = false;
1861
1862         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, "rtl_pci_start OK\n");
1863         return 0;
1864 }
1865
1866 static void rtl_pci_stop(struct ieee80211_hw *hw)
1867 {
1868         struct rtl_priv *rtlpriv = rtl_priv(hw);
1869         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1870         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1871         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1872         unsigned long flags;
1873         u8 RFInProgressTimeOut = 0;
1874
1875         if (rtlpriv->cfg->ops->get_btc_status())
1876                 rtlpriv->btcoexist.btc_ops->btc_halt_notify();
1877
1878         /*
1879          *should be before disable interrupt&adapter
1880          *and will do it immediately.
1881          */
1882         set_hal_stop(rtlhal);
1883
1884         rtlpci->driver_is_goingto_unload = true;
1885         rtlpriv->cfg->ops->disable_interrupt(hw);
1886         cancel_work_sync(&rtlpriv->works.lps_change_work);
1887
1888         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1889         while (ppsc->rfchange_inprogress) {
1890                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1891                 if (RFInProgressTimeOut > 100) {
1892                         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1893                         break;
1894                 }
1895                 mdelay(1);
1896                 RFInProgressTimeOut++;
1897                 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1898         }
1899         ppsc->rfchange_inprogress = true;
1900         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1901
1902         rtlpriv->cfg->ops->hw_disable(hw);
1903         /* some things are not needed if firmware not available */
1904         if (!rtlpriv->max_fw_size)
1905                 return;
1906         rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1907
1908         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1909         ppsc->rfchange_inprogress = false;
1910         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1911
1912         rtl_pci_enable_aspm(hw);
1913 }
1914
1915 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1916                 struct ieee80211_hw *hw)
1917 {
1918         struct rtl_priv *rtlpriv = rtl_priv(hw);
1919         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1920         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1921         struct pci_dev *bridge_pdev = pdev->bus->self;
1922         u16 venderid;
1923         u16 deviceid;
1924         u8 revisionid;
1925         u16 irqline;
1926         u8 tmp;
1927
1928         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1929         venderid = pdev->vendor;
1930         deviceid = pdev->device;
1931         pci_read_config_byte(pdev, 0x8, &revisionid);
1932         pci_read_config_word(pdev, 0x3C, &irqline);
1933
1934         /* PCI ID 0x10ec:0x8192 occurs for both RTL8192E, which uses
1935          * r8192e_pci, and RTL8192SE, which uses this driver. If the
1936          * revision ID is RTL_PCI_REVISION_ID_8192PCIE (0x01), then
1937          * the correct driver is r8192e_pci, thus this routine should
1938          * return false.
1939          */
1940         if (deviceid == RTL_PCI_8192SE_DID &&
1941             revisionid == RTL_PCI_REVISION_ID_8192PCIE)
1942                 return false;
1943
1944         if (deviceid == RTL_PCI_8192_DID ||
1945             deviceid == RTL_PCI_0044_DID ||
1946             deviceid == RTL_PCI_0047_DID ||
1947             deviceid == RTL_PCI_8192SE_DID ||
1948             deviceid == RTL_PCI_8174_DID ||
1949             deviceid == RTL_PCI_8173_DID ||
1950             deviceid == RTL_PCI_8172_DID ||
1951             deviceid == RTL_PCI_8171_DID) {
1952                 switch (revisionid) {
1953                 case RTL_PCI_REVISION_ID_8192PCIE:
1954                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1955                                  "8192 PCI-E is found - vid/did=%x/%x\n",
1956                                  venderid, deviceid);
1957                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1958                         return false;
1959                 case RTL_PCI_REVISION_ID_8192SE:
1960                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1961                                  "8192SE is found - vid/did=%x/%x\n",
1962                                  venderid, deviceid);
1963                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1964                         break;
1965                 default:
1966                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1967                                  "Err: Unknown device - vid/did=%x/%x\n",
1968                                  venderid, deviceid);
1969                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1970                         break;
1971
1972                 }
1973         } else if (deviceid == RTL_PCI_8723AE_DID) {
1974                 rtlhal->hw_type = HARDWARE_TYPE_RTL8723AE;
1975                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1976                          "8723AE PCI-E is found - "
1977                          "vid/did=%x/%x\n", venderid, deviceid);
1978         } else if (deviceid == RTL_PCI_8192CET_DID ||
1979                    deviceid == RTL_PCI_8192CE_DID ||
1980                    deviceid == RTL_PCI_8191CE_DID ||
1981                    deviceid == RTL_PCI_8188CE_DID) {
1982                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1983                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1984                          "8192C PCI-E is found - vid/did=%x/%x\n",
1985                          venderid, deviceid);
1986         } else if (deviceid == RTL_PCI_8192DE_DID ||
1987                    deviceid == RTL_PCI_8192DE_DID2) {
1988                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1989                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1990                          "8192D PCI-E is found - vid/did=%x/%x\n",
1991                          venderid, deviceid);
1992         } else if (deviceid == RTL_PCI_8188EE_DID) {
1993                 rtlhal->hw_type = HARDWARE_TYPE_RTL8188EE;
1994                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1995                          "Find adapter, Hardware type is 8188EE\n");
1996         } else if (deviceid == RTL_PCI_8723BE_DID) {
1997                         rtlhal->hw_type = HARDWARE_TYPE_RTL8723BE;
1998                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
1999                                  "Find adapter, Hardware type is 8723BE\n");
2000         } else if (deviceid == RTL_PCI_8192EE_DID) {
2001                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192EE;
2002                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2003                                  "Find adapter, Hardware type is 8192EE\n");
2004         } else if (deviceid == RTL_PCI_8821AE_DID) {
2005                         rtlhal->hw_type = HARDWARE_TYPE_RTL8821AE;
2006                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2007                                  "Find adapter, Hardware type is 8821AE\n");
2008         } else if (deviceid == RTL_PCI_8812AE_DID) {
2009                         rtlhal->hw_type = HARDWARE_TYPE_RTL8812AE;
2010                         RT_TRACE(rtlpriv, COMP_INIT , DBG_LOUD,
2011                                  "Find adapter, Hardware type is 8812AE\n");
2012         } else {
2013                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
2014                          "Err: Unknown device - vid/did=%x/%x\n",
2015                          venderid, deviceid);
2016
2017                 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
2018         }
2019
2020         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
2021                 if (revisionid == 0 || revisionid == 1) {
2022                         if (revisionid == 0) {
2023                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2024                                          "Find 92DE MAC0\n");
2025                                 rtlhal->interfaceindex = 0;
2026                         } else if (revisionid == 1) {
2027                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2028                                          "Find 92DE MAC1\n");
2029                                 rtlhal->interfaceindex = 1;
2030                         }
2031                 } else {
2032                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
2033                                  "Unknown device - VendorID/DeviceID=%x/%x, Revision=%x\n",
2034                                  venderid, deviceid, revisionid);
2035                         rtlhal->interfaceindex = 0;
2036                 }
2037         }
2038
2039         /* 92ee use new trx flow */
2040         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192EE)
2041                 rtlpriv->use_new_trx_flow = true;
2042         else
2043                 rtlpriv->use_new_trx_flow = false;
2044
2045         /*find bus info */
2046         pcipriv->ndis_adapter.busnumber = pdev->bus->number;
2047         pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
2048         pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
2049
2050         /*find bridge info */
2051         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
2052         /* some ARM have no bridge_pdev and will crash here
2053          * so we should check if bridge_pdev is NULL
2054          */
2055         if (bridge_pdev) {
2056                 /*find bridge info if available */
2057                 pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
2058                 for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
2059                         if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
2060                                 pcipriv->ndis_adapter.pcibridge_vendor = tmp;
2061                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2062                                          "Pci Bridge Vendor is found index: %d\n",
2063                                          tmp);
2064                                 break;
2065                         }
2066                 }
2067         }
2068
2069         if (pcipriv->ndis_adapter.pcibridge_vendor !=
2070                 PCI_BRIDGE_VENDOR_UNKNOWN) {
2071                 pcipriv->ndis_adapter.pcibridge_busnum =
2072                     bridge_pdev->bus->number;
2073                 pcipriv->ndis_adapter.pcibridge_devnum =
2074                     PCI_SLOT(bridge_pdev->devfn);
2075                 pcipriv->ndis_adapter.pcibridge_funcnum =
2076                     PCI_FUNC(bridge_pdev->devfn);
2077                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
2078                     pci_pcie_cap(bridge_pdev);
2079                 pcipriv->ndis_adapter.num4bytes =
2080                     (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
2081
2082                 rtl_pci_get_linkcontrol_field(hw);
2083
2084                 if (pcipriv->ndis_adapter.pcibridge_vendor ==
2085                     PCI_BRIDGE_VENDOR_AMD) {
2086                         pcipriv->ndis_adapter.amd_l1_patch =
2087                             rtl_pci_get_amd_l1_patch(hw);
2088                 }
2089         }
2090
2091         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2092                  "pcidev busnumber:devnumber:funcnumber:vendor:link_ctl %d:%d:%d:%x:%x\n",
2093                  pcipriv->ndis_adapter.busnumber,
2094                  pcipriv->ndis_adapter.devnumber,
2095                  pcipriv->ndis_adapter.funcnumber,
2096                  pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg);
2097
2098         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2099                  "pci_bridge busnumber:devnumber:funcnumber:vendor:pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
2100                  pcipriv->ndis_adapter.pcibridge_busnum,
2101                  pcipriv->ndis_adapter.pcibridge_devnum,
2102                  pcipriv->ndis_adapter.pcibridge_funcnum,
2103                  pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
2104                  pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
2105                  pcipriv->ndis_adapter.pcibridge_linkctrlreg,
2106                  pcipriv->ndis_adapter.amd_l1_patch);
2107
2108         rtl_pci_parse_configuration(pdev, hw);
2109         list_add_tail(&rtlpriv->list, &rtlpriv->glb_var->glb_priv_list);
2110
2111         return true;
2112 }
2113
2114 static int rtl_pci_intr_mode_msi(struct ieee80211_hw *hw)
2115 {
2116         struct rtl_priv *rtlpriv = rtl_priv(hw);
2117         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2118         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2119         int ret;
2120
2121         ret = pci_enable_msi(rtlpci->pdev);
2122         if (ret < 0)
2123                 return ret;
2124
2125         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2126                           IRQF_SHARED, KBUILD_MODNAME, hw);
2127         if (ret < 0) {
2128                 pci_disable_msi(rtlpci->pdev);
2129                 return ret;
2130         }
2131
2132         rtlpci->using_msi = true;
2133
2134         RT_TRACE(rtlpriv, COMP_INIT|COMP_INTR, DBG_DMESG,
2135                  "MSI Interrupt Mode!\n");
2136         return 0;
2137 }
2138
2139 static int rtl_pci_intr_mode_legacy(struct ieee80211_hw *hw)
2140 {
2141         struct rtl_priv *rtlpriv = rtl_priv(hw);
2142         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2143         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2144         int ret;
2145
2146         ret = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
2147                           IRQF_SHARED, KBUILD_MODNAME, hw);
2148         if (ret < 0)
2149                 return ret;
2150
2151         rtlpci->using_msi = false;
2152         RT_TRACE(rtlpriv, COMP_INIT|COMP_INTR, DBG_DMESG,
2153                  "Pin-based Interrupt Mode!\n");
2154         return 0;
2155 }
2156
2157 static int rtl_pci_intr_mode_decide(struct ieee80211_hw *hw)
2158 {
2159         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2160         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2161         int ret;
2162
2163         if (rtlpci->msi_support) {
2164                 ret = rtl_pci_intr_mode_msi(hw);
2165                 if (ret < 0)
2166                         ret = rtl_pci_intr_mode_legacy(hw);
2167         } else {
2168                 ret = rtl_pci_intr_mode_legacy(hw);
2169         }
2170         return ret;
2171 }
2172
2173 int rtl_pci_probe(struct pci_dev *pdev,
2174                             const struct pci_device_id *id)
2175 {
2176         struct ieee80211_hw *hw = NULL;
2177
2178         struct rtl_priv *rtlpriv = NULL;
2179         struct rtl_pci_priv *pcipriv = NULL;
2180         struct rtl_pci *rtlpci;
2181         unsigned long pmem_start, pmem_len, pmem_flags;
2182         int err;
2183
2184         err = pci_enable_device(pdev);
2185         if (err) {
2186                 WARN_ONCE(true, "%s : Cannot enable new PCI device\n",
2187                           pci_name(pdev));
2188                 return err;
2189         }
2190
2191         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
2192                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
2193                         WARN_ONCE(true,
2194                                   "rtlwifi: Unable to obtain 32bit DMA for consistent allocations\n");
2195                         err = -ENOMEM;
2196                         goto fail1;
2197                 }
2198         }
2199
2200         pci_set_master(pdev);
2201
2202         hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
2203                                 sizeof(struct rtl_priv), &rtl_ops);
2204         if (!hw) {
2205                 WARN_ONCE(true,
2206                           "%s : ieee80211 alloc failed\n", pci_name(pdev));
2207                 err = -ENOMEM;
2208                 goto fail1;
2209         }
2210
2211         SET_IEEE80211_DEV(hw, &pdev->dev);
2212         pci_set_drvdata(pdev, hw);
2213
2214         rtlpriv = hw->priv;
2215         rtlpriv->hw = hw;
2216         pcipriv = (void *)rtlpriv->priv;
2217         pcipriv->dev.pdev = pdev;
2218         init_completion(&rtlpriv->firmware_loading_complete);
2219         /*proximity init here*/
2220         rtlpriv->proximity.proxim_on = false;
2221
2222         pcipriv = (void *)rtlpriv->priv;
2223         pcipriv->dev.pdev = pdev;
2224
2225         /* init cfg & intf_ops */
2226         rtlpriv->rtlhal.interface = INTF_PCI;
2227         rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
2228         rtlpriv->intf_ops = &rtl_pci_ops;
2229         rtlpriv->glb_var = &rtl_global_var;
2230
2231         /* MEM map */
2232         err = pci_request_regions(pdev, KBUILD_MODNAME);
2233         if (err) {
2234                 WARN_ONCE(true, "rtlwifi: Can't obtain PCI resources\n");
2235                 goto fail1;
2236         }
2237
2238         pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
2239         pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
2240         pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
2241
2242         /*shared mem start */
2243         rtlpriv->io.pci_mem_start =
2244                         (unsigned long)pci_iomap(pdev,
2245                         rtlpriv->cfg->bar_id, pmem_len);
2246         if (rtlpriv->io.pci_mem_start == 0) {
2247                 WARN_ONCE(true, "rtlwifi: Can't map PCI mem\n");
2248                 err = -ENOMEM;
2249                 goto fail2;
2250         }
2251
2252         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2253                  "mem mapped space: start: 0x%08lx len:%08lx flags:%08lx, after map:0x%08lx\n",
2254                  pmem_start, pmem_len, pmem_flags,
2255                  rtlpriv->io.pci_mem_start);
2256
2257         /* Disable Clk Request */
2258         pci_write_config_byte(pdev, 0x81, 0);
2259         /* leave D3 mode */
2260         pci_write_config_byte(pdev, 0x44, 0);
2261         pci_write_config_byte(pdev, 0x04, 0x06);
2262         pci_write_config_byte(pdev, 0x04, 0x07);
2263
2264         /* find adapter */
2265         if (!_rtl_pci_find_adapter(pdev, hw)) {
2266                 err = -ENODEV;
2267                 goto fail2;
2268         }
2269
2270         /* Init IO handler */
2271         _rtl_pci_io_handler_init(&pdev->dev, hw);
2272
2273         /*like read eeprom and so on */
2274         rtlpriv->cfg->ops->read_eeprom_info(hw);
2275
2276         if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
2277                 pr_err("Can't init_sw_vars\n");
2278                 err = -ENODEV;
2279                 goto fail3;
2280         }
2281         rtlpriv->cfg->ops->init_sw_leds(hw);
2282
2283         /*aspm */
2284         rtl_pci_init_aspm(hw);
2285
2286         /* Init mac80211 sw */
2287         err = rtl_init_core(hw);
2288         if (err) {
2289                 pr_err("Can't allocate sw for mac80211\n");
2290                 goto fail3;
2291         }
2292
2293         /* Init PCI sw */
2294         err = rtl_pci_init(hw, pdev);
2295         if (err) {
2296                 pr_err("Failed to init PCI\n");
2297                 goto fail3;
2298         }
2299
2300         err = ieee80211_register_hw(hw);
2301         if (err) {
2302                 pr_err("Can't register mac80211 hw.\n");
2303                 err = -ENODEV;
2304                 goto fail3;
2305         }
2306         rtlpriv->mac80211.mac80211_registered = 1;
2307
2308         /*init rfkill */
2309         rtl_init_rfkill(hw);    /* Init PCI sw */
2310
2311         rtlpci = rtl_pcidev(pcipriv);
2312         err = rtl_pci_intr_mode_decide(hw);
2313         if (err) {
2314                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
2315                          "%s: failed to register IRQ handler\n",
2316                          wiphy_name(hw->wiphy));
2317                 goto fail3;
2318         }
2319         rtlpci->irq_alloc = 1;
2320
2321         set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2322         return 0;
2323
2324 fail3:
2325         pci_set_drvdata(pdev, NULL);
2326         rtl_deinit_core(hw);
2327
2328 fail2:
2329         if (rtlpriv->io.pci_mem_start != 0)
2330                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2331
2332         pci_release_regions(pdev);
2333         complete(&rtlpriv->firmware_loading_complete);
2334
2335 fail1:
2336         if (hw)
2337                 ieee80211_free_hw(hw);
2338         pci_disable_device(pdev);
2339
2340         return err;
2341
2342 }
2343 EXPORT_SYMBOL(rtl_pci_probe);
2344
2345 void rtl_pci_disconnect(struct pci_dev *pdev)
2346 {
2347         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2348         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
2349         struct rtl_priv *rtlpriv = rtl_priv(hw);
2350         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
2351         struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
2352
2353         /* just in case driver is removed before firmware callback */
2354         wait_for_completion(&rtlpriv->firmware_loading_complete);
2355         clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
2356
2357         /*ieee80211_unregister_hw will call ops_stop */
2358         if (rtlmac->mac80211_registered == 1) {
2359                 ieee80211_unregister_hw(hw);
2360                 rtlmac->mac80211_registered = 0;
2361         } else {
2362                 rtl_deinit_deferred_work(hw, false);
2363                 rtlpriv->intf_ops->adapter_stop(hw);
2364         }
2365         rtlpriv->cfg->ops->disable_interrupt(hw);
2366
2367         /*deinit rfkill */
2368         rtl_deinit_rfkill(hw);
2369
2370         rtl_pci_deinit(hw);
2371         rtl_deinit_core(hw);
2372         rtlpriv->cfg->ops->deinit_sw_vars(hw);
2373
2374         if (rtlpci->irq_alloc) {
2375                 free_irq(rtlpci->pdev->irq, hw);
2376                 rtlpci->irq_alloc = 0;
2377         }
2378
2379         if (rtlpci->using_msi)
2380                 pci_disable_msi(rtlpci->pdev);
2381
2382         list_del(&rtlpriv->list);
2383         if (rtlpriv->io.pci_mem_start != 0) {
2384                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
2385                 pci_release_regions(pdev);
2386         }
2387
2388         pci_disable_device(pdev);
2389
2390         rtl_pci_disable_aspm(hw);
2391
2392         pci_set_drvdata(pdev, NULL);
2393
2394         ieee80211_free_hw(hw);
2395 }
2396 EXPORT_SYMBOL(rtl_pci_disconnect);
2397
2398 #ifdef CONFIG_PM_SLEEP
2399 /***************************************
2400 kernel pci power state define:
2401 PCI_D0         ((pci_power_t __force) 0)
2402 PCI_D1         ((pci_power_t __force) 1)
2403 PCI_D2         ((pci_power_t __force) 2)
2404 PCI_D3hot      ((pci_power_t __force) 3)
2405 PCI_D3cold     ((pci_power_t __force) 4)
2406 PCI_UNKNOWN    ((pci_power_t __force) 5)
2407
2408 This function is called when system
2409 goes into suspend state mac80211 will
2410 call rtl_mac_stop() from the mac80211
2411 suspend function first, So there is
2412 no need to call hw_disable here.
2413 ****************************************/
2414 int rtl_pci_suspend(struct device *dev)
2415 {
2416         struct pci_dev *pdev = to_pci_dev(dev);
2417         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2418         struct rtl_priv *rtlpriv = rtl_priv(hw);
2419
2420         rtlpriv->cfg->ops->hw_suspend(hw);
2421         rtl_deinit_rfkill(hw);
2422
2423         return 0;
2424 }
2425 EXPORT_SYMBOL(rtl_pci_suspend);
2426
2427 int rtl_pci_resume(struct device *dev)
2428 {
2429         struct pci_dev *pdev = to_pci_dev(dev);
2430         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2431         struct rtl_priv *rtlpriv = rtl_priv(hw);
2432
2433         rtlpriv->cfg->ops->hw_resume(hw);
2434         rtl_init_rfkill(hw);
2435         return 0;
2436 }
2437 EXPORT_SYMBOL(rtl_pci_resume);
2438 #endif /* CONFIG_PM_SLEEP */
2439
2440 const struct rtl_intf_ops rtl_pci_ops = {
2441         .read_efuse_byte = read_efuse_byte,
2442         .adapter_start = rtl_pci_start,
2443         .adapter_stop = rtl_pci_stop,
2444         .check_buddy_priv = rtl_pci_check_buddy_priv,
2445         .adapter_tx = rtl_pci_tx,
2446         .flush = rtl_pci_flush,
2447         .reset_trx_ring = rtl_pci_reset_trx_ring,
2448         .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2449
2450         .disable_aspm = rtl_pci_disable_aspm,
2451         .enable_aspm = rtl_pci_enable_aspm,
2452 };