drivers/net/wireless/realtek/rtl818x/rtl8187/dev.c

   1 /*
   2  * Linux device driver for RTL8187
   3  *
   4  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   5  * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
   6  *
   7  * Based on the r8187 driver, which is:
   8  * Copyright 2005 Andrea Merello <andrea.merello@gmail.com>, et al.
   9  *
  10  * The driver was extended to the RTL8187B in 2008 by:
  11  *      Herton Ronaldo Krzesinski <herton@mandriva.com.br>
  12  *      Hin-Tak Leung <htl10@users.sourceforge.net>
  13  *      Larry Finger <Larry.Finger@lwfinger.net>
  14  *
  15  * Magic delays and register offsets below are taken from the original
  16  * r8187 driver sources.  Thanks to Realtek for their support!
  17  *
  18  * This program is free software; you can redistribute it and/or modify
  19  * it under the terms of the GNU General Public License version 2 as
  20  * published by the Free Software Foundation.
  21  */
  22
  23 #include <linux/usb.h>
  24 #include <linux/slab.h>
  25 #include <linux/delay.h>
  26 #include <linux/etherdevice.h>
  27 #include <linux/eeprom_93cx6.h>
  28 #include <linux/module.h>
  29 #include <net/mac80211.h>
  30
  31 #include "rtl8187.h"
  32 #include "rtl8225.h"
  33 #ifdef CONFIG_RTL8187_LEDS
  34 #include "leds.h"
  35 #endif
  36 #include "rfkill.h"
  37
  38 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  39 MODULE_AUTHOR("Andrea Merello <andrea.merello@gmail.com>");
  40 MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>");
  41 MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>");
  42 MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
  43 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
  44 MODULE_LICENSE("GPL");
  45
  46 static const struct usb_device_id rtl8187_table[] = {
  47         /* Asus */
  48         {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
  49         /* Belkin */
  50         {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
  51         /* Realtek */
  52         {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
  53         {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
  54         {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
  55         {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
  56         /* Surecom */
  57         {USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187},
  58         /* Logitech */
  59         {USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187},
  60         /* Netgear */
  61         {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
  62         {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
  63         {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
  64         /* HP */
  65         {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
  66         /* Sitecom */
  67         {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
  68         {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
  69         {USB_DEVICE(0x0df6, 0x0029), .driver_info = DEVICE_RTL8187B},
  70         /* Sphairon Access Systems GmbH */
  71         {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187},
  72         /* Dick Smith Electronics */
  73         {USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187},
  74         /* Abocom */
  75         {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
  76         /* Qcom */
  77         {USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187},
  78         /* AirLive */
  79         {USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187},
  80         /* Linksys */
  81         {USB_DEVICE(0x1737, 0x0073), .driver_info = DEVICE_RTL8187B},
  82         {}
  83 };
  84
  85 MODULE_DEVICE_TABLE(usb, rtl8187_table);
  86
  87 static const struct ieee80211_rate rtl818x_rates[] = {
  88         { .bitrate = 10, .hw_value = 0, },
  89         { .bitrate = 20, .hw_value = 1, },
  90         { .bitrate = 55, .hw_value = 2, },
  91         { .bitrate = 110, .hw_value = 3, },
  92         { .bitrate = 60, .hw_value = 4, },
  93         { .bitrate = 90, .hw_value = 5, },
  94         { .bitrate = 120, .hw_value = 6, },
  95         { .bitrate = 180, .hw_value = 7, },
  96         { .bitrate = 240, .hw_value = 8, },
  97         { .bitrate = 360, .hw_value = 9, },
  98         { .bitrate = 480, .hw_value = 10, },
  99         { .bitrate = 540, .hw_value = 11, },
 100 };
 101
 102 static const struct ieee80211_channel rtl818x_channels[] = {
 103         { .center_freq = 2412 },
 104         { .center_freq = 2417 },
 105         { .center_freq = 2422 },
 106         { .center_freq = 2427 },
 107         { .center_freq = 2432 },
 108         { .center_freq = 2437 },
 109         { .center_freq = 2442 },
 110         { .center_freq = 2447 },
 111         { .center_freq = 2452 },
 112         { .center_freq = 2457 },
 113         { .center_freq = 2462 },
 114         { .center_freq = 2467 },
 115         { .center_freq = 2472 },
 116         { .center_freq = 2484 },
 117 };
 118
 119 static void rtl8187_iowrite_async_cb(struct urb *urb)
 120 {
 121         kfree(urb->context);
 122 }
 123
 124 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
 125                                   void *data, u16 len)
 126 {
 127         struct usb_ctrlrequest *dr;
 128         struct urb *urb;
 129         struct rtl8187_async_write_data {
 130                 u8 data[4];
 131                 struct usb_ctrlrequest dr;
 132         } *buf;
 133         int rc;
 134
 135         buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
 136         if (!buf)
 137                 return;
 138
 139         urb = usb_alloc_urb(0, GFP_ATOMIC);
 140         if (!urb) {
 141                 kfree(buf);
 142                 return;
 143         }
 144
 145         dr = &buf->dr;
 146
 147         dr->bRequestType = RTL8187_REQT_WRITE;
 148         dr->bRequest = RTL8187_REQ_SET_REG;
 149         dr->wValue = addr;
 150         dr->wIndex = 0;
 151         dr->wLength = cpu_to_le16(len);
 152
 153         memcpy(buf, data, len);
 154
 155         usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
 156                              (unsigned char *)dr, buf, len,
 157                              rtl8187_iowrite_async_cb, buf);
 158         usb_anchor_urb(urb, &priv->anchored);
 159         rc = usb_submit_urb(urb, GFP_ATOMIC);
 160         if (rc < 0) {
 161                 kfree(buf);
 162                 usb_unanchor_urb(urb);
 163         }
 164         usb_free_urb(urb);
 165 }
 166
 167 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
 168                                            __le32 *addr, u32 val)
 169 {
 170         __le32 buf = cpu_to_le32(val);
 171
 172         rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
 173                               &buf, sizeof(buf));
 174 }
 175
 176 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
 177 {
 178         struct rtl8187_priv *priv = dev->priv;
 179
 180         data <<= 8;
 181         data |= addr | 0x80;
 182
 183         rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
 184         rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
 185         rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
 186         rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
 187 }
 188
 189 static void rtl8187_tx_cb(struct urb *urb)
 190 {
 191         struct sk_buff *skb = (struct sk_buff *)urb->context;
 192         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 193         struct ieee80211_hw *hw = info->rate_driver_data[0];
 194         struct rtl8187_priv *priv = hw->priv;
 195
 196         skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
 197                                           sizeof(struct rtl8187_tx_hdr));
 198         ieee80211_tx_info_clear_status(info);
 199
 200         if (!(urb->status) && !(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
 201                 if (priv->is_rtl8187b) {
 202                         skb_queue_tail(&priv->b_tx_status.queue, skb);
 203
 204                         /* queue is "full", discard last items */
 205                         while (skb_queue_len(&priv->b_tx_status.queue) > 5) {
 206                                 struct sk_buff *old_skb;
 207
 208                                 dev_dbg(&priv->udev->dev,
 209                                         "transmit status queue full\n");
 210
 211                                 old_skb = skb_dequeue(&priv->b_tx_status.queue);
 212                                 ieee80211_tx_status_irqsafe(hw, old_skb);
 213                         }
 214                         return;
 215                 } else {
 216                         info->flags |= IEEE80211_TX_STAT_ACK;
 217                 }
 218         }
 219         if (priv->is_rtl8187b)
 220                 ieee80211_tx_status_irqsafe(hw, skb);
 221         else {
 222                 /* Retry information for the RTI8187 is only available by
 223                  * reading a register in the device. We are in interrupt mode
 224                  * here, thus queue the skb and finish on a work queue. */
 225                 skb_queue_tail(&priv->b_tx_status.queue, skb);
 226                 ieee80211_queue_delayed_work(hw, &priv->work, 0);
 227         }
 228 }
 229
 230 static void rtl8187_tx(struct ieee80211_hw *dev,
 231                        struct ieee80211_tx_control *control,
 232                        struct sk_buff *skb)
 233 {
 234         struct rtl8187_priv *priv = dev->priv;
 235         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 236         struct ieee80211_hdr *tx_hdr =  (struct ieee80211_hdr *)(skb->data);
 237         unsigned int ep;
 238         void *buf;
 239         struct urb *urb;
 240         __le16 rts_dur = 0;
 241         u32 flags;
 242         int rc;
 243
 244         urb = usb_alloc_urb(0, GFP_ATOMIC);
 245         if (!urb) {
 246                 kfree_skb(skb);
 247                 return;
 248         }
 249
 250         flags = skb->len;
 251         flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
 252
 253         flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
 254         if (ieee80211_has_morefrags(tx_hdr->frame_control))
 255                 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
 256
 257         /* HW will perform RTS-CTS when only RTS flags is set.
 258          * HW will perform CTS-to-self when both RTS and CTS flags are set.
 259          * RTS rate and RTS duration will be used also for CTS-to-self.
 260          */
 261         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
 262                 flags |= RTL818X_TX_DESC_FLAG_RTS;
 263                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 264                 rts_dur = ieee80211_rts_duration(dev, priv->vif,
 265                                                  skb->len, info);
 266         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
 267                 flags |= RTL818X_TX_DESC_FLAG_RTS | RTL818X_TX_DESC_FLAG_CTS;
 268                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 269                 rts_dur = ieee80211_ctstoself_duration(dev, priv->vif,
 270                                                  skb->len, info);
 271         }
 272
 273         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
 274                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
 275                         priv->seqno += 0x10;
 276                 tx_hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
 277                 tx_hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
 278         }
 279
 280         if (!priv->is_rtl8187b) {
 281                 struct rtl8187_tx_hdr *hdr = skb_push(skb, sizeof(*hdr));
 282                 hdr->flags = cpu_to_le32(flags);
 283                 hdr->len = 0;
 284                 hdr->rts_duration = rts_dur;
 285                 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
 286                 buf = hdr;
 287
 288                 ep = 2;
 289         } else {
 290                 /* fc needs to be calculated before skb_push() */
 291                 unsigned int epmap[4] = { 6, 7, 5, 4 };
 292                 u16 fc = le16_to_cpu(tx_hdr->frame_control);
 293
 294                 struct rtl8187b_tx_hdr *hdr = skb_push(skb, sizeof(*hdr));
 295                 struct ieee80211_rate *txrate =
 296                         ieee80211_get_tx_rate(dev, info);
 297                 memset(hdr, 0, sizeof(*hdr));
 298                 hdr->flags = cpu_to_le32(flags);
 299                 hdr->rts_duration = rts_dur;
 300                 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
 301                 hdr->tx_duration =
 302                         ieee80211_generic_frame_duration(dev, priv->vif,
 303                                                          info->band,
 304                                                          skb->len, txrate);
 305                 buf = hdr;
 306
 307                 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
 308                         ep = 12;
 309                 else
 310                         ep = epmap[skb_get_queue_mapping(skb)];
 311         }
 312
 313         info->rate_driver_data[0] = dev;
 314         info->rate_driver_data[1] = urb;
 315
 316         usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
 317                           buf, skb->len, rtl8187_tx_cb, skb);
 318         urb->transfer_flags |= URB_ZERO_PACKET;
 319         usb_anchor_urb(urb, &priv->anchored);
 320         rc = usb_submit_urb(urb, GFP_ATOMIC);
 321         if (rc < 0) {
 322                 usb_unanchor_urb(urb);
 323                 kfree_skb(skb);
 324         }
 325         usb_free_urb(urb);
 326 }
 327
 328 static void rtl8187_rx_cb(struct urb *urb)
 329 {
 330         struct sk_buff *skb = (struct sk_buff *)urb->context;
 331         struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
 332         struct ieee80211_hw *dev = info->dev;
 333         struct rtl8187_priv *priv = dev->priv;
 334         struct ieee80211_rx_status rx_status = { 0 };
 335         int rate, signal;
 336         u32 flags;
 337         unsigned long f;
 338
 339         spin_lock_irqsave(&priv->rx_queue.lock, f);
 340         __skb_unlink(skb, &priv->rx_queue);
 341         spin_unlock_irqrestore(&priv->rx_queue.lock, f);
 342         skb_put(skb, urb->actual_length);
 343
 344         if (unlikely(urb->status)) {
 345                 dev_kfree_skb_irq(skb);
 346                 return;
 347         }
 348
 349         if (!priv->is_rtl8187b) {
 350                 struct rtl8187_rx_hdr *hdr =
 351                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 352                 flags = le32_to_cpu(hdr->flags);
 353                 /* As with the RTL8187B below, the AGC is used to calculate
 354                  * signal strength. In this case, the scaling
 355                  * constants are derived from the output of p54usb.
 356                  */
 357                 signal = -4 - ((27 * hdr->agc) >> 6);
 358                 rx_status.antenna = (hdr->signal >> 7) & 1;
 359                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
 360         } else {
 361                 struct rtl8187b_rx_hdr *hdr =
 362                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 363                 /* The Realtek datasheet for the RTL8187B shows that the RX
 364                  * header contains the following quantities: signal quality,
 365                  * RSSI, AGC, the received power in dB, and the measured SNR.
 366                  * In testing, none of these quantities show qualitative
 367                  * agreement with AP signal strength, except for the AGC,
 368                  * which is inversely proportional to the strength of the
 369                  * signal. In the following, the signal strength
 370                  * is derived from the AGC. The arbitrary scaling constants
 371                  * are chosen to make the results close to the values obtained
 372                  * for a BCM4312 using b43 as the driver. The noise is ignored
 373                  * for now.
 374                  */
 375                 flags = le32_to_cpu(hdr->flags);
 376                 signal = 14 - hdr->agc / 2;
 377                 rx_status.antenna = (hdr->rssi >> 7) & 1;
 378                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
 379         }
 380
 381         rx_status.signal = signal;
 382         priv->signal = signal;
 383         rate = (flags >> 20) & 0xF;
 384         skb_trim(skb, flags & 0x0FFF);
 385         rx_status.rate_idx = rate;
 386         rx_status.freq = dev->conf.chandef.chan->center_freq;
 387         rx_status.band = dev->conf.chandef.chan->band;
 388         rx_status.flag |= RX_FLAG_MACTIME_START;
 389         if (flags & RTL818X_RX_DESC_FLAG_SPLCP)
 390                 rx_status.enc_flags |= RX_ENC_FLAG_SHORTPRE;
 391         if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
 392                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 393         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
 394         ieee80211_rx_irqsafe(dev, skb);
 395
 396         skb = dev_alloc_skb(RTL8187_MAX_RX);
 397         if (unlikely(!skb)) {
 398                 /* TODO check rx queue length and refill *somewhere* */
 399                 return;
 400         }
 401
 402         info = (struct rtl8187_rx_info *)skb->cb;
 403         info->urb = urb;
 404         info->dev = dev;
 405         urb->transfer_buffer = skb_tail_pointer(skb);
 406         urb->context = skb;
 407         skb_queue_tail(&priv->rx_queue, skb);
 408
 409         usb_anchor_urb(urb, &priv->anchored);
 410         if (usb_submit_urb(urb, GFP_ATOMIC)) {
 411                 usb_unanchor_urb(urb);
 412                 skb_unlink(skb, &priv->rx_queue);
 413                 dev_kfree_skb_irq(skb);
 414         }
 415 }
 416
 417 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
 418 {
 419         struct rtl8187_priv *priv = dev->priv;
 420         struct urb *entry = NULL;
 421         struct sk_buff *skb;
 422         struct rtl8187_rx_info *info;
 423         int ret = 0;
 424
 425         while (skb_queue_len(&priv->rx_queue) < 32) {
 426                 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
 427                 if (!skb) {
 428                         ret = -ENOMEM;
 429                         goto err;
 430                 }
 431                 entry = usb_alloc_urb(0, GFP_KERNEL);
 432                 if (!entry) {
 433                         ret = -ENOMEM;
 434                         goto err;
 435                 }
 436                 usb_fill_bulk_urb(entry, priv->udev,
 437                                   usb_rcvbulkpipe(priv->udev,
 438                                   priv->is_rtl8187b ? 3 : 1),
 439                                   skb_tail_pointer(skb),
 440                                   RTL8187_MAX_RX, rtl8187_rx_cb, skb);
 441                 info = (struct rtl8187_rx_info *)skb->cb;
 442                 info->urb = entry;
 443                 info->dev = dev;
 444                 skb_queue_tail(&priv->rx_queue, skb);
 445                 usb_anchor_urb(entry, &priv->anchored);
 446                 ret = usb_submit_urb(entry, GFP_KERNEL);
 447                 usb_put_urb(entry);
 448                 if (ret) {
 449                         skb_unlink(skb, &priv->rx_queue);
 450                         usb_unanchor_urb(entry);
 451                         goto err;
 452                 }
 453         }
 454         return ret;
 455
 456 err:
 457         kfree_skb(skb);
 458         usb_kill_anchored_urbs(&priv->anchored);
 459         return ret;
 460 }
 461
 462 static void rtl8187b_status_cb(struct urb *urb)
 463 {
 464         struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context;
 465         struct rtl8187_priv *priv = hw->priv;
 466         u64 val;
 467         unsigned int cmd_type;
 468
 469         if (unlikely(urb->status))
 470                 return;
 471
 472         /*
 473          * Read from status buffer:
 474          *
 475          * bits [30:31] = cmd type:
 476          * - 0 indicates tx beacon interrupt
 477          * - 1 indicates tx close descriptor
 478          *
 479          * In the case of tx beacon interrupt:
 480          * [0:9] = Last Beacon CW
 481          * [10:29] = reserved
 482          * [30:31] = 00b
 483          * [32:63] = Last Beacon TSF
 484          *
 485          * If it's tx close descriptor:
 486          * [0:7] = Packet Retry Count
 487          * [8:14] = RTS Retry Count
 488          * [15] = TOK
 489          * [16:27] = Sequence No
 490          * [28] = LS
 491          * [29] = FS
 492          * [30:31] = 01b
 493          * [32:47] = unused (reserved?)
 494          * [48:63] = MAC Used Time
 495          */
 496         val = le64_to_cpu(priv->b_tx_status.buf);
 497
 498         cmd_type = (val >> 30) & 0x3;
 499         if (cmd_type == 1) {
 500                 unsigned int pkt_rc, seq_no;
 501                 bool tok;
 502                 struct sk_buff *skb;
 503                 struct ieee80211_hdr *ieee80211hdr;
 504                 unsigned long flags;
 505
 506                 pkt_rc = val & 0xFF;
 507                 tok = val & (1 << 15);
 508                 seq_no = (val >> 16) & 0xFFF;
 509
 510                 spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags);
 511                 skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) {
 512                         ieee80211hdr = (struct ieee80211_hdr *)skb->data;
 513
 514                         /*
 515                          * While testing, it was discovered that the seq_no
 516                          * doesn't actually contains the sequence number.
 517                          * Instead of returning just the 12 bits of sequence
 518                          * number, hardware is returning entire sequence control
 519                          * (fragment number plus sequence number) in a 12 bit
 520                          * only field overflowing after some time. As a
 521                          * workaround, just consider the lower bits, and expect
 522                          * it's unlikely we wrongly ack some sent data
 523                          */
 524                         if ((le16_to_cpu(ieee80211hdr->seq_ctrl)
 525                             & 0xFFF) == seq_no)
 526                                 break;
 527                 }
 528                 if (skb != (struct sk_buff *) &priv->b_tx_status.queue) {
 529                         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 530
 531                         __skb_unlink(skb, &priv->b_tx_status.queue);
 532                         if (tok)
 533                                 info->flags |= IEEE80211_TX_STAT_ACK;
 534                         info->status.rates[0].count = pkt_rc + 1;
 535
 536                         ieee80211_tx_status_irqsafe(hw, skb);
 537                 }
 538                 spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags);
 539         }
 540
 541         usb_anchor_urb(urb, &priv->anchored);
 542         if (usb_submit_urb(urb, GFP_ATOMIC))
 543                 usb_unanchor_urb(urb);
 544 }
 545
 546 static int rtl8187b_init_status_urb(struct ieee80211_hw *dev)
 547 {
 548         struct rtl8187_priv *priv = dev->priv;
 549         struct urb *entry;
 550         int ret = 0;
 551
 552         entry = usb_alloc_urb(0, GFP_KERNEL);
 553         if (!entry)
 554                 return -ENOMEM;
 555
 556         usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9),
 557                           &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf),
 558                           rtl8187b_status_cb, dev);
 559
 560         usb_anchor_urb(entry, &priv->anchored);
 561         ret = usb_submit_urb(entry, GFP_KERNEL);
 562         if (ret)
 563                 usb_unanchor_urb(entry);
 564         usb_free_urb(entry);
 565
 566         return ret;
 567 }
 568
 569 static void rtl8187_set_anaparam(struct rtl8187_priv *priv, bool rfon)
 570 {
 571         u32 anaparam, anaparam2;
 572         u8 anaparam3, reg;
 573
 574         if (!priv->is_rtl8187b) {
 575                 if (rfon) {
 576                         anaparam = RTL8187_RTL8225_ANAPARAM_ON;
 577                         anaparam2 = RTL8187_RTL8225_ANAPARAM2_ON;
 578                 } else {
 579                         anaparam = RTL8187_RTL8225_ANAPARAM_OFF;
 580                         anaparam2 = RTL8187_RTL8225_ANAPARAM2_OFF;
 581                 }
 582         } else {
 583                 if (rfon) {
 584                         anaparam = RTL8187B_RTL8225_ANAPARAM_ON;
 585                         anaparam2 = RTL8187B_RTL8225_ANAPARAM2_ON;
 586                         anaparam3 = RTL8187B_RTL8225_ANAPARAM3_ON;
 587                 } else {
 588                         anaparam = RTL8187B_RTL8225_ANAPARAM_OFF;
 589                         anaparam2 = RTL8187B_RTL8225_ANAPARAM2_OFF;
 590                         anaparam3 = RTL8187B_RTL8225_ANAPARAM3_OFF;
 591                 }
 592         }
 593
 594         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 595                          RTL818X_EEPROM_CMD_CONFIG);
 596         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 597         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
 598         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 599         rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
 600         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, anaparam2);
 601         if (priv->is_rtl8187b)
 602                 rtl818x_iowrite8(priv, &priv->map->ANAPARAM3A, anaparam3);
 603         reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
 604         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 605         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 606                          RTL818X_EEPROM_CMD_NORMAL);
 607 }
 608
 609 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
 610 {
 611         struct rtl8187_priv *priv = dev->priv;
 612         u8 reg;
 613         int i;
 614
 615         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 616         reg &= (1 << 1);
 617         reg |= RTL818X_CMD_RESET;
 618         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 619
 620         i = 10;
 621         do {
 622                 msleep(2);
 623                 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
 624                       RTL818X_CMD_RESET))
 625                         break;
 626         } while (--i);
 627
 628         if (!i) {
 629                 wiphy_err(dev->wiphy, "Reset timeout!\n");
 630                 return -ETIMEDOUT;
 631         }
 632
 633         /* reload registers from eeprom */
 634         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 635
 636         i = 10;
 637         do {
 638                 msleep(4);
 639                 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
 640                       RTL818X_EEPROM_CMD_CONFIG))
 641                         break;
 642         } while (--i);
 643
 644         if (!i) {
 645                 wiphy_err(dev->wiphy, "eeprom reset timeout!\n");
 646                 return -ETIMEDOUT;
 647         }
 648
 649         return 0;
 650 }
 651
 652 static int rtl8187_init_hw(struct ieee80211_hw *dev)
 653 {
 654         struct rtl8187_priv *priv = dev->priv;
 655         u8 reg;
 656         int res;
 657
 658         /* reset */
 659         rtl8187_set_anaparam(priv, true);
 660
 661         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 662
 663         msleep(200);
 664         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
 665         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
 666         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
 667         msleep(200);
 668
 669         res = rtl8187_cmd_reset(dev);
 670         if (res)
 671                 return res;
 672
 673         rtl8187_set_anaparam(priv, true);
 674
 675         /* setup card */
 676         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 677         rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
 678
 679         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 680         rtl818x_iowrite8(priv, &priv->map->GPIO0, 1);
 681         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 682
 683         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 684
 685         rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
 686         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 687         reg &= 0x3F;
 688         reg |= 0x80;
 689         rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
 690
 691         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 692
 693         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 694         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 695         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0);
 696
 697         // TODO: set RESP_RATE and BRSR properly
 698         rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 699         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 700
 701         /* host_usb_init */
 702         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 703         rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
 704         reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
 705         rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
 706         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 707         rtl818x_iowrite8(priv, &priv->map->GPIO0, 0x20);
 708         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 709         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
 710         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
 711         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
 712         msleep(100);
 713
 714         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
 715         rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
 716         rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
 717         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 718                          RTL818X_EEPROM_CMD_CONFIG);
 719         rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
 720         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 721                          RTL818X_EEPROM_CMD_NORMAL);
 722         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
 723         msleep(100);
 724
 725         priv->rf->init(dev);
 726
 727         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 728         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
 729         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
 730         rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
 731         rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
 732         rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
 733         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
 734
 735         return 0;
 736 }
 737
 738 static const u8 rtl8187b_reg_table[][3] = {
 739         {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
 740         {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
 741         {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
 742         {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
 743
 744         {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
 745         {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
 746         {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1},
 747         {0xF2, 0x02, 1}, {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1},
 748         {0xF6, 0x06, 1}, {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
 749
 750         {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
 751         {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
 752         {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
 753         {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
 754         {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
 755         {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
 756         {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2},
 757
 758         {0x5B, 0x40, 0}, {0x84, 0x88, 0}, {0x85, 0x24, 0}, {0x88, 0x54, 0},
 759         {0x8B, 0xB8, 0}, {0x8C, 0x07, 0}, {0x8D, 0x00, 0}, {0x94, 0x1B, 0},
 760         {0x95, 0x12, 0}, {0x96, 0x00, 0}, {0x97, 0x06, 0}, {0x9D, 0x1A, 0},
 761         {0x9F, 0x10, 0}, {0xB4, 0x22, 0}, {0xBE, 0x80, 0}, {0xDB, 0x00, 0},
 762         {0xEE, 0x00, 0}, {0x4C, 0x00, 2},
 763
 764         {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0},
 765         {0x8F, 0x00, 0}
 766 };
 767
 768 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
 769 {
 770         struct rtl8187_priv *priv = dev->priv;
 771         int res, i;
 772         u8 reg;
 773
 774         rtl8187_set_anaparam(priv, true);
 775
 776         /* Reset PLL sequence on 8187B. Realtek note: reduces power
 777          * consumption about 30 mA */
 778         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
 779         reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
 780         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
 781         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
 782
 783         res = rtl8187_cmd_reset(dev);
 784         if (res)
 785                 return res;
 786
 787         rtl8187_set_anaparam(priv, true);
 788
 789         /* BRSR (Basic Rate Set Register) on 8187B looks to be the same as
 790          * RESP_RATE on 8187L in Realtek sources: each bit should be each
 791          * one of the 12 rates, all are enabled */
 792         rtl818x_iowrite16(priv, (__le16 *)0xFF34, 0x0FFF);
 793
 794         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 795         reg |= RTL818X_CW_CONF_PERPACKET_RETRY;
 796         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 797
 798         /* Auto Rate Fallback Register (ARFR): 1M-54M setting */
 799         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
 800         rtl818x_iowrite8_idx(priv, (u8 *)0xFFE2, 0x00, 1);
 801
 802         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
 803
 804         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 805                          RTL818X_EEPROM_CMD_CONFIG);
 806         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 807         rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
 808         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 809                          RTL818X_EEPROM_CMD_NORMAL);
 810
 811         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 812         for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
 813                 rtl818x_iowrite8_idx(priv,
 814                                      (u8 *)(uintptr_t)
 815                                      (rtl8187b_reg_table[i][0] | 0xFF00),
 816                                      rtl8187b_reg_table[i][1],
 817                                      rtl8187b_reg_table[i][2]);
 818         }
 819
 820         rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
 821         rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
 822
 823         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
 824         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
 825         rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
 826
 827         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
 828
 829         /* RFSW_CTRL register */
 830         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
 831
 832         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
 833         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
 834         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
 835         msleep(100);
 836
 837         priv->rf->init(dev);
 838
 839         reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
 840         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 841         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 842
 843         rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
 844         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
 845         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 846         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 847         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
 848         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 849         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 850
 851         reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
 852         rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
 853         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
 854         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
 855         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
 856         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
 857         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
 858         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
 859         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
 860         rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
 861         rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
 862         rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
 863         rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
 864
 865         rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
 866
 867         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
 868
 869         priv->slot_time = 0x9;
 870         priv->aifsn[0] = 2; /* AIFSN[AC_VO] */
 871         priv->aifsn[1] = 2; /* AIFSN[AC_VI] */
 872         priv->aifsn[2] = 7; /* AIFSN[AC_BK] */
 873         priv->aifsn[3] = 3; /* AIFSN[AC_BE] */
 874         rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0);
 875
 876         /* ENEDCA flag must always be set, transmit issues? */
 877         rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA);
 878
 879         return 0;
 880 }
 881
 882 static void rtl8187_work(struct work_struct *work)
 883 {
 884         /* The RTL8187 returns the retry count through register 0xFFFA. In
 885          * addition, it appears to be a cumulative retry count, not the
 886          * value for the current TX packet. When multiple TX entries are
 887          * waiting in the queue, the retry count will be the total for all.
 888          * The "error" may matter for purposes of rate setting, but there is
 889          * no other choice with this hardware.
 890          */
 891         struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv,
 892                                     work.work);
 893         struct ieee80211_tx_info *info;
 894         struct ieee80211_hw *dev = priv->dev;
 895         static u16 retry;
 896         u16 tmp;
 897         u16 avg_retry;
 898         int length;
 899
 900         mutex_lock(&priv->conf_mutex);
 901         tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA);
 902         length = skb_queue_len(&priv->b_tx_status.queue);
 903         if (unlikely(!length))
 904                 length = 1;
 905         if (unlikely(tmp < retry))
 906                 tmp = retry;
 907         avg_retry = (tmp - retry) / length;
 908         while (skb_queue_len(&priv->b_tx_status.queue) > 0) {
 909                 struct sk_buff *old_skb;
 910
 911                 old_skb = skb_dequeue(&priv->b_tx_status.queue);
 912                 info = IEEE80211_SKB_CB(old_skb);
 913                 info->status.rates[0].count = avg_retry + 1;
 914                 if (info->status.rates[0].count > RETRY_COUNT)
 915                         info->flags &= ~IEEE80211_TX_STAT_ACK;
 916                 ieee80211_tx_status_irqsafe(dev, old_skb);
 917         }
 918         retry = tmp;
 919         mutex_unlock(&priv->conf_mutex);
 920 }
 921
 922 static int rtl8187_start(struct ieee80211_hw *dev)
 923 {
 924         struct rtl8187_priv *priv = dev->priv;
 925         u32 reg;
 926         int ret;
 927
 928         mutex_lock(&priv->conf_mutex);
 929
 930         ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
 931                                      rtl8187b_init_hw(dev);
 932         if (ret)
 933                 goto rtl8187_start_exit;
 934
 935         init_usb_anchor(&priv->anchored);
 936         priv->dev = dev;
 937
 938         if (priv->is_rtl8187b) {
 939                 reg = RTL818X_RX_CONF_MGMT |
 940                       RTL818X_RX_CONF_DATA |
 941                       RTL818X_RX_CONF_BROADCAST |
 942                       RTL818X_RX_CONF_NICMAC |
 943                       RTL818X_RX_CONF_BSSID |
 944                       (7 << 13 /* RX FIFO threshold NONE */) |
 945                       (7 << 10 /* MAX RX DMA */) |
 946                       RTL818X_RX_CONF_RX_AUTORESETPHY |
 947                       RTL818X_RX_CONF_ONLYERLPKT;
 948                 priv->rx_conf = reg;
 949                 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 950
 951                 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 952                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN;
 953                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL;
 954                 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 955                 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 956
 957                 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
 958                                   RTL818X_TX_CONF_HW_SEQNUM |
 959                                   RTL818X_TX_CONF_DISREQQSIZE |
 960                                   (RETRY_COUNT << 8  /* short retry limit */) |
 961                                   (RETRY_COUNT << 0  /* long retry limit */) |
 962                                   (7 << 21 /* MAX TX DMA */));
 963                 ret = rtl8187_init_urbs(dev);
 964                 if (ret)
 965                         goto rtl8187_start_exit;
 966                 ret = rtl8187b_init_status_urb(dev);
 967                 if (ret)
 968                         usb_kill_anchored_urbs(&priv->anchored);
 969                 goto rtl8187_start_exit;
 970         }
 971
 972         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 973
 974         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 975         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 976
 977         ret = rtl8187_init_urbs(dev);
 978         if (ret)
 979                 goto rtl8187_start_exit;
 980
 981         reg = RTL818X_RX_CONF_ONLYERLPKT |
 982               RTL818X_RX_CONF_RX_AUTORESETPHY |
 983               RTL818X_RX_CONF_BSSID |
 984               RTL818X_RX_CONF_MGMT |
 985               RTL818X_RX_CONF_DATA |
 986               (7 << 13 /* RX FIFO threshold NONE */) |
 987               (7 << 10 /* MAX RX DMA */) |
 988               RTL818X_RX_CONF_BROADCAST |
 989               RTL818X_RX_CONF_NICMAC;
 990
 991         priv->rx_conf = reg;
 992         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 993
 994         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 995         reg &= ~RTL818X_CW_CONF_PERPACKET_CW;
 996         reg |= RTL818X_CW_CONF_PERPACKET_RETRY;
 997         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 998
 999         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
1000         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN;
1001         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL;
1002         reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
1003         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
1004
1005         reg  = RTL818X_TX_CONF_CW_MIN |
1006                (7 << 21 /* MAX TX DMA */) |
1007                RTL818X_TX_CONF_NO_ICV;
1008         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1009
1010         reg = rtl818x_ioread8(priv, &priv->map->CMD);
1011         reg |= RTL818X_CMD_TX_ENABLE;
1012         reg |= RTL818X_CMD_RX_ENABLE;
1013         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1014         INIT_DELAYED_WORK(&priv->work, rtl8187_work);
1015
1016 rtl8187_start_exit:
1017         mutex_unlock(&priv->conf_mutex);
1018         return ret;
1019 }
1020
1021 static void rtl8187_stop(struct ieee80211_hw *dev)
1022 {
1023         struct rtl8187_priv *priv = dev->priv;
1024         struct sk_buff *skb;
1025         u32 reg;
1026
1027         mutex_lock(&priv->conf_mutex);
1028         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
1029
1030         reg = rtl818x_ioread8(priv, &priv->map->CMD);
1031         reg &= ~RTL818X_CMD_TX_ENABLE;
1032         reg &= ~RTL818X_CMD_RX_ENABLE;
1033         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1034
1035         priv->rf->stop(dev);
1036         rtl8187_set_anaparam(priv, false);
1037
1038         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1039         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
1040         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
1041         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1042
1043         while ((skb = skb_dequeue(&priv->b_tx_status.queue)))
1044                 dev_kfree_skb_any(skb);
1045
1046         usb_kill_anchored_urbs(&priv->anchored);
1047         mutex_unlock(&priv->conf_mutex);
1048
1049         if (!priv->is_rtl8187b)
1050                 cancel_delayed_work_sync(&priv->work);
1051 }
1052
1053 static u64 rtl8187_get_tsf(struct ieee80211_hw *dev, struct ieee80211_vif *vif)
1054 {
1055         struct rtl8187_priv *priv = dev->priv;
1056
1057         return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
1058                (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
1059 }
1060
1061
1062 static void rtl8187_beacon_work(struct work_struct *work)
1063 {
1064         struct rtl8187_vif *vif_priv =
1065                 container_of(work, struct rtl8187_vif, beacon_work.work);
1066         struct ieee80211_vif *vif =
1067                 container_of((void *)vif_priv, struct ieee80211_vif, drv_priv);
1068         struct ieee80211_hw *dev = vif_priv->dev;
1069         struct ieee80211_mgmt *mgmt;
1070         struct sk_buff *skb;
1071
1072         /* don't overflow the tx ring */
1073         if (ieee80211_queue_stopped(dev, 0))
1074                 goto resched;
1075
1076         /* grab a fresh beacon */
1077         skb = ieee80211_beacon_get(dev, vif);
1078         if (!skb)
1079                 goto resched;
1080
1081         /*
1082          * update beacon timestamp w/ TSF value
1083          * TODO: make hardware update beacon timestamp
1084          */
1085         mgmt = (struct ieee80211_mgmt *)skb->data;
1086         mgmt->u.beacon.timestamp = cpu_to_le64(rtl8187_get_tsf(dev, vif));
1087
1088         /* TODO: use actual beacon queue */
1089         skb_set_queue_mapping(skb, 0);
1090
1091         rtl8187_tx(dev, NULL, skb);
1092
1093 resched:
1094         /*
1095          * schedule next beacon
1096          * TODO: use hardware support for beacon timing
1097          */
1098         schedule_delayed_work(&vif_priv->beacon_work,
1099                         usecs_to_jiffies(1024 * vif->bss_conf.beacon_int));
1100 }
1101
1102
1103 static int rtl8187_add_interface(struct ieee80211_hw *dev,
1104                                  struct ieee80211_vif *vif)
1105 {
1106         struct rtl8187_priv *priv = dev->priv;
1107         struct rtl8187_vif *vif_priv;
1108         int i;
1109         int ret = -EOPNOTSUPP;
1110
1111         mutex_lock(&priv->conf_mutex);
1112         if (priv->vif)
1113                 goto exit;
1114
1115         switch (vif->type) {
1116         case NL80211_IFTYPE_STATION:
1117         case NL80211_IFTYPE_ADHOC:
1118                 break;
1119         default:
1120                 goto exit;
1121         }
1122
1123         ret = 0;
1124         priv->vif = vif;
1125
1126         /* Initialize driver private area */
1127         vif_priv = (struct rtl8187_vif *)&vif->drv_priv;
1128         vif_priv->dev = dev;
1129         INIT_DELAYED_WORK(&vif_priv->beacon_work, rtl8187_beacon_work);
1130         vif_priv->enable_beacon = false;
1131
1132
1133         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1134         for (i = 0; i < ETH_ALEN; i++)
1135                 rtl818x_iowrite8(priv, &priv->map->MAC[i],
1136                                  ((u8 *)vif->addr)[i]);
1137         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1138
1139 exit:
1140         mutex_unlock(&priv->conf_mutex);
1141         return ret;
1142 }
1143
1144 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
1145                                      struct ieee80211_vif *vif)
1146 {
1147         struct rtl8187_priv *priv = dev->priv;
1148         mutex_lock(&priv->conf_mutex);
1149         priv->vif = NULL;
1150         mutex_unlock(&priv->conf_mutex);
1151 }
1152
1153 static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
1154 {
1155         struct rtl8187_priv *priv = dev->priv;
1156         struct ieee80211_conf *conf = &dev->conf;
1157         u32 reg;
1158
1159         mutex_lock(&priv->conf_mutex);
1160         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1161         /* Enable TX loopback on MAC level to avoid TX during channel
1162          * changes, as this has be seen to causes problems and the
1163          * card will stop work until next reset
1164          */
1165         rtl818x_iowrite32(priv, &priv->map->TX_CONF,
1166                           reg | RTL818X_TX_CONF_LOOPBACK_MAC);
1167         priv->rf->set_chan(dev, conf);
1168         msleep(10);
1169         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1170
1171         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
1172         rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
1173         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
1174         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
1175         mutex_unlock(&priv->conf_mutex);
1176         return 0;
1177 }
1178
1179 /*
1180  * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for
1181  * example. Thus we have to use raw values for AC_*_PARAM register addresses.
1182  */
1183 static __le32 *rtl8187b_ac_addr[4] = {
1184         (__le32 *) 0xFFF0, /* AC_VO */
1185         (__le32 *) 0xFFF4, /* AC_VI */
1186         (__le32 *) 0xFFFC, /* AC_BK */
1187         (__le32 *) 0xFFF8, /* AC_BE */
1188 };
1189
1190 #define SIFS_TIME 0xa
1191
1192 static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
1193                              bool use_short_preamble)
1194 {
1195         if (priv->is_rtl8187b) {
1196                 u8 difs, eifs;
1197                 u16 ack_timeout;
1198                 int queue;
1199
1200                 if (use_short_slot) {
1201                         priv->slot_time = 0x9;
1202                         difs = 0x1c;
1203                         eifs = 0x53;
1204                 } else {
1205                         priv->slot_time = 0x14;
1206                         difs = 0x32;
1207                         eifs = 0x5b;
1208                 }
1209                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1210                 rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
1211                 rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
1212
1213                 /*
1214                  * BRSR+1 on 8187B is in fact EIFS register
1215                  * Value in units of 4 us
1216                  */
1217                 rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
1218
1219                 /*
1220                  * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
1221                  * register. In units of 4 us like eifs register
1222                  * ack_timeout = ack duration + plcp + difs + preamble
1223                  */
1224                 ack_timeout = 112 + 48 + difs;
1225                 if (use_short_preamble)
1226                         ack_timeout += 72;
1227                 else
1228                         ack_timeout += 144;
1229                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
1230                                  DIV_ROUND_UP(ack_timeout, 4));
1231
1232                 for (queue = 0; queue < 4; queue++)
1233                         rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue],
1234                                          priv->aifsn[queue] * priv->slot_time +
1235                                          SIFS_TIME);
1236         } else {
1237                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1238                 if (use_short_slot) {
1239                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
1240                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
1241                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
1242                 } else {
1243                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
1244                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
1245                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
1246                 }
1247         }
1248 }
1249
1250 static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
1251                                      struct ieee80211_vif *vif,
1252                                      struct ieee80211_bss_conf *info,
1253                                      u32 changed)
1254 {
1255         struct rtl8187_priv *priv = dev->priv;
1256         struct rtl8187_vif *vif_priv;
1257         int i;
1258         u8 reg;
1259
1260         vif_priv = (struct rtl8187_vif *)&vif->drv_priv;
1261
1262         if (changed & BSS_CHANGED_BSSID) {
1263                 mutex_lock(&priv->conf_mutex);
1264                 for (i = 0; i < ETH_ALEN; i++)
1265                         rtl818x_iowrite8(priv, &priv->map->BSSID[i],
1266                                          info->bssid[i]);
1267
1268                 if (priv->is_rtl8187b)
1269                         reg = RTL818X_MSR_ENEDCA;
1270                 else
1271                         reg = 0;
1272
1273                 if (is_valid_ether_addr(info->bssid)) {
1274                         if (vif->type == NL80211_IFTYPE_ADHOC)
1275                                 reg |= RTL818X_MSR_ADHOC;
1276                         else
1277                                 reg |= RTL818X_MSR_INFRA;
1278                 }
1279                 else
1280                         reg |= RTL818X_MSR_NO_LINK;
1281
1282                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1283
1284                 mutex_unlock(&priv->conf_mutex);
1285         }
1286
1287         if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
1288                 rtl8187_conf_erp(priv, info->use_short_slot,
1289                                  info->use_short_preamble);
1290
1291         if (changed & BSS_CHANGED_BEACON_ENABLED)
1292                 vif_priv->enable_beacon = info->enable_beacon;
1293
1294         if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) {
1295                 cancel_delayed_work_sync(&vif_priv->beacon_work);
1296                 if (vif_priv->enable_beacon)
1297                         schedule_work(&vif_priv->beacon_work.work);
1298         }
1299
1300 }
1301
1302 static u64 rtl8187_prepare_multicast(struct ieee80211_hw *dev,
1303                                      struct netdev_hw_addr_list *mc_list)
1304 {
1305         return netdev_hw_addr_list_count(mc_list);
1306 }
1307
1308 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
1309                                      unsigned int changed_flags,
1310                                      unsigned int *total_flags,
1311                                      u64 multicast)
1312 {
1313         struct rtl8187_priv *priv = dev->priv;
1314
1315         if (changed_flags & FIF_FCSFAIL)
1316                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
1317         if (changed_flags & FIF_CONTROL)
1318                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
1319         if (*total_flags & FIF_OTHER_BSS ||
1320             *total_flags & FIF_ALLMULTI || multicast > 0)
1321                 priv->rx_conf |= RTL818X_RX_CONF_MONITOR;
1322         else
1323                 priv->rx_conf &= ~RTL818X_RX_CONF_MONITOR;
1324
1325         *total_flags = 0;
1326
1327         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
1328                 *total_flags |= FIF_FCSFAIL;
1329         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
1330                 *total_flags |= FIF_CONTROL;
1331         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR) {
1332                 *total_flags |= FIF_OTHER_BSS;
1333                 *total_flags |= FIF_ALLMULTI;
1334         }
1335
1336         rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1337 }
1338
1339 static int rtl8187_conf_tx(struct ieee80211_hw *dev,
1340                            struct ieee80211_vif *vif, u16 queue,
1341                            const struct ieee80211_tx_queue_params *params)
1342 {
1343         struct rtl8187_priv *priv = dev->priv;
1344         u8 cw_min, cw_max;
1345
1346         if (queue > 3)
1347                 return -EINVAL;
1348
1349         cw_min = fls(params->cw_min);
1350         cw_max = fls(params->cw_max);
1351
1352         if (priv->is_rtl8187b) {
1353                 priv->aifsn[queue] = params->aifs;
1354
1355                 /*
1356                  * This is the structure of AC_*_PARAM registers in 8187B:
1357                  * - TXOP limit field, bit offset = 16
1358                  * - ECWmax, bit offset = 12
1359                  * - ECWmin, bit offset = 8
1360                  * - AIFS, bit offset = 0
1361                  */
1362                 rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue],
1363                                   (params->txop << 16) | (cw_max << 12) |
1364                                   (cw_min << 8) | (params->aifs *
1365                                   priv->slot_time + SIFS_TIME));
1366         } else {
1367                 if (queue != 0)
1368                         return -EINVAL;
1369
1370                 rtl818x_iowrite8(priv, &priv->map->CW_VAL,
1371                                  cw_min | (cw_max << 4));
1372         }
1373         return 0;
1374 }
1375
1376
1377 static const struct ieee80211_ops rtl8187_ops = {
1378         .tx                     = rtl8187_tx,
1379         .start                  = rtl8187_start,
1380         .stop                   = rtl8187_stop,
1381         .add_interface          = rtl8187_add_interface,
1382         .remove_interface       = rtl8187_remove_interface,
1383         .config                 = rtl8187_config,
1384         .bss_info_changed       = rtl8187_bss_info_changed,
1385         .prepare_multicast      = rtl8187_prepare_multicast,
1386         .configure_filter       = rtl8187_configure_filter,
1387         .conf_tx                = rtl8187_conf_tx,
1388         .rfkill_poll            = rtl8187_rfkill_poll,
1389         .get_tsf                = rtl8187_get_tsf,
1390 };
1391
1392 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
1393 {
1394         struct ieee80211_hw *dev = eeprom->data;
1395         struct rtl8187_priv *priv = dev->priv;
1396         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1397
1398         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
1399         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
1400         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
1401         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
1402 }
1403
1404 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
1405 {
1406         struct ieee80211_hw *dev = eeprom->data;
1407         struct rtl8187_priv *priv = dev->priv;
1408         u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1409
1410         if (eeprom->reg_data_in)
1411                 reg |= RTL818X_EEPROM_CMD_WRITE;
1412         if (eeprom->reg_data_out)
1413                 reg |= RTL818X_EEPROM_CMD_READ;
1414         if (eeprom->reg_data_clock)
1415                 reg |= RTL818X_EEPROM_CMD_CK;
1416         if (eeprom->reg_chip_select)
1417                 reg |= RTL818X_EEPROM_CMD_CS;
1418
1419         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1420         udelay(10);
1421 }
1422
1423 static int rtl8187_probe(struct usb_interface *intf,
1424                                    const struct usb_device_id *id)
1425 {
1426         struct usb_device *udev = interface_to_usbdev(intf);
1427         struct ieee80211_hw *dev;
1428         struct rtl8187_priv *priv;
1429         struct eeprom_93cx6 eeprom;
1430         struct ieee80211_channel *channel;
1431         const char *chip_name;
1432         u16 txpwr, reg;
1433         u16 product_id = le16_to_cpu(udev->descriptor.idProduct);
1434         int err, i;
1435         u8 mac_addr[ETH_ALEN];
1436
1437         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1438         if (!dev) {
1439                 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1440                 return -ENOMEM;
1441         }
1442
1443         priv = dev->priv;
1444         priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1445
1446         /* allocate "DMA aware" buffer for register accesses */
1447         priv->io_dmabuf = kmalloc(sizeof(*priv->io_dmabuf), GFP_KERNEL);
1448         if (!priv->io_dmabuf) {
1449                 err = -ENOMEM;
1450                 goto err_free_dev;
1451         }
1452         mutex_init(&priv->io_mutex);
1453         mutex_init(&priv->conf_mutex);
1454
1455         SET_IEEE80211_DEV(dev, &intf->dev);
1456         usb_set_intfdata(intf, dev);
1457         priv->udev = udev;
1458
1459         usb_get_dev(udev);
1460
1461         skb_queue_head_init(&priv->rx_queue);
1462
1463         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1464         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1465
1466         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1467         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1468         priv->map = (struct rtl818x_csr *)0xFF00;
1469
1470         priv->band.band = NL80211_BAND_2GHZ;
1471         priv->band.channels = priv->channels;
1472         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1473         priv->band.bitrates = priv->rates;
1474         priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1475         dev->wiphy->bands[NL80211_BAND_2GHZ] = &priv->band;
1476
1477
1478         ieee80211_hw_set(dev, RX_INCLUDES_FCS);
1479         ieee80211_hw_set(dev, HOST_BROADCAST_PS_BUFFERING);
1480         ieee80211_hw_set(dev, SIGNAL_DBM);
1481         /* Initialize rate-control variables */
1482         dev->max_rates = 1;
1483         dev->max_rate_tries = RETRY_COUNT;
1484
1485         eeprom.data = dev;
1486         eeprom.register_read = rtl8187_eeprom_register_read;
1487         eeprom.register_write = rtl8187_eeprom_register_write;
1488         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1489                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1490         else
1491                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1492
1493         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1494         udelay(10);
1495
1496         eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1497                                (__le16 __force *)mac_addr, 3);
1498         if (!is_valid_ether_addr(mac_addr)) {
1499                 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1500                        "generated MAC address\n");
1501                 eth_random_addr(mac_addr);
1502         }
1503         SET_IEEE80211_PERM_ADDR(dev, mac_addr);
1504
1505         channel = priv->channels;
1506         for (i = 0; i < 3; i++) {
1507                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1508                                   &txpwr);
1509                 (*channel++).hw_value = txpwr & 0xFF;
1510                 (*channel++).hw_value = txpwr >> 8;
1511         }
1512         for (i = 0; i < 2; i++) {
1513                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1514                                   &txpwr);
1515                 (*channel++).hw_value = txpwr & 0xFF;
1516                 (*channel++).hw_value = txpwr >> 8;
1517         }
1518
1519         eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1520                           &priv->txpwr_base);
1521
1522         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1523         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1524         /* 0 means asic B-cut, we should use SW 3 wire
1525          * bit-by-bit banging for radio. 1 means we can use
1526          * USB specific request to write radio registers */
1527         priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1528         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1529         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1530
1531         if (!priv->is_rtl8187b) {
1532                 u32 reg32;
1533                 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1534                 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1535                 switch (reg32) {
1536                 case RTL818X_TX_CONF_R8187vD_B:
1537                         /* Some RTL8187B devices have a USB ID of 0x8187
1538                          * detect them here */
1539                         chip_name = "RTL8187BvB(early)";
1540                         priv->is_rtl8187b = 1;
1541                         priv->hw_rev = RTL8187BvB;
1542                         break;
1543                 case RTL818X_TX_CONF_R8187vD:
1544                         chip_name = "RTL8187vD";
1545                         break;
1546                 default:
1547                         chip_name = "RTL8187vB (default)";
1548                 }
1549        } else {
1550                 /*
1551                  * Force USB request to write radio registers for 8187B, Realtek
1552                  * only uses it in their sources
1553                  */
1554                 /*if (priv->asic_rev == 0) {
1555                         printk(KERN_WARNING "rtl8187: Forcing use of USB "
1556                                "requests to write to radio registers\n");
1557                         priv->asic_rev = 1;
1558                 }*/
1559                 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1560                 case RTL818X_R8187B_B:
1561                         chip_name = "RTL8187BvB";
1562                         priv->hw_rev = RTL8187BvB;
1563                         break;
1564                 case RTL818X_R8187B_D:
1565                         chip_name = "RTL8187BvD";
1566                         priv->hw_rev = RTL8187BvD;
1567                         break;
1568                 case RTL818X_R8187B_E:
1569                         chip_name = "RTL8187BvE";
1570                         priv->hw_rev = RTL8187BvE;
1571                         break;
1572                 default:
1573                         chip_name = "RTL8187BvB (default)";
1574                         priv->hw_rev = RTL8187BvB;
1575                 }
1576         }
1577
1578         if (!priv->is_rtl8187b) {
1579                 for (i = 0; i < 2; i++) {
1580                         eeprom_93cx6_read(&eeprom,
1581                                           RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1582                                           &txpwr);
1583                         (*channel++).hw_value = txpwr & 0xFF;
1584                         (*channel++).hw_value = txpwr >> 8;
1585                 }
1586         } else {
1587                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1588                                   &txpwr);
1589                 (*channel++).hw_value = txpwr & 0xFF;
1590
1591                 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1592                 (*channel++).hw_value = txpwr & 0xFF;
1593
1594                 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1595                 (*channel++).hw_value = txpwr & 0xFF;
1596                 (*channel++).hw_value = txpwr >> 8;
1597         }
1598         /* Handle the differing rfkill GPIO bit in different models */
1599         priv->rfkill_mask = RFKILL_MASK_8187_89_97;
1600         if (product_id == 0x8197 || product_id == 0x8198) {
1601                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_SELECT_GPIO, &reg);
1602                 if (reg & 0xFF00)
1603                         priv->rfkill_mask = RFKILL_MASK_8198;
1604         }
1605         dev->vif_data_size = sizeof(struct rtl8187_vif);
1606         dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1607                                       BIT(NL80211_IFTYPE_ADHOC) ;
1608
1609         wiphy_ext_feature_set(dev->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
1610
1611         if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1612                 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1613                        " info!\n");
1614
1615         priv->rf = rtl8187_detect_rf(dev);
1616         dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1617                                   sizeof(struct rtl8187_tx_hdr) :
1618                                   sizeof(struct rtl8187b_tx_hdr);
1619         if (!priv->is_rtl8187b)
1620                 dev->queues = 1;
1621         else
1622                 dev->queues = 4;
1623
1624         err = ieee80211_register_hw(dev);
1625         if (err) {
1626                 printk(KERN_ERR "rtl8187: Cannot register device\n");
1627                 goto err_free_dmabuf;
1628         }
1629         skb_queue_head_init(&priv->b_tx_status.queue);
1630
1631         wiphy_info(dev->wiphy, "hwaddr %pM, %s V%d + %s, rfkill mask %d\n",
1632                    mac_addr, chip_name, priv->asic_rev, priv->rf->name,
1633                    priv->rfkill_mask);
1634
1635 #ifdef CONFIG_RTL8187_LEDS
1636         eeprom_93cx6_read(&eeprom, 0x3F, &reg);
1637         reg &= 0xFF;
1638         rtl8187_leds_init(dev, reg);
1639 #endif
1640         rtl8187_rfkill_init(dev);
1641
1642         return 0;
1643
1644  err_free_dmabuf:
1645         kfree(priv->io_dmabuf);
1646         usb_set_intfdata(intf, NULL);
1647         usb_put_dev(udev);
1648  err_free_dev:
1649         ieee80211_free_hw(dev);
1650         return err;
1651 }
1652
1653 static void rtl8187_disconnect(struct usb_interface *intf)
1654 {
1655         struct ieee80211_hw *dev = usb_get_intfdata(intf);
1656         struct rtl8187_priv *priv;
1657
1658         if (!dev)
1659                 return;
1660
1661 #ifdef CONFIG_RTL8187_LEDS
1662         rtl8187_leds_exit(dev);
1663 #endif
1664         rtl8187_rfkill_exit(dev);
1665         ieee80211_unregister_hw(dev);
1666
1667         priv = dev->priv;
1668         usb_reset_device(priv->udev);
1669         usb_put_dev(interface_to_usbdev(intf));
1670         kfree(priv->io_dmabuf);
1671         ieee80211_free_hw(dev);
1672 }
1673
1674 static struct usb_driver rtl8187_driver = {
1675         .name           = KBUILD_MODNAME,
1676         .id_table       = rtl8187_table,
1677         .probe          = rtl8187_probe,
1678         .disconnect     = rtl8187_disconnect,
1679         .disable_hub_initiated_lpm = 1,
1680 };
1681
1682 module_usb_driver(rtl8187_driver);