drivers/net/wireless/intel/iwlwifi/fw/dbg.c

   1 /******************************************************************************
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2008 - 2014 Intel Corporation. All rights reserved.
   9  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  10  * Copyright(c) 2015 - 2017 Intel Deutschland GmbH
  11  * Copyright(c) 2018 - 2020 Intel Corporation
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of version 2 of the GNU General Public License as
  15  * published by the Free Software Foundation.
  16  *
  17  * This program is distributed in the hope that it will be useful, but
  18  * WITHOUT ANY WARRANTY; without even the implied warranty of
  19  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  20  * General Public License for more details.
  21  *
  22  * The full GNU General Public License is included in this distribution
  23  * in the file called COPYING.
  24  *
  25  * Contact Information:
  26  *  Intel Linux Wireless <linuxwifi@intel.com>
  27  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  28  *
  29  * BSD LICENSE
  30  *
  31  * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
  32  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  33  * Copyright(c) 2015 - 2017 Intel Deutschland GmbH
  34  * Copyright(c) 2018 - 2020 Intel Corporation
  35  * All rights reserved.
  36  *
  37  * Redistribution and use in source and binary forms, with or without
  38  * modification, are permitted provided that the following conditions
  39  * are met:
  40  *
  41  *  * Redistributions of source code must retain the above copyright
  42  *    notice, this list of conditions and the following disclaimer.
  43  *  * Redistributions in binary form must reproduce the above copyright
  44  *    notice, this list of conditions and the following disclaimer in
  45  *    the documentation and/or other materials provided with the
  46  *    distribution.
  47  *  * Neither the name Intel Corporation nor the names of its
  48  *    contributors may be used to endorse or promote products derived
  49  *    from this software without specific prior written permission.
  50  *
  51  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  52  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  53  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  54  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  55  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  56  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  57  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  58  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  59  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  60  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  61  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  62  *
  63  *****************************************************************************/
  64 #include <linux/devcoredump.h>
  65 #include "iwl-drv.h"
  66 #include "runtime.h"
  67 #include "dbg.h"
  68 #include "debugfs.h"
  69 #include "iwl-io.h"
  70 #include "iwl-prph.h"
  71 #include "iwl-csr.h"
  72
  73 /**
  74  * struct iwl_fw_dump_ptrs - set of pointers needed for the fw-error-dump
  75  *
  76  * @fwrt_ptr: pointer to the buffer coming from fwrt
  77  * @trans_ptr: pointer to struct %iwl_trans_dump_data which contains the
  78  *      transport's data.
  79  * @trans_len: length of the valid data in trans_ptr
  80  * @fwrt_len: length of the valid data in fwrt_ptr
  81  */
  82 struct iwl_fw_dump_ptrs {
  83         struct iwl_trans_dump_data *trans_ptr;
  84         void *fwrt_ptr;
  85         u32 fwrt_len;
  86 };
  87
  88 #define RADIO_REG_MAX_READ 0x2ad
  89 static void iwl_read_radio_regs(struct iwl_fw_runtime *fwrt,
  90                                 struct iwl_fw_error_dump_data **dump_data)
  91 {
  92         u8 *pos = (void *)(*dump_data)->data;
  93         unsigned long flags;
  94         int i;
  95
  96         IWL_DEBUG_INFO(fwrt, "WRT radio registers dump\n");
  97
  98         if (!iwl_trans_grab_nic_access(fwrt->trans, &flags))
  99                 return;
 100
 101         (*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_RADIO_REG);
 102         (*dump_data)->len = cpu_to_le32(RADIO_REG_MAX_READ);
 103
 104         for (i = 0; i < RADIO_REG_MAX_READ; i++) {
 105                 u32 rd_cmd = RADIO_RSP_RD_CMD;
 106
 107                 rd_cmd |= i << RADIO_RSP_ADDR_POS;
 108                 iwl_write_prph_no_grab(fwrt->trans, RSP_RADIO_CMD, rd_cmd);
 109                 *pos = (u8)iwl_read_prph_no_grab(fwrt->trans, RSP_RADIO_RDDAT);
 110
 111                 pos++;
 112         }
 113
 114         *dump_data = iwl_fw_error_next_data(*dump_data);
 115
 116         iwl_trans_release_nic_access(fwrt->trans, &flags);
 117 }
 118
 119 static void iwl_fwrt_dump_rxf(struct iwl_fw_runtime *fwrt,
 120                               struct iwl_fw_error_dump_data **dump_data,
 121                               int size, u32 offset, int fifo_num)
 122 {
 123         struct iwl_fw_error_dump_fifo *fifo_hdr;
 124         u32 *fifo_data;
 125         u32 fifo_len;
 126         int i;
 127
 128         fifo_hdr = (void *)(*dump_data)->data;
 129         fifo_data = (void *)fifo_hdr->data;
 130         fifo_len = size;
 131
 132         /* No need to try to read the data if the length is 0 */
 133         if (fifo_len == 0)
 134                 return;
 135
 136         /* Add a TLV for the RXF */
 137         (*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_RXF);
 138         (*dump_data)->len = cpu_to_le32(fifo_len + sizeof(*fifo_hdr));
 139
 140         fifo_hdr->fifo_num = cpu_to_le32(fifo_num);
 141         fifo_hdr->available_bytes =
 142                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 143                                                 RXF_RD_D_SPACE + offset));
 144         fifo_hdr->wr_ptr =
 145                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 146                                                 RXF_RD_WR_PTR + offset));
 147         fifo_hdr->rd_ptr =
 148                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 149                                                 RXF_RD_RD_PTR + offset));
 150         fifo_hdr->fence_ptr =
 151                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 152                                                 RXF_RD_FENCE_PTR + offset));
 153         fifo_hdr->fence_mode =
 154                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 155                                                 RXF_SET_FENCE_MODE + offset));
 156
 157         /* Lock fence */
 158         iwl_trans_write_prph(fwrt->trans, RXF_SET_FENCE_MODE + offset, 0x1);
 159         /* Set fence pointer to the same place like WR pointer */
 160         iwl_trans_write_prph(fwrt->trans, RXF_LD_WR2FENCE + offset, 0x1);
 161         /* Set fence offset */
 162         iwl_trans_write_prph(fwrt->trans,
 163                              RXF_LD_FENCE_OFFSET_ADDR + offset, 0x0);
 164
 165         /* Read FIFO */
 166         fifo_len /= sizeof(u32); /* Size in DWORDS */
 167         for (i = 0; i < fifo_len; i++)
 168                 fifo_data[i] = iwl_trans_read_prph(fwrt->trans,
 169                                                  RXF_FIFO_RD_FENCE_INC +
 170                                                  offset);
 171         *dump_data = iwl_fw_error_next_data(*dump_data);
 172 }
 173
 174 static void iwl_fwrt_dump_txf(struct iwl_fw_runtime *fwrt,
 175                               struct iwl_fw_error_dump_data **dump_data,
 176                               int size, u32 offset, int fifo_num)
 177 {
 178         struct iwl_fw_error_dump_fifo *fifo_hdr;
 179         u32 *fifo_data;
 180         u32 fifo_len;
 181         int i;
 182
 183         fifo_hdr = (void *)(*dump_data)->data;
 184         fifo_data = (void *)fifo_hdr->data;
 185         fifo_len = size;
 186
 187         /* No need to try to read the data if the length is 0 */
 188         if (fifo_len == 0)
 189                 return;
 190
 191         /* Add a TLV for the FIFO */
 192         (*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_TXF);
 193         (*dump_data)->len = cpu_to_le32(fifo_len + sizeof(*fifo_hdr));
 194
 195         fifo_hdr->fifo_num = cpu_to_le32(fifo_num);
 196         fifo_hdr->available_bytes =
 197                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 198                                                 TXF_FIFO_ITEM_CNT + offset));
 199         fifo_hdr->wr_ptr =
 200                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 201                                                 TXF_WR_PTR + offset));
 202         fifo_hdr->rd_ptr =
 203                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 204                                                 TXF_RD_PTR + offset));
 205         fifo_hdr->fence_ptr =
 206                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 207                                                 TXF_FENCE_PTR + offset));
 208         fifo_hdr->fence_mode =
 209                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 210                                                 TXF_LOCK_FENCE + offset));
 211
 212         /* Set the TXF_READ_MODIFY_ADDR to TXF_WR_PTR */
 213         iwl_trans_write_prph(fwrt->trans, TXF_READ_MODIFY_ADDR + offset,
 214                              TXF_WR_PTR + offset);
 215
 216         /* Dummy-read to advance the read pointer to the head */
 217         iwl_trans_read_prph(fwrt->trans, TXF_READ_MODIFY_DATA + offset);
 218
 219         /* Read FIFO */
 220         fifo_len /= sizeof(u32); /* Size in DWORDS */
 221         for (i = 0; i < fifo_len; i++)
 222                 fifo_data[i] = iwl_trans_read_prph(fwrt->trans,
 223                                                   TXF_READ_MODIFY_DATA +
 224                                                   offset);
 225         *dump_data = iwl_fw_error_next_data(*dump_data);
 226 }
 227
 228 static void iwl_fw_dump_rxf(struct iwl_fw_runtime *fwrt,
 229                             struct iwl_fw_error_dump_data **dump_data)
 230 {
 231         struct iwl_fwrt_shared_mem_cfg *cfg = &fwrt->smem_cfg;
 232         unsigned long flags;
 233
 234         IWL_DEBUG_INFO(fwrt, "WRT RX FIFO dump\n");
 235
 236         if (!iwl_trans_grab_nic_access(fwrt->trans, &flags))
 237                 return;
 238
 239         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_RXF)) {
 240                 /* Pull RXF1 */
 241                 iwl_fwrt_dump_rxf(fwrt, dump_data,
 242                                   cfg->lmac[0].rxfifo1_size, 0, 0);
 243                 /* Pull RXF2 */
 244                 iwl_fwrt_dump_rxf(fwrt, dump_data, cfg->rxfifo2_size,
 245                                   RXF_DIFF_FROM_PREV +
 246                                   fwrt->trans->trans_cfg->umac_prph_offset, 1);
 247                 /* Pull LMAC2 RXF1 */
 248                 if (fwrt->smem_cfg.num_lmacs > 1)
 249                         iwl_fwrt_dump_rxf(fwrt, dump_data,
 250                                           cfg->lmac[1].rxfifo1_size,
 251                                           LMAC2_PRPH_OFFSET, 2);
 252         }
 253
 254         iwl_trans_release_nic_access(fwrt->trans, &flags);
 255 }
 256
 257 static void iwl_fw_dump_txf(struct iwl_fw_runtime *fwrt,
 258                             struct iwl_fw_error_dump_data **dump_data)
 259 {
 260         struct iwl_fw_error_dump_fifo *fifo_hdr;
 261         struct iwl_fwrt_shared_mem_cfg *cfg = &fwrt->smem_cfg;
 262         u32 *fifo_data;
 263         u32 fifo_len;
 264         unsigned long flags;
 265         int i, j;
 266
 267         IWL_DEBUG_INFO(fwrt, "WRT TX FIFO dump\n");
 268
 269         if (!iwl_trans_grab_nic_access(fwrt->trans, &flags))
 270                 return;
 271
 272         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_TXF)) {
 273                 /* Pull TXF data from LMAC1 */
 274                 for (i = 0; i < fwrt->smem_cfg.num_txfifo_entries; i++) {
 275                         /* Mark the number of TXF we're pulling now */
 276                         iwl_trans_write_prph(fwrt->trans, TXF_LARC_NUM, i);
 277                         iwl_fwrt_dump_txf(fwrt, dump_data,
 278                                           cfg->lmac[0].txfifo_size[i], 0, i);
 279                 }
 280
 281                 /* Pull TXF data from LMAC2 */
 282                 if (fwrt->smem_cfg.num_lmacs > 1) {
 283                         for (i = 0; i < fwrt->smem_cfg.num_txfifo_entries;
 284                              i++) {
 285                                 /* Mark the number of TXF we're pulling now */
 286                                 iwl_trans_write_prph(fwrt->trans,
 287                                                      TXF_LARC_NUM +
 288                                                      LMAC2_PRPH_OFFSET, i);
 289                                 iwl_fwrt_dump_txf(fwrt, dump_data,
 290                                                   cfg->lmac[1].txfifo_size[i],
 291                                                   LMAC2_PRPH_OFFSET,
 292                                                   i + cfg->num_txfifo_entries);
 293                         }
 294                 }
 295         }
 296
 297         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_INTERNAL_TXF) &&
 298             fw_has_capa(&fwrt->fw->ucode_capa,
 299                         IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) {
 300                 /* Pull UMAC internal TXF data from all TXFs */
 301                 for (i = 0;
 302                      i < ARRAY_SIZE(fwrt->smem_cfg.internal_txfifo_size);
 303                      i++) {
 304                         fifo_hdr = (void *)(*dump_data)->data;
 305                         fifo_data = (void *)fifo_hdr->data;
 306                         fifo_len = fwrt->smem_cfg.internal_txfifo_size[i];
 307
 308                         /* No need to try to read the data if the length is 0 */
 309                         if (fifo_len == 0)
 310                                 continue;
 311
 312                         /* Add a TLV for the internal FIFOs */
 313                         (*dump_data)->type =
 314                                 cpu_to_le32(IWL_FW_ERROR_DUMP_INTERNAL_TXF);
 315                         (*dump_data)->len =
 316                                 cpu_to_le32(fifo_len + sizeof(*fifo_hdr));
 317
 318                         fifo_hdr->fifo_num = cpu_to_le32(i);
 319
 320                         /* Mark the number of TXF we're pulling now */
 321                         iwl_trans_write_prph(fwrt->trans, TXF_CPU2_NUM, i +
 322                                 fwrt->smem_cfg.num_txfifo_entries);
 323
 324                         fifo_hdr->available_bytes =
 325                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 326                                                                 TXF_CPU2_FIFO_ITEM_CNT));
 327                         fifo_hdr->wr_ptr =
 328                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 329                                                                 TXF_CPU2_WR_PTR));
 330                         fifo_hdr->rd_ptr =
 331                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 332                                                                 TXF_CPU2_RD_PTR));
 333                         fifo_hdr->fence_ptr =
 334                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 335                                                                 TXF_CPU2_FENCE_PTR));
 336                         fifo_hdr->fence_mode =
 337                                 cpu_to_le32(iwl_trans_read_prph(fwrt->trans,
 338                                                                 TXF_CPU2_LOCK_FENCE));
 339
 340                         /* Set TXF_CPU2_READ_MODIFY_ADDR to TXF_CPU2_WR_PTR */
 341                         iwl_trans_write_prph(fwrt->trans,
 342                                              TXF_CPU2_READ_MODIFY_ADDR,
 343                                              TXF_CPU2_WR_PTR);
 344
 345                         /* Dummy-read to advance the read pointer to head */
 346                         iwl_trans_read_prph(fwrt->trans,
 347                                             TXF_CPU2_READ_MODIFY_DATA);
 348
 349                         /* Read FIFO */
 350                         fifo_len /= sizeof(u32); /* Size in DWORDS */
 351                         for (j = 0; j < fifo_len; j++)
 352                                 fifo_data[j] =
 353                                         iwl_trans_read_prph(fwrt->trans,
 354                                                             TXF_CPU2_READ_MODIFY_DATA);
 355                         *dump_data = iwl_fw_error_next_data(*dump_data);
 356                 }
 357         }
 358
 359         iwl_trans_release_nic_access(fwrt->trans, &flags);
 360 }
 361
 362 #define IWL8260_ICCM_OFFSET             0x44000 /* Only for B-step */
 363 #define IWL8260_ICCM_LEN                0xC000 /* Only for B-step */
 364
 365 struct iwl_prph_range {
 366         u32 start, end;
 367 };
 368
 369 static const struct iwl_prph_range iwl_prph_dump_addr_comm[] = {
 370         { .start = 0x00a00000, .end = 0x00a00000 },
 371         { .start = 0x00a0000c, .end = 0x00a00024 },
 372         { .start = 0x00a0002c, .end = 0x00a0003c },
 373         { .start = 0x00a00410, .end = 0x00a00418 },
 374         { .start = 0x00a00420, .end = 0x00a00420 },
 375         { .start = 0x00a00428, .end = 0x00a00428 },
 376         { .start = 0x00a00430, .end = 0x00a0043c },
 377         { .start = 0x00a00444, .end = 0x00a00444 },
 378         { .start = 0x00a004c0, .end = 0x00a004cc },
 379         { .start = 0x00a004d8, .end = 0x00a004d8 },
 380         { .start = 0x00a004e0, .end = 0x00a004f0 },
 381         { .start = 0x00a00840, .end = 0x00a00840 },
 382         { .start = 0x00a00850, .end = 0x00a00858 },
 383         { .start = 0x00a01004, .end = 0x00a01008 },
 384         { .start = 0x00a01010, .end = 0x00a01010 },
 385         { .start = 0x00a01018, .end = 0x00a01018 },
 386         { .start = 0x00a01024, .end = 0x00a01024 },
 387         { .start = 0x00a0102c, .end = 0x00a01034 },
 388         { .start = 0x00a0103c, .end = 0x00a01040 },
 389         { .start = 0x00a01048, .end = 0x00a01094 },
 390         { .start = 0x00a01c00, .end = 0x00a01c20 },
 391         { .start = 0x00a01c58, .end = 0x00a01c58 },
 392         { .start = 0x00a01c7c, .end = 0x00a01c7c },
 393         { .start = 0x00a01c28, .end = 0x00a01c54 },
 394         { .start = 0x00a01c5c, .end = 0x00a01c5c },
 395         { .start = 0x00a01c60, .end = 0x00a01cdc },
 396         { .start = 0x00a01ce0, .end = 0x00a01d0c },
 397         { .start = 0x00a01d18, .end = 0x00a01d20 },
 398         { .start = 0x00a01d2c, .end = 0x00a01d30 },
 399         { .start = 0x00a01d40, .end = 0x00a01d5c },
 400         { .start = 0x00a01d80, .end = 0x00a01d80 },
 401         { .start = 0x00a01d98, .end = 0x00a01d9c },
 402         { .start = 0x00a01da8, .end = 0x00a01da8 },
 403         { .start = 0x00a01db8, .end = 0x00a01df4 },
 404         { .start = 0x00a01dc0, .end = 0x00a01dfc },
 405         { .start = 0x00a01e00, .end = 0x00a01e2c },
 406         { .start = 0x00a01e40, .end = 0x00a01e60 },
 407         { .start = 0x00a01e68, .end = 0x00a01e6c },
 408         { .start = 0x00a01e74, .end = 0x00a01e74 },
 409         { .start = 0x00a01e84, .end = 0x00a01e90 },
 410         { .start = 0x00a01e9c, .end = 0x00a01ec4 },
 411         { .start = 0x00a01ed0, .end = 0x00a01ee0 },
 412         { .start = 0x00a01f00, .end = 0x00a01f1c },
 413         { .start = 0x00a01f44, .end = 0x00a01ffc },
 414         { .start = 0x00a02000, .end = 0x00a02048 },
 415         { .start = 0x00a02068, .end = 0x00a020f0 },
 416         { .start = 0x00a02100, .end = 0x00a02118 },
 417         { .start = 0x00a02140, .end = 0x00a0214c },
 418         { .start = 0x00a02168, .end = 0x00a0218c },
 419         { .start = 0x00a021c0, .end = 0x00a021c0 },
 420         { .start = 0x00a02400, .end = 0x00a02410 },
 421         { .start = 0x00a02418, .end = 0x00a02420 },
 422         { .start = 0x00a02428, .end = 0x00a0242c },
 423         { .start = 0x00a02434, .end = 0x00a02434 },
 424         { .start = 0x00a02440, .end = 0x00a02460 },
 425         { .start = 0x00a02468, .end = 0x00a024b0 },
 426         { .start = 0x00a024c8, .end = 0x00a024cc },
 427         { .start = 0x00a02500, .end = 0x00a02504 },
 428         { .start = 0x00a0250c, .end = 0x00a02510 },
 429         { .start = 0x00a02540, .end = 0x00a02554 },
 430         { .start = 0x00a02580, .end = 0x00a025f4 },
 431         { .start = 0x00a02600, .end = 0x00a0260c },
 432         { .start = 0x00a02648, .end = 0x00a02650 },
 433         { .start = 0x00a02680, .end = 0x00a02680 },
 434         { .start = 0x00a026c0, .end = 0x00a026d0 },
 435         { .start = 0x00a02700, .end = 0x00a0270c },
 436         { .start = 0x00a02804, .end = 0x00a02804 },
 437         { .start = 0x00a02818, .end = 0x00a0281c },
 438         { .start = 0x00a02c00, .end = 0x00a02db4 },
 439         { .start = 0x00a02df4, .end = 0x00a02fb0 },
 440         { .start = 0x00a03000, .end = 0x00a03014 },
 441         { .start = 0x00a0301c, .end = 0x00a0302c },
 442         { .start = 0x00a03034, .end = 0x00a03038 },
 443         { .start = 0x00a03040, .end = 0x00a03048 },
 444         { .start = 0x00a03060, .end = 0x00a03068 },
 445         { .start = 0x00a03070, .end = 0x00a03074 },
 446         { .start = 0x00a0307c, .end = 0x00a0307c },
 447         { .start = 0x00a03080, .end = 0x00a03084 },
 448         { .start = 0x00a0308c, .end = 0x00a03090 },
 449         { .start = 0x00a03098, .end = 0x00a03098 },
 450         { .start = 0x00a030a0, .end = 0x00a030a0 },
 451         { .start = 0x00a030a8, .end = 0x00a030b4 },
 452         { .start = 0x00a030bc, .end = 0x00a030bc },
 453         { .start = 0x00a030c0, .end = 0x00a0312c },
 454         { .start = 0x00a03c00, .end = 0x00a03c5c },
 455         { .start = 0x00a04400, .end = 0x00a04454 },
 456         { .start = 0x00a04460, .end = 0x00a04474 },
 457         { .start = 0x00a044c0, .end = 0x00a044ec },
 458         { .start = 0x00a04500, .end = 0x00a04504 },
 459         { .start = 0x00a04510, .end = 0x00a04538 },
 460         { .start = 0x00a04540, .end = 0x00a04548 },
 461         { .start = 0x00a04560, .end = 0x00a0457c },
 462         { .start = 0x00a04590, .end = 0x00a04598 },
 463         { .start = 0x00a045c0, .end = 0x00a045f4 },
 464 };
 465
 466 static const struct iwl_prph_range iwl_prph_dump_addr_9000[] = {
 467         { .start = 0x00a05c00, .end = 0x00a05c18 },
 468         { .start = 0x00a05400, .end = 0x00a056e8 },
 469         { .start = 0x00a08000, .end = 0x00a098bc },
 470         { .start = 0x00a02400, .end = 0x00a02758 },
 471         { .start = 0x00a04764, .end = 0x00a0476c },
 472         { .start = 0x00a04770, .end = 0x00a04774 },
 473         { .start = 0x00a04620, .end = 0x00a04624 },
 474 };
 475
 476 static const struct iwl_prph_range iwl_prph_dump_addr_22000[] = {
 477         { .start = 0x00a00000, .end = 0x00a00000 },
 478         { .start = 0x00a0000c, .end = 0x00a00024 },
 479         { .start = 0x00a0002c, .end = 0x00a00034 },
 480         { .start = 0x00a0003c, .end = 0x00a0003c },
 481         { .start = 0x00a00410, .end = 0x00a00418 },
 482         { .start = 0x00a00420, .end = 0x00a00420 },
 483         { .start = 0x00a00428, .end = 0x00a00428 },
 484         { .start = 0x00a00430, .end = 0x00a0043c },
 485         { .start = 0x00a00444, .end = 0x00a00444 },
 486         { .start = 0x00a00840, .end = 0x00a00840 },
 487         { .start = 0x00a00850, .end = 0x00a00858 },
 488         { .start = 0x00a01004, .end = 0x00a01008 },
 489         { .start = 0x00a01010, .end = 0x00a01010 },
 490         { .start = 0x00a01018, .end = 0x00a01018 },
 491         { .start = 0x00a01024, .end = 0x00a01024 },
 492         { .start = 0x00a0102c, .end = 0x00a01034 },
 493         { .start = 0x00a0103c, .end = 0x00a01040 },
 494         { .start = 0x00a01048, .end = 0x00a01050 },
 495         { .start = 0x00a01058, .end = 0x00a01058 },
 496         { .start = 0x00a01060, .end = 0x00a01070 },
 497         { .start = 0x00a0108c, .end = 0x00a0108c },
 498         { .start = 0x00a01c20, .end = 0x00a01c28 },
 499         { .start = 0x00a01d10, .end = 0x00a01d10 },
 500         { .start = 0x00a01e28, .end = 0x00a01e2c },
 501         { .start = 0x00a01e60, .end = 0x00a01e60 },
 502         { .start = 0x00a01e80, .end = 0x00a01e80 },
 503         { .start = 0x00a01ea0, .end = 0x00a01ea0 },
 504         { .start = 0x00a02000, .end = 0x00a0201c },
 505         { .start = 0x00a02024, .end = 0x00a02024 },
 506         { .start = 0x00a02040, .end = 0x00a02048 },
 507         { .start = 0x00a020c0, .end = 0x00a020e0 },
 508         { .start = 0x00a02400, .end = 0x00a02404 },
 509         { .start = 0x00a0240c, .end = 0x00a02414 },
 510         { .start = 0x00a0241c, .end = 0x00a0243c },
 511         { .start = 0x00a02448, .end = 0x00a024bc },
 512         { .start = 0x00a024c4, .end = 0x00a024cc },
 513         { .start = 0x00a02508, .end = 0x00a02508 },
 514         { .start = 0x00a02510, .end = 0x00a02514 },
 515         { .start = 0x00a0251c, .end = 0x00a0251c },
 516         { .start = 0x00a0252c, .end = 0x00a0255c },
 517         { .start = 0x00a02564, .end = 0x00a025a0 },
 518         { .start = 0x00a025a8, .end = 0x00a025b4 },
 519         { .start = 0x00a025c0, .end = 0x00a025c0 },
 520         { .start = 0x00a025e8, .end = 0x00a025f4 },
 521         { .start = 0x00a02c08, .end = 0x00a02c18 },
 522         { .start = 0x00a02c2c, .end = 0x00a02c38 },
 523         { .start = 0x00a02c68, .end = 0x00a02c78 },
 524         { .start = 0x00a03000, .end = 0x00a03000 },
 525         { .start = 0x00a03010, .end = 0x00a03014 },
 526         { .start = 0x00a0301c, .end = 0x00a0302c },
 527         { .start = 0x00a03034, .end = 0x00a03038 },
 528         { .start = 0x00a03040, .end = 0x00a03044 },
 529         { .start = 0x00a03060, .end = 0x00a03068 },
 530         { .start = 0x00a03070, .end = 0x00a03070 },
 531         { .start = 0x00a0307c, .end = 0x00a03084 },
 532         { .start = 0x00a0308c, .end = 0x00a03090 },
 533         { .start = 0x00a03098, .end = 0x00a03098 },
 534         { .start = 0x00a030a0, .end = 0x00a030a0 },
 535         { .start = 0x00a030a8, .end = 0x00a030b4 },
 536         { .start = 0x00a030bc, .end = 0x00a030c0 },
 537         { .start = 0x00a030c8, .end = 0x00a030f4 },
 538         { .start = 0x00a03100, .end = 0x00a0312c },
 539         { .start = 0x00a03c00, .end = 0x00a03c5c },
 540         { .start = 0x00a04400, .end = 0x00a04454 },
 541         { .start = 0x00a04460, .end = 0x00a04474 },
 542         { .start = 0x00a044c0, .end = 0x00a044ec },
 543         { .start = 0x00a04500, .end = 0x00a04504 },
 544         { .start = 0x00a04510, .end = 0x00a04538 },
 545         { .start = 0x00a04540, .end = 0x00a04548 },
 546         { .start = 0x00a04560, .end = 0x00a04560 },
 547         { .start = 0x00a04570, .end = 0x00a0457c },
 548         { .start = 0x00a04590, .end = 0x00a04590 },
 549         { .start = 0x00a04598, .end = 0x00a04598 },
 550         { .start = 0x00a045c0, .end = 0x00a045f4 },
 551         { .start = 0x00a05c18, .end = 0x00a05c1c },
 552         { .start = 0x00a0c000, .end = 0x00a0c018 },
 553         { .start = 0x00a0c020, .end = 0x00a0c028 },
 554         { .start = 0x00a0c038, .end = 0x00a0c094 },
 555         { .start = 0x00a0c0c0, .end = 0x00a0c104 },
 556         { .start = 0x00a0c10c, .end = 0x00a0c118 },
 557         { .start = 0x00a0c150, .end = 0x00a0c174 },
 558         { .start = 0x00a0c17c, .end = 0x00a0c188 },
 559         { .start = 0x00a0c190, .end = 0x00a0c198 },
 560         { .start = 0x00a0c1a0, .end = 0x00a0c1a8 },
 561         { .start = 0x00a0c1b0, .end = 0x00a0c1b8 },
 562 };
 563
 564 static const struct iwl_prph_range iwl_prph_dump_addr_ax210[] = {
 565         { .start = 0x00d03c00, .end = 0x00d03c64 },
 566         { .start = 0x00d05c18, .end = 0x00d05c1c },
 567         { .start = 0x00d0c000, .end = 0x00d0c174 },
 568 };
 569
 570 static void iwl_read_prph_block(struct iwl_trans *trans, u32 start,
 571                                 u32 len_bytes, __le32 *data)
 572 {
 573         u32 i;
 574
 575         for (i = 0; i < len_bytes; i += 4)
 576                 *data++ = cpu_to_le32(iwl_read_prph_no_grab(trans, start + i));
 577 }
 578
 579 static void iwl_dump_prph(struct iwl_fw_runtime *fwrt,
 580                           const struct iwl_prph_range *iwl_prph_dump_addr,
 581                           u32 range_len, void *ptr)
 582 {
 583         struct iwl_fw_error_dump_prph *prph;
 584         struct iwl_trans *trans = fwrt->trans;
 585         struct iwl_fw_error_dump_data **data =
 586                 (struct iwl_fw_error_dump_data **)ptr;
 587         unsigned long flags;
 588         u32 i;
 589
 590         if (!data)
 591                 return;
 592
 593         IWL_DEBUG_INFO(trans, "WRT PRPH dump\n");
 594
 595         if (!iwl_trans_grab_nic_access(trans, &flags))
 596                 return;
 597
 598         for (i = 0; i < range_len; i++) {
 599                 /* The range includes both boundaries */
 600                 int num_bytes_in_chunk = iwl_prph_dump_addr[i].end -
 601                          iwl_prph_dump_addr[i].start + 4;
 602
 603                 (*data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_PRPH);
 604                 (*data)->len = cpu_to_le32(sizeof(*prph) +
 605                                         num_bytes_in_chunk);
 606                 prph = (void *)(*data)->data;
 607                 prph->prph_start = cpu_to_le32(iwl_prph_dump_addr[i].start);
 608
 609                 iwl_read_prph_block(trans, iwl_prph_dump_addr[i].start,
 610                                     /* our range is inclusive, hence + 4 */
 611                                     iwl_prph_dump_addr[i].end -
 612                                     iwl_prph_dump_addr[i].start + 4,
 613                                     (void *)prph->data);
 614
 615                 *data = iwl_fw_error_next_data(*data);
 616         }
 617
 618         iwl_trans_release_nic_access(trans, &flags);
 619 }
 620
 621 /*
 622  * alloc_sgtable - allocates scallerlist table in the given size,
 623  * fills it with pages and returns it
 624  * @size: the size (in bytes) of the table
 625 */
 626 static struct scatterlist *alloc_sgtable(int size)
 627 {
 628         int alloc_size, nents, i;
 629         struct page *new_page;
 630         struct scatterlist *iter;
 631         struct scatterlist *table;
 632
 633         nents = DIV_ROUND_UP(size, PAGE_SIZE);
 634         table = kcalloc(nents, sizeof(*table), GFP_KERNEL);
 635         if (!table)
 636                 return NULL;
 637         sg_init_table(table, nents);
 638         iter = table;
 639         for_each_sg(table, iter, sg_nents(table), i) {
 640                 new_page = alloc_page(GFP_KERNEL);
 641                 if (!new_page) {
 642                         /* release all previous allocated pages in the table */
 643                         iter = table;
 644                         for_each_sg(table, iter, sg_nents(table), i) {
 645                                 new_page = sg_page(iter);
 646                                 if (new_page)
 647                                         __free_page(new_page);
 648                         }
 649                         kfree(table);
 650                         return NULL;
 651                 }
 652                 alloc_size = min_t(int, size, PAGE_SIZE);
 653                 size -= PAGE_SIZE;
 654                 sg_set_page(iter, new_page, alloc_size, 0);
 655         }
 656         return table;
 657 }
 658
 659 static void iwl_fw_get_prph_len(struct iwl_fw_runtime *fwrt,
 660                                 const struct iwl_prph_range *iwl_prph_dump_addr,
 661                                 u32 range_len, void *ptr)
 662 {
 663         u32 *prph_len = (u32 *)ptr;
 664         int i, num_bytes_in_chunk;
 665
 666         if (!prph_len)
 667                 return;
 668
 669         for (i = 0; i < range_len; i++) {
 670                 /* The range includes both boundaries */
 671                 num_bytes_in_chunk =
 672                         iwl_prph_dump_addr[i].end -
 673                         iwl_prph_dump_addr[i].start + 4;
 674
 675                 *prph_len += sizeof(struct iwl_fw_error_dump_data) +
 676                         sizeof(struct iwl_fw_error_dump_prph) +
 677                         num_bytes_in_chunk;
 678         }
 679 }
 680
 681 static void iwl_fw_prph_handler(struct iwl_fw_runtime *fwrt, void *ptr,
 682                                 void (*handler)(struct iwl_fw_runtime *,
 683                                                 const struct iwl_prph_range *,
 684                                                 u32, void *))
 685 {
 686         u32 range_len;
 687
 688         if (fwrt->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210) {
 689                 range_len = ARRAY_SIZE(iwl_prph_dump_addr_ax210);
 690                 handler(fwrt, iwl_prph_dump_addr_ax210, range_len, ptr);
 691         } else if (fwrt->trans->trans_cfg->device_family >=
 692                    IWL_DEVICE_FAMILY_22000) {
 693                 range_len = ARRAY_SIZE(iwl_prph_dump_addr_22000);
 694                 handler(fwrt, iwl_prph_dump_addr_22000, range_len, ptr);
 695         } else {
 696                 range_len = ARRAY_SIZE(iwl_prph_dump_addr_comm);
 697                 handler(fwrt, iwl_prph_dump_addr_comm, range_len, ptr);
 698
 699                 if (fwrt->trans->trans_cfg->mq_rx_supported) {
 700                         range_len = ARRAY_SIZE(iwl_prph_dump_addr_9000);
 701                         handler(fwrt, iwl_prph_dump_addr_9000, range_len, ptr);
 702                 }
 703         }
 704 }
 705
 706 static void iwl_fw_dump_mem(struct iwl_fw_runtime *fwrt,
 707                             struct iwl_fw_error_dump_data **dump_data,
 708                             u32 len, u32 ofs, u32 type)
 709 {
 710         struct iwl_fw_error_dump_mem *dump_mem;
 711
 712         if (!len)
 713                 return;
 714
 715         (*dump_data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM);
 716         (*dump_data)->len = cpu_to_le32(len + sizeof(*dump_mem));
 717         dump_mem = (void *)(*dump_data)->data;
 718         dump_mem->type = cpu_to_le32(type);
 719         dump_mem->offset = cpu_to_le32(ofs);
 720         iwl_trans_read_mem_bytes(fwrt->trans, ofs, dump_mem->data, len);
 721         *dump_data = iwl_fw_error_next_data(*dump_data);
 722
 723         IWL_DEBUG_INFO(fwrt, "WRT memory dump. Type=%u\n", dump_mem->type);
 724 }
 725
 726 #define ADD_LEN(len, item_len, const_len) \
 727         do {size_t item = item_len; len += (!!item) * const_len + item; } \
 728         while (0)
 729
 730 static int iwl_fw_rxf_len(struct iwl_fw_runtime *fwrt,
 731                           struct iwl_fwrt_shared_mem_cfg *mem_cfg)
 732 {
 733         size_t hdr_len = sizeof(struct iwl_fw_error_dump_data) +
 734                          sizeof(struct iwl_fw_error_dump_fifo);
 735         u32 fifo_len = 0;
 736         int i;
 737
 738         if (!iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_RXF))
 739                 return 0;
 740
 741         /* Count RXF2 size */
 742         ADD_LEN(fifo_len, mem_cfg->rxfifo2_size, hdr_len);
 743
 744         /* Count RXF1 sizes */
 745         if (WARN_ON(mem_cfg->num_lmacs > MAX_NUM_LMAC))
 746                 mem_cfg->num_lmacs = MAX_NUM_LMAC;
 747
 748         for (i = 0; i < mem_cfg->num_lmacs; i++)
 749                 ADD_LEN(fifo_len, mem_cfg->lmac[i].rxfifo1_size, hdr_len);
 750
 751         return fifo_len;
 752 }
 753
 754 static int iwl_fw_txf_len(struct iwl_fw_runtime *fwrt,
 755                           struct iwl_fwrt_shared_mem_cfg *mem_cfg)
 756 {
 757         size_t hdr_len = sizeof(struct iwl_fw_error_dump_data) +
 758                          sizeof(struct iwl_fw_error_dump_fifo);
 759         u32 fifo_len = 0;
 760         int i;
 761
 762         if (!iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_TXF))
 763                 goto dump_internal_txf;
 764
 765         /* Count TXF sizes */
 766         if (WARN_ON(mem_cfg->num_lmacs > MAX_NUM_LMAC))
 767                 mem_cfg->num_lmacs = MAX_NUM_LMAC;
 768
 769         for (i = 0; i < mem_cfg->num_lmacs; i++) {
 770                 int j;
 771
 772                 for (j = 0; j < mem_cfg->num_txfifo_entries; j++)
 773                         ADD_LEN(fifo_len, mem_cfg->lmac[i].txfifo_size[j],
 774                                 hdr_len);
 775         }
 776
 777 dump_internal_txf:
 778         if (!(iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_INTERNAL_TXF) &&
 779               fw_has_capa(&fwrt->fw->ucode_capa,
 780                           IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)))
 781                 goto out;
 782
 783         for (i = 0; i < ARRAY_SIZE(mem_cfg->internal_txfifo_size); i++)
 784                 ADD_LEN(fifo_len, mem_cfg->internal_txfifo_size[i], hdr_len);
 785
 786 out:
 787         return fifo_len;
 788 }
 789
 790 static void iwl_dump_paging(struct iwl_fw_runtime *fwrt,
 791                             struct iwl_fw_error_dump_data **data)
 792 {
 793         int i;
 794
 795         IWL_DEBUG_INFO(fwrt, "WRT paging dump\n");
 796         for (i = 1; i < fwrt->num_of_paging_blk + 1; i++) {
 797                 struct iwl_fw_error_dump_paging *paging;
 798                 struct page *pages =
 799                         fwrt->fw_paging_db[i].fw_paging_block;
 800                 dma_addr_t addr = fwrt->fw_paging_db[i].fw_paging_phys;
 801
 802                 (*data)->type = cpu_to_le32(IWL_FW_ERROR_DUMP_PAGING);
 803                 (*data)->len = cpu_to_le32(sizeof(*paging) +
 804                                              PAGING_BLOCK_SIZE);
 805                 paging =  (void *)(*data)->data;
 806                 paging->index = cpu_to_le32(i);
 807                 dma_sync_single_for_cpu(fwrt->trans->dev, addr,
 808                                         PAGING_BLOCK_SIZE,
 809                                         DMA_BIDIRECTIONAL);
 810                 memcpy(paging->data, page_address(pages),
 811                        PAGING_BLOCK_SIZE);
 812                 dma_sync_single_for_device(fwrt->trans->dev, addr,
 813                                            PAGING_BLOCK_SIZE,
 814                                            DMA_BIDIRECTIONAL);
 815                 (*data) = iwl_fw_error_next_data(*data);
 816         }
 817 }
 818
 819 static struct iwl_fw_error_dump_file *
 820 iwl_fw_error_dump_file(struct iwl_fw_runtime *fwrt,
 821                        struct iwl_fw_dump_ptrs *fw_error_dump)
 822 {
 823         struct iwl_fw_error_dump_file *dump_file;
 824         struct iwl_fw_error_dump_data *dump_data;
 825         struct iwl_fw_error_dump_info *dump_info;
 826         struct iwl_fw_error_dump_smem_cfg *dump_smem_cfg;
 827         struct iwl_fw_error_dump_trigger_desc *dump_trig;
 828         u32 sram_len, sram_ofs;
 829         const struct iwl_fw_dbg_mem_seg_tlv *fw_mem = fwrt->fw->dbg.mem_tlv;
 830         struct iwl_fwrt_shared_mem_cfg *mem_cfg = &fwrt->smem_cfg;
 831         u32 file_len, fifo_len = 0, prph_len = 0, radio_len = 0;
 832         u32 smem_len = fwrt->fw->dbg.n_mem_tlv ? 0 : fwrt->trans->cfg->smem_len;
 833         u32 sram2_len = fwrt->fw->dbg.n_mem_tlv ?
 834                                 0 : fwrt->trans->cfg->dccm2_len;
 835         int i;
 836
 837         /* SRAM - include stack CCM if driver knows the values for it */
 838         if (!fwrt->trans->cfg->dccm_offset || !fwrt->trans->cfg->dccm_len) {
 839                 const struct fw_img *img;
 840
 841                 if (fwrt->cur_fw_img >= IWL_UCODE_TYPE_MAX)
 842                         return NULL;
 843                 img = &fwrt->fw->img[fwrt->cur_fw_img];
 844                 sram_ofs = img->sec[IWL_UCODE_SECTION_DATA].offset;
 845                 sram_len = img->sec[IWL_UCODE_SECTION_DATA].len;
 846         } else {
 847                 sram_ofs = fwrt->trans->cfg->dccm_offset;
 848                 sram_len = fwrt->trans->cfg->dccm_len;
 849         }
 850
 851         /* reading RXF/TXF sizes */
 852         if (test_bit(STATUS_FW_ERROR, &fwrt->trans->status)) {
 853                 fifo_len = iwl_fw_rxf_len(fwrt, mem_cfg);
 854                 fifo_len += iwl_fw_txf_len(fwrt, mem_cfg);
 855
 856                 /* Make room for PRPH registers */
 857                 if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_PRPH))
 858                         iwl_fw_prph_handler(fwrt, &prph_len,
 859                                             iwl_fw_get_prph_len);
 860
 861                 if (fwrt->trans->trans_cfg->device_family ==
 862                     IWL_DEVICE_FAMILY_7000 &&
 863                     iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_RADIO_REG))
 864                         radio_len = sizeof(*dump_data) + RADIO_REG_MAX_READ;
 865         }
 866
 867         file_len = sizeof(*dump_file) + fifo_len + prph_len + radio_len;
 868
 869         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_DEV_FW_INFO))
 870                 file_len += sizeof(*dump_data) + sizeof(*dump_info);
 871         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_MEM_CFG))
 872                 file_len += sizeof(*dump_data) + sizeof(*dump_smem_cfg);
 873
 874         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_MEM)) {
 875                 size_t hdr_len = sizeof(*dump_data) +
 876                                  sizeof(struct iwl_fw_error_dump_mem);
 877
 878                 /* Dump SRAM only if no mem_tlvs */
 879                 if (!fwrt->fw->dbg.n_mem_tlv)
 880                         ADD_LEN(file_len, sram_len, hdr_len);
 881
 882                 /* Make room for all mem types that exist */
 883                 ADD_LEN(file_len, smem_len, hdr_len);
 884                 ADD_LEN(file_len, sram2_len, hdr_len);
 885
 886                 for (i = 0; i < fwrt->fw->dbg.n_mem_tlv; i++)
 887                         ADD_LEN(file_len, le32_to_cpu(fw_mem[i].len), hdr_len);
 888         }
 889
 890         /* Make room for fw's virtual image pages, if it exists */
 891         if (iwl_fw_dbg_is_paging_enabled(fwrt))
 892                 file_len += fwrt->num_of_paging_blk *
 893                         (sizeof(*dump_data) +
 894                          sizeof(struct iwl_fw_error_dump_paging) +
 895                          PAGING_BLOCK_SIZE);
 896
 897         if (iwl_fw_dbg_is_d3_debug_enabled(fwrt) && fwrt->dump.d3_debug_data) {
 898                 file_len += sizeof(*dump_data) +
 899                         fwrt->trans->cfg->d3_debug_data_length * 2;
 900         }
 901
 902         /* If we only want a monitor dump, reset the file length */
 903         if (fwrt->dump.monitor_only) {
 904                 file_len = sizeof(*dump_file) + sizeof(*dump_data) * 2 +
 905                            sizeof(*dump_info) + sizeof(*dump_smem_cfg);
 906         }
 907
 908         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_ERROR_INFO) &&
 909             fwrt->dump.desc)
 910                 file_len += sizeof(*dump_data) + sizeof(*dump_trig) +
 911                             fwrt->dump.desc->len;
 912
 913         dump_file = vzalloc(file_len);
 914         if (!dump_file)
 915                 return NULL;
 916
 917         fw_error_dump->fwrt_ptr = dump_file;
 918
 919         dump_file->barker = cpu_to_le32(IWL_FW_ERROR_DUMP_BARKER);
 920         dump_data = (void *)dump_file->data;
 921
 922         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_DEV_FW_INFO)) {
 923                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_DEV_FW_INFO);
 924                 dump_data->len = cpu_to_le32(sizeof(*dump_info));
 925                 dump_info = (void *)dump_data->data;
 926                 dump_info->hw_type =
 927                         cpu_to_le32(CSR_HW_REV_TYPE(fwrt->trans->hw_rev));
 928                 dump_info->hw_step =
 929                         cpu_to_le32(CSR_HW_REV_STEP(fwrt->trans->hw_rev));
 930                 memcpy(dump_info->fw_human_readable, fwrt->fw->human_readable,
 931                        sizeof(dump_info->fw_human_readable));
 932                 strncpy(dump_info->dev_human_readable, fwrt->trans->cfg->name,
 933                         sizeof(dump_info->dev_human_readable) - 1);
 934                 strncpy(dump_info->bus_human_readable, fwrt->dev->bus->name,
 935                         sizeof(dump_info->bus_human_readable) - 1);
 936                 dump_info->num_of_lmacs = fwrt->smem_cfg.num_lmacs;
 937                 dump_info->lmac_err_id[0] =
 938                         cpu_to_le32(fwrt->dump.lmac_err_id[0]);
 939                 if (fwrt->smem_cfg.num_lmacs > 1)
 940                         dump_info->lmac_err_id[1] =
 941                                 cpu_to_le32(fwrt->dump.lmac_err_id[1]);
 942                 dump_info->umac_err_id = cpu_to_le32(fwrt->dump.umac_err_id);
 943
 944                 dump_data = iwl_fw_error_next_data(dump_data);
 945         }
 946
 947         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_MEM_CFG)) {
 948                 /* Dump shared memory configuration */
 949                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_MEM_CFG);
 950                 dump_data->len = cpu_to_le32(sizeof(*dump_smem_cfg));
 951                 dump_smem_cfg = (void *)dump_data->data;
 952                 dump_smem_cfg->num_lmacs = cpu_to_le32(mem_cfg->num_lmacs);
 953                 dump_smem_cfg->num_txfifo_entries =
 954                         cpu_to_le32(mem_cfg->num_txfifo_entries);
 955                 for (i = 0; i < MAX_NUM_LMAC; i++) {
 956                         int j;
 957                         u32 *txf_size = mem_cfg->lmac[i].txfifo_size;
 958
 959                         for (j = 0; j < TX_FIFO_MAX_NUM; j++)
 960                                 dump_smem_cfg->lmac[i].txfifo_size[j] =
 961                                         cpu_to_le32(txf_size[j]);
 962                         dump_smem_cfg->lmac[i].rxfifo1_size =
 963                                 cpu_to_le32(mem_cfg->lmac[i].rxfifo1_size);
 964                 }
 965                 dump_smem_cfg->rxfifo2_size =
 966                         cpu_to_le32(mem_cfg->rxfifo2_size);
 967                 dump_smem_cfg->internal_txfifo_addr =
 968                         cpu_to_le32(mem_cfg->internal_txfifo_addr);
 969                 for (i = 0; i < TX_FIFO_INTERNAL_MAX_NUM; i++) {
 970                         dump_smem_cfg->internal_txfifo_size[i] =
 971                                 cpu_to_le32(mem_cfg->internal_txfifo_size[i]);
 972                 }
 973
 974                 dump_data = iwl_fw_error_next_data(dump_data);
 975         }
 976
 977         /* We only dump the FIFOs if the FW is in error state */
 978         if (fifo_len) {
 979                 iwl_fw_dump_rxf(fwrt, &dump_data);
 980                 iwl_fw_dump_txf(fwrt, &dump_data);
 981         }
 982
 983         if (radio_len)
 984                 iwl_read_radio_regs(fwrt, &dump_data);
 985
 986         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_ERROR_INFO) &&
 987             fwrt->dump.desc) {
 988                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_ERROR_INFO);
 989                 dump_data->len = cpu_to_le32(sizeof(*dump_trig) +
 990                                              fwrt->dump.desc->len);
 991                 dump_trig = (void *)dump_data->data;
 992                 memcpy(dump_trig, &fwrt->dump.desc->trig_desc,
 993                        sizeof(*dump_trig) + fwrt->dump.desc->len);
 994
 995                 dump_data = iwl_fw_error_next_data(dump_data);
 996         }
 997
 998         /* In case we only want monitor dump, skip to dump trasport data */
 999         if (fwrt->dump.monitor_only)
1000                 goto out;
1001
1002         if (iwl_fw_dbg_type_on(fwrt, IWL_FW_ERROR_DUMP_MEM)) {
1003                 const struct iwl_fw_dbg_mem_seg_tlv *fw_dbg_mem =
1004                         fwrt->fw->dbg.mem_tlv;
1005
1006                 if (!fwrt->fw->dbg.n_mem_tlv)
1007                         iwl_fw_dump_mem(fwrt, &dump_data, sram_len, sram_ofs,
1008                                         IWL_FW_ERROR_DUMP_MEM_SRAM);
1009
1010                 for (i = 0; i < fwrt->fw->dbg.n_mem_tlv; i++) {
1011                         u32 len = le32_to_cpu(fw_dbg_mem[i].len);
1012                         u32 ofs = le32_to_cpu(fw_dbg_mem[i].ofs);
1013
1014                         iwl_fw_dump_mem(fwrt, &dump_data, len, ofs,
1015                                         le32_to_cpu(fw_dbg_mem[i].data_type));
1016                 }
1017
1018                 iwl_fw_dump_mem(fwrt, &dump_data, smem_len,
1019                                 fwrt->trans->cfg->smem_offset,
1020                                 IWL_FW_ERROR_DUMP_MEM_SMEM);
1021
1022                 iwl_fw_dump_mem(fwrt, &dump_data, sram2_len,
1023                                 fwrt->trans->cfg->dccm2_offset,
1024                                 IWL_FW_ERROR_DUMP_MEM_SRAM);
1025         }
1026
1027         if (iwl_fw_dbg_is_d3_debug_enabled(fwrt) && fwrt->dump.d3_debug_data) {
1028                 u32 addr = fwrt->trans->cfg->d3_debug_data_base_addr;
1029                 size_t data_size = fwrt->trans->cfg->d3_debug_data_length;
1030
1031                 dump_data->type = cpu_to_le32(IWL_FW_ERROR_DUMP_D3_DEBUG_DATA);
1032                 dump_data->len = cpu_to_le32(data_size * 2);
1033
1034                 memcpy(dump_data->data, fwrt->dump.d3_debug_data, data_size);
1035
1036                 kfree(fwrt->dump.d3_debug_data);
1037                 fwrt->dump.d3_debug_data = NULL;
1038
1039                 iwl_trans_read_mem_bytes(fwrt->trans, addr,
1040                                          dump_data->data + data_size,
1041                                          data_size);
1042
1043                 dump_data = iwl_fw_error_next_data(dump_data);
1044         }
1045
1046         /* Dump fw's virtual image */
1047         if (iwl_fw_dbg_is_paging_enabled(fwrt))
1048                 iwl_dump_paging(fwrt, &dump_data);
1049
1050         if (prph_len)
1051                 iwl_fw_prph_handler(fwrt, &dump_data, iwl_dump_prph);
1052
1053 out:
1054         dump_file->file_len = cpu_to_le32(file_len);
1055         return dump_file;
1056 }
1057
1058 static int iwl_dump_ini_prph_iter(struct iwl_fw_runtime *fwrt,
1059                                   struct iwl_fw_ini_region_cfg *reg,
1060                                   void *range_ptr, int idx)
1061 {
1062         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1063         __le32 *val = range->data;
1064         u32 prph_val;
1065         u32 addr = le32_to_cpu(reg->start_addr[idx]) + le32_to_cpu(reg->offset);
1066         int i;
1067
1068         range->internal_base_addr = cpu_to_le32(addr);
1069         range->range_data_size = reg->internal.range_data_size;
1070         for (i = 0; i < le32_to_cpu(reg->internal.range_data_size); i += 4) {
1071                 prph_val = iwl_read_prph(fwrt->trans, addr + i);
1072                 if (prph_val == 0x5a5a5a5a)
1073                         return -EBUSY;
1074                 *val++ = cpu_to_le32(prph_val);
1075         }
1076
1077         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1078 }
1079
1080 static int iwl_dump_ini_csr_iter(struct iwl_fw_runtime *fwrt,
1081                                  struct iwl_fw_ini_region_cfg *reg,
1082                                  void *range_ptr, int idx)
1083 {
1084         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1085         __le32 *val = range->data;
1086         u32 addr = le32_to_cpu(reg->start_addr[idx]) + le32_to_cpu(reg->offset);
1087         int i;
1088
1089         range->internal_base_addr = cpu_to_le32(addr);
1090         range->range_data_size = reg->internal.range_data_size;
1091         for (i = 0; i < le32_to_cpu(reg->internal.range_data_size); i += 4)
1092                 *val++ = cpu_to_le32(iwl_trans_read32(fwrt->trans, addr + i));
1093
1094         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1095 }
1096
1097 static int iwl_dump_ini_dev_mem_iter(struct iwl_fw_runtime *fwrt,
1098                                      struct iwl_fw_ini_region_cfg *reg,
1099                                      void *range_ptr, int idx)
1100 {
1101         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1102         u32 addr = le32_to_cpu(reg->start_addr[idx]) + le32_to_cpu(reg->offset);
1103
1104         range->internal_base_addr = cpu_to_le32(addr);
1105         range->range_data_size = reg->internal.range_data_size;
1106         iwl_trans_read_mem_bytes(fwrt->trans, addr, range->data,
1107                                  le32_to_cpu(reg->internal.range_data_size));
1108
1109         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1110 }
1111
1112 static int _iwl_dump_ini_paging_iter(struct iwl_fw_runtime *fwrt,
1113                                      struct iwl_fw_ini_region_cfg *reg,
1114                                      void *range_ptr, int idx)
1115 {
1116         /* increase idx by 1 since the pages are from 1 to
1117          * fwrt->num_of_paging_blk + 1
1118          */
1119         struct page *page = fwrt->fw_paging_db[++idx].fw_paging_block;
1120         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1121         dma_addr_t addr = fwrt->fw_paging_db[idx].fw_paging_phys;
1122         u32 page_size = fwrt->fw_paging_db[idx].fw_paging_size;
1123
1124         range->page_num = cpu_to_le32(idx);
1125         range->range_data_size = cpu_to_le32(page_size);
1126         dma_sync_single_for_cpu(fwrt->trans->dev, addr, page_size,
1127                                 DMA_BIDIRECTIONAL);
1128         memcpy(range->data, page_address(page), page_size);
1129         dma_sync_single_for_device(fwrt->trans->dev, addr, page_size,
1130                                    DMA_BIDIRECTIONAL);
1131
1132         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1133 }
1134
1135 static int iwl_dump_ini_paging_iter(struct iwl_fw_runtime *fwrt,
1136                                     struct iwl_fw_ini_region_cfg *reg,
1137                                     void *range_ptr, int idx)
1138 {
1139         struct iwl_fw_ini_error_dump_range *range;
1140         u32 page_size;
1141
1142         if (!fwrt->trans->trans_cfg->gen2)
1143                 return _iwl_dump_ini_paging_iter(fwrt, reg, range_ptr, idx);
1144
1145         range = range_ptr;
1146         page_size = fwrt->trans->init_dram.paging[idx].size;
1147
1148         range->page_num = cpu_to_le32(idx);
1149         range->range_data_size = cpu_to_le32(page_size);
1150         memcpy(range->data, fwrt->trans->init_dram.paging[idx].block,
1151                page_size);
1152
1153         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1154 }
1155
1156 static int
1157 iwl_dump_ini_mon_dram_iter(struct iwl_fw_runtime *fwrt,
1158                            struct iwl_fw_ini_region_cfg *reg, void *range_ptr,
1159                            int idx)
1160 {
1161         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1162         u32 start_addr = iwl_read_umac_prph(fwrt->trans,
1163                                             MON_BUFF_BASE_ADDR_VER2);
1164
1165         if (start_addr == 0x5a5a5a5a)
1166                 return -EBUSY;
1167
1168         range->dram_base_addr = cpu_to_le64(start_addr);
1169         range->range_data_size = cpu_to_le32(fwrt->trans->dbg.fw_mon[idx].size);
1170
1171         memcpy(range->data, fwrt->trans->dbg.fw_mon[idx].block,
1172                fwrt->trans->dbg.fw_mon[idx].size);
1173
1174         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1175 }
1176
1177 static bool iwl_ini_txf_iter(struct iwl_fw_runtime *fwrt,
1178                              struct iwl_fw_ini_region_cfg *reg, int idx)
1179 {
1180         struct iwl_txf_iter_data *iter = &fwrt->dump.txf_iter_data;
1181         struct iwl_fwrt_shared_mem_cfg *cfg = &fwrt->smem_cfg;
1182         int txf_num = cfg->num_txfifo_entries;
1183         int int_txf_num = ARRAY_SIZE(cfg->internal_txfifo_size);
1184         u32 lmac_bitmap = le32_to_cpu(reg->fifos.fid1);
1185
1186         if (!idx) {
1187                 if (le32_to_cpu(reg->offset) &&
1188                     WARN_ONCE(cfg->num_lmacs == 1,
1189                               "Invalid lmac offset: 0x%x\n",
1190                               le32_to_cpu(reg->offset)))
1191                         return false;
1192
1193                 iter->internal_txf = 0;
1194                 iter->fifo_size = 0;
1195                 iter->fifo = -1;
1196                 if (le32_to_cpu(reg->offset))
1197                         iter->lmac = 1;
1198                 else
1199                         iter->lmac = 0;
1200         }
1201
1202         if (!iter->internal_txf)
1203                 for (iter->fifo++; iter->fifo < txf_num; iter->fifo++) {
1204                         iter->fifo_size =
1205                                 cfg->lmac[iter->lmac].txfifo_size[iter->fifo];
1206                         if (iter->fifo_size && (lmac_bitmap & BIT(iter->fifo)))
1207                                 return true;
1208                 }
1209
1210         iter->internal_txf = 1;
1211
1212         if (!fw_has_capa(&fwrt->fw->ucode_capa,
1213                          IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG))
1214                 return false;
1215
1216         for (iter->fifo++; iter->fifo < int_txf_num + txf_num; iter->fifo++) {
1217                 iter->fifo_size =
1218                         cfg->internal_txfifo_size[iter->fifo - txf_num];
1219                 if (iter->fifo_size && (lmac_bitmap & BIT(iter->fifo)))
1220                         return true;
1221         }
1222
1223         return false;
1224 }
1225
1226 static int iwl_dump_ini_txf_iter(struct iwl_fw_runtime *fwrt,
1227                                  struct iwl_fw_ini_region_cfg *reg,
1228                                  void *range_ptr, int idx)
1229 {
1230         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1231         struct iwl_txf_iter_data *iter = &fwrt->dump.txf_iter_data;
1232         struct iwl_fw_ini_error_dump_register *reg_dump = (void *)range->data;
1233         u32 offs = le32_to_cpu(reg->offset), addr;
1234         u32 registers_size =
1235                 le32_to_cpu(reg->fifos.num_of_registers) * sizeof(*reg_dump);
1236         __le32 *data;
1237         unsigned long flags;
1238         int i;
1239
1240         if (!iwl_ini_txf_iter(fwrt, reg, idx))
1241                 return -EIO;
1242
1243         if (!iwl_trans_grab_nic_access(fwrt->trans, &flags))
1244                 return -EBUSY;
1245
1246         range->fifo_hdr.fifo_num = cpu_to_le32(iter->fifo);
1247         range->fifo_hdr.num_of_registers = reg->fifos.num_of_registers;
1248         range->range_data_size = cpu_to_le32(iter->fifo_size + registers_size);
1249
1250         iwl_write_prph_no_grab(fwrt->trans, TXF_LARC_NUM + offs, iter->fifo);
1251
1252         /*
1253          * read txf registers. for each register, write to the dump the
1254          * register address and its value
1255          */
1256         for (i = 0; i < le32_to_cpu(reg->fifos.num_of_registers); i++) {
1257                 addr = le32_to_cpu(reg->start_addr[i]) + offs;
1258
1259                 reg_dump->addr = cpu_to_le32(addr);
1260                 reg_dump->data = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans,
1261                                                                    addr));
1262
1263                 reg_dump++;
1264         }
1265
1266         if (reg->fifos.header_only) {
1267                 range->range_data_size = cpu_to_le32(registers_size);
1268                 goto out;
1269         }
1270
1271         /* Set the TXF_READ_MODIFY_ADDR to TXF_WR_PTR */
1272         iwl_write_prph_no_grab(fwrt->trans, TXF_READ_MODIFY_ADDR + offs,
1273                                TXF_WR_PTR + offs);
1274
1275         /* Dummy-read to advance the read pointer to the head */
1276         iwl_read_prph_no_grab(fwrt->trans, TXF_READ_MODIFY_DATA + offs);
1277
1278         /* Read FIFO */
1279         addr = TXF_READ_MODIFY_DATA + offs;
1280         data = (void *)reg_dump;
1281         for (i = 0; i < iter->fifo_size; i += sizeof(*data))
1282                 *data++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
1283
1284 out:
1285         iwl_trans_release_nic_access(fwrt->trans, &flags);
1286
1287         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1288 }
1289
1290 struct iwl_ini_rxf_data {
1291         u32 fifo_num;
1292         u32 size;
1293         u32 offset;
1294 };
1295
1296 static void iwl_ini_get_rxf_data(struct iwl_fw_runtime *fwrt,
1297                                  struct iwl_fw_ini_region_cfg *reg,
1298                                  struct iwl_ini_rxf_data *data)
1299 {
1300         u32 fid1 = le32_to_cpu(reg->fifos.fid1);
1301         u32 fid2 = le32_to_cpu(reg->fifos.fid2);
1302         u32 fifo_idx;
1303
1304         if (!data)
1305                 return;
1306
1307         memset(data, 0, sizeof(*data));
1308
1309         if (WARN_ON_ONCE((fid1 && fid2) || (!fid1 && !fid2)))
1310                 return;
1311
1312         fifo_idx = ffs(fid1) - 1;
1313         if (fid1 && !WARN_ON_ONCE((~BIT(fifo_idx) & fid1) ||
1314                                   fifo_idx >= MAX_NUM_LMAC)) {
1315                 data->size = fwrt->smem_cfg.lmac[fifo_idx].rxfifo1_size;
1316                 data->fifo_num = fifo_idx;
1317                 return;
1318         }
1319
1320         fifo_idx = ffs(fid2) - 1;
1321         if (fid2 && !WARN_ON_ONCE(fifo_idx != 0)) {
1322                 data->size = fwrt->smem_cfg.rxfifo2_size;
1323                 data->offset = RXF_DIFF_FROM_PREV;
1324                 /* use bit 31 to distinguish between umac and lmac rxf while
1325                  * parsing the dump
1326                  */
1327                 data->fifo_num = fifo_idx | IWL_RXF_UMAC_BIT;
1328                 return;
1329         }
1330 }
1331
1332 static int iwl_dump_ini_rxf_iter(struct iwl_fw_runtime *fwrt,
1333                                  struct iwl_fw_ini_region_cfg *reg,
1334                                  void *range_ptr, int idx)
1335 {
1336         struct iwl_fw_ini_error_dump_range *range = range_ptr;
1337         struct iwl_ini_rxf_data rxf_data;
1338         struct iwl_fw_ini_error_dump_register *reg_dump = (void *)range->data;
1339         u32 offs = le32_to_cpu(reg->offset), addr;
1340         u32 registers_size =
1341                 le32_to_cpu(reg->fifos.num_of_registers) * sizeof(*reg_dump);
1342         __le32 *data;
1343         unsigned long flags;
1344         int i;
1345
1346         iwl_ini_get_rxf_data(fwrt, reg, &rxf_data);
1347         if (!rxf_data.size)
1348                 return -EIO;
1349
1350         if (!iwl_trans_grab_nic_access(fwrt->trans, &flags))
1351                 return -EBUSY;
1352
1353         range->fifo_hdr.fifo_num = cpu_to_le32(rxf_data.fifo_num);
1354         range->fifo_hdr.num_of_registers = reg->fifos.num_of_registers;
1355         range->range_data_size = cpu_to_le32(rxf_data.size + registers_size);
1356
1357         /*
1358          * read rxf registers. for each register, write to the dump the
1359          * register address and its value
1360          */
1361         for (i = 0; i < le32_to_cpu(reg->fifos.num_of_registers); i++) {
1362                 addr = le32_to_cpu(reg->start_addr[i]) + offs;
1363
1364                 reg_dump->addr = cpu_to_le32(addr);
1365                 reg_dump->data = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans,
1366                                                                    addr));
1367
1368                 reg_dump++;
1369         }
1370
1371         if (reg->fifos.header_only) {
1372                 range->range_data_size = cpu_to_le32(registers_size);
1373                 goto out;
1374         }
1375
1376         offs = rxf_data.offset;
1377
1378         /* Lock fence */
1379         iwl_write_prph_no_grab(fwrt->trans, RXF_SET_FENCE_MODE + offs, 0x1);
1380         /* Set fence pointer to the same place like WR pointer */
1381         iwl_write_prph_no_grab(fwrt->trans, RXF_LD_WR2FENCE + offs, 0x1);
1382         /* Set fence offset */
1383         iwl_write_prph_no_grab(fwrt->trans, RXF_LD_FENCE_OFFSET_ADDR + offs,
1384                                0x0);
1385
1386         /* Read FIFO */
1387         addr =  RXF_FIFO_RD_FENCE_INC + offs;
1388         data = (void *)reg_dump;
1389         for (i = 0; i < rxf_data.size; i += sizeof(*data))
1390                 *data++ = cpu_to_le32(iwl_read_prph_no_grab(fwrt->trans, addr));
1391
1392 out:
1393         iwl_trans_release_nic_access(fwrt->trans, &flags);
1394
1395         return sizeof(*range) + le32_to_cpu(range->range_data_size);
1396 }
1397
1398 static void *iwl_dump_ini_mem_fill_header(struct iwl_fw_runtime *fwrt,
1399                                           struct iwl_fw_ini_region_cfg *reg,
1400                                           void *data)
1401 {
1402         struct iwl_fw_ini_error_dump *dump = data;
1403
1404         dump->header.version = cpu_to_le32(IWL_INI_DUMP_VER);
1405
1406         return dump->ranges;
1407 }
1408
1409 static void
1410 *iwl_dump_ini_mon_fill_header(struct iwl_fw_runtime *fwrt,
1411                               struct iwl_fw_ini_region_cfg *reg,
1412                               struct iwl_fw_ini_monitor_dump *data,
1413                               u32 write_ptr_addr, u32 write_ptr_msk,
1414                               u32 cycle_cnt_addr, u32 cycle_cnt_msk)
1415 {
1416         u32 write_ptr, cycle_cnt;
1417         unsigned long flags;
1418
1419         if (!iwl_trans_grab_nic_access(fwrt->trans, &flags)) {
1420                 IWL_ERR(fwrt, "Failed to get monitor header\n");
1421                 return NULL;
1422         }
1423
1424         write_ptr = iwl_read_prph_no_grab(fwrt->trans, write_ptr_addr);
1425         cycle_cnt = iwl_read_prph_no_grab(fwrt->trans, cycle_cnt_addr);
1426
1427         iwl_trans_release_nic_access(fwrt->trans, &flags);
1428
1429         data->header.version = cpu_to_le32(IWL_INI_DUMP_VER);
1430         data->write_ptr = cpu_to_le32(write_ptr & write_ptr_msk);
1431         data->cycle_cnt = cpu_to_le32(cycle_cnt & cycle_cnt_msk);
1432
1433         return data->ranges;
1434 }
1435
1436 static void
1437 *iwl_dump_ini_mon_dram_fill_header(struct iwl_fw_runtime *fwrt,
1438                                    struct iwl_fw_ini_region_cfg *reg,
1439                                    void *data)
1440 {
1441         struct iwl_fw_ini_monitor_dump *mon_dump = (void *)data;
1442         u32 write_ptr_addr, write_ptr_msk, cycle_cnt_addr, cycle_cnt_msk;
1443
1444         switch (fwrt->trans->trans_cfg->device_family) {
1445         case IWL_DEVICE_FAMILY_9000:
1446         case IWL_DEVICE_FAMILY_22000:
1447                 write_ptr_addr = MON_BUFF_WRPTR_VER2;
1448                 write_ptr_msk = -1;
1449                 cycle_cnt_addr = MON_BUFF_CYCLE_CNT_VER2;
1450                 cycle_cnt_msk = -1;
1451                 break;
1452         default:
1453                 IWL_ERR(fwrt, "Unsupported device family %d\n",
1454                         fwrt->trans->trans_cfg->device_family);
1455                 return NULL;
1456         }
1457
1458         return iwl_dump_ini_mon_fill_header(fwrt, reg, mon_dump, write_ptr_addr,
1459                                             write_ptr_msk, cycle_cnt_addr,
1460                                             cycle_cnt_msk);
1461 }
1462
1463 static void
1464 *iwl_dump_ini_mon_smem_fill_header(struct iwl_fw_runtime *fwrt,
1465                                    struct iwl_fw_ini_region_cfg *reg,
1466                                    void *data)
1467 {
1468         struct iwl_fw_ini_monitor_dump *mon_dump = (void *)data;
1469         const struct iwl_cfg *cfg = fwrt->trans->cfg;
1470
1471         if (fwrt->trans->trans_cfg->device_family != IWL_DEVICE_FAMILY_9000 &&
1472             fwrt->trans->trans_cfg->device_family != IWL_DEVICE_FAMILY_22000) {
1473                 IWL_ERR(fwrt, "Unsupported device family %d\n",
1474                         fwrt->trans->trans_cfg->device_family);
1475                 return NULL;
1476         }
1477
1478         return iwl_dump_ini_mon_fill_header(fwrt, reg, mon_dump,
1479                                             cfg->fw_mon_smem_write_ptr_addr,
1480                                             cfg->fw_mon_smem_write_ptr_msk,
1481                                             cfg->fw_mon_smem_cycle_cnt_ptr_addr,
1482                                             cfg->fw_mon_smem_cycle_cnt_ptr_msk);
1483
1484 }
1485
1486 static u32 iwl_dump_ini_mem_ranges(struct iwl_fw_runtime *fwrt,
1487                                    struct iwl_fw_ini_region_cfg *reg)
1488 {
1489         return le32_to_cpu(reg->internal.num_of_ranges);
1490 }
1491
1492 static u32 iwl_dump_ini_paging_ranges(struct iwl_fw_runtime *fwrt,
1493                                       struct iwl_fw_ini_region_cfg *reg)
1494 {
1495         if (fwrt->trans->trans_cfg->gen2)
1496                 return fwrt->trans->init_dram.paging_cnt;
1497
1498         return fwrt->num_of_paging_blk;
1499 }
1500
1501 static u32 iwl_dump_ini_mon_dram_ranges(struct iwl_fw_runtime *fwrt,
1502                                         struct iwl_fw_ini_region_cfg *reg)
1503 {
1504         return 1;
1505 }
1506
1507 static u32 iwl_dump_ini_txf_ranges(struct iwl_fw_runtime *fwrt,
1508                                    struct iwl_fw_ini_region_cfg *reg)
1509 {
1510         u32 num_of_fifos = 0;
1511
1512         while (iwl_ini_txf_iter(fwrt, reg, num_of_fifos))
1513                 num_of_fifos++;
1514
1515         return num_of_fifos;
1516 }
1517
1518 static u32 iwl_dump_ini_rxf_ranges(struct iwl_fw_runtime *fwrt,
1519                                    struct iwl_fw_ini_region_cfg *reg)
1520 {
1521         /* Each Rx fifo needs a different offset and therefore, it's
1522          * region can contain only one fifo, i.e. 1 memory range.
1523          */
1524         return 1;
1525 }
1526
1527 static u32 iwl_dump_ini_mem_get_size(struct iwl_fw_runtime *fwrt,
1528                                      struct iwl_fw_ini_region_cfg *reg)
1529 {
1530         return sizeof(struct iwl_fw_ini_error_dump) +
1531                 iwl_dump_ini_mem_ranges(fwrt, reg) *
1532                 (sizeof(struct iwl_fw_ini_error_dump_range) +
1533                  le32_to_cpu(reg->internal.range_data_size));
1534 }
1535
1536 static u32 iwl_dump_ini_paging_get_size(struct iwl_fw_runtime *fwrt,
1537                                         struct iwl_fw_ini_region_cfg *reg)
1538 {
1539         int i;
1540         u32 range_header_len = sizeof(struct iwl_fw_ini_error_dump_range);
1541         u32 size = sizeof(struct iwl_fw_ini_error_dump);
1542
1543         if (fwrt->trans->trans_cfg->gen2) {
1544                 for (i = 0; i < iwl_dump_ini_paging_ranges(fwrt, reg); i++)
1545                         size += range_header_len +
1546                                 fwrt->trans->init_dram.paging[i].size;
1547         } else {
1548                 for (i = 1; i <= iwl_dump_ini_paging_ranges(fwrt, reg); i++)
1549                         size += range_header_len +
1550                                 fwrt->fw_paging_db[i].fw_paging_size;
1551         }
1552
1553         return size;
1554 }
1555
1556 static u32 iwl_dump_ini_mon_dram_get_size(struct iwl_fw_runtime *fwrt,
1557                                           struct iwl_fw_ini_region_cfg *reg)
1558 {
1559         u32 size = sizeof(struct iwl_fw_ini_monitor_dump) +
1560                 sizeof(struct iwl_fw_ini_error_dump_range);
1561
1562         if (fwrt->trans->dbg.num_blocks)
1563                 size += fwrt->trans->dbg.fw_mon[0].size;
1564
1565         return size;
1566 }
1567
1568 static u32 iwl_dump_ini_mon_smem_get_size(struct iwl_fw_runtime *fwrt,
1569                                           struct iwl_fw_ini_region_cfg *reg)
1570 {
1571         return sizeof(struct iwl_fw_ini_monitor_dump) +
1572                 iwl_dump_ini_mem_ranges(fwrt, reg) *
1573                 (sizeof(struct iwl_fw_ini_error_dump_range) +
1574                  le32_to_cpu(reg->internal.range_data_size));
1575 }
1576
1577 static u32 iwl_dump_ini_txf_get_size(struct iwl_fw_runtime *fwrt,
1578                                      struct iwl_fw_ini_region_cfg *reg)
1579 {
1580         struct iwl_txf_iter_data *iter = &fwrt->dump.txf_iter_data;
1581         u32 size = 0;
1582         u32 fifo_hdr = sizeof(struct iwl_fw_ini_error_dump_range) +
1583                 le32_to_cpu(reg->fifos.num_of_registers) *
1584                 sizeof(struct iwl_fw_ini_error_dump_register);
1585
1586         while (iwl_ini_txf_iter(fwrt, reg, size)) {
1587                 size += fifo_hdr;
1588                 if (!reg->fifos.header_only)
1589                         size += iter->fifo_size;
1590         }
1591
1592         if (size)
1593                 size += sizeof(struct iwl_fw_ini_error_dump);
1594
1595         return size;
1596 }
1597
1598 static u32 iwl_dump_ini_rxf_get_size(struct iwl_fw_runtime *fwrt,
1599                                      struct iwl_fw_ini_region_cfg *reg)
1600 {
1601         struct iwl_ini_rxf_data rx_data;
1602         u32 size = sizeof(struct iwl_fw_ini_error_dump) +
1603                 sizeof(struct iwl_fw_ini_error_dump_range) +
1604                 le32_to_cpu(reg->fifos.num_of_registers) *
1605                 sizeof(struct iwl_fw_ini_error_dump_register);
1606
1607         if (reg->fifos.header_only)
1608                 return size;
1609
1610         iwl_ini_get_rxf_data(fwrt, reg, &rx_data);
1611         size += rx_data.size;
1612
1613         return size;
1614 }
1615
1616 /**
1617  * struct iwl_dump_ini_mem_ops - ini memory dump operations
1618  * @get_num_of_ranges: returns the number of memory ranges in the region.
1619  * @get_size: returns the total size of the region.
1620  * @fill_mem_hdr: fills region type specific headers and returns pointer to
1621  *      the first range or NULL if failed to fill headers.
1622  * @fill_range: copies a given memory range into the dump.
1623  *      Returns the size of the range or negative error value otherwise.
1624  */
1625 struct iwl_dump_ini_mem_ops {
1626         u32 (*get_num_of_ranges)(struct iwl_fw_runtime *fwrt,
1627                                  struct iwl_fw_ini_region_cfg *reg);
1628         u32 (*get_size)(struct iwl_fw_runtime *fwrt,
1629                         struct iwl_fw_ini_region_cfg *reg);
1630         void *(*fill_mem_hdr)(struct iwl_fw_runtime *fwrt,
1631                               struct iwl_fw_ini_region_cfg *reg, void *data);
1632         int (*fill_range)(struct iwl_fw_runtime *fwrt,
1633                           struct iwl_fw_ini_region_cfg *reg, void *range,
1634                           int idx);
1635 };
1636
1637 /**
1638  * iwl_dump_ini_mem
1639  *
1640  * Creates a dump tlv and copy a memory region into it.
1641  * Returns the size of the current dump tlv or 0 if failed
1642  *
1643  * @fwrt: fw runtime struct
1644  * @list: list to add the dump tlv to
1645  * @reg: memory region
1646  * @ops: memory dump operations
1647  */
1648 static u32 iwl_dump_ini_mem(struct iwl_fw_runtime *fwrt, struct list_head *list,
1649                             struct iwl_fw_ini_region_cfg *reg,
1650                             const struct iwl_dump_ini_mem_ops *ops)
1651 {
1652         struct iwl_fw_ini_dump_entry *entry;
1653         struct iwl_fw_error_dump_data *tlv;
1654         struct iwl_fw_ini_error_dump_header *header;
1655         u32 num_of_ranges, i, type = le32_to_cpu(reg->region_type), size;
1656         void *range;
1657
1658         if (!ops->get_num_of_ranges || !ops->get_size || !ops->fill_mem_hdr ||
1659             !ops->fill_range)
1660                 return 0;
1661
1662         size = ops->get_size(fwrt, reg);
1663         if (!size)
1664                 return 0;
1665
1666         entry = kmalloc(sizeof(*entry) + sizeof(*tlv) + size, GFP_KERNEL);
1667         if (!entry)
1668                 return 0;
1669
1670         entry->size = sizeof(*tlv) + size;
1671
1672         tlv = (void *)entry->data;
1673         tlv->type = cpu_to_le32(type);
1674         tlv->len = cpu_to_le32(size);
1675
1676         IWL_DEBUG_FW(fwrt, "WRT: Collecting region: id=%d, type=%d\n",
1677                      le32_to_cpu(reg->region_id), type);
1678
1679         num_of_ranges = ops->get_num_of_ranges(fwrt, reg);
1680
1681         header = (void *)tlv->data;
1682         header->region_id = reg->region_id;
1683         header->num_of_ranges = cpu_to_le32(num_of_ranges);
1684         header->name_len = cpu_to_le32(min_t(int, IWL_FW_INI_MAX_NAME,
1685                                              le32_to_cpu(reg->name_len)));
1686         memcpy(header->name, reg->name, le32_to_cpu(header->name_len));
1687
1688         range = ops->fill_mem_hdr(fwrt, reg, header);
1689         if (!range) {
1690                 IWL_ERR(fwrt,
1691                         "WRT: Failed to fill region header: id=%d, type=%d\n",
1692                         le32_to_cpu(reg->region_id), type);
1693                 goto out_err;
1694         }
1695
1696         for (i = 0; i < num_of_ranges; i++) {
1697                 int range_size = ops->fill_range(fwrt, reg, range, i);
1698
1699                 if (range_size < 0) {
1700                         IWL_ERR(fwrt,
1701                                 "WRT: Failed to dump region: id=%d, type=%d\n",
1702                                 le32_to_cpu(reg->region_id), type);
1703                         goto out_err;
1704                 }
1705                 range = range + range_size;
1706         }
1707
1708         list_add_tail(&entry->list, list);
1709
1710         return entry->size;
1711
1712 out_err:
1713         kfree(entry);
1714
1715         return 0;
1716 }
1717
1718 static u32 iwl_dump_ini_info(struct iwl_fw_runtime *fwrt,
1719                              struct iwl_fw_ini_trigger *trigger,
1720                              struct list_head *list)
1721 {
1722         struct iwl_fw_ini_dump_entry *entry;
1723         struct iwl_fw_error_dump_data *tlv;
1724         struct iwl_fw_ini_dump_info *dump;
1725         u32 reg_ids_size = le32_to_cpu(trigger->num_regions) * sizeof(__le32);
1726         u32 size = sizeof(*tlv) + sizeof(*dump) + reg_ids_size;
1727
1728         entry = kmalloc(sizeof(*entry) + size, GFP_KERNEL);
1729         if (!entry)
1730                 return 0;
1731
1732         entry->size = size;
1733
1734         tlv = (void *)entry->data;
1735         tlv->type = cpu_to_le32(IWL_INI_DUMP_INFO_TYPE);
1736         tlv->len = cpu_to_le32(sizeof(*dump) + reg_ids_size);
1737
1738         dump = (void *)tlv->data;
1739
1740         dump->version = cpu_to_le32(IWL_INI_DUMP_VER);
1741         dump->trigger_id = trigger->trigger_id;
1742         dump->is_external_cfg =
1743                 cpu_to_le32(fwrt->trans->dbg.external_ini_cfg);
1744
1745         dump->ver_type = cpu_to_le32(fwrt->dump.fw_ver.type);
1746         dump->ver_subtype = cpu_to_le32(fwrt->dump.fw_ver.subtype);
1747
1748         dump->hw_step = cpu_to_le32(CSR_HW_REV_STEP(fwrt->trans->hw_rev));
1749         dump->hw_type = cpu_to_le32(CSR_HW_REV_TYPE(fwrt->trans->hw_rev));
1750
1751         dump->rf_id_flavor =
1752                 cpu_to_le32(CSR_HW_RFID_FLAVOR(fwrt->trans->hw_rf_id));
1753         dump->rf_id_dash = cpu_to_le32(CSR_HW_RFID_DASH(fwrt->trans->hw_rf_id));
1754         dump->rf_id_step = cpu_to_le32(CSR_HW_RFID_STEP(fwrt->trans->hw_rf_id));
1755         dump->rf_id_type = cpu_to_le32(CSR_HW_RFID_TYPE(fwrt->trans->hw_rf_id));
1756
1757         dump->lmac_major = cpu_to_le32(fwrt->dump.fw_ver.lmac_major);
1758         dump->lmac_minor = cpu_to_le32(fwrt->dump.fw_ver.lmac_minor);
1759         dump->umac_major = cpu_to_le32(fwrt->dump.fw_ver.umac_major);
1760         dump->umac_minor = cpu_to_le32(fwrt->dump.fw_ver.umac_minor);
1761
1762         dump->build_tag_len = cpu_to_le32(sizeof(dump->build_tag));
1763         memcpy(dump->build_tag, fwrt->fw->human_readable,
1764                sizeof(dump->build_tag));
1765
1766         dump->img_name_len = cpu_to_le32(sizeof(dump->img_name));
1767         memcpy(dump->img_name, fwrt->dump.img_name, sizeof(dump->img_name));
1768
1769         dump->internal_dbg_cfg_name_len =
1770                 cpu_to_le32(sizeof(dump->internal_dbg_cfg_name));
1771         memcpy(dump->internal_dbg_cfg_name, fwrt->dump.internal_dbg_cfg_name,
1772                sizeof(dump->internal_dbg_cfg_name));
1773
1774         dump->external_dbg_cfg_name_len =
1775                 cpu_to_le32(sizeof(dump->external_dbg_cfg_name));
1776
1777         memcpy(dump->external_dbg_cfg_name, fwrt->dump.external_dbg_cfg_name,
1778                sizeof(dump->external_dbg_cfg_name));
1779
1780         dump->regions_num = trigger->num_regions;
1781         memcpy(dump->region_ids, trigger->data, reg_ids_size);
1782
1783         /* add dump info TLV to the beginning of the list since it needs to be
1784          * the first TLV in the dump
1785          */
1786         list_add(&entry->list, list);
1787
1788         return entry->size;
1789 }
1790
1791 static const struct iwl_dump_ini_mem_ops iwl_dump_ini_region_ops[] = {
1792         [IWL_FW_INI_REGION_INVALID] = {},
1793         [IWL_FW_INI_REGION_DEVICE_MEMORY] = {
1794                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
1795                 .get_size = iwl_dump_ini_mem_get_size,
1796                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
1797                 .fill_range = iwl_dump_ini_dev_mem_iter,
1798         },
1799         [IWL_FW_INI_REGION_PERIPHERY_MAC] = {
1800                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
1801                 .get_size = iwl_dump_ini_mem_get_size,
1802                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
1803                 .fill_range = iwl_dump_ini_prph_iter,
1804         },
1805         [IWL_FW_INI_REGION_PERIPHERY_PHY] = {},
1806         [IWL_FW_INI_REGION_PERIPHERY_AUX] = {},
1807         [IWL_FW_INI_REGION_DRAM_BUFFER] = {
1808                 .get_num_of_ranges = iwl_dump_ini_mon_dram_ranges,
1809                 .get_size = iwl_dump_ini_mon_dram_get_size,
1810                 .fill_mem_hdr = iwl_dump_ini_mon_dram_fill_header,
1811                 .fill_range = iwl_dump_ini_mon_dram_iter,
1812         },
1813         [IWL_FW_INI_REGION_DRAM_IMR] = {},
1814         [IWL_FW_INI_REGION_INTERNAL_BUFFER] = {
1815                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
1816                 .get_size = iwl_dump_ini_mon_smem_get_size,
1817                 .fill_mem_hdr = iwl_dump_ini_mon_smem_fill_header,
1818                 .fill_range = iwl_dump_ini_dev_mem_iter,
1819         },
1820         [IWL_FW_INI_REGION_TXF] = {
1821                 .get_num_of_ranges = iwl_dump_ini_txf_ranges,
1822                 .get_size = iwl_dump_ini_txf_get_size,
1823                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
1824                 .fill_range = iwl_dump_ini_txf_iter,
1825         },
1826         [IWL_FW_INI_REGION_RXF] = {
1827                 .get_num_of_ranges = iwl_dump_ini_rxf_ranges,
1828                 .get_size = iwl_dump_ini_rxf_get_size,
1829                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
1830                 .fill_range = iwl_dump_ini_rxf_iter,
1831         },
1832         [IWL_FW_INI_REGION_PAGING] = {
1833                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
1834                 .get_num_of_ranges = iwl_dump_ini_paging_ranges,
1835                 .get_size = iwl_dump_ini_paging_get_size,
1836                 .fill_range = iwl_dump_ini_paging_iter,
1837         },
1838         [IWL_FW_INI_REGION_CSR] = {
1839                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
1840                 .get_size = iwl_dump_ini_mem_get_size,
1841                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
1842                 .fill_range = iwl_dump_ini_csr_iter,
1843         },
1844         [IWL_FW_INI_REGION_NOTIFICATION] = {},
1845         [IWL_FW_INI_REGION_DHC] = {},
1846         [IWL_FW_INI_REGION_LMAC_ERROR_TABLE] = {
1847                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
1848                 .get_size = iwl_dump_ini_mem_get_size,
1849                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
1850                 .fill_range = iwl_dump_ini_dev_mem_iter,
1851         },
1852         [IWL_FW_INI_REGION_UMAC_ERROR_TABLE] = {
1853                 .get_num_of_ranges = iwl_dump_ini_mem_ranges,
1854                 .get_size = iwl_dump_ini_mem_get_size,
1855                 .fill_mem_hdr = iwl_dump_ini_mem_fill_header,
1856                 .fill_range = iwl_dump_ini_dev_mem_iter,
1857         },
1858 };
1859
1860 static u32 iwl_dump_ini_trigger(struct iwl_fw_runtime *fwrt,
1861                                 struct iwl_fw_ini_trigger *trigger,
1862                                 struct list_head *list)
1863 {
1864         int i;
1865         u32 size = 0;
1866
1867         for (i = 0; i < le32_to_cpu(trigger->num_regions); i++) {
1868                 u32 reg_id = le32_to_cpu(trigger->data[i]), reg_type;
1869                 struct iwl_fw_ini_region_cfg *reg;
1870
1871                 if (WARN_ON(reg_id >= ARRAY_SIZE(fwrt->dump.active_regs)))
1872                         continue;
1873
1874                 reg = fwrt->dump.active_regs[reg_id];
1875                 if (!reg) {
1876                         IWL_WARN(fwrt,
1877                                  "WRT: Unassigned region id %d, skipping\n",
1878                                  reg_id);
1879                         continue;
1880                 }
1881
1882                 /* currently the driver supports always on domain only */
1883                 if (le32_to_cpu(reg->domain) != IWL_FW_INI_DBG_DOMAIN_ALWAYS_ON)
1884                         continue;
1885
1886                 reg_type = le32_to_cpu(reg->region_type);
1887                 if (reg_type >= ARRAY_SIZE(iwl_dump_ini_region_ops))
1888                         continue;
1889
1890                 size += iwl_dump_ini_mem(fwrt, list, reg,
1891                                          &iwl_dump_ini_region_ops[reg_type]);
1892         }
1893
1894         if (size)
1895                 size += iwl_dump_ini_info(fwrt, trigger, list);
1896
1897         return size;
1898 }
1899
1900 static u32 iwl_dump_ini_file_gen(struct iwl_fw_runtime *fwrt,
1901                                  enum iwl_fw_ini_trigger_id trig_id,
1902                                  struct list_head *list)
1903 {
1904         struct iwl_fw_ini_dump_entry *entry;
1905         struct iwl_fw_ini_dump_file_hdr *hdr;
1906         struct iwl_fw_ini_trigger *trigger;
1907         u32 size;
1908
1909         if (!iwl_fw_ini_trigger_on(fwrt, trig_id))
1910                 return 0;
1911
1912         trigger = fwrt->dump.active_trigs[trig_id].trig;
1913         if (!trigger || !le32_to_cpu(trigger->num_regions))
1914                 return 0;
1915
1916         entry = kmalloc(sizeof(*entry) + sizeof(*hdr), GFP_KERNEL);
1917         if (!entry)
1918                 return 0;
1919
1920         entry->size = sizeof(*hdr);
1921
1922         size = iwl_dump_ini_trigger(fwrt, trigger, list);
1923         if (!size) {
1924                 kfree(entry);
1925                 return 0;
1926         }
1927
1928         hdr = (void *)entry->data;
1929         hdr->barker = cpu_to_le32(IWL_FW_INI_ERROR_DUMP_BARKER);
1930         hdr->file_len = cpu_to_le32(size + entry->size);
1931
1932         list_add(&entry->list, list);
1933
1934         return le32_to_cpu(hdr->file_len);
1935 }
1936
1937 static void iwl_fw_error_dump(struct iwl_fw_runtime *fwrt)
1938 {
1939         struct iwl_fw_dump_ptrs fw_error_dump = {};
1940         struct iwl_fw_error_dump_file *dump_file;
1941         struct scatterlist *sg_dump_data;
1942         u32 file_len;
1943         u32 dump_mask = fwrt->fw->dbg.dump_mask;
1944
1945         dump_file = iwl_fw_error_dump_file(fwrt, &fw_error_dump);
1946         if (!dump_file)
1947                 goto out;
1948
1949         if (fwrt->dump.monitor_only)
1950                 dump_mask &= IWL_FW_ERROR_DUMP_FW_MONITOR;
1951
1952         fw_error_dump.trans_ptr = iwl_trans_dump_data(fwrt->trans, dump_mask);
1953         file_len = le32_to_cpu(dump_file->file_len);
1954         fw_error_dump.fwrt_len = file_len;
1955
1956         if (fw_error_dump.trans_ptr) {
1957                 file_len += fw_error_dump.trans_ptr->len;
1958                 dump_file->file_len = cpu_to_le32(file_len);
1959         }
1960
1961         sg_dump_data = alloc_sgtable(file_len);
1962         if (sg_dump_data) {
1963                 sg_pcopy_from_buffer(sg_dump_data,
1964                                      sg_nents(sg_dump_data),
1965                                      fw_error_dump.fwrt_ptr,
1966                                      fw_error_dump.fwrt_len, 0);
1967                 if (fw_error_dump.trans_ptr)
1968                         sg_pcopy_from_buffer(sg_dump_data,
1969                                              sg_nents(sg_dump_data),
1970                                              fw_error_dump.trans_ptr->data,
1971                                              fw_error_dump.trans_ptr->len,
1972                                              fw_error_dump.fwrt_len);
1973                 dev_coredumpsg(fwrt->trans->dev, sg_dump_data, file_len,
1974                                GFP_KERNEL);
1975         }
1976         vfree(fw_error_dump.fwrt_ptr);
1977         vfree(fw_error_dump.trans_ptr);
1978
1979 out:
1980         iwl_fw_free_dump_desc(fwrt);
1981 }
1982
1983 static void iwl_dump_ini_list_free(struct list_head *list)
1984 {
1985         while (!list_empty(list)) {
1986                 struct iwl_fw_ini_dump_entry *entry =
1987                         list_entry(list->next, typeof(*entry), list);
1988
1989                 list_del(&entry->list);
1990                 kfree(entry);
1991         }
1992 }
1993
1994 static void iwl_fw_error_ini_dump(struct iwl_fw_runtime *fwrt, u8 wk_idx)
1995 {
1996         enum iwl_fw_ini_trigger_id trig_id = fwrt->dump.wks[wk_idx].ini_trig_id;
1997         struct list_head dump_list = LIST_HEAD_INIT(dump_list);
1998         struct scatterlist *sg_dump_data;
1999         u32 file_len;
2000
2001         file_len = iwl_dump_ini_file_gen(fwrt, trig_id, &dump_list);
2002         if (!file_len)
2003                 goto out;
2004
2005         sg_dump_data = alloc_sgtable(file_len);
2006         if (sg_dump_data) {
2007                 struct iwl_fw_ini_dump_entry *entry;
2008                 int sg_entries = sg_nents(sg_dump_data);
2009                 u32 offs = 0;
2010
2011                 list_for_each_entry(entry, &dump_list, list) {
2012                         sg_pcopy_from_buffer(sg_dump_data, sg_entries,
2013                                              entry->data, entry->size, offs);
2014                         offs += entry->size;
2015                 }
2016                 dev_coredumpsg(fwrt->trans->dev, sg_dump_data, file_len,
2017                                GFP_KERNEL);
2018         }
2019         iwl_dump_ini_list_free(&dump_list);
2020
2021 out:
2022         fwrt->dump.wks[wk_idx].ini_trig_id = IWL_FW_TRIGGER_ID_INVALID;
2023 }
2024
2025 const struct iwl_fw_dump_desc iwl_dump_desc_assert = {
2026         .trig_desc = {
2027                 .type = cpu_to_le32(FW_DBG_TRIGGER_FW_ASSERT),
2028         },
2029 };
2030 IWL_EXPORT_SYMBOL(iwl_dump_desc_assert);
2031
2032 int iwl_fw_dbg_collect_desc(struct iwl_fw_runtime *fwrt,
2033                             const struct iwl_fw_dump_desc *desc,
2034                             bool monitor_only,
2035                             unsigned int delay)
2036 {
2037         u32 trig_type = le32_to_cpu(desc->trig_desc.type);
2038         int ret;
2039
2040         if (iwl_trans_dbg_ini_valid(fwrt->trans)) {
2041                 ret = iwl_fw_dbg_ini_collect(fwrt, trig_type);
2042                 if (!ret)
2043                         iwl_fw_free_dump_desc(fwrt);
2044
2045                 return ret;
2046         }
2047
2048         /* use wks[0] since dump flow prior to ini does not need to support
2049          * consecutive triggers collection
2050          */
2051         if (test_and_set_bit(fwrt->dump.wks[0].idx, &fwrt->dump.active_wks))
2052                 return -EBUSY;
2053
2054         if (WARN_ON(fwrt->dump.desc))
2055                 iwl_fw_free_dump_desc(fwrt);
2056
2057         IWL_WARN(fwrt, "Collecting data: trigger %d fired.\n",
2058                  le32_to_cpu(desc->trig_desc.type));
2059
2060         fwrt->dump.desc = desc;
2061         fwrt->dump.monitor_only = monitor_only;
2062
2063         schedule_delayed_work(&fwrt->dump.wks[0].wk, usecs_to_jiffies(delay));
2064
2065         return 0;
2066 }
2067 IWL_EXPORT_SYMBOL(iwl_fw_dbg_collect_desc);
2068
2069 int iwl_fw_dbg_error_collect(struct iwl_fw_runtime *fwrt,
2070                              enum iwl_fw_dbg_trigger trig_type)
2071 {
2072         int ret;
2073         struct iwl_fw_dump_desc *iwl_dump_error_desc;
2074
2075         if (!test_bit(STATUS_DEVICE_ENABLED, &fwrt->trans->status))
2076                 return -EIO;
2077
2078         iwl_dump_error_desc = kmalloc(sizeof(*iwl_dump_error_desc), GFP_KERNEL);
2079         if (!iwl_dump_error_desc)
2080                 return -ENOMEM;
2081
2082         iwl_dump_error_desc->trig_desc.type = cpu_to_le32(trig_type);
2083         iwl_dump_error_desc->len = 0;
2084
2085         ret = iwl_fw_dbg_collect_desc(fwrt, iwl_dump_error_desc, false, 0);
2086         if (ret)
2087                 kfree(iwl_dump_error_desc);
2088         else
2089                 iwl_trans_sync_nmi(fwrt->trans);
2090
2091         return ret;
2092 }
2093 IWL_EXPORT_SYMBOL(iwl_fw_dbg_error_collect);
2094
2095 int iwl_fw_dbg_collect(struct iwl_fw_runtime *fwrt,
2096                        enum iwl_fw_dbg_trigger trig,
2097                        const char *str, size_t len,
2098                        struct iwl_fw_dbg_trigger_tlv *trigger)
2099 {
2100         struct iwl_fw_dump_desc *desc;
2101         unsigned int delay = 0;
2102         bool monitor_only = false;
2103
2104         if (trigger) {
2105                 u16 occurrences = le16_to_cpu(trigger->occurrences) - 1;
2106
2107                 if (!le16_to_cpu(trigger->occurrences))
2108                         return 0;
2109
2110                 if (trigger->flags & IWL_FW_DBG_FORCE_RESTART) {
2111                         IWL_WARN(fwrt, "Force restart: trigger %d fired.\n",
2112                                  trig);
2113                         iwl_force_nmi(fwrt->trans);
2114                         return 0;
2115                 }
2116
2117                 trigger->occurrences = cpu_to_le16(occurrences);
2118                 monitor_only = trigger->mode & IWL_FW_DBG_TRIGGER_MONITOR_ONLY;
2119
2120                 /* convert msec to usec */
2121                 delay = le32_to_cpu(trigger->stop_delay) * USEC_PER_MSEC;
2122         }
2123
2124         desc = kzalloc(sizeof(*desc) + len, GFP_ATOMIC);
2125         if (!desc)
2126                 return -ENOMEM;
2127
2128
2129         desc->len = len;
2130         desc->trig_desc.type = cpu_to_le32(trig);
2131         memcpy(desc->trig_desc.data, str, len);
2132
2133         return iwl_fw_dbg_collect_desc(fwrt, desc, monitor_only, delay);
2134 }
2135 IWL_EXPORT_SYMBOL(iwl_fw_dbg_collect);
2136
2137 int _iwl_fw_dbg_ini_collect(struct iwl_fw_runtime *fwrt,
2138                             enum iwl_fw_ini_trigger_id id)
2139 {
2140         struct iwl_fw_ini_active_triggers *active;
2141         u32 occur, delay;
2142         unsigned long idx;
2143
2144         if (WARN_ON(!iwl_fw_ini_trigger_on(fwrt, id)))
2145                 return -EINVAL;
2146
2147         if (!iwl_fw_ini_trigger_on(fwrt, id)) {
2148                 IWL_WARN(fwrt, "WRT: Trigger %d is not active, aborting dump\n",
2149                          id);
2150                 return -EINVAL;
2151         }
2152
2153         active = &fwrt->dump.active_trigs[id];
2154         delay = le32_to_cpu(active->trig->dump_delay);
2155         occur = le32_to_cpu(active->trig->occurrences);
2156         if (!occur)
2157                 return 0;
2158
2159         active->trig->occurrences = cpu_to_le32(--occur);
2160
2161         if (le32_to_cpu(active->trig->force_restart)) {
2162                 IWL_WARN(fwrt, "WRT: Force restart: trigger %d fired.\n", id);
2163                 iwl_force_nmi(fwrt->trans);
2164                 return 0;
2165         }
2166
2167         /* Check there is an available worker.
2168          * ffz return value is undefined if no zero exists,
2169          * so check against ~0UL first.
2170          */
2171         if (fwrt->dump.active_wks == ~0UL)
2172                 return -EBUSY;
2173
2174         idx = ffz(fwrt->dump.active_wks);
2175
2176         if (idx >= IWL_FW_RUNTIME_DUMP_WK_NUM ||
2177             test_and_set_bit(fwrt->dump.wks[idx].idx, &fwrt->dump.active_wks))
2178                 return -EBUSY;
2179
2180         fwrt->dump.wks[idx].ini_trig_id = id;
2181
2182         IWL_WARN(fwrt, "WRT: Collecting data: ini trigger %d fired.\n", id);
2183
2184         schedule_delayed_work(&fwrt->dump.wks[idx].wk, usecs_to_jiffies(delay));
2185
2186         return 0;
2187 }
2188 IWL_EXPORT_SYMBOL(_iwl_fw_dbg_ini_collect);
2189
2190 int iwl_fw_dbg_ini_collect(struct iwl_fw_runtime *fwrt, u32 legacy_trigger_id)
2191 {
2192         int id;
2193
2194         switch (legacy_trigger_id) {
2195         case FW_DBG_TRIGGER_FW_ASSERT:
2196         case FW_DBG_TRIGGER_ALIVE_TIMEOUT:
2197         case FW_DBG_TRIGGER_DRIVER:
2198                 id = IWL_FW_TRIGGER_ID_FW_ASSERT;
2199                 break;
2200         case FW_DBG_TRIGGER_USER:
2201                 id = IWL_FW_TRIGGER_ID_USER_TRIGGER;
2202                 break;
2203         default:
2204                 return -EIO;
2205         }
2206
2207         return _iwl_fw_dbg_ini_collect(fwrt, id);
2208 }
2209 IWL_EXPORT_SYMBOL(iwl_fw_dbg_ini_collect);
2210
2211 int iwl_fw_dbg_collect_trig(struct iwl_fw_runtime *fwrt,
2212                             struct iwl_fw_dbg_trigger_tlv *trigger,
2213                             const char *fmt, ...)
2214 {
2215         int ret, len = 0;
2216         char buf[64];
2217
2218         if (fmt) {
2219                 va_list ap;
2220
2221                 buf[sizeof(buf) - 1] = '\0';
2222
2223                 va_start(ap, fmt);
2224                 vsnprintf(buf, sizeof(buf), fmt, ap);
2225                 va_end(ap);
2226
2227                 /* check for truncation */
2228                 if (WARN_ON_ONCE(buf[sizeof(buf) - 1]))
2229                         buf[sizeof(buf) - 1] = '\0';
2230
2231                 len = strlen(buf) + 1;
2232         }
2233
2234         ret = iwl_fw_dbg_collect(fwrt, le32_to_cpu(trigger->id), buf, len,
2235                                  trigger);
2236
2237         if (ret)
2238                 return ret;
2239
2240         return 0;
2241 }
2242 IWL_EXPORT_SYMBOL(iwl_fw_dbg_collect_trig);
2243
2244 int iwl_fw_start_dbg_conf(struct iwl_fw_runtime *fwrt, u8 conf_id)
2245 {
2246         u8 *ptr;
2247         int ret;
2248         int i;
2249
2250         if (WARN_ONCE(conf_id >= ARRAY_SIZE(fwrt->fw->dbg.conf_tlv),
2251                       "Invalid configuration %d\n", conf_id))
2252                 return -EINVAL;
2253
2254         /* EARLY START - firmware's configuration is hard coded */
2255         if ((!fwrt->fw->dbg.conf_tlv[conf_id] ||
2256              !fwrt->fw->dbg.conf_tlv[conf_id]->num_of_hcmds) &&
2257             conf_id == FW_DBG_START_FROM_ALIVE)
2258                 return 0;
2259
2260         if (!fwrt->fw->dbg.conf_tlv[conf_id])
2261                 return -EINVAL;
2262
2263         if (fwrt->dump.conf != FW_DBG_INVALID)
2264                 IWL_WARN(fwrt, "FW already configured (%d) - re-configuring\n",
2265                          fwrt->dump.conf);
2266
2267         /* Send all HCMDs for configuring the FW debug */
2268         ptr = (void *)&fwrt->fw->dbg.conf_tlv[conf_id]->hcmd;
2269         for (i = 0; i < fwrt->fw->dbg.conf_tlv[conf_id]->num_of_hcmds; i++) {
2270                 struct iwl_fw_dbg_conf_hcmd *cmd = (void *)ptr;
2271                 struct iwl_host_cmd hcmd = {
2272                         .id = cmd->id,
2273                         .len = { le16_to_cpu(cmd->len), },
2274                         .data = { cmd->data, },
2275                 };
2276
2277                 ret = iwl_trans_send_cmd(fwrt->trans, &hcmd);
2278                 if (ret)
2279                         return ret;
2280
2281                 ptr += sizeof(*cmd);
2282                 ptr += le16_to_cpu(cmd->len);
2283         }
2284
2285         fwrt->dump.conf = conf_id;
2286
2287         return 0;
2288 }
2289 IWL_EXPORT_SYMBOL(iwl_fw_start_dbg_conf);
2290
2291 /* this function assumes dump_start was called beforehand and dump_end will be
2292  * called afterwards
2293  */
2294 static void iwl_fw_dbg_collect_sync(struct iwl_fw_runtime *fwrt, u8 wk_idx)
2295 {
2296         struct iwl_fw_dbg_params params = {0};
2297
2298         if (!test_bit(wk_idx, &fwrt->dump.active_wks))
2299                 return;
2300
2301         if (fwrt->ops && fwrt->ops->fw_running &&
2302             !fwrt->ops->fw_running(fwrt->ops_ctx)) {
2303                 IWL_ERR(fwrt, "Firmware not running - cannot dump error\n");
2304                 iwl_fw_free_dump_desc(fwrt);
2305                 goto out;
2306         }
2307
2308         /* there's no point in fw dump if the bus is dead */
2309         if (test_bit(STATUS_TRANS_DEAD, &fwrt->trans->status)) {
2310                 IWL_ERR(fwrt, "Skip fw error dump since bus is dead\n");
2311                 goto out;
2312         }
2313
2314         iwl_fw_dbg_stop_restart_recording(fwrt, &params, true);
2315
2316         IWL_DEBUG_FW_INFO(fwrt, "WRT: Data collection start\n");
2317         if (iwl_trans_dbg_ini_valid(fwrt->trans))
2318                 iwl_fw_error_ini_dump(fwrt, wk_idx);
2319         else
2320                 iwl_fw_error_dump(fwrt);
2321         IWL_DEBUG_FW_INFO(fwrt, "WRT: Data collection done\n");
2322
2323         iwl_fw_dbg_stop_restart_recording(fwrt, &params, false);
2324
2325 out:
2326         clear_bit(wk_idx, &fwrt->dump.active_wks);
2327 }
2328
2329 void iwl_fw_error_dump_wk(struct work_struct *work)
2330 {
2331         struct iwl_fw_runtime *fwrt;
2332         typeof(fwrt->dump.wks[0]) *wks;
2333
2334         wks = container_of(work, typeof(fwrt->dump.wks[0]), wk.work);
2335         fwrt = container_of(wks, struct iwl_fw_runtime, dump.wks[wks->idx]);
2336
2337         /* assumes the op mode mutex is locked in dump_start since
2338          * iwl_fw_dbg_collect_sync can't run in parallel
2339          */
2340         if (fwrt->ops && fwrt->ops->dump_start &&
2341             fwrt->ops->dump_start(fwrt->ops_ctx))
2342                 return;
2343
2344         iwl_fw_dbg_collect_sync(fwrt, wks->idx);
2345
2346         if (fwrt->ops && fwrt->ops->dump_end)
2347                 fwrt->ops->dump_end(fwrt->ops_ctx);
2348 }
2349
2350 void iwl_fw_dbg_read_d3_debug_data(struct iwl_fw_runtime *fwrt)
2351 {
2352         const struct iwl_cfg *cfg = fwrt->trans->cfg;
2353
2354         if (!iwl_fw_dbg_is_d3_debug_enabled(fwrt))
2355                 return;
2356
2357         if (!fwrt->dump.d3_debug_data) {
2358                 fwrt->dump.d3_debug_data = kmalloc(cfg->d3_debug_data_length,
2359                                                    GFP_KERNEL);
2360                 if (!fwrt->dump.d3_debug_data) {
2361                         IWL_ERR(fwrt,
2362                                 "failed to allocate memory for D3 debug data\n");
2363                         return;
2364                 }
2365         }
2366
2367         /* if the buffer holds previous debug data it is overwritten */
2368         iwl_trans_read_mem_bytes(fwrt->trans, cfg->d3_debug_data_base_addr,
2369                                  fwrt->dump.d3_debug_data,
2370                                  cfg->d3_debug_data_length);
2371 }
2372 IWL_EXPORT_SYMBOL(iwl_fw_dbg_read_d3_debug_data);
2373
2374 void iwl_fw_dbg_stop_sync(struct iwl_fw_runtime *fwrt)
2375 {
2376         int i;
2377
2378         iwl_dbg_tlv_del_timers(fwrt->trans);
2379         for (i = 0; i < IWL_FW_RUNTIME_DUMP_WK_NUM; i++)
2380                 iwl_fw_dbg_collect_sync(fwrt, i);
2381
2382         iwl_fw_dbg_stop_restart_recording(fwrt, NULL, true);
2383 }
2384 IWL_EXPORT_SYMBOL(iwl_fw_dbg_stop_sync);
2385
2386 #define FSEQ_REG(x) { .addr = (x), .str = #x, }
2387
2388 void iwl_fw_error_print_fseq_regs(struct iwl_fw_runtime *fwrt)
2389 {
2390         struct iwl_trans *trans = fwrt->trans;
2391         unsigned long flags;
2392         int i;
2393         struct {
2394                 u32 addr;
2395                 const char *str;
2396         } fseq_regs[] = {
2397                 FSEQ_REG(FSEQ_ERROR_CODE),
2398                 FSEQ_REG(FSEQ_TOP_INIT_VERSION),
2399                 FSEQ_REG(FSEQ_CNVIO_INIT_VERSION),
2400                 FSEQ_REG(FSEQ_OTP_VERSION),
2401                 FSEQ_REG(FSEQ_TOP_CONTENT_VERSION),
2402                 FSEQ_REG(FSEQ_ALIVE_TOKEN),
2403                 FSEQ_REG(FSEQ_CNVI_ID),
2404                 FSEQ_REG(FSEQ_CNVR_ID),
2405                 FSEQ_REG(CNVI_AUX_MISC_CHIP),
2406                 FSEQ_REG(CNVR_AUX_MISC_CHIP),
2407                 FSEQ_REG(CNVR_SCU_SD_REGS_SD_REG_DIG_DCDC_VTRIM),
2408                 FSEQ_REG(CNVR_SCU_SD_REGS_SD_REG_ACTIVE_VDIG_MIRROR),
2409         };
2410
2411         if (!iwl_trans_grab_nic_access(trans, &flags))
2412                 return;
2413
2414         IWL_ERR(fwrt, "Fseq Registers:\n");
2415
2416         for (i = 0; i < ARRAY_SIZE(fseq_regs); i++)
2417                 IWL_ERR(fwrt, "0x%08X | %s\n",
2418                         iwl_read_prph_no_grab(trans, fseq_regs[i].addr),
2419                         fseq_regs[i].str);
2420
2421         iwl_trans_release_nic_access(trans, &flags);
2422 }
2423 IWL_EXPORT_SYMBOL(iwl_fw_error_print_fseq_regs);
2424
2425 static int iwl_fw_dbg_suspend_resume_hcmd(struct iwl_trans *trans, bool suspend)
2426 {
2427         struct iwl_dbg_suspend_resume_cmd cmd = {
2428                 .operation = suspend ?
2429                         cpu_to_le32(DBGC_SUSPEND_CMD) :
2430                         cpu_to_le32(DBGC_RESUME_CMD),
2431         };
2432         struct iwl_host_cmd hcmd = {
2433                 .id = WIDE_ID(DEBUG_GROUP, DBGC_SUSPEND_RESUME),
2434                 .data[0] = &cmd,
2435                 .len[0] = sizeof(cmd),
2436         };
2437
2438         return iwl_trans_send_cmd(trans, &hcmd);
2439 }
2440
2441 static void iwl_fw_dbg_stop_recording(struct iwl_trans *trans,
2442                                       struct iwl_fw_dbg_params *params)
2443 {
2444         if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_7000) {
2445                 iwl_set_bits_prph(trans, MON_BUFF_SAMPLE_CTL, 0x100);
2446                 return;
2447         }
2448
2449         if (params) {
2450                 params->in_sample = iwl_read_umac_prph(trans, DBGC_IN_SAMPLE);
2451                 params->out_ctrl = iwl_read_umac_prph(trans, DBGC_OUT_CTRL);
2452         }
2453
2454         iwl_write_umac_prph(trans, DBGC_IN_SAMPLE, 0);
2455         /* wait for the DBGC to finish writing the internal buffer to DRAM to
2456          * avoid halting the HW while writing
2457          */
2458         usleep_range(700, 1000);
2459         iwl_write_umac_prph(trans, DBGC_OUT_CTRL, 0);
2460 }
2461
2462 static int iwl_fw_dbg_restart_recording(struct iwl_trans *trans,
2463                                         struct iwl_fw_dbg_params *params)
2464 {
2465         if (!params)
2466                 return -EIO;
2467
2468         if (trans->trans_cfg->device_family == IWL_DEVICE_FAMILY_7000) {
2469                 iwl_clear_bits_prph(trans, MON_BUFF_SAMPLE_CTL, 0x100);
2470                 iwl_clear_bits_prph(trans, MON_BUFF_SAMPLE_CTL, 0x1);
2471                 iwl_set_bits_prph(trans, MON_BUFF_SAMPLE_CTL, 0x1);
2472         } else {
2473                 iwl_write_umac_prph(trans, DBGC_IN_SAMPLE, params->in_sample);
2474                 iwl_write_umac_prph(trans, DBGC_OUT_CTRL, params->out_ctrl);
2475         }
2476
2477         return 0;
2478 }
2479
2480 void iwl_fw_dbg_stop_restart_recording(struct iwl_fw_runtime *fwrt,
2481                                        struct iwl_fw_dbg_params *params,
2482                                        bool stop)
2483 {
2484         int ret = 0;
2485
2486         if (test_bit(STATUS_FW_ERROR, &fwrt->trans->status))
2487                 return;
2488
2489         if (fw_has_capa(&fwrt->fw->ucode_capa,
2490                         IWL_UCODE_TLV_CAPA_DBG_SUSPEND_RESUME_CMD_SUPP))
2491                 ret = iwl_fw_dbg_suspend_resume_hcmd(fwrt->trans, stop);
2492         else if (stop)
2493                 iwl_fw_dbg_stop_recording(fwrt->trans, params);
2494         else
2495                 ret = iwl_fw_dbg_restart_recording(fwrt->trans, params);
2496 #ifdef CONFIG_IWLWIFI_DEBUGFS
2497         if (!ret) {
2498                 if (stop)
2499                         fwrt->trans->dbg.rec_on = false;
2500                 else
2501                         iwl_fw_set_dbg_rec_on(fwrt);
2502         }
2503 #endif
2504 }
2505 IWL_EXPORT_SYMBOL(iwl_fw_dbg_stop_restart_recording);