drivers/net/wireless/broadcom/b43legacy/main.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *
   4  *  Broadcom B43legacy wireless driver
   5  *
   6  *  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
   7  *  Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
   8  *  Copyright (c) 2005, 2006 Michael Buesch <m@bues.ch>
   9  *  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
  10  *  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
  11  *  Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
  12  *
  13  *  Some parts of the code in this file are derived from the ipw2200
  14  *  driver  Copyright(c) 2003 - 2004 Intel Corporation.
  15
  16  */
  17
  18 #include <linux/delay.h>
  19 #include <linux/init.h>
  20 #include <linux/module.h>
  21 #include <linux/if_arp.h>
  22 #include <linux/etherdevice.h>
  23 #include <linux/firmware.h>
  24 #include <linux/workqueue.h>
  25 #include <linux/sched/signal.h>
  26 #include <linux/skbuff.h>
  27 #include <linux/dma-mapping.h>
  28 #include <linux/slab.h>
  29 #include <net/dst.h>
  30 #include <asm/unaligned.h>
  31
  32 #include "b43legacy.h"
  33 #include "main.h"
  34 #include "debugfs.h"
  35 #include "phy.h"
  36 #include "dma.h"
  37 #include "pio.h"
  38 #include "sysfs.h"
  39 #include "xmit.h"
  40 #include "radio.h"
  41
  42
  43 MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
  44 MODULE_AUTHOR("Martin Langer");
  45 MODULE_AUTHOR("Stefano Brivio");
  46 MODULE_AUTHOR("Michael Buesch");
  47 MODULE_LICENSE("GPL");
  48
  49 /*(DEBLOBBED)*/
  50
  51 #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
  52 static int modparam_pio;
  53 module_param_named(pio, modparam_pio, int, 0444);
  54 MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
  55 #elif defined(CONFIG_B43LEGACY_DMA)
  56 # define modparam_pio   0
  57 #elif defined(CONFIG_B43LEGACY_PIO)
  58 # define modparam_pio   1
  59 #endif
  60
  61 static int modparam_bad_frames_preempt;
  62 module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
  63 MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
  64                  " Preemption");
  65
  66 static char modparam_fwpostfix[16];
  67 module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
  68 MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
  69
  70 /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
  71 static const struct ssb_device_id b43legacy_ssb_tbl[] = {
  72         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
  73         SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
  74         {},
  75 };
  76 MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
  77
  78
  79 /* Channel and ratetables are shared for all devices.
  80  * They can't be const, because ieee80211 puts some precalculated
  81  * data in there. This data is the same for all devices, so we don't
  82  * get concurrency issues */
  83 #define RATETAB_ENT(_rateid, _flags) \
  84         {                                                               \
  85                 .bitrate        = B43legacy_RATE_TO_100KBPS(_rateid),   \
  86                 .hw_value       = (_rateid),                            \
  87                 .flags          = (_flags),                             \
  88         }
  89 /*
  90  * NOTE: When changing this, sync with xmit.c's
  91  *       b43legacy_plcp_get_bitrate_idx_* functions!
  92  */
  93 static struct ieee80211_rate __b43legacy_ratetable[] = {
  94         RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0),
  95         RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
  96         RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
  97         RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
  98         RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0),
  99         RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0),
 100         RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0),
 101         RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0),
 102         RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0),
 103         RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0),
 104         RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0),
 105         RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0),
 106 };
 107 #define b43legacy_b_ratetable           (__b43legacy_ratetable + 0)
 108 #define b43legacy_b_ratetable_size      4
 109 #define b43legacy_g_ratetable           (__b43legacy_ratetable + 0)
 110 #define b43legacy_g_ratetable_size      12
 111
 112 #define CHANTAB_ENT(_chanid, _freq) \
 113         {                                                       \
 114                 .center_freq    = (_freq),                      \
 115                 .hw_value       = (_chanid),                    \
 116         }
 117 static struct ieee80211_channel b43legacy_bg_chantable[] = {
 118         CHANTAB_ENT(1, 2412),
 119         CHANTAB_ENT(2, 2417),
 120         CHANTAB_ENT(3, 2422),
 121         CHANTAB_ENT(4, 2427),
 122         CHANTAB_ENT(5, 2432),
 123         CHANTAB_ENT(6, 2437),
 124         CHANTAB_ENT(7, 2442),
 125         CHANTAB_ENT(8, 2447),
 126         CHANTAB_ENT(9, 2452),
 127         CHANTAB_ENT(10, 2457),
 128         CHANTAB_ENT(11, 2462),
 129         CHANTAB_ENT(12, 2467),
 130         CHANTAB_ENT(13, 2472),
 131         CHANTAB_ENT(14, 2484),
 132 };
 133
 134 static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = {
 135         .channels = b43legacy_bg_chantable,
 136         .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
 137         .bitrates = b43legacy_b_ratetable,
 138         .n_bitrates = b43legacy_b_ratetable_size,
 139 };
 140
 141 static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = {
 142         .channels = b43legacy_bg_chantable,
 143         .n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
 144         .bitrates = b43legacy_g_ratetable,
 145         .n_bitrates = b43legacy_g_ratetable_size,
 146 };
 147
 148 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
 149 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
 150 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
 151 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
 152
 153
 154 static int b43legacy_ratelimit(struct b43legacy_wl *wl)
 155 {
 156         if (!wl || !wl->current_dev)
 157                 return 1;
 158         if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
 159                 return 1;
 160         /* We are up and running.
 161          * Ratelimit the messages to avoid DoS over the net. */
 162         return net_ratelimit();
 163 }
 164
 165 void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
 166 {
 167         struct va_format vaf;
 168         va_list args;
 169
 170         if (!b43legacy_ratelimit(wl))
 171                 return;
 172
 173         va_start(args, fmt);
 174
 175         vaf.fmt = fmt;
 176         vaf.va = &args;
 177
 178         printk(KERN_INFO "b43legacy-%s: %pV",
 179                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 180
 181         va_end(args);
 182 }
 183
 184 void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
 185 {
 186         struct va_format vaf;
 187         va_list args;
 188
 189         if (!b43legacy_ratelimit(wl))
 190                 return;
 191
 192         va_start(args, fmt);
 193
 194         vaf.fmt = fmt;
 195         vaf.va = &args;
 196
 197         printk(KERN_ERR "b43legacy-%s ERROR: %pV",
 198                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 199
 200         va_end(args);
 201 }
 202
 203 void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
 204 {
 205         struct va_format vaf;
 206         va_list args;
 207
 208         if (!b43legacy_ratelimit(wl))
 209                 return;
 210
 211         va_start(args, fmt);
 212
 213         vaf.fmt = fmt;
 214         vaf.va = &args;
 215
 216         printk(KERN_WARNING "b43legacy-%s warning: %pV",
 217                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 218
 219         va_end(args);
 220 }
 221
 222 #if B43legacy_DEBUG
 223 void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
 224 {
 225         struct va_format vaf;
 226         va_list args;
 227
 228         va_start(args, fmt);
 229
 230         vaf.fmt = fmt;
 231         vaf.va = &args;
 232
 233         printk(KERN_DEBUG "b43legacy-%s debug: %pV",
 234                (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
 235
 236         va_end(args);
 237 }
 238 #endif /* DEBUG */
 239
 240 static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
 241                                 u32 val)
 242 {
 243         u32 status;
 244
 245         B43legacy_WARN_ON(offset % 4 != 0);
 246
 247         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 248         if (status & B43legacy_MACCTL_BE)
 249                 val = swab32(val);
 250
 251         b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
 252         b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
 253 }
 254
 255 static inline
 256 void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
 257                                 u16 routing, u16 offset)
 258 {
 259         u32 control;
 260
 261         /* "offset" is the WORD offset. */
 262
 263         control = routing;
 264         control <<= 16;
 265         control |= offset;
 266         b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
 267 }
 268
 269 u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
 270                        u16 routing, u16 offset)
 271 {
 272         u32 ret;
 273
 274         if (routing == B43legacy_SHM_SHARED) {
 275                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 276                 if (offset & 0x0003) {
 277                         /* Unaligned access */
 278                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 279                         ret = b43legacy_read16(dev,
 280                                 B43legacy_MMIO_SHM_DATA_UNALIGNED);
 281                         ret <<= 16;
 282                         b43legacy_shm_control_word(dev, routing,
 283                                                      (offset >> 2) + 1);
 284                         ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 285
 286                         return ret;
 287                 }
 288                 offset >>= 2;
 289         }
 290         b43legacy_shm_control_word(dev, routing, offset);
 291         ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
 292
 293         return ret;
 294 }
 295
 296 u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
 297                            u16 routing, u16 offset)
 298 {
 299         u16 ret;
 300
 301         if (routing == B43legacy_SHM_SHARED) {
 302                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 303                 if (offset & 0x0003) {
 304                         /* Unaligned access */
 305                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 306                         ret = b43legacy_read16(dev,
 307                                              B43legacy_MMIO_SHM_DATA_UNALIGNED);
 308
 309                         return ret;
 310                 }
 311                 offset >>= 2;
 312         }
 313         b43legacy_shm_control_word(dev, routing, offset);
 314         ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
 315
 316         return ret;
 317 }
 318
 319 void b43legacy_shm_write32(struct b43legacy_wldev *dev,
 320                            u16 routing, u16 offset,
 321                            u32 value)
 322 {
 323         if (routing == B43legacy_SHM_SHARED) {
 324                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 325                 if (offset & 0x0003) {
 326                         /* Unaligned access */
 327                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 328                         b43legacy_write16(dev,
 329                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 330                                           (value >> 16) & 0xffff);
 331                         b43legacy_shm_control_word(dev, routing,
 332                                                    (offset >> 2) + 1);
 333                         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
 334                                           value & 0xffff);
 335                         return;
 336                 }
 337                 offset >>= 2;
 338         }
 339         b43legacy_shm_control_word(dev, routing, offset);
 340         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
 341 }
 342
 343 void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
 344                            u16 value)
 345 {
 346         if (routing == B43legacy_SHM_SHARED) {
 347                 B43legacy_WARN_ON((offset & 0x0001) != 0);
 348                 if (offset & 0x0003) {
 349                         /* Unaligned access */
 350                         b43legacy_shm_control_word(dev, routing, offset >> 2);
 351                         b43legacy_write16(dev,
 352                                           B43legacy_MMIO_SHM_DATA_UNALIGNED,
 353                                           value);
 354                         return;
 355                 }
 356                 offset >>= 2;
 357         }
 358         b43legacy_shm_control_word(dev, routing, offset);
 359         b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
 360 }
 361
 362 /* Read HostFlags */
 363 u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
 364 {
 365         u32 ret;
 366
 367         ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 368                                    B43legacy_SHM_SH_HOSTFHI);
 369         ret <<= 16;
 370         ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 371                                     B43legacy_SHM_SH_HOSTFLO);
 372
 373         return ret;
 374 }
 375
 376 /* Write HostFlags */
 377 void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
 378 {
 379         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 380                               B43legacy_SHM_SH_HOSTFLO,
 381                               (value & 0x0000FFFF));
 382         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 383                               B43legacy_SHM_SH_HOSTFHI,
 384                               ((value & 0xFFFF0000) >> 16));
 385 }
 386
 387 void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
 388 {
 389         /* We need to be careful. As we read the TSF from multiple
 390          * registers, we should take care of register overflows.
 391          * In theory, the whole tsf read process should be atomic.
 392          * We try to be atomic here, by restaring the read process,
 393          * if any of the high registers changed (overflew).
 394          */
 395         if (dev->dev->id.revision >= 3) {
 396                 u32 low;
 397                 u32 high;
 398                 u32 high2;
 399
 400                 do {
 401                         high = b43legacy_read32(dev,
 402                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 403                         low = b43legacy_read32(dev,
 404                                         B43legacy_MMIO_REV3PLUS_TSF_LOW);
 405                         high2 = b43legacy_read32(dev,
 406                                         B43legacy_MMIO_REV3PLUS_TSF_HIGH);
 407                 } while (unlikely(high != high2));
 408
 409                 *tsf = high;
 410                 *tsf <<= 32;
 411                 *tsf |= low;
 412         } else {
 413                 u64 tmp;
 414                 u16 v0;
 415                 u16 v1;
 416                 u16 v2;
 417                 u16 v3;
 418                 u16 test1;
 419                 u16 test2;
 420                 u16 test3;
 421
 422                 do {
 423                         v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 424                         v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 425                         v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 426                         v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
 427
 428                         test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
 429                         test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
 430                         test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
 431                 } while (v3 != test3 || v2 != test2 || v1 != test1);
 432
 433                 *tsf = v3;
 434                 *tsf <<= 48;
 435                 tmp = v2;
 436                 tmp <<= 32;
 437                 *tsf |= tmp;
 438                 tmp = v1;
 439                 tmp <<= 16;
 440                 *tsf |= tmp;
 441                 *tsf |= v0;
 442         }
 443 }
 444
 445 static void b43legacy_time_lock(struct b43legacy_wldev *dev)
 446 {
 447         u32 status;
 448
 449         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 450         status |= B43legacy_MACCTL_TBTTHOLD;
 451         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
 452 }
 453
 454 static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
 455 {
 456         u32 status;
 457
 458         status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 459         status &= ~B43legacy_MACCTL_TBTTHOLD;
 460         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
 461 }
 462
 463 static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
 464 {
 465         /* Be careful with the in-progress timer.
 466          * First zero out the low register, so we have a full
 467          * register-overflow duration to complete the operation.
 468          */
 469         if (dev->dev->id.revision >= 3) {
 470                 u32 lo = (tsf & 0x00000000FFFFFFFFULL);
 471                 u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
 472
 473                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
 474                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
 475                                     hi);
 476                 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
 477                                     lo);
 478         } else {
 479                 u16 v0 = (tsf & 0x000000000000FFFFULL);
 480                 u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
 481                 u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
 482                 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
 483
 484                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
 485                 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
 486                 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
 487                 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
 488                 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
 489         }
 490 }
 491
 492 void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
 493 {
 494         b43legacy_time_lock(dev);
 495         b43legacy_tsf_write_locked(dev, tsf);
 496         b43legacy_time_unlock(dev);
 497 }
 498
 499 static
 500 void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
 501                              u16 offset, const u8 *mac)
 502 {
 503         static const u8 zero_addr[ETH_ALEN] = { 0 };
 504         u16 data;
 505
 506         if (!mac)
 507                 mac = zero_addr;
 508
 509         offset |= 0x0020;
 510         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
 511
 512         data = mac[0];
 513         data |= mac[1] << 8;
 514         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 515         data = mac[2];
 516         data |= mac[3] << 8;
 517         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 518         data = mac[4];
 519         data |= mac[5] << 8;
 520         b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
 521 }
 522
 523 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
 524 {
 525         static const u8 zero_addr[ETH_ALEN] = { 0 };
 526         const u8 *mac = dev->wl->mac_addr;
 527         const u8 *bssid = dev->wl->bssid;
 528         u8 mac_bssid[ETH_ALEN * 2];
 529         int i;
 530         u32 tmp;
 531
 532         if (!bssid)
 533                 bssid = zero_addr;
 534         if (!mac)
 535                 mac = zero_addr;
 536
 537         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
 538
 539         memcpy(mac_bssid, mac, ETH_ALEN);
 540         memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
 541
 542         /* Write our MAC address and BSSID to template ram */
 543         for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
 544                 tmp =  (u32)(mac_bssid[i + 0]);
 545                 tmp |= (u32)(mac_bssid[i + 1]) << 8;
 546                 tmp |= (u32)(mac_bssid[i + 2]) << 16;
 547                 tmp |= (u32)(mac_bssid[i + 3]) << 24;
 548                 b43legacy_ram_write(dev, 0x20 + i, tmp);
 549                 b43legacy_ram_write(dev, 0x78 + i, tmp);
 550                 b43legacy_ram_write(dev, 0x478 + i, tmp);
 551         }
 552 }
 553
 554 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
 555 {
 556         b43legacy_write_mac_bssid_templates(dev);
 557         b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
 558                                 dev->wl->mac_addr);
 559 }
 560
 561 static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
 562                                     u16 slot_time)
 563 {
 564         /* slot_time is in usec. */
 565         if (dev->phy.type != B43legacy_PHYTYPE_G)
 566                 return;
 567         b43legacy_write16(dev, 0x684, 510 + slot_time);
 568         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
 569                               slot_time);
 570 }
 571
 572 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
 573 {
 574         b43legacy_set_slot_time(dev, 9);
 575 }
 576
 577 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
 578 {
 579         b43legacy_set_slot_time(dev, 20);
 580 }
 581
 582 /* Synchronize IRQ top- and bottom-half.
 583  * IRQs must be masked before calling this.
 584  * This must not be called with the irq_lock held.
 585  */
 586 static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
 587 {
 588         synchronize_irq(dev->dev->irq);
 589         tasklet_kill(&dev->isr_tasklet);
 590 }
 591
 592 /* DummyTransmission function, as documented on
 593  * http://bcm-specs.sipsolutions.net/DummyTransmission
 594  */
 595 void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
 596 {
 597         struct b43legacy_phy *phy = &dev->phy;
 598         unsigned int i;
 599         unsigned int max_loop;
 600         u16 value;
 601         u32 buffer[5] = {
 602                 0x00000000,
 603                 0x00D40000,
 604                 0x00000000,
 605                 0x01000000,
 606                 0x00000000,
 607         };
 608
 609         switch (phy->type) {
 610         case B43legacy_PHYTYPE_B:
 611         case B43legacy_PHYTYPE_G:
 612                 max_loop = 0xFA;
 613                 buffer[0] = 0x000B846E;
 614                 break;
 615         default:
 616                 B43legacy_BUG_ON(1);
 617                 return;
 618         }
 619
 620         for (i = 0; i < 5; i++)
 621                 b43legacy_ram_write(dev, i * 4, buffer[i]);
 622
 623         /* dummy read follows */
 624         b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 625
 626         b43legacy_write16(dev, 0x0568, 0x0000);
 627         b43legacy_write16(dev, 0x07C0, 0x0000);
 628         b43legacy_write16(dev, 0x050C, 0x0000);
 629         b43legacy_write16(dev, 0x0508, 0x0000);
 630         b43legacy_write16(dev, 0x050A, 0x0000);
 631         b43legacy_write16(dev, 0x054C, 0x0000);
 632         b43legacy_write16(dev, 0x056A, 0x0014);
 633         b43legacy_write16(dev, 0x0568, 0x0826);
 634         b43legacy_write16(dev, 0x0500, 0x0000);
 635         b43legacy_write16(dev, 0x0502, 0x0030);
 636
 637         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 638                 b43legacy_radio_write16(dev, 0x0051, 0x0017);
 639         for (i = 0x00; i < max_loop; i++) {
 640                 value = b43legacy_read16(dev, 0x050E);
 641                 if (value & 0x0080)
 642                         break;
 643                 udelay(10);
 644         }
 645         for (i = 0x00; i < 0x0A; i++) {
 646                 value = b43legacy_read16(dev, 0x050E);
 647                 if (value & 0x0400)
 648                         break;
 649                 udelay(10);
 650         }
 651         for (i = 0x00; i < 0x0A; i++) {
 652                 value = b43legacy_read16(dev, 0x0690);
 653                 if (!(value & 0x0100))
 654                         break;
 655                 udelay(10);
 656         }
 657         if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
 658                 b43legacy_radio_write16(dev, 0x0051, 0x0037);
 659 }
 660
 661 /* Turn the Analog ON/OFF */
 662 static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
 663 {
 664         b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
 665 }
 666
 667 void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
 668 {
 669         u32 tmslow;
 670         u32 macctl;
 671
 672         flags |= B43legacy_TMSLOW_PHYCLKEN;
 673         flags |= B43legacy_TMSLOW_PHYRESET;
 674         ssb_device_enable(dev->dev, flags);
 675         msleep(2); /* Wait for the PLL to turn on. */
 676
 677         /* Now take the PHY out of Reset again */
 678         tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
 679         tmslow |= SSB_TMSLOW_FGC;
 680         tmslow &= ~B43legacy_TMSLOW_PHYRESET;
 681         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 682         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 683         msleep(1);
 684         tmslow &= ~SSB_TMSLOW_FGC;
 685         ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
 686         ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
 687         msleep(1);
 688
 689         /* Turn Analog ON */
 690         b43legacy_switch_analog(dev, 1);
 691
 692         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
 693         macctl &= ~B43legacy_MACCTL_GMODE;
 694         if (flags & B43legacy_TMSLOW_GMODE) {
 695                 macctl |= B43legacy_MACCTL_GMODE;
 696                 dev->phy.gmode = true;
 697         } else
 698                 dev->phy.gmode = false;
 699         macctl |= B43legacy_MACCTL_IHR_ENABLED;
 700         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
 701 }
 702
 703 static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
 704 {
 705         u32 v0;
 706         u32 v1;
 707         u16 tmp;
 708         struct b43legacy_txstatus stat;
 709
 710         while (1) {
 711                 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 712                 if (!(v0 & 0x00000001))
 713                         break;
 714                 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 715
 716                 stat.cookie = (v0 >> 16);
 717                 stat.seq = (v1 & 0x0000FFFF);
 718                 stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
 719                 tmp = (v0 & 0x0000FFFF);
 720                 stat.frame_count = ((tmp & 0xF000) >> 12);
 721                 stat.rts_count = ((tmp & 0x0F00) >> 8);
 722                 stat.supp_reason = ((tmp & 0x001C) >> 2);
 723                 stat.pm_indicated = !!(tmp & 0x0080);
 724                 stat.intermediate = !!(tmp & 0x0040);
 725                 stat.for_ampdu = !!(tmp & 0x0020);
 726                 stat.acked = !!(tmp & 0x0002);
 727
 728                 b43legacy_handle_txstatus(dev, &stat);
 729         }
 730 }
 731
 732 static void drain_txstatus_queue(struct b43legacy_wldev *dev)
 733 {
 734         u32 dummy;
 735
 736         if (dev->dev->id.revision < 5)
 737                 return;
 738         /* Read all entries from the microcode TXstatus FIFO
 739          * and throw them away.
 740          */
 741         while (1) {
 742                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
 743                 if (!(dummy & 0x00000001))
 744                         break;
 745                 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
 746         }
 747 }
 748
 749 static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
 750 {
 751         u32 val = 0;
 752
 753         val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
 754         val <<= 16;
 755         val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
 756
 757         return val;
 758 }
 759
 760 static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
 761 {
 762         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
 763                               (jssi & 0x0000FFFF));
 764         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
 765                               (jssi & 0xFFFF0000) >> 16);
 766 }
 767
 768 static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
 769 {
 770         b43legacy_jssi_write(dev, 0x7F7F7F7F);
 771         b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
 772                           b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
 773                           | B43legacy_MACCMD_BGNOISE);
 774         B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
 775                             dev->phy.channel);
 776 }
 777
 778 static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
 779 {
 780         /* Top half of Link Quality calculation. */
 781
 782         if (dev->noisecalc.calculation_running)
 783                 return;
 784         dev->noisecalc.channel_at_start = dev->phy.channel;
 785         dev->noisecalc.calculation_running = true;
 786         dev->noisecalc.nr_samples = 0;
 787
 788         b43legacy_generate_noise_sample(dev);
 789 }
 790
 791 static void handle_irq_noise(struct b43legacy_wldev *dev)
 792 {
 793         struct b43legacy_phy *phy = &dev->phy;
 794         u16 tmp;
 795         u8 noise[4];
 796         u8 i;
 797         u8 j;
 798         s32 average;
 799
 800         /* Bottom half of Link Quality calculation. */
 801
 802         B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
 803         if (dev->noisecalc.channel_at_start != phy->channel)
 804                 goto drop_calculation;
 805         *((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
 806         if (noise[0] == 0x7F || noise[1] == 0x7F ||
 807             noise[2] == 0x7F || noise[3] == 0x7F)
 808                 goto generate_new;
 809
 810         /* Get the noise samples. */
 811         B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
 812         i = dev->noisecalc.nr_samples;
 813         noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 814         noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 815         noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 816         noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
 817         dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
 818         dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
 819         dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
 820         dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
 821         dev->noisecalc.nr_samples++;
 822         if (dev->noisecalc.nr_samples == 8) {
 823                 /* Calculate the Link Quality by the noise samples. */
 824                 average = 0;
 825                 for (i = 0; i < 8; i++) {
 826                         for (j = 0; j < 4; j++)
 827                                 average += dev->noisecalc.samples[i][j];
 828                 }
 829                 average /= (8 * 4);
 830                 average *= 125;
 831                 average += 64;
 832                 average /= 128;
 833                 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 834                                              0x40C);
 835                 tmp = (tmp / 128) & 0x1F;
 836                 if (tmp >= 8)
 837                         average += 2;
 838                 else
 839                         average -= 25;
 840                 if (tmp == 8)
 841                         average -= 72;
 842                 else
 843                         average -= 48;
 844
 845                 dev->stats.link_noise = average;
 846 drop_calculation:
 847                 dev->noisecalc.calculation_running = false;
 848                 return;
 849         }
 850 generate_new:
 851         b43legacy_generate_noise_sample(dev);
 852 }
 853
 854 static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
 855 {
 856         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) {
 857                 /* TODO: PS TBTT */
 858         } else {
 859                 if (1/*FIXME: the last PSpoll frame was sent successfully */)
 860                         b43legacy_power_saving_ctl_bits(dev, -1, -1);
 861         }
 862         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
 863                 dev->dfq_valid = true;
 864 }
 865
 866 static void handle_irq_atim_end(struct b43legacy_wldev *dev)
 867 {
 868         if (dev->dfq_valid) {
 869                 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
 870                                   b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
 871                                   | B43legacy_MACCMD_DFQ_VALID);
 872                 dev->dfq_valid = false;
 873         }
 874 }
 875
 876 static void handle_irq_pmq(struct b43legacy_wldev *dev)
 877 {
 878         u32 tmp;
 879
 880         /* TODO: AP mode. */
 881
 882         while (1) {
 883                 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
 884                 if (!(tmp & 0x00000008))
 885                         break;
 886         }
 887         /* 16bit write is odd, but correct. */
 888         b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
 889 }
 890
 891 static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
 892                                             const u8 *data, u16 size,
 893                                             u16 ram_offset,
 894                                             u16 shm_size_offset, u8 rate)
 895 {
 896         u32 i;
 897         u32 tmp;
 898         struct b43legacy_plcp_hdr4 plcp;
 899
 900         plcp.data = 0;
 901         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
 902         b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
 903         ram_offset += sizeof(u32);
 904         /* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
 905          * So leave the first two bytes of the next write blank.
 906          */
 907         tmp = (u32)(data[0]) << 16;
 908         tmp |= (u32)(data[1]) << 24;
 909         b43legacy_ram_write(dev, ram_offset, tmp);
 910         ram_offset += sizeof(u32);
 911         for (i = 2; i < size; i += sizeof(u32)) {
 912                 tmp = (u32)(data[i + 0]);
 913                 if (i + 1 < size)
 914                         tmp |= (u32)(data[i + 1]) << 8;
 915                 if (i + 2 < size)
 916                         tmp |= (u32)(data[i + 2]) << 16;
 917                 if (i + 3 < size)
 918                         tmp |= (u32)(data[i + 3]) << 24;
 919                 b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
 920         }
 921         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
 922                               size + sizeof(struct b43legacy_plcp_hdr6));
 923 }
 924
 925 /* Convert a b43legacy antenna number value to the PHY TX control value. */
 926 static u16 b43legacy_antenna_to_phyctl(int antenna)
 927 {
 928         switch (antenna) {
 929         case B43legacy_ANTENNA0:
 930                 return B43legacy_TX4_PHY_ANT0;
 931         case B43legacy_ANTENNA1:
 932                 return B43legacy_TX4_PHY_ANT1;
 933         }
 934         return B43legacy_TX4_PHY_ANTLAST;
 935 }
 936
 937 static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
 938                                             u16 ram_offset,
 939                                             u16 shm_size_offset)
 940 {
 941
 942         unsigned int i, len, variable_len;
 943         const struct ieee80211_mgmt *bcn;
 944         const u8 *ie;
 945         bool tim_found = false;
 946         unsigned int rate;
 947         u16 ctl;
 948         int antenna;
 949         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon);
 950
 951         bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
 952         len = min_t(size_t, dev->wl->current_beacon->len,
 953                   0x200 - sizeof(struct b43legacy_plcp_hdr6));
 954         rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value;
 955
 956         b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset,
 957                                         shm_size_offset, rate);
 958
 959         /* Write the PHY TX control parameters. */
 960         antenna = B43legacy_ANTENNA_DEFAULT;
 961         antenna = b43legacy_antenna_to_phyctl(antenna);
 962         ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
 963                                    B43legacy_SHM_SH_BEACPHYCTL);
 964         /* We can't send beacons with short preamble. Would get PHY errors. */
 965         ctl &= ~B43legacy_TX4_PHY_SHORTPRMBL;
 966         ctl &= ~B43legacy_TX4_PHY_ANT;
 967         ctl &= ~B43legacy_TX4_PHY_ENC;
 968         ctl |= antenna;
 969         ctl |= B43legacy_TX4_PHY_ENC_CCK;
 970         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
 971                               B43legacy_SHM_SH_BEACPHYCTL, ctl);
 972
 973         /* Find the position of the TIM and the DTIM_period value
 974          * and write them to SHM. */
 975         ie = bcn->u.beacon.variable;
 976         variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
 977         for (i = 0; i < variable_len - 2; ) {
 978                 uint8_t ie_id, ie_len;
 979
 980                 ie_id = ie[i];
 981                 ie_len = ie[i + 1];
 982                 if (ie_id == 5) {
 983                         u16 tim_position;
 984                         u16 dtim_period;
 985                         /* This is the TIM Information Element */
 986
 987                         /* Check whether the ie_len is in the beacon data range. */
 988                         if (variable_len < ie_len + 2 + i)
 989                                 break;
 990                         /* A valid TIM is at least 4 bytes long. */
 991                         if (ie_len < 4)
 992                                 break;
 993                         tim_found = true;
 994
 995                         tim_position = sizeof(struct b43legacy_plcp_hdr6);
 996                         tim_position += offsetof(struct ieee80211_mgmt,
 997                                                  u.beacon.variable);
 998                         tim_position += i;
 999
1000                         dtim_period = ie[i + 3];
1001
1002                         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1003                                         B43legacy_SHM_SH_TIMPOS, tim_position);
1004                         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1005                                         B43legacy_SHM_SH_DTIMP, dtim_period);
1006                         break;
1007                 }
1008                 i += ie_len + 2;
1009         }
1010         if (!tim_found) {
1011                 b43legacywarn(dev->wl, "Did not find a valid TIM IE in the "
1012                               "beacon template packet. AP or IBSS operation "
1013                               "may be broken.\n");
1014         } else
1015                 b43legacydbg(dev->wl, "Updated beacon template\n");
1016 }
1017
1018 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
1019                                             u16 shm_offset, u16 size,
1020                                             struct ieee80211_rate *rate)
1021 {
1022         struct b43legacy_plcp_hdr4 plcp;
1023         u32 tmp;
1024         __le16 dur;
1025
1026         plcp.data = 0;
1027         b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->hw_value);
1028         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1029                                                dev->wl->vif,
1030                                                NL80211_BAND_2GHZ,
1031                                                size,
1032                                                rate);
1033         /* Write PLCP in two parts and timing for packet transfer */
1034         tmp = le32_to_cpu(plcp.data);
1035         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
1036                               tmp & 0xFFFF);
1037         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
1038                               tmp >> 16);
1039         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1040                               le16_to_cpu(dur));
1041 }
1042
1043 /* Instead of using custom probe response template, this function
1044  * just patches custom beacon template by:
1045  * 1) Changing packet type
1046  * 2) Patching duration field
1047  * 3) Stripping TIM
1048  */
1049 static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1050                                                u16 *dest_size,
1051                                                struct ieee80211_rate *rate)
1052 {
1053         const u8 *src_data;
1054         u8 *dest_data;
1055         u16 src_size, elem_size, src_pos, dest_pos;
1056         __le16 dur;
1057         struct ieee80211_hdr *hdr;
1058         size_t ie_start;
1059
1060         src_size = dev->wl->current_beacon->len;
1061         src_data = (const u8 *)dev->wl->current_beacon->data;
1062
1063         /* Get the start offset of the variable IEs in the packet. */
1064         ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
1065         B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt,
1066                                                u.beacon.variable));
1067
1068         if (B43legacy_WARN_ON(src_size < ie_start))
1069                 return NULL;
1070
1071         dest_data = kmalloc(src_size, GFP_ATOMIC);
1072         if (unlikely(!dest_data))
1073                 return NULL;
1074
1075         /* Copy the static data and all Information Elements, except the TIM. */
1076         memcpy(dest_data, src_data, ie_start);
1077         src_pos = ie_start;
1078         dest_pos = ie_start;
1079         for ( ; src_pos < src_size - 2; src_pos += elem_size) {
1080                 elem_size = src_data[src_pos + 1] + 2;
1081                 if (src_data[src_pos] == 5) {
1082                         /* This is the TIM. */
1083                         continue;
1084                 }
1085                 memcpy(dest_data + dest_pos, src_data + src_pos, elem_size);
1086                 dest_pos += elem_size;
1087         }
1088         *dest_size = dest_pos;
1089         hdr = (struct ieee80211_hdr *)dest_data;
1090
1091         /* Set the frame control. */
1092         hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1093                                          IEEE80211_STYPE_PROBE_RESP);
1094         dur = ieee80211_generic_frame_duration(dev->wl->hw,
1095                                                dev->wl->vif,
1096                                                NL80211_BAND_2GHZ,
1097                                                *dest_size,
1098                                                rate);
1099         hdr->duration_id = dur;
1100
1101         return dest_data;
1102 }
1103
1104 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1105                                                 u16 ram_offset,
1106                                                 u16 shm_size_offset,
1107                                                 struct ieee80211_rate *rate)
1108 {
1109         const u8 *probe_resp_data;
1110         u16 size;
1111
1112         size = dev->wl->current_beacon->len;
1113         probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1114         if (unlikely(!probe_resp_data))
1115                 return;
1116
1117         /* Looks like PLCP headers plus packet timings are stored for
1118          * all possible basic rates
1119          */
1120         b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1121                                         &b43legacy_b_ratetable[0]);
1122         b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1123                                         &b43legacy_b_ratetable[1]);
1124         b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1125                                         &b43legacy_b_ratetable[2]);
1126         b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1127                                         &b43legacy_b_ratetable[3]);
1128
1129         size = min_t(size_t, size,
1130                    0x200 - sizeof(struct b43legacy_plcp_hdr6));
1131         b43legacy_write_template_common(dev, probe_resp_data,
1132                                         size, ram_offset,
1133                                         shm_size_offset, rate->hw_value);
1134         kfree(probe_resp_data);
1135 }
1136
1137 static void b43legacy_upload_beacon0(struct b43legacy_wldev *dev)
1138 {
1139         struct b43legacy_wl *wl = dev->wl;
1140
1141         if (wl->beacon0_uploaded)
1142                 return;
1143         b43legacy_write_beacon_template(dev, 0x68, 0x18);
1144         /* FIXME: Probe resp upload doesn't really belong here,
1145          *        but we don't use that feature anyway. */
1146         b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1147                                       &__b43legacy_ratetable[3]);
1148         wl->beacon0_uploaded = true;
1149 }
1150
1151 static void b43legacy_upload_beacon1(struct b43legacy_wldev *dev)
1152 {
1153         struct b43legacy_wl *wl = dev->wl;
1154
1155         if (wl->beacon1_uploaded)
1156                 return;
1157         b43legacy_write_beacon_template(dev, 0x468, 0x1A);
1158         wl->beacon1_uploaded = true;
1159 }
1160
1161 static void handle_irq_beacon(struct b43legacy_wldev *dev)
1162 {
1163         struct b43legacy_wl *wl = dev->wl;
1164         u32 cmd, beacon0_valid, beacon1_valid;
1165
1166         if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
1167                 return;
1168
1169         /* This is the bottom half of the asynchronous beacon update. */
1170
1171         /* Ignore interrupt in the future. */
1172         dev->irq_mask &= ~B43legacy_IRQ_BEACON;
1173
1174         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1175         beacon0_valid = (cmd & B43legacy_MACCMD_BEACON0_VALID);
1176         beacon1_valid = (cmd & B43legacy_MACCMD_BEACON1_VALID);
1177
1178         /* Schedule interrupt manually, if busy. */
1179         if (beacon0_valid && beacon1_valid) {
1180                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, B43legacy_IRQ_BEACON);
1181                 dev->irq_mask |= B43legacy_IRQ_BEACON;
1182                 return;
1183         }
1184
1185         if (unlikely(wl->beacon_templates_virgin)) {
1186                 /* We never uploaded a beacon before.
1187                  * Upload both templates now, but only mark one valid. */
1188                 wl->beacon_templates_virgin = false;
1189                 b43legacy_upload_beacon0(dev);
1190                 b43legacy_upload_beacon1(dev);
1191                 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1192                 cmd |= B43legacy_MACCMD_BEACON0_VALID;
1193                 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1194         } else {
1195                 if (!beacon0_valid) {
1196                         b43legacy_upload_beacon0(dev);
1197                         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1198                         cmd |= B43legacy_MACCMD_BEACON0_VALID;
1199                         b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1200                 } else if (!beacon1_valid) {
1201                         b43legacy_upload_beacon1(dev);
1202                         cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1203                         cmd |= B43legacy_MACCMD_BEACON1_VALID;
1204                         b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1205                 }
1206         }
1207 }
1208
1209 static void b43legacy_beacon_update_trigger_work(struct work_struct *work)
1210 {
1211         struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
1212                                          beacon_update_trigger);
1213         struct b43legacy_wldev *dev;
1214
1215         mutex_lock(&wl->mutex);
1216         dev = wl->current_dev;
1217         if (likely(dev && (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED))) {
1218                 spin_lock_irq(&wl->irq_lock);
1219                 /* Update beacon right away or defer to IRQ. */
1220                 handle_irq_beacon(dev);
1221                 /* The handler might have updated the IRQ mask. */
1222                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1223                                   dev->irq_mask);
1224                 spin_unlock_irq(&wl->irq_lock);
1225         }
1226         mutex_unlock(&wl->mutex);
1227 }
1228
1229 /* Asynchronously update the packet templates in template RAM.
1230  * Locking: Requires wl->irq_lock to be locked. */
1231 static void b43legacy_update_templates(struct b43legacy_wl *wl)
1232 {
1233         struct sk_buff *beacon;
1234         /* This is the top half of the ansynchronous beacon update. The bottom
1235          * half is the beacon IRQ. Beacon update must be asynchronous to avoid
1236          * sending an invalid beacon. This can happen for example, if the
1237          * firmware transmits a beacon while we are updating it. */
1238
1239         /* We could modify the existing beacon and set the aid bit in the TIM
1240          * field, but that would probably require resizing and moving of data
1241          * within the beacon template. Simply request a new beacon and let
1242          * mac80211 do the hard work. */
1243         beacon = ieee80211_beacon_get(wl->hw, wl->vif);
1244         if (unlikely(!beacon))
1245                 return;
1246
1247         if (wl->current_beacon)
1248                 dev_kfree_skb_any(wl->current_beacon);
1249         wl->current_beacon = beacon;
1250         wl->beacon0_uploaded = false;
1251         wl->beacon1_uploaded = false;
1252         ieee80211_queue_work(wl->hw, &wl->beacon_update_trigger);
1253 }
1254
1255 static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1256                                      u16 beacon_int)
1257 {
1258         b43legacy_time_lock(dev);
1259         if (dev->dev->id.revision >= 3) {
1260                 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_REP,
1261                                  (beacon_int << 16));
1262                 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_START,
1263                                  (beacon_int << 10));
1264         } else {
1265                 b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1266                 b43legacy_write16(dev, 0x610, beacon_int);
1267         }
1268         b43legacy_time_unlock(dev);
1269         b43legacydbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
1270 }
1271
1272 static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1273 {
1274 }
1275
1276 /* Interrupt handler bottom-half */
1277 static void b43legacy_interrupt_tasklet(unsigned long data)
1278 {
1279         struct b43legacy_wldev *dev = (struct b43legacy_wldev *)data;
1280         u32 reason;
1281         u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1282         u32 merged_dma_reason = 0;
1283         int i;
1284         unsigned long flags;
1285
1286         spin_lock_irqsave(&dev->wl->irq_lock, flags);
1287
1288         B43legacy_WARN_ON(b43legacy_status(dev) <
1289                           B43legacy_STAT_INITIALIZED);
1290
1291         reason = dev->irq_reason;
1292         for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1293                 dma_reason[i] = dev->dma_reason[i];
1294                 merged_dma_reason |= dma_reason[i];
1295         }
1296
1297         if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1298                 b43legacyerr(dev->wl, "MAC transmission error\n");
1299
1300         if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1301                 b43legacyerr(dev->wl, "PHY transmission error\n");
1302                 rmb();
1303                 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1304                         b43legacyerr(dev->wl, "Too many PHY TX errors, "
1305                                               "restarting the controller\n");
1306                         b43legacy_controller_restart(dev, "PHY TX errors");
1307                 }
1308         }
1309
1310         if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1311                                           B43legacy_DMAIRQ_NONFATALMASK))) {
1312                 if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1313                         b43legacyerr(dev->wl, "Fatal DMA error: "
1314                                "0x%08X, 0x%08X, 0x%08X, "
1315                                "0x%08X, 0x%08X, 0x%08X\n",
1316                                dma_reason[0], dma_reason[1],
1317                                dma_reason[2], dma_reason[3],
1318                                dma_reason[4], dma_reason[5]);
1319                         b43legacy_controller_restart(dev, "DMA error");
1320                         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1321                         return;
1322                 }
1323                 if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1324                         b43legacyerr(dev->wl, "DMA error: "
1325                                "0x%08X, 0x%08X, 0x%08X, "
1326                                "0x%08X, 0x%08X, 0x%08X\n",
1327                                dma_reason[0], dma_reason[1],
1328                                dma_reason[2], dma_reason[3],
1329                                dma_reason[4], dma_reason[5]);
1330         }
1331
1332         if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1333                 handle_irq_ucode_debug(dev);
1334         if (reason & B43legacy_IRQ_TBTT_INDI)
1335                 handle_irq_tbtt_indication(dev);
1336         if (reason & B43legacy_IRQ_ATIM_END)
1337                 handle_irq_atim_end(dev);
1338         if (reason & B43legacy_IRQ_BEACON)
1339                 handle_irq_beacon(dev);
1340         if (reason & B43legacy_IRQ_PMQ)
1341                 handle_irq_pmq(dev);
1342         if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK)
1343                 ;/*TODO*/
1344         if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1345                 handle_irq_noise(dev);
1346
1347         /* Check the DMA reason registers for received data. */
1348         if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1349                 if (b43legacy_using_pio(dev))
1350                         b43legacy_pio_rx(dev->pio.queue0);
1351                 else
1352                         b43legacy_dma_rx(dev->dma.rx_ring0);
1353         }
1354         B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1355         B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1356         if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1357                 if (b43legacy_using_pio(dev))
1358                         b43legacy_pio_rx(dev->pio.queue3);
1359                 else
1360                         b43legacy_dma_rx(dev->dma.rx_ring3);
1361         }
1362         B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1363         B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1364
1365         if (reason & B43legacy_IRQ_TX_OK)
1366                 handle_irq_transmit_status(dev);
1367
1368         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
1369         spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1370 }
1371
1372 static void pio_irq_workaround(struct b43legacy_wldev *dev,
1373                                u16 base, int queueidx)
1374 {
1375         u16 rxctl;
1376
1377         rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1378         if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1379                 dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1380         else
1381                 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1382 }
1383
1384 static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1385 {
1386         if (b43legacy_using_pio(dev) &&
1387             (dev->dev->id.revision < 3) &&
1388             (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1389                 /* Apply a PIO specific workaround to the dma_reasons */
1390                 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1391                 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1392                 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1393                 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1394         }
1395
1396         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1397
1398         b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1399                           dev->dma_reason[0]);
1400         b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1401                           dev->dma_reason[1]);
1402         b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1403                           dev->dma_reason[2]);
1404         b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1405                           dev->dma_reason[3]);
1406         b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1407                           dev->dma_reason[4]);
1408         b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1409                           dev->dma_reason[5]);
1410 }
1411
1412 /* Interrupt handler top-half */
1413 static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1414 {
1415         irqreturn_t ret = IRQ_NONE;
1416         struct b43legacy_wldev *dev = dev_id;
1417         u32 reason;
1418
1419         B43legacy_WARN_ON(!dev);
1420
1421         spin_lock(&dev->wl->irq_lock);
1422
1423         if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
1424                 /* This can only happen on shared IRQ lines. */
1425                 goto out;
1426         reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1427         if (reason == 0xffffffff) /* shared IRQ */
1428                 goto out;
1429         ret = IRQ_HANDLED;
1430         reason &= dev->irq_mask;
1431         if (!reason)
1432                 goto out;
1433
1434         dev->dma_reason[0] = b43legacy_read32(dev,
1435                                               B43legacy_MMIO_DMA0_REASON)
1436                                               & 0x0001DC00;
1437         dev->dma_reason[1] = b43legacy_read32(dev,
1438                                               B43legacy_MMIO_DMA1_REASON)
1439                                               & 0x0000DC00;
1440         dev->dma_reason[2] = b43legacy_read32(dev,
1441                                               B43legacy_MMIO_DMA2_REASON)
1442                                               & 0x0000DC00;
1443         dev->dma_reason[3] = b43legacy_read32(dev,
1444                                               B43legacy_MMIO_DMA3_REASON)
1445                                               & 0x0001DC00;
1446         dev->dma_reason[4] = b43legacy_read32(dev,
1447                                               B43legacy_MMIO_DMA4_REASON)
1448                                               & 0x0000DC00;
1449         dev->dma_reason[5] = b43legacy_read32(dev,
1450                                               B43legacy_MMIO_DMA5_REASON)
1451                                               & 0x0000DC00;
1452
1453         b43legacy_interrupt_ack(dev, reason);
1454         /* Disable all IRQs. They are enabled again in the bottom half. */
1455         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1456         /* Save the reason code and call our bottom half. */
1457         dev->irq_reason = reason;
1458         tasklet_schedule(&dev->isr_tasklet);
1459 out:
1460         spin_unlock(&dev->wl->irq_lock);
1461
1462         return ret;
1463 }
1464
1465 static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1466 {
1467         release_firmware(dev->fw.ucode);
1468         dev->fw.ucode = NULL;
1469         release_firmware(dev->fw.pcm);
1470         dev->fw.pcm = NULL;
1471         release_firmware(dev->fw.initvals);
1472         dev->fw.initvals = NULL;
1473         release_firmware(dev->fw.initvals_band);
1474         dev->fw.initvals_band = NULL;
1475 }
1476
1477 static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1478 {
1479         /*(DEBLOBBED)*/
1480 }
1481
1482 static void b43legacy_fw_cb(const struct firmware *firmware, void *context)
1483 {
1484         struct b43legacy_wldev *dev = context;
1485
1486         dev->fwp = firmware;
1487         complete(&dev->fw_load_complete);
1488 }
1489
1490 static int do_request_fw(struct b43legacy_wldev *dev,
1491                          const char *name,
1492                          const struct firmware **fw, bool async)
1493 {
1494         char path[sizeof(modparam_fwpostfix) + 32];
1495         struct b43legacy_fw_header *hdr;
1496         u32 size;
1497         int err;
1498
1499         if (!name)
1500                 return 0;
1501
1502         snprintf(path, ARRAY_SIZE(path),
1503                  "/*(DEBLOBBED)*/",
1504                  modparam_fwpostfix, name);
1505         b43legacyinfo(dev->wl, "Loading firmware %s\n", path);
1506         if (async) {
1507                 init_completion(&dev->fw_load_complete);
1508                 err = reject_firmware_nowait(THIS_MODULE, 1, path,
1509                                               dev->dev->dev, GFP_KERNEL,
1510                                               dev, b43legacy_fw_cb);
1511                 if (err) {
1512                         b43legacyerr(dev->wl, "Unable to load firmware\n");
1513                         return err;
1514                 }
1515                 /* stall here until fw ready */
1516                 wait_for_completion(&dev->fw_load_complete);
1517                 if (!dev->fwp)
1518                         err = -EINVAL;
1519                 *fw = dev->fwp;
1520         } else {
1521                 err = reject_firmware(fw, path, dev->dev->dev);
1522         }
1523         if (err) {
1524                 b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1525                        "or load failed.\n", path);
1526                 return err;
1527         }
1528         if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1529                 goto err_format;
1530         hdr = (struct b43legacy_fw_header *)((*fw)->data);
1531         switch (hdr->type) {
1532         case B43legacy_FW_TYPE_UCODE:
1533         case B43legacy_FW_TYPE_PCM:
1534                 size = be32_to_cpu(hdr->size);
1535                 if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1536                         goto err_format;
1537                 /* fallthrough */
1538         case B43legacy_FW_TYPE_IV:
1539                 if (hdr->ver != 1)
1540                         goto err_format;
1541                 break;
1542         default:
1543                 goto err_format;
1544         }
1545
1546         return err;
1547
1548 err_format:
1549         b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1550         return -EPROTO;
1551 }
1552
1553 static int b43legacy_one_core_attach(struct ssb_device *dev,
1554                                      struct b43legacy_wl *wl);
1555 static void b43legacy_one_core_detach(struct ssb_device *dev);
1556
1557 static void b43legacy_request_firmware(struct work_struct *work)
1558 {
1559         struct b43legacy_wl *wl = container_of(work,
1560                                   struct b43legacy_wl, firmware_load);
1561         struct b43legacy_wldev *dev = wl->current_dev;
1562         struct b43legacy_firmware *fw = &dev->fw;
1563         const u8 rev = dev->dev->id.revision;
1564         const char *filename;
1565         int err;
1566
1567         if (!fw->ucode) {
1568                 if (rev == 2)
1569                         filename = "/*(DEBLOBBED)*/";
1570                 else if (rev == 4)
1571                         filename = "/*(DEBLOBBED)*/";
1572                 else
1573                         filename = "/*(DEBLOBBED)*/";
1574                 err = do_request_fw(dev, filename, &fw->ucode, true);
1575                 if (err)
1576                         goto err_load;
1577         }
1578         if (!fw->pcm) {
1579                 if (rev < 5)
1580                         filename = "/*(DEBLOBBED)*/";
1581                 else
1582                         filename = "/*(DEBLOBBED)*/";
1583                 err = do_request_fw(dev, filename, &fw->pcm, false);
1584                 if (err)
1585                         goto err_load;
1586         }
1587         if (!fw->initvals) {
1588                 switch (dev->phy.type) {
1589                 case B43legacy_PHYTYPE_B:
1590                 case B43legacy_PHYTYPE_G:
1591                         if ((rev >= 5) && (rev <= 10))
1592                                 filename = "/*(DEBLOBBED)*/";
1593                         else if (rev == 2 || rev == 4)
1594                                 filename = "/*(DEBLOBBED)*/";
1595                         else
1596                                 goto err_no_initvals;
1597                         break;
1598                 default:
1599                         goto err_no_initvals;
1600                 }
1601                 err = do_request_fw(dev, filename, &fw->initvals, false);
1602                 if (err)
1603                         goto err_load;
1604         }
1605         if (!fw->initvals_band) {
1606                 switch (dev->phy.type) {
1607                 case B43legacy_PHYTYPE_B:
1608                 case B43legacy_PHYTYPE_G:
1609                         if ((rev >= 5) && (rev <= 10))
1610                                 filename = "/*(DEBLOBBED)*/";
1611                         else if (rev >= 11)
1612                                 filename = NULL;
1613                         else if (rev == 2 || rev == 4)
1614                                 filename = NULL;
1615                         else
1616                                 goto err_no_initvals;
1617                         break;
1618                 default:
1619                         goto err_no_initvals;
1620                 }
1621                 err = do_request_fw(dev, filename, &fw->initvals_band, false);
1622                 if (err)
1623                         goto err_load;
1624         }
1625         err = ieee80211_register_hw(wl->hw);
1626         if (err)
1627                 goto err_one_core_detach;
1628         return;
1629
1630 err_one_core_detach:
1631         b43legacy_one_core_detach(dev->dev);
1632         goto error;
1633
1634 err_load:
1635         b43legacy_print_fw_helptext(dev->wl);
1636         goto error;
1637
1638 err_no_initvals:
1639         err = -ENODEV;
1640         b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1641                "core rev %u\n", dev->phy.type, rev);
1642         goto error;
1643
1644 error:
1645         b43legacy_release_firmware(dev);
1646         return;
1647 }
1648
1649 static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1650 {
1651         struct wiphy *wiphy = dev->wl->hw->wiphy;
1652         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1653         const __be32 *data;
1654         unsigned int i;
1655         unsigned int len;
1656         u16 fwrev;
1657         u16 fwpatch;
1658         u16 fwdate;
1659         u16 fwtime;
1660         u32 tmp, macctl;
1661         int err = 0;
1662
1663         /* Jump the microcode PSM to offset 0 */
1664         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1665         B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1666         macctl |= B43legacy_MACCTL_PSM_JMP0;
1667         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1668         /* Zero out all microcode PSM registers and shared memory. */
1669         for (i = 0; i < 64; i++)
1670                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1671         for (i = 0; i < 4096; i += 2)
1672                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1673
1674         /* Upload Microcode. */
1675         data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1676         len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1677         b43legacy_shm_control_word(dev,
1678                                    B43legacy_SHM_UCODE |
1679                                    B43legacy_SHM_AUTOINC_W,
1680                                    0x0000);
1681         for (i = 0; i < len; i++) {
1682                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1683                                     be32_to_cpu(data[i]));
1684                 udelay(10);
1685         }
1686
1687         if (dev->fw.pcm) {
1688                 /* Upload PCM data. */
1689                 data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1690                 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1691                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1692                 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1693                 /* No need for autoinc bit in SHM_HW */
1694                 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1695                 for (i = 0; i < len; i++) {
1696                         b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1697                                           be32_to_cpu(data[i]));
1698                         udelay(10);
1699                 }
1700         }
1701
1702         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1703                           B43legacy_IRQ_ALL);
1704
1705         /* Start the microcode PSM */
1706         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1707         macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1708         macctl |= B43legacy_MACCTL_PSM_RUN;
1709         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1710
1711         /* Wait for the microcode to load and respond */
1712         i = 0;
1713         while (1) {
1714                 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1715                 if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1716                         break;
1717                 i++;
1718                 if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1719                         b43legacyerr(dev->wl, "Microcode not responding\n");
1720                         b43legacy_print_fw_helptext(dev->wl);
1721                         err = -ENODEV;
1722                         goto error;
1723                 }
1724                 msleep_interruptible(50);
1725                 if (signal_pending(current)) {
1726                         err = -EINTR;
1727                         goto error;
1728                 }
1729         }
1730         /* dummy read follows */
1731         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1732
1733         /* Get and check the revisions. */
1734         fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1735                                      B43legacy_SHM_SH_UCODEREV);
1736         fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1737                                        B43legacy_SHM_SH_UCODEPATCH);
1738         fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1739                                       B43legacy_SHM_SH_UCODEDATE);
1740         fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1741                                       B43legacy_SHM_SH_UCODETIME);
1742
1743         if (fwrev > 0x128) {
1744                 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1745                              " Only firmware from binary drivers version 3.x"
1746                              " is supported. You must change your firmware"
1747                              " files.\n");
1748                 b43legacy_print_fw_helptext(dev->wl);
1749                 err = -EOPNOTSUPP;
1750                 goto error;
1751         }
1752         b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1753                       "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1754                       (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1755                       (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1756                       fwtime & 0x1F);
1757
1758         dev->fw.rev = fwrev;
1759         dev->fw.patch = fwpatch;
1760
1761         snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
1762                         dev->fw.rev, dev->fw.patch);
1763         wiphy->hw_version = dev->dev->id.coreid;
1764
1765         return 0;
1766
1767 error:
1768         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1769         macctl &= ~B43legacy_MACCTL_PSM_RUN;
1770         macctl |= B43legacy_MACCTL_PSM_JMP0;
1771         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1772
1773         return err;
1774 }
1775
1776 static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1777                                     const struct b43legacy_iv *ivals,
1778                                     size_t count,
1779                                     size_t array_size)
1780 {
1781         const struct b43legacy_iv *iv;
1782         u16 offset;
1783         size_t i;
1784         bool bit32;
1785
1786         BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1787         iv = ivals;
1788         for (i = 0; i < count; i++) {
1789                 if (array_size < sizeof(iv->offset_size))
1790                         goto err_format;
1791                 array_size -= sizeof(iv->offset_size);
1792                 offset = be16_to_cpu(iv->offset_size);
1793                 bit32 = !!(offset & B43legacy_IV_32BIT);
1794                 offset &= B43legacy_IV_OFFSET_MASK;
1795                 if (offset >= 0x1000)
1796                         goto err_format;
1797                 if (bit32) {
1798                         u32 value;
1799
1800                         if (array_size < sizeof(iv->data.d32))
1801                                 goto err_format;
1802                         array_size -= sizeof(iv->data.d32);
1803
1804                         value = get_unaligned_be32(&iv->data.d32);
1805                         b43legacy_write32(dev, offset, value);
1806
1807                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1808                                                         sizeof(__be16) +
1809                                                         sizeof(__be32));
1810                 } else {
1811                         u16 value;
1812
1813                         if (array_size < sizeof(iv->data.d16))
1814                                 goto err_format;
1815                         array_size -= sizeof(iv->data.d16);
1816
1817                         value = be16_to_cpu(iv->data.d16);
1818                         b43legacy_write16(dev, offset, value);
1819
1820                         iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1821                                                         sizeof(__be16) +
1822                                                         sizeof(__be16));
1823                 }
1824         }
1825         if (array_size)
1826                 goto err_format;
1827
1828         return 0;
1829
1830 err_format:
1831         b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1832         b43legacy_print_fw_helptext(dev->wl);
1833
1834         return -EPROTO;
1835 }
1836
1837 static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1838 {
1839         const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1840         const struct b43legacy_fw_header *hdr;
1841         struct b43legacy_firmware *fw = &dev->fw;
1842         const struct b43legacy_iv *ivals;
1843         size_t count;
1844         int err;
1845
1846         hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1847         ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1848         count = be32_to_cpu(hdr->size);
1849         err = b43legacy_write_initvals(dev, ivals, count,
1850                                  fw->initvals->size - hdr_len);
1851         if (err)
1852                 goto out;
1853         if (fw->initvals_band) {
1854                 hdr = (const struct b43legacy_fw_header *)
1855                       (fw->initvals_band->data);
1856                 ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1857                         + hdr_len);
1858                 count = be32_to_cpu(hdr->size);
1859                 err = b43legacy_write_initvals(dev, ivals, count,
1860                                          fw->initvals_band->size - hdr_len);
1861                 if (err)
1862                         goto out;
1863         }
1864 out:
1865
1866         return err;
1867 }
1868
1869 /* Initialize the GPIOs
1870  * http://bcm-specs.sipsolutions.net/GPIO
1871  */
1872 static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1873 {
1874         struct ssb_bus *bus = dev->dev->bus;
1875         struct ssb_device *gpiodev, *pcidev = NULL;
1876         u32 mask;
1877         u32 set;
1878
1879         b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1880                           b43legacy_read32(dev,
1881                           B43legacy_MMIO_MACCTL)
1882                           & 0xFFFF3FFF);
1883
1884         b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1885                           b43legacy_read16(dev,
1886                           B43legacy_MMIO_GPIO_MASK)
1887                           | 0x000F);
1888
1889         mask = 0x0000001F;
1890         set = 0x0000000F;
1891         if (dev->dev->bus->chip_id == 0x4301) {
1892                 mask |= 0x0060;
1893                 set |= 0x0060;
1894         }
1895         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1896                 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1897                                   b43legacy_read16(dev,
1898                                   B43legacy_MMIO_GPIO_MASK)
1899                                   | 0x0200);
1900                 mask |= 0x0200;
1901                 set |= 0x0200;
1902         }
1903         if (dev->dev->id.revision >= 2)
1904                 mask  |= 0x0010; /* FIXME: This is redundant. */
1905
1906 #ifdef CONFIG_SSB_DRIVER_PCICORE
1907         pcidev = bus->pcicore.dev;
1908 #endif
1909         gpiodev = bus->chipco.dev ? : pcidev;
1910         if (!gpiodev)
1911                 return 0;
1912         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1913                     (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1914                      & ~mask) | set);
1915
1916         return 0;
1917 }
1918
1919 /* Turn off all GPIO stuff. Call this on module unload, for example. */
1920 static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1921 {
1922         struct ssb_bus *bus = dev->dev->bus;
1923         struct ssb_device *gpiodev, *pcidev = NULL;
1924
1925 #ifdef CONFIG_SSB_DRIVER_PCICORE
1926         pcidev = bus->pcicore.dev;
1927 #endif
1928         gpiodev = bus->chipco.dev ? : pcidev;
1929         if (!gpiodev)
1930                 return;
1931         ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1932 }
1933
1934 /* http://bcm-specs.sipsolutions.net/EnableMac */
1935 void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1936 {
1937         dev->mac_suspended--;
1938         B43legacy_WARN_ON(dev->mac_suspended < 0);
1939         B43legacy_WARN_ON(irqs_disabled());
1940         if (dev->mac_suspended == 0) {
1941                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1942                                   b43legacy_read32(dev,
1943                                   B43legacy_MMIO_MACCTL)
1944                                   | B43legacy_MACCTL_ENABLED);
1945                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1946                                   B43legacy_IRQ_MAC_SUSPENDED);
1947                 /* the next two are dummy reads */
1948                 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1949                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1950                 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1951
1952                 /* Re-enable IRQs. */
1953                 spin_lock_irq(&dev->wl->irq_lock);
1954                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1955                                   dev->irq_mask);
1956                 spin_unlock_irq(&dev->wl->irq_lock);
1957         }
1958 }
1959
1960 /* http://bcm-specs.sipsolutions.net/SuspendMAC */
1961 void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1962 {
1963         int i;
1964         u32 tmp;
1965
1966         might_sleep();
1967         B43legacy_WARN_ON(irqs_disabled());
1968         B43legacy_WARN_ON(dev->mac_suspended < 0);
1969
1970         if (dev->mac_suspended == 0) {
1971                 /* Mask IRQs before suspending MAC. Otherwise
1972                  * the MAC stays busy and won't suspend. */
1973                 spin_lock_irq(&dev->wl->irq_lock);
1974                 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1975                 spin_unlock_irq(&dev->wl->irq_lock);
1976                 b43legacy_synchronize_irq(dev);
1977
1978                 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1979                 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1980                                   b43legacy_read32(dev,
1981                                   B43legacy_MMIO_MACCTL)
1982                                   & ~B43legacy_MACCTL_ENABLED);
1983                 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1984                 for (i = 40; i; i--) {
1985                         tmp = b43legacy_read32(dev,
1986                                                B43legacy_MMIO_GEN_IRQ_REASON);
1987                         if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1988                                 goto out;
1989                         msleep(1);
1990                 }
1991                 b43legacyerr(dev->wl, "MAC suspend failed\n");
1992         }
1993 out:
1994         dev->mac_suspended++;
1995 }
1996
1997 static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
1998 {
1999         struct b43legacy_wl *wl = dev->wl;
2000         u32 ctl;
2001         u16 cfp_pretbtt;
2002
2003         ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2004         /* Reset status to STA infrastructure mode. */
2005         ctl &= ~B43legacy_MACCTL_AP;
2006         ctl &= ~B43legacy_MACCTL_KEEP_CTL;
2007         ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
2008         ctl &= ~B43legacy_MACCTL_KEEP_BAD;
2009         ctl &= ~B43legacy_MACCTL_PROMISC;
2010         ctl &= ~B43legacy_MACCTL_BEACPROMISC;
2011         ctl |= B43legacy_MACCTL_INFRA;
2012
2013         if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
2014                 ctl |= B43legacy_MACCTL_AP;
2015         else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))
2016                 ctl &= ~B43legacy_MACCTL_INFRA;
2017
2018         if (wl->filter_flags & FIF_CONTROL)
2019                 ctl |= B43legacy_MACCTL_KEEP_CTL;
2020         if (wl->filter_flags & FIF_FCSFAIL)
2021                 ctl |= B43legacy_MACCTL_KEEP_BAD;
2022         if (wl->filter_flags & FIF_PLCPFAIL)
2023                 ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
2024         if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
2025                 ctl |= B43legacy_MACCTL_BEACPROMISC;
2026
2027         /* Workaround: On old hardware the HW-MAC-address-filter
2028          * doesn't work properly, so always run promisc in filter
2029          * it in software. */
2030         if (dev->dev->id.revision <= 4)
2031                 ctl |= B43legacy_MACCTL_PROMISC;
2032
2033         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
2034
2035         cfp_pretbtt = 2;
2036         if ((ctl & B43legacy_MACCTL_INFRA) &&
2037             !(ctl & B43legacy_MACCTL_AP)) {
2038                 if (dev->dev->bus->chip_id == 0x4306 &&
2039                     dev->dev->bus->chip_rev == 3)
2040                         cfp_pretbtt = 100;
2041                 else
2042                         cfp_pretbtt = 50;
2043         }
2044         b43legacy_write16(dev, 0x612, cfp_pretbtt);
2045 }
2046
2047 static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
2048                                         u16 rate,
2049                                         int is_ofdm)
2050 {
2051         u16 offset;
2052
2053         if (is_ofdm) {
2054                 offset = 0x480;
2055                 offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
2056         } else {
2057                 offset = 0x4C0;
2058                 offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
2059         }
2060         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
2061                               b43legacy_shm_read16(dev,
2062                               B43legacy_SHM_SHARED, offset));
2063 }
2064
2065 static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
2066 {
2067         switch (dev->phy.type) {
2068         case B43legacy_PHYTYPE_G:
2069                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
2070                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
2071                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
2072                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
2073                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
2074                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
2075                 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
2076                 /* fallthrough */
2077         case B43legacy_PHYTYPE_B:
2078                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
2079                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
2080                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
2081                 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
2082                 break;
2083         default:
2084                 B43legacy_BUG_ON(1);
2085         }
2086 }
2087
2088 /* Set the TX-Antenna for management frames sent by firmware. */
2089 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
2090                                           int antenna)
2091 {
2092         u16 ant = 0;
2093         u16 tmp;
2094
2095         switch (antenna) {
2096         case B43legacy_ANTENNA0:
2097                 ant |= B43legacy_TX4_PHY_ANT0;
2098                 break;
2099         case B43legacy_ANTENNA1:
2100                 ant |= B43legacy_TX4_PHY_ANT1;
2101                 break;
2102         case B43legacy_ANTENNA_AUTO:
2103                 ant |= B43legacy_TX4_PHY_ANTLAST;
2104                 break;
2105         default:
2106                 B43legacy_BUG_ON(1);
2107         }
2108
2109         /* FIXME We also need to set the other flags of the PHY control
2110          * field somewhere. */
2111
2112         /* For Beacons */
2113         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2114                                    B43legacy_SHM_SH_BEACPHYCTL);
2115         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2116         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2117                               B43legacy_SHM_SH_BEACPHYCTL, tmp);
2118         /* For ACK/CTS */
2119         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2120                                    B43legacy_SHM_SH_ACKCTSPHYCTL);
2121         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2122         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2123                               B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2124         /* For Probe Resposes */
2125         tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2126                                    B43legacy_SHM_SH_PRPHYCTL);
2127         tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2128         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2129                               B43legacy_SHM_SH_PRPHYCTL, tmp);
2130 }
2131
2132 /* This is the opposite of b43legacy_chip_init() */
2133 static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2134 {
2135         b43legacy_radio_turn_off(dev, 1);
2136         b43legacy_gpio_cleanup(dev);
2137         /* firmware is released later */
2138 }
2139
2140 /* Initialize the chip
2141  * http://bcm-specs.sipsolutions.net/ChipInit
2142  */
2143 static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2144 {
2145         struct b43legacy_phy *phy = &dev->phy;
2146         int err;
2147         int tmp;
2148         u32 value32, macctl;
2149         u16 value16;
2150
2151         /* Initialize the MAC control */
2152         macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2153         if (dev->phy.gmode)
2154                 macctl |= B43legacy_MACCTL_GMODE;
2155         macctl |= B43legacy_MACCTL_INFRA;
2156         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2157
2158         err = b43legacy_upload_microcode(dev);
2159         if (err)
2160                 goto out; /* firmware is released later */
2161
2162         err = b43legacy_gpio_init(dev);
2163         if (err)
2164                 goto out; /* firmware is released later */
2165
2166         err = b43legacy_upload_initvals(dev);
2167         if (err)
2168                 goto err_gpio_clean;
2169         b43legacy_radio_turn_on(dev);
2170
2171         b43legacy_write16(dev, 0x03E6, 0x0000);
2172         err = b43legacy_phy_init(dev);
2173         if (err)
2174                 goto err_radio_off;
2175
2176         /* Select initial Interference Mitigation. */
2177         tmp = phy->interfmode;
2178         phy->interfmode = B43legacy_INTERFMODE_NONE;
2179         b43legacy_radio_set_interference_mitigation(dev, tmp);
2180
2181         b43legacy_phy_set_antenna_diversity(dev);
2182         b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2183
2184         if (phy->type == B43legacy_PHYTYPE_B) {
2185                 value16 = b43legacy_read16(dev, 0x005E);
2186                 value16 |= 0x0004;
2187                 b43legacy_write16(dev, 0x005E, value16);
2188         }
2189         b43legacy_write32(dev, 0x0100, 0x01000000);
2190         if (dev->dev->id.revision < 5)
2191                 b43legacy_write32(dev, 0x010C, 0x01000000);
2192
2193         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2194         value32 &= ~B43legacy_MACCTL_INFRA;
2195         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2196         value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2197         value32 |= B43legacy_MACCTL_INFRA;
2198         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2199
2200         if (b43legacy_using_pio(dev)) {
2201                 b43legacy_write32(dev, 0x0210, 0x00000100);
2202                 b43legacy_write32(dev, 0x0230, 0x00000100);
2203                 b43legacy_write32(dev, 0x0250, 0x00000100);
2204                 b43legacy_write32(dev, 0x0270, 0x00000100);
2205                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2206                                       0x0000);
2207         }
2208
2209         /* Probe Response Timeout value */
2210         /* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2211         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2212
2213         /* Initially set the wireless operation mode. */
2214         b43legacy_adjust_opmode(dev);
2215
2216         if (dev->dev->id.revision < 3) {
2217                 b43legacy_write16(dev, 0x060E, 0x0000);
2218                 b43legacy_write16(dev, 0x0610, 0x8000);
2219                 b43legacy_write16(dev, 0x0604, 0x0000);
2220                 b43legacy_write16(dev, 0x0606, 0x0200);
2221         } else {
2222                 b43legacy_write32(dev, 0x0188, 0x80000000);
2223                 b43legacy_write32(dev, 0x018C, 0x02000000);
2224         }
2225         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2226         b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2227         b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2228         b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2229         b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2230         b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2231         b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2232
2233         value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2234         value32 |= B43legacy_TMSLOW_MACPHYCLKEN;
2235         ssb_write32(dev->dev, SSB_TMSLOW, value32);
2236
2237         b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2238                           dev->dev->bus->chipco.fast_pwrup_delay);
2239
2240         /* PHY TX errors counter. */
2241         atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2242
2243         B43legacy_WARN_ON(err != 0);
2244         b43legacydbg(dev->wl, "Chip initialized\n");
2245 out:
2246         return err;
2247
2248 err_radio_off:
2249         b43legacy_radio_turn_off(dev, 1);
2250 err_gpio_clean:
2251         b43legacy_gpio_cleanup(dev);
2252         goto out;
2253 }
2254
2255 static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2256 {
2257         struct b43legacy_phy *phy = &dev->phy;
2258
2259         if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2260                 return;
2261
2262         b43legacy_mac_suspend(dev);
2263         b43legacy_phy_lo_g_measure(dev);
2264         b43legacy_mac_enable(dev);
2265 }
2266
2267 static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2268 {
2269         b43legacy_phy_lo_mark_all_unused(dev);
2270         if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2271                 b43legacy_mac_suspend(dev);
2272                 b43legacy_calc_nrssi_slope(dev);
2273                 b43legacy_mac_enable(dev);
2274         }
2275 }
2276
2277 static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2278 {
2279         /* Update device statistics. */
2280         b43legacy_calculate_link_quality(dev);
2281 }
2282
2283 static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2284 {
2285         b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2286
2287         atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2288         wmb();
2289 }
2290
2291 static void do_periodic_work(struct b43legacy_wldev *dev)
2292 {
2293         unsigned int state;
2294
2295         state = dev->periodic_state;
2296         if (state % 8 == 0)
2297                 b43legacy_periodic_every120sec(dev);
2298         if (state % 4 == 0)
2299                 b43legacy_periodic_every60sec(dev);
2300         if (state % 2 == 0)
2301                 b43legacy_periodic_every30sec(dev);
2302         b43legacy_periodic_every15sec(dev);
2303 }
2304
2305 /* Periodic work locking policy:
2306  *      The whole periodic work handler is protected by
2307  *      wl->mutex. If another lock is needed somewhere in the
2308  *      pwork callchain, it's acquired in-place, where it's needed.
2309  */
2310 static void b43legacy_periodic_work_handler(struct work_struct *work)
2311 {
2312         struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2313                                              periodic_work.work);
2314         struct b43legacy_wl *wl = dev->wl;
2315         unsigned long delay;
2316
2317         mutex_lock(&wl->mutex);
2318
2319         if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2320                 goto out;
2321         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2322                 goto out_requeue;
2323
2324         do_periodic_work(dev);
2325
2326         dev->periodic_state++;
2327 out_requeue:
2328         if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2329                 delay = msecs_to_jiffies(50);
2330         else
2331                 delay = round_jiffies_relative(HZ * 15);
2332         ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay);
2333 out:
2334         mutex_unlock(&wl->mutex);
2335 }
2336
2337 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2338 {
2339         struct delayed_work *work = &dev->periodic_work;
2340
2341         dev->periodic_state = 0;
2342         INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2343         ieee80211_queue_delayed_work(dev->wl->hw, work, 0);
2344 }
2345
2346 /* Validate access to the chip (SHM) */
2347 static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2348 {
2349         u32 value;
2350         u32 shm_backup;
2351
2352         shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2353         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2354         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2355                                  0xAA5555AA)
2356                 goto error;
2357         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2358         if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2359                                  0x55AAAA55)
2360                 goto error;
2361         b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2362
2363         value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2364         if ((value | B43legacy_MACCTL_GMODE) !=
2365             (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2366                 goto error;
2367
2368         value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2369         if (value)
2370                 goto error;
2371
2372         return 0;
2373 error:
2374         b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2375         return -ENODEV;
2376 }
2377
2378 static void b43legacy_security_init(struct b43legacy_wldev *dev)
2379 {
2380         dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2381         B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2382         dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2383                                         0x0056);
2384         /* KTP is a word address, but we address SHM bytewise.
2385          * So multiply by two.
2386          */
2387         dev->ktp *= 2;
2388         if (dev->dev->id.revision >= 5)
2389                 /* Number of RCMTA address slots */
2390                 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2391                                   dev->max_nr_keys - 8);
2392 }
2393
2394 #ifdef CONFIG_B43LEGACY_HWRNG
2395 static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2396 {
2397         struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2398         unsigned long flags;
2399
2400         /* Don't take wl->mutex here, as it could deadlock with
2401          * hwrng internal locking. It's not needed to take
2402          * wl->mutex here, anyway. */
2403
2404         spin_lock_irqsave(&wl->irq_lock, flags);
2405         *data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2406         spin_unlock_irqrestore(&wl->irq_lock, flags);
2407
2408         return (sizeof(u16));
2409 }
2410 #endif
2411
2412 static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2413 {
2414 #ifdef CONFIG_B43LEGACY_HWRNG
2415         if (wl->rng_initialized)
2416                 hwrng_unregister(&wl->rng);
2417 #endif
2418 }
2419
2420 static int b43legacy_rng_init(struct b43legacy_wl *wl)
2421 {
2422         int err = 0;
2423
2424 #ifdef CONFIG_B43LEGACY_HWRNG
2425         snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2426                  "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2427         wl->rng.name = wl->rng_name;
2428         wl->rng.data_read = b43legacy_rng_read;
2429         wl->rng.priv = (unsigned long)wl;
2430         wl->rng_initialized = 1;
2431         err = hwrng_register(&wl->rng);
2432         if (err) {
2433                 wl->rng_initialized = 0;
2434                 b43legacyerr(wl, "Failed to register the random "
2435                        "number generator (%d)\n", err);
2436         }
2437
2438 #endif
2439         return err;
2440 }
2441
2442 static void b43legacy_tx_work(struct work_struct *work)
2443 {
2444         struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
2445                                   tx_work);
2446         struct b43legacy_wldev *dev;
2447         struct sk_buff *skb;
2448         int queue_num;
2449         int err = 0;
2450
2451         mutex_lock(&wl->mutex);
2452         dev = wl->current_dev;
2453         if (unlikely(!dev || b43legacy_status(dev) < B43legacy_STAT_STARTED)) {
2454                 mutex_unlock(&wl->mutex);
2455                 return;
2456         }
2457
2458         for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2459                 while (skb_queue_len(&wl->tx_queue[queue_num])) {
2460                         skb = skb_dequeue(&wl->tx_queue[queue_num]);
2461                         if (b43legacy_using_pio(dev))
2462                                 err = b43legacy_pio_tx(dev, skb);
2463                         else
2464                                 err = b43legacy_dma_tx(dev, skb);
2465                         if (err == -ENOSPC) {
2466                                 wl->tx_queue_stopped[queue_num] = 1;
2467                                 ieee80211_stop_queue(wl->hw, queue_num);
2468                                 skb_queue_head(&wl->tx_queue[queue_num], skb);
2469                                 break;
2470                         }
2471                         if (unlikely(err))
2472                                 dev_kfree_skb(skb); /* Drop it */
2473                         err = 0;
2474                 }
2475
2476                 if (!err)
2477                         wl->tx_queue_stopped[queue_num] = 0;
2478         }
2479
2480         mutex_unlock(&wl->mutex);
2481 }
2482
2483 static void b43legacy_op_tx(struct ieee80211_hw *hw,
2484                             struct ieee80211_tx_control *control,
2485                             struct sk_buff *skb)
2486 {
2487         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2488
2489         if (unlikely(skb->len < 2 + 2 + 6)) {
2490                 /* Too short, this can't be a valid frame. */
2491                 dev_kfree_skb_any(skb);
2492                 return;
2493         }
2494         B43legacy_WARN_ON(skb_shinfo(skb)->nr_frags);
2495
2496         skb_queue_tail(&wl->tx_queue[skb->queue_mapping], skb);
2497         if (!wl->tx_queue_stopped[skb->queue_mapping])
2498                 ieee80211_queue_work(wl->hw, &wl->tx_work);
2499         else
2500                 ieee80211_stop_queue(wl->hw, skb->queue_mapping);
2501 }
2502
2503 static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
2504                                 struct ieee80211_vif *vif, u16 queue,
2505                                 const struct ieee80211_tx_queue_params *params)
2506 {
2507         return 0;
2508 }
2509
2510 static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2511                                   struct ieee80211_low_level_stats *stats)
2512 {
2513         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2514         unsigned long flags;
2515
2516         spin_lock_irqsave(&wl->irq_lock, flags);
2517         memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2518         spin_unlock_irqrestore(&wl->irq_lock, flags);
2519
2520         return 0;
2521 }
2522
2523 static const char *phymode_to_string(unsigned int phymode)
2524 {
2525         switch (phymode) {
2526         case B43legacy_PHYMODE_B:
2527                 return "B";
2528         case B43legacy_PHYMODE_G:
2529                 return "G";
2530         default:
2531                 B43legacy_BUG_ON(1);
2532         }
2533         return "";
2534 }
2535
2536 static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2537                                   unsigned int phymode,
2538                                   struct b43legacy_wldev **dev,
2539                                   bool *gmode)
2540 {
2541         struct b43legacy_wldev *d;
2542
2543         list_for_each_entry(d, &wl->devlist, list) {
2544                 if (d->phy.possible_phymodes & phymode) {
2545                         /* Ok, this device supports the PHY-mode.
2546                          * Set the gmode bit. */
2547                         *gmode = true;
2548                         *dev = d;
2549
2550                         return 0;
2551                 }
2552         }
2553
2554         return -ESRCH;
2555 }
2556
2557 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2558 {
2559         struct ssb_device *sdev = dev->dev;
2560         u32 tmslow;
2561
2562         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2563         tmslow &= ~B43legacy_TMSLOW_GMODE;
2564         tmslow |= B43legacy_TMSLOW_PHYRESET;
2565         tmslow |= SSB_TMSLOW_FGC;
2566         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2567         msleep(1);
2568
2569         tmslow = ssb_read32(sdev, SSB_TMSLOW);
2570         tmslow &= ~SSB_TMSLOW_FGC;
2571         tmslow |= B43legacy_TMSLOW_PHYRESET;
2572         ssb_write32(sdev, SSB_TMSLOW, tmslow);
2573         msleep(1);
2574 }
2575
2576 /* Expects wl->mutex locked */
2577 static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2578                                       unsigned int new_mode)
2579 {
2580         struct b43legacy_wldev *uninitialized_var(up_dev);
2581         struct b43legacy_wldev *down_dev;
2582         int err;
2583         bool gmode = false;
2584         int prev_status;
2585
2586         err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2587         if (err) {
2588                 b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2589                        phymode_to_string(new_mode));
2590                 return err;
2591         }
2592         if ((up_dev == wl->current_dev) &&
2593             (!!wl->current_dev->phy.gmode == !!gmode))
2594                 /* This device is already running. */
2595                 return 0;
2596         b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2597                phymode_to_string(new_mode));
2598         down_dev = wl->current_dev;
2599
2600         prev_status = b43legacy_status(down_dev);
2601         /* Shutdown the currently running core. */
2602         if (prev_status >= B43legacy_STAT_STARTED)
2603                 b43legacy_wireless_core_stop(down_dev);
2604         if (prev_status >= B43legacy_STAT_INITIALIZED)
2605                 b43legacy_wireless_core_exit(down_dev);
2606
2607         if (down_dev != up_dev)
2608                 /* We switch to a different core, so we put PHY into
2609                  * RESET on the old core. */
2610                 b43legacy_put_phy_into_reset(down_dev);
2611
2612         /* Now start the new core. */
2613         up_dev->phy.gmode = gmode;
2614         if (prev_status >= B43legacy_STAT_INITIALIZED) {
2615                 err = b43legacy_wireless_core_init(up_dev);
2616                 if (err) {
2617                         b43legacyerr(wl, "Fatal: Could not initialize device"
2618                                      " for newly selected %s-PHY mode\n",
2619                                      phymode_to_string(new_mode));
2620                         goto init_failure;
2621                 }
2622         }
2623         if (prev_status >= B43legacy_STAT_STARTED) {
2624                 err = b43legacy_wireless_core_start(up_dev);
2625                 if (err) {
2626                         b43legacyerr(wl, "Fatal: Could not start device for "
2627                                "newly selected %s-PHY mode\n",
2628                                phymode_to_string(new_mode));
2629                         b43legacy_wireless_core_exit(up_dev);
2630                         goto init_failure;
2631                 }
2632         }
2633         B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2634
2635         b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2636
2637         wl->current_dev = up_dev;
2638
2639         return 0;
2640 init_failure:
2641         /* Whoops, failed to init the new core. No core is operating now. */
2642         wl->current_dev = NULL;
2643         return err;
2644 }
2645
2646 /* Write the short and long frame retry limit values. */
2647 static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2648                                        unsigned int short_retry,
2649                                        unsigned int long_retry)
2650 {
2651         /* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2652          * the chip-internal counter. */
2653         short_retry = min(short_retry, (unsigned int)0xF);
2654         long_retry = min(long_retry, (unsigned int)0xF);
2655
2656         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
2657         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
2658 }
2659
2660 static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2661                                    u32 changed)
2662 {
2663         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2664         struct b43legacy_wldev *dev;
2665         struct b43legacy_phy *phy;
2666         struct ieee80211_conf *conf = &hw->conf;
2667         unsigned long flags;
2668         unsigned int new_phymode = 0xFFFF;
2669         int antenna_tx;
2670         int err = 0;
2671
2672         antenna_tx = B43legacy_ANTENNA_DEFAULT;
2673
2674         mutex_lock(&wl->mutex);
2675         dev = wl->current_dev;
2676         phy = &dev->phy;
2677
2678         if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
2679                 b43legacy_set_retry_limits(dev,
2680                                            conf->short_frame_max_tx_count,
2681                                            conf->long_frame_max_tx_count);
2682         changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS;
2683         if (!changed)
2684                 goto out_unlock_mutex;
2685
2686         /* Switch the PHY mode (if necessary). */
2687         switch (conf->chandef.chan->band) {
2688         case NL80211_BAND_2GHZ:
2689                 if (phy->type == B43legacy_PHYTYPE_B)
2690                         new_phymode = B43legacy_PHYMODE_B;
2691                 else
2692                         new_phymode = B43legacy_PHYMODE_G;
2693                 break;
2694         default:
2695                 B43legacy_WARN_ON(1);
2696         }
2697         err = b43legacy_switch_phymode(wl, new_phymode);
2698         if (err)
2699                 goto out_unlock_mutex;
2700
2701         /* Disable IRQs while reconfiguring the device.
2702          * This makes it possible to drop the spinlock throughout
2703          * the reconfiguration process. */
2704         spin_lock_irqsave(&wl->irq_lock, flags);
2705         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2706                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2707                 goto out_unlock_mutex;
2708         }
2709         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2710         spin_unlock_irqrestore(&wl->irq_lock, flags);
2711         b43legacy_synchronize_irq(dev);
2712
2713         /* Switch to the requested channel.
2714          * The firmware takes care of races with the TX handler. */
2715         if (conf->chandef.chan->hw_value != phy->channel)
2716                 b43legacy_radio_selectchannel(dev, conf->chandef.chan->hw_value,
2717                                               0);
2718
2719         dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR);
2720
2721         /* Adjust the desired TX power level. */
2722         if (conf->power_level != 0) {
2723                 if (conf->power_level != phy->power_level) {
2724                         phy->power_level = conf->power_level;
2725                         b43legacy_phy_xmitpower(dev);
2726                 }
2727         }
2728
2729         /* Antennas for RX and management frame TX. */
2730         b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2731
2732         if (wl->radio_enabled != phy->radio_on) {
2733                 if (wl->radio_enabled) {
2734                         b43legacy_radio_turn_on(dev);
2735                         b43legacyinfo(dev->wl, "Radio turned on by software\n");
2736                         if (!dev->radio_hw_enable)
2737                                 b43legacyinfo(dev->wl, "The hardware RF-kill"
2738                                               " button still turns the radio"
2739                                               " physically off. Press the"
2740                                               " button to turn it on.\n");
2741                 } else {
2742                         b43legacy_radio_turn_off(dev, 0);
2743                         b43legacyinfo(dev->wl, "Radio turned off by"
2744                                       " software\n");
2745                 }
2746         }
2747
2748         spin_lock_irqsave(&wl->irq_lock, flags);
2749         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2750         spin_unlock_irqrestore(&wl->irq_lock, flags);
2751 out_unlock_mutex:
2752         mutex_unlock(&wl->mutex);
2753
2754         return err;
2755 }
2756
2757 static void b43legacy_update_basic_rates(struct b43legacy_wldev *dev, u32 brates)
2758 {
2759         struct ieee80211_supported_band *sband =
2760                 dev->wl->hw->wiphy->bands[NL80211_BAND_2GHZ];
2761         struct ieee80211_rate *rate;
2762         int i;
2763         u16 basic, direct, offset, basic_offset, rateptr;
2764
2765         for (i = 0; i < sband->n_bitrates; i++) {
2766                 rate = &sband->bitrates[i];
2767
2768                 if (b43legacy_is_cck_rate(rate->hw_value)) {
2769                         direct = B43legacy_SHM_SH_CCKDIRECT;
2770                         basic = B43legacy_SHM_SH_CCKBASIC;
2771                         offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2772                         offset &= 0xF;
2773                 } else {
2774                         direct = B43legacy_SHM_SH_OFDMDIRECT;
2775                         basic = B43legacy_SHM_SH_OFDMBASIC;
2776                         offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2777                         offset &= 0xF;
2778                 }
2779
2780                 rate = ieee80211_get_response_rate(sband, brates, rate->bitrate);
2781
2782                 if (b43legacy_is_cck_rate(rate->hw_value)) {
2783                         basic_offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2784                         basic_offset &= 0xF;
2785                 } else {
2786                         basic_offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2787                         basic_offset &= 0xF;
2788                 }
2789
2790                 /*
2791                  * Get the pointer that we need to point to
2792                  * from the direct map
2793                  */
2794                 rateptr = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2795                                                direct + 2 * basic_offset);
2796                 /* and write it to the basic map */
2797                 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2798                                       basic + 2 * offset, rateptr);
2799         }
2800 }
2801
2802 static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw,
2803                                     struct ieee80211_vif *vif,
2804                                     struct ieee80211_bss_conf *conf,
2805                                     u32 changed)
2806 {
2807         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2808         struct b43legacy_wldev *dev;
2809         unsigned long flags;
2810
2811         mutex_lock(&wl->mutex);
2812         B43legacy_WARN_ON(wl->vif != vif);
2813
2814         dev = wl->current_dev;
2815
2816         /* Disable IRQs while reconfiguring the device.
2817          * This makes it possible to drop the spinlock throughout
2818          * the reconfiguration process. */
2819         spin_lock_irqsave(&wl->irq_lock, flags);
2820         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2821                 spin_unlock_irqrestore(&wl->irq_lock, flags);
2822                 goto out_unlock_mutex;
2823         }
2824         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2825
2826         if (changed & BSS_CHANGED_BSSID) {
2827                 b43legacy_synchronize_irq(dev);
2828
2829                 if (conf->bssid)
2830                         memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2831                 else
2832                         eth_zero_addr(wl->bssid);
2833         }
2834
2835         if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2836                 if (changed & BSS_CHANGED_BEACON &&
2837                     (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2838                      b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2839                         b43legacy_update_templates(wl);
2840
2841                 if (changed & BSS_CHANGED_BSSID)
2842                         b43legacy_write_mac_bssid_templates(dev);
2843         }
2844         spin_unlock_irqrestore(&wl->irq_lock, flags);
2845
2846         b43legacy_mac_suspend(dev);
2847
2848         if (changed & BSS_CHANGED_BEACON_INT &&
2849             (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2850              b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2851                 b43legacy_set_beacon_int(dev, conf->beacon_int);
2852
2853         if (changed & BSS_CHANGED_BASIC_RATES)
2854                 b43legacy_update_basic_rates(dev, conf->basic_rates);
2855
2856         if (changed & BSS_CHANGED_ERP_SLOT) {
2857                 if (conf->use_short_slot)
2858                         b43legacy_short_slot_timing_enable(dev);
2859                 else
2860                         b43legacy_short_slot_timing_disable(dev);
2861         }
2862
2863         b43legacy_mac_enable(dev);
2864
2865         spin_lock_irqsave(&wl->irq_lock, flags);
2866         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2867         /* XXX: why? */
2868         spin_unlock_irqrestore(&wl->irq_lock, flags);
2869  out_unlock_mutex:
2870         mutex_unlock(&wl->mutex);
2871 }
2872
2873 static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2874                                           unsigned int changed,
2875                                           unsigned int *fflags,u64 multicast)
2876 {
2877         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2878         struct b43legacy_wldev *dev = wl->current_dev;
2879         unsigned long flags;
2880
2881         if (!dev) {
2882                 *fflags = 0;
2883                 return;
2884         }
2885
2886         spin_lock_irqsave(&wl->irq_lock, flags);
2887         *fflags &= FIF_ALLMULTI |
2888                   FIF_FCSFAIL |
2889                   FIF_PLCPFAIL |
2890                   FIF_CONTROL |
2891                   FIF_OTHER_BSS |
2892                   FIF_BCN_PRBRESP_PROMISC;
2893
2894         changed &= FIF_ALLMULTI |
2895                    FIF_FCSFAIL |
2896                    FIF_PLCPFAIL |
2897                    FIF_CONTROL |
2898                    FIF_OTHER_BSS |
2899                    FIF_BCN_PRBRESP_PROMISC;
2900
2901         wl->filter_flags = *fflags;
2902
2903         if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2904                 b43legacy_adjust_opmode(dev);
2905         spin_unlock_irqrestore(&wl->irq_lock, flags);
2906 }
2907
2908 /* Locking: wl->mutex */
2909 static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2910 {
2911         struct b43legacy_wl *wl = dev->wl;
2912         unsigned long flags;
2913         int queue_num;
2914
2915         if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2916                 return;
2917
2918         /* Disable and sync interrupts. We must do this before than
2919          * setting the status to INITIALIZED, as the interrupt handler
2920          * won't care about IRQs then. */
2921         spin_lock_irqsave(&wl->irq_lock, flags);
2922         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2923         b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2924         spin_unlock_irqrestore(&wl->irq_lock, flags);
2925         b43legacy_synchronize_irq(dev);
2926
2927         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2928
2929         mutex_unlock(&wl->mutex);
2930         /* Must unlock as it would otherwise deadlock. No races here.
2931          * Cancel the possibly running self-rearming periodic work. */
2932         cancel_delayed_work_sync(&dev->periodic_work);
2933         cancel_work_sync(&wl->tx_work);
2934         mutex_lock(&wl->mutex);
2935
2936         /* Drain all TX queues. */
2937         for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2938                 while (skb_queue_len(&wl->tx_queue[queue_num]))
2939                         dev_kfree_skb(skb_dequeue(&wl->tx_queue[queue_num]));
2940         }
2941
2942 b43legacy_mac_suspend(dev);
2943         free_irq(dev->dev->irq, dev);
2944         b43legacydbg(wl, "Wireless interface stopped\n");
2945 }
2946
2947 /* Locking: wl->mutex */
2948 static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2949 {
2950         int err;
2951
2952         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2953
2954         drain_txstatus_queue(dev);
2955         err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2956                           IRQF_SHARED, KBUILD_MODNAME, dev);
2957         if (err) {
2958                 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2959                        dev->dev->irq);
2960                 goto out;
2961         }
2962         /* We are ready to run. */
2963         ieee80211_wake_queues(dev->wl->hw);
2964         b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2965
2966         /* Start data flow (TX/RX) */
2967         b43legacy_mac_enable(dev);
2968         b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2969
2970         /* Start maintenance work */
2971         b43legacy_periodic_tasks_setup(dev);
2972
2973         b43legacydbg(dev->wl, "Wireless interface started\n");
2974 out:
2975         return err;
2976 }
2977
2978 /* Get PHY and RADIO versioning numbers */
2979 static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2980 {
2981         struct b43legacy_phy *phy = &dev->phy;
2982         u32 tmp;
2983         u8 analog_type;
2984         u8 phy_type;
2985         u8 phy_rev;
2986         u16 radio_manuf;
2987         u16 radio_ver;
2988         u16 radio_rev;
2989         int unsupported = 0;
2990
2991         /* Get PHY versioning */
2992         tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2993         analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2994                       >> B43legacy_PHYVER_ANALOG_SHIFT;
2995         phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
2996         phy_rev = (tmp & B43legacy_PHYVER_VERSION);
2997         switch (phy_type) {
2998         case B43legacy_PHYTYPE_B:
2999                 if (phy_rev != 2 && phy_rev != 4
3000                     && phy_rev != 6 && phy_rev != 7)
3001                         unsupported = 1;
3002                 break;
3003         case B43legacy_PHYTYPE_G:
3004                 if (phy_rev > 8)
3005                         unsupported = 1;
3006                 break;
3007         default:
3008                 unsupported = 1;
3009         }
3010         if (unsupported) {
3011                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
3012                        "(Analog %u, Type %u, Revision %u)\n",
3013                        analog_type, phy_type, phy_rev);
3014                 return -EOPNOTSUPP;
3015         }
3016         b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
3017                analog_type, phy_type, phy_rev);
3018
3019
3020         /* Get RADIO versioning */
3021         if (dev->dev->bus->chip_id == 0x4317) {
3022                 if (dev->dev->bus->chip_rev == 0)
3023                         tmp = 0x3205017F;
3024                 else if (dev->dev->bus->chip_rev == 1)
3025                         tmp = 0x4205017F;
3026                 else
3027                         tmp = 0x5205017F;
3028         } else {
3029                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3030                                   B43legacy_RADIOCTL_ID);
3031                 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
3032                 tmp <<= 16;
3033                 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3034                                   B43legacy_RADIOCTL_ID);
3035                 tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
3036         }
3037         radio_manuf = (tmp & 0x00000FFF);
3038         radio_ver = (tmp & 0x0FFFF000) >> 12;
3039         radio_rev = (tmp & 0xF0000000) >> 28;
3040         switch (phy_type) {
3041         case B43legacy_PHYTYPE_B:
3042                 if ((radio_ver & 0xFFF0) != 0x2050)
3043                         unsupported = 1;
3044                 break;
3045         case B43legacy_PHYTYPE_G:
3046                 if (radio_ver != 0x2050)
3047                         unsupported = 1;
3048                 break;
3049         default:
3050                 B43legacy_BUG_ON(1);
3051         }
3052         if (unsupported) {
3053                 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
3054                        "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
3055                        radio_manuf, radio_ver, radio_rev);
3056                 return -EOPNOTSUPP;
3057         }
3058         b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
3059                      " Revision %u\n", radio_manuf, radio_ver, radio_rev);
3060
3061
3062         phy->radio_manuf = radio_manuf;
3063         phy->radio_ver = radio_ver;
3064         phy->radio_rev = radio_rev;
3065
3066         phy->analog = analog_type;
3067         phy->type = phy_type;
3068         phy->rev = phy_rev;
3069
3070         return 0;
3071 }
3072
3073 static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
3074                                       struct b43legacy_phy *phy)
3075 {
3076         struct b43legacy_lopair *lo;
3077         int i;
3078
3079         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3080         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3081
3082         /* Assume the radio is enabled. If it's not enabled, the state will
3083          * immediately get fixed on the first periodic work run. */
3084         dev->radio_hw_enable = true;
3085
3086         phy->savedpctlreg = 0xFFFF;
3087         phy->aci_enable = false;
3088         phy->aci_wlan_automatic = false;
3089         phy->aci_hw_rssi = false;
3090
3091         lo = phy->_lo_pairs;
3092         if (lo)
3093                 memset(lo, 0, sizeof(struct b43legacy_lopair) *
3094                                      B43legacy_LO_COUNT);
3095         phy->max_lb_gain = 0;
3096         phy->trsw_rx_gain = 0;
3097
3098         /* Set default attenuation values. */
3099         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3100         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3101         phy->txctl1 = b43legacy_default_txctl1(dev);
3102         phy->txpwr_offset = 0;
3103
3104         /* NRSSI */
3105         phy->nrssislope = 0;
3106         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3107                 phy->nrssi[i] = -1000;
3108         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3109                 phy->nrssi_lt[i] = i;
3110
3111         phy->lofcal = 0xFFFF;
3112         phy->initval = 0xFFFF;
3113
3114         phy->interfmode = B43legacy_INTERFMODE_NONE;
3115         phy->channel = 0xFF;
3116 }
3117
3118 static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
3119 {
3120         /* Flags */
3121         dev->dfq_valid = false;
3122
3123         /* Stats */
3124         memset(&dev->stats, 0, sizeof(dev->stats));
3125
3126         setup_struct_phy_for_init(dev, &dev->phy);
3127
3128         /* IRQ related flags */
3129         dev->irq_reason = 0;
3130         memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
3131         dev->irq_mask = B43legacy_IRQ_MASKTEMPLATE;
3132
3133         dev->mac_suspended = 1;
3134
3135         /* Noise calculation context */
3136         memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
3137 }
3138
3139 static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev *dev,
3140                                           bool idle) {
3141         u16 pu_delay = 1050;
3142
3143         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle)
3144                 pu_delay = 500;
3145         if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8))
3146                 pu_delay = max(pu_delay, (u16)2400);
3147
3148         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3149                               B43legacy_SHM_SH_SPUWKUP, pu_delay);
3150 }
3151
3152 /* Set the TSF CFP pre-TargetBeaconTransmissionTime. */
3153 static void b43legacy_set_pretbtt(struct b43legacy_wldev *dev)
3154 {
3155         u16 pretbtt;
3156
3157         /* The time value is in microseconds. */
3158         if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
3159                 pretbtt = 2;
3160         else
3161                 pretbtt = 250;
3162         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3163                               B43legacy_SHM_SH_PRETBTT, pretbtt);
3164         b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt);
3165 }
3166
3167 /* Shutdown a wireless core */
3168 /* Locking: wl->mutex */
3169 static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3170 {
3171         struct b43legacy_phy *phy = &dev->phy;
3172         u32 macctl;
3173
3174         B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3175         if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3176                 return;
3177         b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3178
3179         /* Stop the microcode PSM. */
3180         macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
3181         macctl &= ~B43legacy_MACCTL_PSM_RUN;
3182         macctl |= B43legacy_MACCTL_PSM_JMP0;
3183         b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
3184
3185         b43legacy_leds_exit(dev);
3186         b43legacy_rng_exit(dev->wl);
3187         b43legacy_pio_free(dev);
3188         b43legacy_dma_free(dev);
3189         b43legacy_chip_exit(dev);
3190         b43legacy_radio_turn_off(dev, 1);
3191         b43legacy_switch_analog(dev, 0);
3192         if (phy->dyn_tssi_tbl)
3193                 kfree(phy->tssi2dbm);
3194         kfree(phy->lo_control);
3195         phy->lo_control = NULL;
3196         if (dev->wl->current_beacon) {
3197                 dev_kfree_skb_any(dev->wl->current_beacon);
3198                 dev->wl->current_beacon = NULL;
3199         }
3200
3201         ssb_device_disable(dev->dev, 0);
3202         ssb_bus_may_powerdown(dev->dev->bus);
3203 }
3204
3205 static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3206 {
3207         struct b43legacy_phy *phy = &dev->phy;
3208         int i;
3209
3210         /* Set default attenuation values. */
3211         phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3212         phy->rfatt = b43legacy_default_radio_attenuation(dev);
3213         phy->txctl1 = b43legacy_default_txctl1(dev);
3214         phy->txctl2 = 0xFFFF;
3215         phy->txpwr_offset = 0;
3216
3217         /* NRSSI */
3218         phy->nrssislope = 0;
3219         for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3220                 phy->nrssi[i] = -1000;
3221         for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3222                 phy->nrssi_lt[i] = i;
3223
3224         phy->lofcal = 0xFFFF;
3225         phy->initval = 0xFFFF;
3226
3227         phy->aci_enable = false;
3228         phy->aci_wlan_automatic = false;
3229         phy->aci_hw_rssi = false;
3230
3231         phy->antenna_diversity = 0xFFFF;
3232         memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3233         memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3234
3235         /* Flags */
3236         phy->calibrated = 0;
3237
3238         if (phy->_lo_pairs)
3239                 memset(phy->_lo_pairs, 0,
3240                        sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3241         memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3242 }
3243
3244 /* Initialize a wireless core */
3245 static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3246 {
3247         struct b43legacy_wl *wl = dev->wl;
3248         struct ssb_bus *bus = dev->dev->bus;
3249         struct b43legacy_phy *phy = &dev->phy;
3250         struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3251         int err;
3252         u32 hf;
3253         u32 tmp;
3254
3255         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3256
3257         err = ssb_bus_powerup(bus, 0);
3258         if (err)
3259                 goto out;
3260         if (!ssb_device_is_enabled(dev->dev)) {
3261                 tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3262                 b43legacy_wireless_core_reset(dev, tmp);
3263         }
3264
3265         if ((phy->type == B43legacy_PHYTYPE_B) ||
3266             (phy->type == B43legacy_PHYTYPE_G)) {
3267                 phy->_lo_pairs = kcalloc(B43legacy_LO_COUNT,
3268                                          sizeof(struct b43legacy_lopair),
3269                                          GFP_KERNEL);
3270                 if (!phy->_lo_pairs)
3271                         return -ENOMEM;
3272         }
3273         setup_struct_wldev_for_init(dev);
3274
3275         err = b43legacy_phy_init_tssi2dbm_table(dev);
3276         if (err)
3277                 goto err_kfree_lo_control;
3278
3279         /* Enable IRQ routing to this device. */
3280         ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3281
3282         prepare_phy_data_for_init(dev);
3283         b43legacy_phy_calibrate(dev);
3284         err = b43legacy_chip_init(dev);
3285         if (err)
3286                 goto err_kfree_tssitbl;
3287         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3288                               B43legacy_SHM_SH_WLCOREREV,
3289                               dev->dev->id.revision);
3290         hf = b43legacy_hf_read(dev);
3291         if (phy->type == B43legacy_PHYTYPE_G) {
3292                 hf |= B43legacy_HF_SYMW;
3293                 if (phy->rev == 1)
3294                         hf |= B43legacy_HF_GDCW;
3295                 if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3296                         hf |= B43legacy_HF_OFDMPABOOST;
3297         } else if (phy->type == B43legacy_PHYTYPE_B) {
3298                 hf |= B43legacy_HF_SYMW;
3299                 if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3300                         hf &= ~B43legacy_HF_GDCW;
3301         }
3302         b43legacy_hf_write(dev, hf);
3303
3304         b43legacy_set_retry_limits(dev,
3305                                    B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3306                                    B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3307
3308         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3309                               0x0044, 3);
3310         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3311                               0x0046, 2);
3312
3313         /* Disable sending probe responses from firmware.
3314          * Setting the MaxTime to one usec will always trigger
3315          * a timeout, so we never send any probe resp.
3316          * A timeout of zero is infinite. */
3317         b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3318                               B43legacy_SHM_SH_PRMAXTIME, 1);
3319
3320         b43legacy_rate_memory_init(dev);
3321
3322         /* Minimum Contention Window */
3323         if (phy->type == B43legacy_PHYTYPE_B)
3324                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3325                                       0x0003, 31);
3326         else
3327                 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3328                                       0x0003, 15);
3329         /* Maximum Contention Window */
3330         b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3331                               0x0004, 1023);
3332
3333         do {
3334                 if (b43legacy_using_pio(dev))
3335                         err = b43legacy_pio_init(dev);
3336                 else {
3337                         err = b43legacy_dma_init(dev);
3338                         if (!err)
3339                                 b43legacy_qos_init(dev);
3340                 }
3341         } while (err == -EAGAIN);
3342         if (err)
3343                 goto err_chip_exit;
3344
3345         b43legacy_set_synth_pu_delay(dev, 1);
3346
3347         ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3348         b43legacy_upload_card_macaddress(dev);
3349         b43legacy_security_init(dev);
3350         b43legacy_rng_init(wl);
3351
3352         ieee80211_wake_queues(dev->wl->hw);
3353         b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3354
3355         b43legacy_leds_init(dev);
3356 out:
3357         return err;
3358
3359 err_chip_exit:
3360         b43legacy_chip_exit(dev);
3361 err_kfree_tssitbl:
3362         if (phy->dyn_tssi_tbl)
3363                 kfree(phy->tssi2dbm);
3364 err_kfree_lo_control:
3365         kfree(phy->lo_control);
3366         phy->lo_control = NULL;
3367         ssb_bus_may_powerdown(bus);
3368         B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3369         return err;
3370 }
3371
3372 static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3373                                       struct ieee80211_vif *vif)
3374 {
3375         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3376         struct b43legacy_wldev *dev;
3377         unsigned long flags;
3378         int err = -EOPNOTSUPP;
3379
3380         /* TODO: allow WDS/AP devices to coexist */
3381
3382         if (vif->type != NL80211_IFTYPE_AP &&
3383             vif->type != NL80211_IFTYPE_STATION &&
3384             vif->type != NL80211_IFTYPE_WDS &&
3385             vif->type != NL80211_IFTYPE_ADHOC)
3386                 return -EOPNOTSUPP;
3387
3388         mutex_lock(&wl->mutex);
3389         if (wl->operating)
3390                 goto out_mutex_unlock;
3391
3392         b43legacydbg(wl, "Adding Interface type %d\n", vif->type);
3393
3394         dev = wl->current_dev;
3395         wl->operating = true;
3396         wl->vif = vif;
3397         wl->if_type = vif->type;
3398         memcpy(wl->mac_addr, vif->addr, ETH_ALEN);
3399
3400         spin_lock_irqsave(&wl->irq_lock, flags);
3401         b43legacy_adjust_opmode(dev);
3402         b43legacy_set_pretbtt(dev);
3403         b43legacy_set_synth_pu_delay(dev, 0);
3404         b43legacy_upload_card_macaddress(dev);
3405         spin_unlock_irqrestore(&wl->irq_lock, flags);
3406
3407         err = 0;
3408  out_mutex_unlock:
3409         mutex_unlock(&wl->mutex);
3410
3411         return err;
3412 }
3413
3414 static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3415                                           struct ieee80211_vif *vif)
3416 {
3417         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3418         struct b43legacy_wldev *dev = wl->current_dev;
3419         unsigned long flags;
3420
3421         b43legacydbg(wl, "Removing Interface type %d\n", vif->type);
3422
3423         mutex_lock(&wl->mutex);
3424
3425         B43legacy_WARN_ON(!wl->operating);
3426         B43legacy_WARN_ON(wl->vif != vif);
3427         wl->vif = NULL;
3428
3429         wl->operating = false;
3430
3431         spin_lock_irqsave(&wl->irq_lock, flags);
3432         b43legacy_adjust_opmode(dev);
3433         eth_zero_addr(wl->mac_addr);
3434         b43legacy_upload_card_macaddress(dev);
3435         spin_unlock_irqrestore(&wl->irq_lock, flags);
3436
3437         mutex_unlock(&wl->mutex);
3438 }
3439
3440 static int b43legacy_op_start(struct ieee80211_hw *hw)
3441 {
3442         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3443         struct b43legacy_wldev *dev = wl->current_dev;
3444         int did_init = 0;
3445         int err = 0;
3446
3447         /* Kill all old instance specific information to make sure
3448          * the card won't use it in the short timeframe between start
3449          * and mac80211 reconfiguring it. */
3450         eth_zero_addr(wl->bssid);
3451         eth_zero_addr(wl->mac_addr);
3452         wl->filter_flags = 0;
3453         wl->beacon0_uploaded = false;
3454         wl->beacon1_uploaded = false;
3455         wl->beacon_templates_virgin = true;
3456         wl->radio_enabled = true;
3457
3458         mutex_lock(&wl->mutex);
3459
3460         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3461                 err = b43legacy_wireless_core_init(dev);
3462                 if (err)
3463                         goto out_mutex_unlock;
3464                 did_init = 1;
3465         }
3466
3467         if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3468                 err = b43legacy_wireless_core_start(dev);
3469                 if (err) {
3470                         if (did_init)
3471                                 b43legacy_wireless_core_exit(dev);
3472                         goto out_mutex_unlock;
3473                 }
3474         }
3475
3476         wiphy_rfkill_start_polling(hw->wiphy);
3477
3478 out_mutex_unlock:
3479         mutex_unlock(&wl->mutex);
3480
3481         return err;
3482 }
3483
3484 static void b43legacy_op_stop(struct ieee80211_hw *hw)
3485 {
3486         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3487         struct b43legacy_wldev *dev = wl->current_dev;
3488
3489         cancel_work_sync(&(wl->beacon_update_trigger));
3490
3491         mutex_lock(&wl->mutex);
3492         if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3493                 b43legacy_wireless_core_stop(dev);
3494         b43legacy_wireless_core_exit(dev);
3495         wl->radio_enabled = false;
3496         mutex_unlock(&wl->mutex);
3497 }
3498
3499 static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw,
3500                                        struct ieee80211_sta *sta, bool set)
3501 {
3502         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3503         unsigned long flags;
3504
3505         spin_lock_irqsave(&wl->irq_lock, flags);
3506         b43legacy_update_templates(wl);
3507         spin_unlock_irqrestore(&wl->irq_lock, flags);
3508
3509         return 0;
3510 }
3511
3512 static int b43legacy_op_get_survey(struct ieee80211_hw *hw, int idx,
3513                                    struct survey_info *survey)
3514 {
3515         struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3516         struct b43legacy_wldev *dev = wl->current_dev;
3517         struct ieee80211_conf *conf = &hw->conf;
3518
3519         if (idx != 0)
3520                 return -ENOENT;
3521
3522         survey->channel = conf->chandef.chan;
3523         survey->filled = SURVEY_INFO_NOISE_DBM;
3524         survey->noise = dev->stats.link_noise;
3525
3526         return 0;
3527 }
3528
3529 static const struct ieee80211_ops b43legacy_hw_ops = {
3530         .tx                     = b43legacy_op_tx,
3531         .conf_tx                = b43legacy_op_conf_tx,
3532         .add_interface          = b43legacy_op_add_interface,
3533         .remove_interface       = b43legacy_op_remove_interface,
3534         .config                 = b43legacy_op_dev_config,
3535         .bss_info_changed       = b43legacy_op_bss_info_changed,
3536         .configure_filter       = b43legacy_op_configure_filter,
3537         .get_stats              = b43legacy_op_get_stats,
3538         .start                  = b43legacy_op_start,
3539         .stop                   = b43legacy_op_stop,
3540         .set_tim                = b43legacy_op_beacon_set_tim,
3541         .get_survey             = b43legacy_op_get_survey,
3542         .rfkill_poll            = b43legacy_rfkill_poll,
3543 };
3544
3545 /* Hard-reset the chip. Do not call this directly.
3546  * Use b43legacy_controller_restart()
3547  */
3548 static void b43legacy_chip_reset(struct work_struct *work)
3549 {
3550         struct b43legacy_wldev *dev =
3551                 container_of(work, struct b43legacy_wldev, restart_work);
3552         struct b43legacy_wl *wl = dev->wl;
3553         int err = 0;
3554         int prev_status;
3555
3556         mutex_lock(&wl->mutex);
3557
3558         prev_status = b43legacy_status(dev);
3559         /* Bring the device down... */
3560         if (prev_status >= B43legacy_STAT_STARTED)
3561                 b43legacy_wireless_core_stop(dev);
3562         if (prev_status >= B43legacy_STAT_INITIALIZED)
3563                 b43legacy_wireless_core_exit(dev);
3564
3565         /* ...and up again. */
3566         if (prev_status >= B43legacy_STAT_INITIALIZED) {
3567                 err = b43legacy_wireless_core_init(dev);
3568                 if (err)
3569                         goto out;
3570         }
3571         if (prev_status >= B43legacy_STAT_STARTED) {
3572                 err = b43legacy_wireless_core_start(dev);
3573                 if (err) {
3574                         b43legacy_wireless_core_exit(dev);
3575                         goto out;
3576                 }
3577         }
3578 out:
3579         if (err)
3580                 wl->current_dev = NULL; /* Failed to init the dev. */
3581         mutex_unlock(&wl->mutex);
3582         if (err)
3583                 b43legacyerr(wl, "Controller restart FAILED\n");
3584         else
3585                 b43legacyinfo(wl, "Controller restarted\n");
3586 }
3587
3588 static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3589                                  int have_bphy,
3590                                  int have_gphy)
3591 {
3592         struct ieee80211_hw *hw = dev->wl->hw;
3593         struct b43legacy_phy *phy = &dev->phy;
3594
3595         phy->possible_phymodes = 0;
3596         if (have_bphy) {
3597                 hw->wiphy->bands[NL80211_BAND_2GHZ] =
3598                         &b43legacy_band_2GHz_BPHY;
3599                 phy->possible_phymodes |= B43legacy_PHYMODE_B;
3600         }
3601
3602         if (have_gphy) {
3603                 hw->wiphy->bands[NL80211_BAND_2GHZ] =
3604                         &b43legacy_band_2GHz_GPHY;
3605                 phy->possible_phymodes |= B43legacy_PHYMODE_G;
3606         }
3607
3608         return 0;
3609 }
3610
3611 static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3612 {
3613         /* We release firmware that late to not be required to re-request
3614          * is all the time when we reinit the core. */
3615         b43legacy_release_firmware(dev);
3616 }
3617
3618 static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3619 {
3620         struct b43legacy_wl *wl = dev->wl;
3621         struct ssb_bus *bus = dev->dev->bus;
3622         struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
3623         int err;
3624         int have_bphy = 0;
3625         int have_gphy = 0;
3626         u32 tmp;
3627
3628         /* Do NOT do any device initialization here.
3629          * Do it in wireless_core_init() instead.
3630          * This function is for gathering basic information about the HW, only.
3631          * Also some structs may be set up here. But most likely you want to
3632          * have that in core_init(), too.
3633          */
3634
3635         err = ssb_bus_powerup(bus, 0);
3636         if (err) {
3637                 b43legacyerr(wl, "Bus powerup failed\n");
3638                 goto out;
3639         }
3640         /* Get the PHY type. */
3641         if (dev->dev->id.revision >= 5) {
3642                 u32 tmshigh;
3643
3644                 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3645                 have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3646                 if (!have_gphy)
3647                         have_bphy = 1;
3648         } else if (dev->dev->id.revision == 4)
3649                 have_gphy = 1;
3650         else
3651                 have_bphy = 1;
3652
3653         dev->phy.gmode = (have_gphy || have_bphy);
3654         dev->phy.radio_on = true;
3655         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3656         b43legacy_wireless_core_reset(dev, tmp);
3657
3658         err = b43legacy_phy_versioning(dev);
3659         if (err)
3660                 goto err_powerdown;
3661         /* Check if this device supports multiband. */
3662         if (!pdev ||
3663             (pdev->device != 0x4312 &&
3664              pdev->device != 0x4319 &&
3665              pdev->device != 0x4324)) {
3666                 /* No multiband support. */
3667                 have_bphy = 0;
3668                 have_gphy = 0;
3669                 switch (dev->phy.type) {
3670                 case B43legacy_PHYTYPE_B:
3671                         have_bphy = 1;
3672                         break;
3673                 case B43legacy_PHYTYPE_G:
3674                         have_gphy = 1;
3675                         break;
3676                 default:
3677                         B43legacy_BUG_ON(1);
3678                 }
3679         }
3680         dev->phy.gmode = (have_gphy || have_bphy);
3681         tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3682         b43legacy_wireless_core_reset(dev, tmp);
3683
3684         err = b43legacy_validate_chipaccess(dev);
3685         if (err)
3686                 goto err_powerdown;
3687         err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3688         if (err)
3689                 goto err_powerdown;
3690
3691         /* Now set some default "current_dev" */
3692         if (!wl->current_dev)
3693                 wl->current_dev = dev;
3694         INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3695
3696         b43legacy_radio_turn_off(dev, 1);
3697         b43legacy_switch_analog(dev, 0);
3698         ssb_device_disable(dev->dev, 0);
3699         ssb_bus_may_powerdown(bus);
3700
3701 out:
3702         return err;
3703
3704 err_powerdown:
3705         ssb_bus_may_powerdown(bus);
3706         return err;
3707 }
3708
3709 static void b43legacy_one_core_detach(struct ssb_device *dev)
3710 {
3711         struct b43legacy_wldev *wldev;
3712         struct b43legacy_wl *wl;
3713
3714         /* Do not cancel ieee80211-workqueue based work here.
3715          * See comment in b43legacy_remove(). */
3716
3717         wldev = ssb_get_drvdata(dev);
3718         wl = wldev->wl;
3719         b43legacy_debugfs_remove_device(wldev);
3720         b43legacy_wireless_core_detach(wldev);
3721         list_del(&wldev->list);
3722         wl->nr_devs--;
3723         ssb_set_drvdata(dev, NULL);
3724         kfree(wldev);
3725 }
3726
3727 static int b43legacy_one_core_attach(struct ssb_device *dev,
3728                                      struct b43legacy_wl *wl)
3729 {
3730         struct b43legacy_wldev *wldev;
3731         int err = -ENOMEM;
3732
3733         wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3734         if (!wldev)
3735                 goto out;
3736
3737         wldev->dev = dev;
3738         wldev->wl = wl;
3739         b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3740         wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3741         tasklet_init(&wldev->isr_tasklet,
3742                      b43legacy_interrupt_tasklet,
3743                      (unsigned long)wldev);
3744         if (modparam_pio)
3745                 wldev->__using_pio = true;
3746         INIT_LIST_HEAD(&wldev->list);
3747
3748         err = b43legacy_wireless_core_attach(wldev);
3749         if (err)
3750                 goto err_kfree_wldev;
3751
3752         list_add(&wldev->list, &wl->devlist);
3753         wl->nr_devs++;
3754         ssb_set_drvdata(dev, wldev);
3755         b43legacy_debugfs_add_device(wldev);
3756 out:
3757         return err;
3758
3759 err_kfree_wldev:
3760         kfree(wldev);
3761         return err;
3762 }
3763
3764 static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3765 {
3766         /* boardflags workarounds */
3767         if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3768             bus->boardinfo.type == 0x4E &&
3769             bus->sprom.board_rev > 0x40)
3770                 bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3771 }
3772
3773 static void b43legacy_wireless_exit(struct ssb_device *dev,
3774                                   struct b43legacy_wl *wl)
3775 {
3776         struct ieee80211_hw *hw = wl->hw;
3777
3778         ssb_set_devtypedata(dev, NULL);
3779         ieee80211_free_hw(hw);
3780 }
3781
3782 static int b43legacy_wireless_init(struct ssb_device *dev)
3783 {
3784         struct ssb_sprom *sprom = &dev->bus->sprom;
3785         struct ieee80211_hw *hw;
3786         struct b43legacy_wl *wl;
3787         int err = -ENOMEM;
3788         int queue_num;
3789
3790         b43legacy_sprom_fixup(dev->bus);
3791
3792         hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3793         if (!hw) {
3794                 b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3795                 goto out;
3796         }
3797
3798         /* fill hw info */
3799         ieee80211_hw_set(hw, RX_INCLUDES_FCS);
3800         ieee80211_hw_set(hw, SIGNAL_DBM);
3801         ieee80211_hw_set(hw, MFP_CAPABLE); /* Allow WPA3 in software */
3802
3803         hw->wiphy->interface_modes =
3804                 BIT(NL80211_IFTYPE_AP) |
3805                 BIT(NL80211_IFTYPE_STATION) |
3806 #ifdef CONFIG_WIRELESS_WDS
3807                 BIT(NL80211_IFTYPE_WDS) |
3808 #endif
3809                 BIT(NL80211_IFTYPE_ADHOC);
3810         hw->queues = 1; /* FIXME: hardware has more queues */
3811         hw->max_rates = 2;
3812         SET_IEEE80211_DEV(hw, dev->dev);
3813         if (is_valid_ether_addr(sprom->et1mac))
3814                 SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3815         else
3816                 SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3817
3818         wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
3819
3820         /* Get and initialize struct b43legacy_wl */
3821         wl = hw_to_b43legacy_wl(hw);
3822         memset(wl, 0, sizeof(*wl));
3823         wl->hw = hw;
3824         spin_lock_init(&wl->irq_lock);
3825         spin_lock_init(&wl->leds_lock);
3826         mutex_init(&wl->mutex);
3827         INIT_LIST_HEAD(&wl->devlist);
3828         INIT_WORK(&wl->beacon_update_trigger, b43legacy_beacon_update_trigger_work);
3829         INIT_WORK(&wl->tx_work, b43legacy_tx_work);
3830
3831         /* Initialize queues and flags. */
3832         for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
3833                 skb_queue_head_init(&wl->tx_queue[queue_num]);
3834                 wl->tx_queue_stopped[queue_num] = 0;
3835         }
3836
3837         ssb_set_devtypedata(dev, wl);
3838         b43legacyinfo(wl, "Broadcom %04X WLAN found (core revision %u)\n",
3839                       dev->bus->chip_id, dev->id.revision);
3840         err = 0;
3841 out:
3842         return err;
3843 }
3844
3845 static int b43legacy_probe(struct ssb_device *dev,
3846                          const struct ssb_device_id *id)
3847 {
3848         struct b43legacy_wl *wl;
3849         int err;
3850         int first = 0;
3851
3852         wl = ssb_get_devtypedata(dev);
3853         if (!wl) {
3854                 /* Probing the first core - setup common struct b43legacy_wl */
3855                 first = 1;
3856                 err = b43legacy_wireless_init(dev);
3857                 if (err)
3858                         goto out;
3859                 wl = ssb_get_devtypedata(dev);
3860                 B43legacy_WARN_ON(!wl);
3861         }
3862         err = b43legacy_one_core_attach(dev, wl);
3863         if (err)
3864                 goto err_wireless_exit;
3865
3866         /* setup and start work to load firmware */
3867         INIT_WORK(&wl->firmware_load, b43legacy_request_firmware);
3868         schedule_work(&wl->firmware_load);
3869
3870 out:
3871         return err;
3872
3873 err_wireless_exit:
3874         if (first)
3875                 b43legacy_wireless_exit(dev, wl);
3876         return err;
3877 }
3878
3879 static void b43legacy_remove(struct ssb_device *dev)
3880 {
3881         struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3882         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3883
3884         /* We must cancel any work here before unregistering from ieee80211,
3885          * as the ieee80211 unreg will destroy the workqueue. */
3886         cancel_work_sync(&wldev->restart_work);
3887         cancel_work_sync(&wl->firmware_load);
3888         complete(&wldev->fw_load_complete);
3889
3890         B43legacy_WARN_ON(!wl);
3891         if (!wldev->fw.ucode)
3892                 return;                 /* NULL if fw never loaded */
3893         if (wl->current_dev == wldev)
3894                 ieee80211_unregister_hw(wl->hw);
3895
3896         b43legacy_one_core_detach(dev);
3897
3898         if (list_empty(&wl->devlist))
3899                 /* Last core on the chip unregistered.
3900                  * We can destroy common struct b43legacy_wl.
3901                  */
3902                 b43legacy_wireless_exit(dev, wl);
3903 }
3904
3905 /* Perform a hardware reset. This can be called from any context. */
3906 void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3907                                   const char *reason)
3908 {
3909         /* Must avoid requeueing, if we are in shutdown. */
3910         if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3911                 return;
3912         b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3913         ieee80211_queue_work(dev->wl->hw, &dev->restart_work);
3914 }
3915
3916 #ifdef CONFIG_PM
3917
3918 static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3919 {
3920         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3921         struct b43legacy_wl *wl = wldev->wl;
3922
3923         b43legacydbg(wl, "Suspending...\n");
3924
3925         mutex_lock(&wl->mutex);
3926         wldev->suspend_init_status = b43legacy_status(wldev);
3927         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3928                 b43legacy_wireless_core_stop(wldev);
3929         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3930                 b43legacy_wireless_core_exit(wldev);
3931         mutex_unlock(&wl->mutex);
3932
3933         b43legacydbg(wl, "Device suspended.\n");
3934
3935         return 0;
3936 }
3937
3938 static int b43legacy_resume(struct ssb_device *dev)
3939 {
3940         struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3941         struct b43legacy_wl *wl = wldev->wl;
3942         int err = 0;
3943
3944         b43legacydbg(wl, "Resuming...\n");
3945
3946         mutex_lock(&wl->mutex);
3947         if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3948                 err = b43legacy_wireless_core_init(wldev);
3949                 if (err) {
3950                         b43legacyerr(wl, "Resume failed at core init\n");
3951                         goto out;
3952                 }
3953         }
3954         if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3955                 err = b43legacy_wireless_core_start(wldev);
3956                 if (err) {
3957                         b43legacy_wireless_core_exit(wldev);
3958                         b43legacyerr(wl, "Resume failed at core start\n");
3959                         goto out;
3960                 }
3961         }
3962
3963         b43legacydbg(wl, "Device resumed.\n");
3964 out:
3965         mutex_unlock(&wl->mutex);
3966         return err;
3967 }
3968
3969 #else   /* CONFIG_PM */
3970 # define b43legacy_suspend      NULL
3971 # define b43legacy_resume               NULL
3972 #endif  /* CONFIG_PM */
3973
3974 static struct ssb_driver b43legacy_ssb_driver = {
3975         .name           = KBUILD_MODNAME,
3976         .id_table       = b43legacy_ssb_tbl,
3977         .probe          = b43legacy_probe,
3978         .remove         = b43legacy_remove,
3979         .suspend        = b43legacy_suspend,
3980         .resume         = b43legacy_resume,
3981 };
3982
3983 static void b43legacy_print_driverinfo(void)
3984 {
3985         const char *feat_pci = "", *feat_leds = "",
3986                    *feat_pio = "", *feat_dma = "";
3987
3988 #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
3989         feat_pci = "P";
3990 #endif
3991 #ifdef CONFIG_B43LEGACY_LEDS
3992         feat_leds = "L";
3993 #endif
3994 #ifdef CONFIG_B43LEGACY_PIO
3995         feat_pio = "I";
3996 #endif
3997 #ifdef CONFIG_B43LEGACY_DMA
3998         feat_dma = "D";
3999 #endif
4000         printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
4001                "[ Features: %s%s%s%s ]\n",
4002                feat_pci, feat_leds, feat_pio, feat_dma);
4003 }
4004
4005 static int __init b43legacy_init(void)
4006 {
4007         int err;
4008
4009         b43legacy_debugfs_init();
4010
4011         err = ssb_driver_register(&b43legacy_ssb_driver);
4012         if (err)
4013                 goto err_dfs_exit;
4014
4015         b43legacy_print_driverinfo();
4016
4017         return err;
4018
4019 err_dfs_exit:
4020         b43legacy_debugfs_exit();
4021         return err;
4022 }
4023
4024 static void __exit b43legacy_exit(void)
4025 {
4026         ssb_driver_unregister(&b43legacy_ssb_driver);
4027         b43legacy_debugfs_exit();
4028 }
4029
4030 module_init(b43legacy_init)
4031 module_exit(b43legacy_exit)