drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2011 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include <linux/delay.h>
  19 #include "ath9k.h"
  20 #include "btcoex.h"
  21
  22 u8 ath9k_parse_mpdudensity(u8 mpdudensity)
  23 {
  24         /*
  25          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  26          *   0 for no restriction
  27          *   1 for 1/4 us
  28          *   2 for 1/2 us
  29          *   3 for 1 us
  30          *   4 for 2 us
  31          *   5 for 4 us
  32          *   6 for 8 us
  33          *   7 for 16 us
  34          */
  35         switch (mpdudensity) {
  36         case 0:
  37                 return 0;
  38         case 1:
  39         case 2:
  40         case 3:
  41                 /* Our lower layer calculations limit our precision to
  42                    1 microsecond */
  43                 return 1;
  44         case 4:
  45                 return 2;
  46         case 5:
  47                 return 4;
  48         case 6:
  49                 return 8;
  50         case 7:
  51                 return 16;
  52         default:
  53                 return 0;
  54         }
  55 }
  56
  57 static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq,
  58                                      bool sw_pending)
  59 {
  60         bool pending = false;
  61
  62         spin_lock_bh(&txq->axq_lock);
  63
  64         if (txq->axq_depth) {
  65                 pending = true;
  66                 goto out;
  67         }
  68
  69         if (!sw_pending)
  70                 goto out;
  71
  72         if (txq->mac80211_qnum >= 0) {
  73                 struct list_head *list;
  74
  75                 list = &sc->cur_chan->acq[txq->mac80211_qnum];
  76                 if (!list_empty(list))
  77                         pending = true;
  78         }
  79 out:
  80         spin_unlock_bh(&txq->axq_lock);
  81         return pending;
  82 }
  83
  84 static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  85 {
  86         unsigned long flags;
  87         bool ret;
  88
  89         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  90         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  91         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  92
  93         return ret;
  94 }
  95
  96 void ath_ps_full_sleep(unsigned long data)
  97 {
  98         struct ath_softc *sc = (struct ath_softc *) data;
  99         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 100         bool reset;
 101
 102         spin_lock(&common->cc_lock);
 103         ath_hw_cycle_counters_update(common);
 104         spin_unlock(&common->cc_lock);
 105
 106         ath9k_hw_setrxabort(sc->sc_ah, 1);
 107         ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
 108
 109         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 110 }
 111
 112 void ath9k_ps_wakeup(struct ath_softc *sc)
 113 {
 114         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 115         unsigned long flags;
 116         enum ath9k_power_mode power_mode;
 117
 118         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 119         if (++sc->ps_usecount != 1)
 120                 goto unlock;
 121
 122         del_timer_sync(&sc->sleep_timer);
 123         power_mode = sc->sc_ah->power_mode;
 124         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 125
 126         /*
 127          * While the hardware is asleep, the cycle counters contain no
 128          * useful data. Better clear them now so that they don't mess up
 129          * survey data results.
 130          */
 131         if (power_mode != ATH9K_PM_AWAKE) {
 132                 spin_lock(&common->cc_lock);
 133                 ath_hw_cycle_counters_update(common);
 134                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 135                 memset(&common->cc_ani, 0, sizeof(common->cc_ani));
 136                 spin_unlock(&common->cc_lock);
 137         }
 138
 139  unlock:
 140         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 141 }
 142
 143 void ath9k_ps_restore(struct ath_softc *sc)
 144 {
 145         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 146         enum ath9k_power_mode mode;
 147         unsigned long flags;
 148
 149         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 150         if (--sc->ps_usecount != 0)
 151                 goto unlock;
 152
 153         if (sc->ps_idle) {
 154                 mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
 155                 goto unlock;
 156         }
 157
 158         if (sc->ps_enabled &&
 159                    !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 160                                      PS_WAIT_FOR_CAB |
 161                                      PS_WAIT_FOR_PSPOLL_DATA |
 162                                      PS_WAIT_FOR_TX_ACK |
 163                                      PS_WAIT_FOR_ANI))) {
 164                 mode = ATH9K_PM_NETWORK_SLEEP;
 165                 if (ath9k_hw_btcoex_is_enabled(sc->sc_ah))
 166                         ath9k_btcoex_stop_gen_timer(sc);
 167         } else {
 168                 goto unlock;
 169         }
 170
 171         spin_lock(&common->cc_lock);
 172         ath_hw_cycle_counters_update(common);
 173         spin_unlock(&common->cc_lock);
 174
 175         ath9k_hw_setpower(sc->sc_ah, mode);
 176
 177  unlock:
 178         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 179 }
 180
 181 static void __ath_cancel_work(struct ath_softc *sc)
 182 {
 183         cancel_work_sync(&sc->paprd_work);
 184         cancel_delayed_work_sync(&sc->tx_complete_work);
 185         cancel_delayed_work_sync(&sc->hw_pll_work);
 186
 187 #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
 188         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
 189                 cancel_work_sync(&sc->mci_work);
 190 #endif
 191 }
 192
 193 void ath_cancel_work(struct ath_softc *sc)
 194 {
 195         __ath_cancel_work(sc);
 196         cancel_work_sync(&sc->hw_reset_work);
 197 }
 198
 199 void ath_restart_work(struct ath_softc *sc)
 200 {
 201         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 202
 203         if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9330(sc->sc_ah))
 204                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
 205                                      msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
 206
 207         ath_start_ani(sc);
 208 }
 209
 210 static bool ath_prepare_reset(struct ath_softc *sc)
 211 {
 212         struct ath_hw *ah = sc->sc_ah;
 213         bool ret = true;
 214
 215         ieee80211_stop_queues(sc->hw);
 216         ath_stop_ani(sc);
 217         ath9k_hw_disable_interrupts(ah);
 218
 219         if (AR_SREV_9300_20_OR_LATER(ah)) {
 220                 ret &= ath_stoprecv(sc);
 221                 ret &= ath_drain_all_txq(sc);
 222         } else {
 223                 ret &= ath_drain_all_txq(sc);
 224                 ret &= ath_stoprecv(sc);
 225         }
 226
 227         return ret;
 228 }
 229
 230 static bool ath_complete_reset(struct ath_softc *sc, bool start)
 231 {
 232         struct ath_hw *ah = sc->sc_ah;
 233         struct ath_common *common = ath9k_hw_common(ah);
 234         unsigned long flags;
 235
 236         ath9k_calculate_summary_state(sc, sc->cur_chan);
 237         ath_startrecv(sc);
 238         ath9k_cmn_update_txpow(ah, sc->cur_chan->cur_txpower,
 239                                sc->cur_chan->txpower,
 240                                &sc->cur_chan->cur_txpower);
 241         clear_bit(ATH_OP_HW_RESET, &common->op_flags);
 242
 243         if (!sc->cur_chan->offchannel && start) {
 244                 /* restore per chanctx TSF timer */
 245                 if (sc->cur_chan->tsf_val) {
 246                         u32 offset;
 247
 248                         offset = ath9k_hw_get_tsf_offset(&sc->cur_chan->tsf_ts,
 249                                                          NULL);
 250                         ath9k_hw_settsf64(ah, sc->cur_chan->tsf_val + offset);
 251                 }
 252
 253
 254                 if (!test_bit(ATH_OP_BEACONS, &common->op_flags))
 255                         goto work;
 256
 257                 if (ah->opmode == NL80211_IFTYPE_STATION &&
 258                     test_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags)) {
 259                         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 260                         sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
 261                         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 262                 } else {
 263                         ath9k_set_beacon(sc);
 264                 }
 265         work:
 266                 ath_restart_work(sc);
 267                 ath_txq_schedule_all(sc);
 268         }
 269
 270         sc->gtt_cnt = 0;
 271
 272         ath9k_hw_set_interrupts(ah);
 273         ath9k_hw_enable_interrupts(ah);
 274         ieee80211_wake_queues(sc->hw);
 275         ath9k_p2p_ps_timer(sc);
 276
 277         return true;
 278 }
 279
 280 static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
 281 {
 282         struct ath_hw *ah = sc->sc_ah;
 283         struct ath_common *common = ath9k_hw_common(ah);
 284         struct ath9k_hw_cal_data *caldata = NULL;
 285         bool fastcc = true;
 286         int r;
 287
 288         __ath_cancel_work(sc);
 289
 290         disable_irq(sc->irq);
 291         tasklet_disable(&sc->intr_tq);
 292         tasklet_disable(&sc->bcon_tasklet);
 293         spin_lock_bh(&sc->sc_pcu_lock);
 294
 295         if (!sc->cur_chan->offchannel) {
 296                 fastcc = false;
 297                 caldata = &sc->cur_chan->caldata;
 298         }
 299
 300         if (!hchan) {
 301                 fastcc = false;
 302                 hchan = ah->curchan;
 303         }
 304
 305         if (!ath_prepare_reset(sc))
 306                 fastcc = false;
 307
 308         if (ath9k_is_chanctx_enabled())
 309                 fastcc = false;
 310
 311         spin_lock_bh(&sc->chan_lock);
 312         sc->cur_chandef = sc->cur_chan->chandef;
 313         spin_unlock_bh(&sc->chan_lock);
 314
 315         ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
 316                 hchan->channel, IS_CHAN_HT40(hchan), fastcc);
 317
 318         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 319         if (r) {
 320                 ath_err(common,
 321                         "Unable to reset channel, reset status %d\n", r);
 322
 323                 ath9k_hw_enable_interrupts(ah);
 324                 ath9k_queue_reset(sc, RESET_TYPE_BB_HANG);
 325
 326                 goto out;
 327         }
 328
 329         if (ath9k_hw_mci_is_enabled(sc->sc_ah) &&
 330             sc->cur_chan->offchannel)
 331                 ath9k_mci_set_txpower(sc, true, false);
 332
 333         if (!ath_complete_reset(sc, true))
 334                 r = -EIO;
 335
 336 out:
 337         enable_irq(sc->irq);
 338         spin_unlock_bh(&sc->sc_pcu_lock);
 339         tasklet_enable(&sc->bcon_tasklet);
 340         tasklet_enable(&sc->intr_tq);
 341
 342         return r;
 343 }
 344
 345 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta,
 346                             struct ieee80211_vif *vif)
 347 {
 348         struct ath_node *an;
 349         an = (struct ath_node *)sta->drv_priv;
 350
 351         an->sc = sc;
 352         an->sta = sta;
 353         an->vif = vif;
 354         memset(&an->key_idx, 0, sizeof(an->key_idx));
 355
 356         ath_tx_node_init(sc, an);
 357
 358         ath_dynack_node_init(sc->sc_ah, an);
 359 }
 360
 361 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 362 {
 363         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 364         ath_tx_node_cleanup(sc, an);
 365
 366         ath_dynack_node_deinit(sc->sc_ah, an);
 367 }
 368
 369 void ath9k_tasklet(unsigned long data)
 370 {
 371         struct ath_softc *sc = (struct ath_softc *)data;
 372         struct ath_hw *ah = sc->sc_ah;
 373         struct ath_common *common = ath9k_hw_common(ah);
 374         enum ath_reset_type type;
 375         unsigned long flags;
 376         u32 status;
 377         u32 rxmask;
 378
 379         spin_lock_irqsave(&sc->intr_lock, flags);
 380         status = sc->intrstatus;
 381         sc->intrstatus = 0;
 382         spin_unlock_irqrestore(&sc->intr_lock, flags);
 383
 384         ath9k_ps_wakeup(sc);
 385         spin_lock(&sc->sc_pcu_lock);
 386
 387         if (status & ATH9K_INT_FATAL) {
 388                 type = RESET_TYPE_FATAL_INT;
 389                 ath9k_queue_reset(sc, type);
 390                 ath_dbg(common, RESET, "FATAL: Skipping interrupts\n");
 391                 goto out;
 392         }
 393
 394         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 395             (status & ATH9K_INT_BB_WATCHDOG)) {
 396                 spin_lock(&common->cc_lock);
 397                 ath_hw_cycle_counters_update(common);
 398                 ar9003_hw_bb_watchdog_dbg_info(ah);
 399                 spin_unlock(&common->cc_lock);
 400
 401                 if (ar9003_hw_bb_watchdog_check(ah)) {
 402                         type = RESET_TYPE_BB_WATCHDOG;
 403                         ath9k_queue_reset(sc, type);
 404
 405                         ath_dbg(common, RESET,
 406                                 "BB_WATCHDOG: Skipping interrupts\n");
 407                         goto out;
 408                 }
 409         }
 410
 411         if (status & ATH9K_INT_GTT) {
 412                 sc->gtt_cnt++;
 413
 414                 if ((sc->gtt_cnt >= MAX_GTT_CNT) && !ath9k_hw_check_alive(ah)) {
 415                         type = RESET_TYPE_TX_GTT;
 416                         ath9k_queue_reset(sc, type);
 417                         ath_dbg(common, RESET,
 418                                 "GTT: Skipping interrupts\n");
 419                         goto out;
 420                 }
 421         }
 422
 423         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 424         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 425                 /*
 426                  * TSF sync does not look correct; remain awake to sync with
 427                  * the next Beacon.
 428                  */
 429                 ath_dbg(common, PS, "TSFOOR - Sync with next Beacon\n");
 430                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 431         }
 432         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 433
 434         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 435                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 436                           ATH9K_INT_RXORN);
 437         else
 438                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 439
 440         if (status & rxmask) {
 441                 /* Check for high priority Rx first */
 442                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 443                     (status & ATH9K_INT_RXHP))
 444                         ath_rx_tasklet(sc, 0, true);
 445
 446                 ath_rx_tasklet(sc, 0, false);
 447         }
 448
 449         if (status & ATH9K_INT_TX) {
 450                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 451                         /*
 452                          * For EDMA chips, TX completion is enabled for the
 453                          * beacon queue, so if a beacon has been transmitted
 454                          * successfully after a GTT interrupt, the GTT counter
 455                          * gets reset to zero here.
 456                          */
 457                         sc->gtt_cnt = 0;
 458
 459                         ath_tx_edma_tasklet(sc);
 460                 } else {
 461                         ath_tx_tasklet(sc);
 462                 }
 463
 464                 wake_up(&sc->tx_wait);
 465         }
 466
 467         if (status & ATH9K_INT_GENTIMER)
 468                 ath_gen_timer_isr(sc->sc_ah);
 469
 470         ath9k_btcoex_handle_interrupt(sc, status);
 471
 472         /* re-enable hardware interrupt */
 473         ath9k_hw_resume_interrupts(ah);
 474 out:
 475         spin_unlock(&sc->sc_pcu_lock);
 476         ath9k_ps_restore(sc);
 477 }
 478
 479 irqreturn_t ath_isr(int irq, void *dev)
 480 {
 481 #define SCHED_INTR (                            \
 482                 ATH9K_INT_FATAL |               \
 483                 ATH9K_INT_BB_WATCHDOG |         \
 484                 ATH9K_INT_RXORN |               \
 485                 ATH9K_INT_RXEOL |               \
 486                 ATH9K_INT_RX |                  \
 487                 ATH9K_INT_RXLP |                \
 488                 ATH9K_INT_RXHP |                \
 489                 ATH9K_INT_TX |                  \
 490                 ATH9K_INT_BMISS |               \
 491                 ATH9K_INT_CST |                 \
 492                 ATH9K_INT_GTT |                 \
 493                 ATH9K_INT_TSFOOR |              \
 494                 ATH9K_INT_GENTIMER |            \
 495                 ATH9K_INT_MCI)
 496
 497         struct ath_softc *sc = dev;
 498         struct ath_hw *ah = sc->sc_ah;
 499         struct ath_common *common = ath9k_hw_common(ah);
 500         enum ath9k_int status;
 501         u32 sync_cause = 0;
 502         bool sched = false;
 503
 504         /*
 505          * The hardware is not ready/present, don't
 506          * touch anything. Note this can happen early
 507          * on if the IRQ is shared.
 508          */
 509         if (!ah || test_bit(ATH_OP_INVALID, &common->op_flags))
 510                 return IRQ_NONE;
 511
 512         /* shared irq, not for us */
 513         if (!ath9k_hw_intrpend(ah))
 514                 return IRQ_NONE;
 515
 516         /*
 517          * Figure out the reason(s) for the interrupt.  Note
 518          * that the hal returns a pseudo-ISR that may include
 519          * bits we haven't explicitly enabled so we mask the
 520          * value to insure we only process bits we requested.
 521          */
 522         ath9k_hw_getisr(ah, &status, &sync_cause); /* NB: clears ISR too */
 523         ath9k_debug_sync_cause(sc, sync_cause);
 524         status &= ah->imask;    /* discard unasked-for bits */
 525
 526         if (test_bit(ATH_OP_HW_RESET, &common->op_flags))
 527                 return IRQ_HANDLED;
 528
 529         /*
 530          * If there are no status bits set, then this interrupt was not
 531          * for me (should have been caught above).
 532          */
 533         if (!status)
 534                 return IRQ_NONE;
 535
 536         /* Cache the status */
 537         spin_lock(&sc->intr_lock);
 538         sc->intrstatus |= status;
 539         spin_unlock(&sc->intr_lock);
 540
 541         if (status & SCHED_INTR)
 542                 sched = true;
 543
 544         /*
 545          * If a FATAL interrupt is received, we have to reset the chip
 546          * immediately.
 547          */
 548         if (status & ATH9K_INT_FATAL)
 549                 goto chip_reset;
 550
 551         if ((ah->config.hw_hang_checks & HW_BB_WATCHDOG) &&
 552             (status & ATH9K_INT_BB_WATCHDOG))
 553                 goto chip_reset;
 554
 555         if (status & ATH9K_INT_SWBA)
 556                 tasklet_schedule(&sc->bcon_tasklet);
 557
 558         if (status & ATH9K_INT_TXURN)
 559                 ath9k_hw_updatetxtriglevel(ah, true);
 560
 561         if (status & ATH9K_INT_RXEOL) {
 562                 ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 563                 ath9k_hw_set_interrupts(ah);
 564         }
 565
 566         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 567                 if (status & ATH9K_INT_TIM_TIMER) {
 568                         if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
 569                                 goto chip_reset;
 570                         /* Clear RxAbort bit so that we can
 571                          * receive frames */
 572                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 573                         spin_lock(&sc->sc_pm_lock);
 574                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 575                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 576                         spin_unlock(&sc->sc_pm_lock);
 577                 }
 578
 579 chip_reset:
 580
 581         ath_debug_stat_interrupt(sc, status);
 582
 583         if (sched) {
 584                 /* turn off every interrupt */
 585                 ath9k_hw_kill_interrupts(ah);
 586                 tasklet_schedule(&sc->intr_tq);
 587         }
 588
 589         return IRQ_HANDLED;
 590
 591 #undef SCHED_INTR
 592 }
 593
 594 /*
 595  * This function is called when a HW reset cannot be deferred
 596  * and has to be immediate.
 597  */
 598 int ath_reset(struct ath_softc *sc, struct ath9k_channel *hchan)
 599 {
 600         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 601         int r;
 602
 603         ath9k_hw_kill_interrupts(sc->sc_ah);
 604         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 605
 606         ath9k_ps_wakeup(sc);
 607         r = ath_reset_internal(sc, hchan);
 608         ath9k_ps_restore(sc);
 609
 610         return r;
 611 }
 612
 613 /*
 614  * When a HW reset can be deferred, it is added to the
 615  * hw_reset_work workqueue, but we set ATH_OP_HW_RESET before
 616  * queueing.
 617  */
 618 void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type)
 619 {
 620         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 621 #ifdef CONFIG_ATH9K_DEBUGFS
 622         RESET_STAT_INC(sc, type);
 623 #endif
 624         ath9k_hw_kill_interrupts(sc->sc_ah);
 625         set_bit(ATH_OP_HW_RESET, &common->op_flags);
 626         ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
 627 }
 628
 629 void ath_reset_work(struct work_struct *work)
 630 {
 631         struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
 632
 633         ath9k_ps_wakeup(sc);
 634         ath_reset_internal(sc, NULL);
 635         ath9k_ps_restore(sc);
 636 }
 637
 638 /**********************/
 639 /* mac80211 callbacks */
 640 /**********************/
 641
 642 static int ath9k_start(struct ieee80211_hw *hw)
 643 {
 644         struct ath_softc *sc = hw->priv;
 645         struct ath_hw *ah = sc->sc_ah;
 646         struct ath_common *common = ath9k_hw_common(ah);
 647         struct ieee80211_channel *curchan = sc->cur_chan->chandef.chan;
 648         struct ath_chanctx *ctx = sc->cur_chan;
 649         struct ath9k_channel *init_channel;
 650         int r;
 651
 652         ath_dbg(common, CONFIG,
 653                 "Starting driver with initial channel: %d MHz\n",
 654                 curchan->center_freq);
 655
 656         ath9k_ps_wakeup(sc);
 657         mutex_lock(&sc->mutex);
 658
 659         init_channel = ath9k_cmn_get_channel(hw, ah, &ctx->chandef);
 660         sc->cur_chandef = hw->conf.chandef;
 661
 662         /* Reset SERDES registers */
 663         ath9k_hw_configpcipowersave(ah, false);
 664
 665         /*
 666          * The basic interface to setting the hardware in a good
 667          * state is ``reset''.  On return the hardware is known to
 668          * be powered up and with interrupts disabled.  This must
 669          * be followed by initialization of the appropriate bits
 670          * and then setup of the interrupt mask.
 671          */
 672         spin_lock_bh(&sc->sc_pcu_lock);
 673
 674         atomic_set(&ah->intr_ref_cnt, -1);
 675
 676         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
 677         if (r) {
 678                 ath_err(common,
 679                         "Unable to reset hardware; reset status %d (freq %u MHz)\n",
 680                         r, curchan->center_freq);
 681                 ah->reset_power_on = false;
 682         }
 683
 684         /* Setup our intr mask. */
 685         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
 686                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
 687                     ATH9K_INT_GLOBAL;
 688
 689         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 690                 ah->imask |= ATH9K_INT_RXHP |
 691                              ATH9K_INT_RXLP;
 692         else
 693                 ah->imask |= ATH9K_INT_RX;
 694
 695         if (ah->config.hw_hang_checks & HW_BB_WATCHDOG)
 696                 ah->imask |= ATH9K_INT_BB_WATCHDOG;
 697
 698         /*
 699          * Enable GTT interrupts only for AR9003/AR9004 chips
 700          * for now.
 701          */
 702         if (AR_SREV_9300_20_OR_LATER(ah))
 703                 ah->imask |= ATH9K_INT_GTT;
 704
 705         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
 706                 ah->imask |= ATH9K_INT_CST;
 707
 708         ath_mci_enable(sc);
 709
 710         clear_bit(ATH_OP_INVALID, &common->op_flags);
 711         sc->sc_ah->is_monitoring = false;
 712
 713         if (!ath_complete_reset(sc, false))
 714                 ah->reset_power_on = false;
 715
 716         if (ah->led_pin >= 0) {
 717                 ath9k_hw_cfg_output(ah, ah->led_pin,
 718                                     AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 719                 ath9k_hw_set_gpio(ah, ah->led_pin,
 720                                   (ah->config.led_active_high) ? 1 : 0);
 721         }
 722
 723         /*
 724          * Reset key cache to sane defaults (all entries cleared) instead of
 725          * semi-random values after suspend/resume.
 726          */
 727         ath9k_cmn_init_crypto(sc->sc_ah);
 728
 729         ath9k_hw_reset_tsf(ah);
 730
 731         spin_unlock_bh(&sc->sc_pcu_lock);
 732
 733         mutex_unlock(&sc->mutex);
 734
 735         ath9k_ps_restore(sc);
 736
 737         return 0;
 738 }
 739
 740 static void ath9k_tx(struct ieee80211_hw *hw,
 741                      struct ieee80211_tx_control *control,
 742                      struct sk_buff *skb)
 743 {
 744         struct ath_softc *sc = hw->priv;
 745         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 746         struct ath_tx_control txctl;
 747         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
 748         unsigned long flags;
 749
 750         if (sc->ps_enabled) {
 751                 /*
 752                  * mac80211 does not set PM field for normal data frames, so we
 753                  * need to update that based on the current PS mode.
 754                  */
 755                 if (ieee80211_is_data(hdr->frame_control) &&
 756                     !ieee80211_is_nullfunc(hdr->frame_control) &&
 757                     !ieee80211_has_pm(hdr->frame_control)) {
 758                         ath_dbg(common, PS,
 759                                 "Add PM=1 for a TX frame while in PS mode\n");
 760                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
 761                 }
 762         }
 763
 764         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP)) {
 765                 /*
 766                  * We are using PS-Poll and mac80211 can request TX while in
 767                  * power save mode. Need to wake up hardware for the TX to be
 768                  * completed and if needed, also for RX of buffered frames.
 769                  */
 770                 ath9k_ps_wakeup(sc);
 771                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
 772                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 773                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 774                 if (ieee80211_is_pspoll(hdr->frame_control)) {
 775                         ath_dbg(common, PS,
 776                                 "Sending PS-Poll to pick a buffered frame\n");
 777                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
 778                 } else {
 779                         ath_dbg(common, PS, "Wake up to complete TX\n");
 780                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
 781                 }
 782                 /*
 783                  * The actual restore operation will happen only after
 784                  * the ps_flags bit is cleared. We are just dropping
 785                  * the ps_usecount here.
 786                  */
 787                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 788                 ath9k_ps_restore(sc);
 789         }
 790
 791         /*
 792          * Cannot tx while the hardware is in full sleep, it first needs a full
 793          * chip reset to recover from that
 794          */
 795         if (unlikely(sc->sc_ah->power_mode == ATH9K_PM_FULL_SLEEP)) {
 796                 ath_err(common, "TX while HW is in FULL_SLEEP mode\n");
 797                 goto exit;
 798         }
 799
 800         memset(&txctl, 0, sizeof(struct ath_tx_control));
 801         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
 802         txctl.sta = control->sta;
 803
 804         ath_dbg(common, XMIT, "transmitting packet, skb: %p\n", skb);
 805
 806         if (ath_tx_start(hw, skb, &txctl) != 0) {
 807                 ath_dbg(common, XMIT, "TX failed\n");
 808                 TX_STAT_INC(txctl.txq->axq_qnum, txfailed);
 809                 goto exit;
 810         }
 811
 812         return;
 813 exit:
 814         ieee80211_free_txskb(hw, skb);
 815 }
 816
 817 static void ath9k_stop(struct ieee80211_hw *hw)
 818 {
 819         struct ath_softc *sc = hw->priv;
 820         struct ath_hw *ah = sc->sc_ah;
 821         struct ath_common *common = ath9k_hw_common(ah);
 822         bool prev_idle;
 823
 824         ath9k_deinit_channel_context(sc);
 825
 826         mutex_lock(&sc->mutex);
 827
 828         ath_cancel_work(sc);
 829
 830         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
 831                 ath_dbg(common, ANY, "Device not present\n");
 832                 mutex_unlock(&sc->mutex);
 833                 return;
 834         }
 835
 836         /* Ensure HW is awake when we try to shut it down. */
 837         ath9k_ps_wakeup(sc);
 838
 839         spin_lock_bh(&sc->sc_pcu_lock);
 840
 841         /* prevent tasklets to enable interrupts once we disable them */
 842         ah->imask &= ~ATH9K_INT_GLOBAL;
 843
 844         /* make sure h/w will not generate any interrupt
 845          * before setting the invalid flag. */
 846         ath9k_hw_disable_interrupts(ah);
 847
 848         spin_unlock_bh(&sc->sc_pcu_lock);
 849
 850         /* we can now sync irq and kill any running tasklets, since we already
 851          * disabled interrupts and not holding a spin lock */
 852         synchronize_irq(sc->irq);
 853         tasklet_kill(&sc->intr_tq);
 854         tasklet_kill(&sc->bcon_tasklet);
 855
 856         prev_idle = sc->ps_idle;
 857         sc->ps_idle = true;
 858
 859         spin_lock_bh(&sc->sc_pcu_lock);
 860
 861         if (ah->led_pin >= 0) {
 862                 ath9k_hw_set_gpio(ah, ah->led_pin,
 863                                   (ah->config.led_active_high) ? 0 : 1);
 864                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 865         }
 866
 867         ath_prepare_reset(sc);
 868
 869         if (sc->rx.frag) {
 870                 dev_kfree_skb_any(sc->rx.frag);
 871                 sc->rx.frag = NULL;
 872         }
 873
 874         if (!ah->curchan)
 875                 ah->curchan = ath9k_cmn_get_channel(hw, ah,
 876                                                     &sc->cur_chan->chandef);
 877
 878         ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 879
 880         set_bit(ATH_OP_INVALID, &common->op_flags);
 881
 882         ath9k_hw_phy_disable(ah);
 883
 884         ath9k_hw_configpcipowersave(ah, true);
 885
 886         spin_unlock_bh(&sc->sc_pcu_lock);
 887
 888         ath9k_ps_restore(sc);
 889
 890         sc->ps_idle = prev_idle;
 891
 892         mutex_unlock(&sc->mutex);
 893
 894         ath_dbg(common, CONFIG, "Driver halt\n");
 895 }
 896
 897 static bool ath9k_uses_beacons(int type)
 898 {
 899         switch (type) {
 900         case NL80211_IFTYPE_AP:
 901         case NL80211_IFTYPE_ADHOC:
 902         case NL80211_IFTYPE_MESH_POINT:
 903                 return true;
 904         default:
 905                 return false;
 906         }
 907 }
 908
 909 static void ath9k_vif_iter(struct ath9k_vif_iter_data *iter_data,
 910                            u8 *mac, struct ieee80211_vif *vif)
 911 {
 912         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
 913         int i;
 914
 915         if (iter_data->has_hw_macaddr) {
 916                 for (i = 0; i < ETH_ALEN; i++)
 917                         iter_data->mask[i] &=
 918                                 ~(iter_data->hw_macaddr[i] ^ mac[i]);
 919         } else {
 920                 memcpy(iter_data->hw_macaddr, mac, ETH_ALEN);
 921                 iter_data->has_hw_macaddr = true;
 922         }
 923
 924         if (!vif->bss_conf.use_short_slot)
 925                 iter_data->slottime = ATH9K_SLOT_TIME_20;
 926
 927         switch (vif->type) {
 928         case NL80211_IFTYPE_AP:
 929                 iter_data->naps++;
 930                 break;
 931         case NL80211_IFTYPE_STATION:
 932                 iter_data->nstations++;
 933                 if (avp->assoc && !iter_data->primary_sta)
 934                         iter_data->primary_sta = vif;
 935                 break;
 936         case NL80211_IFTYPE_OCB:
 937                 iter_data->nocbs++;
 938                 break;
 939         case NL80211_IFTYPE_ADHOC:
 940                 iter_data->nadhocs++;
 941                 if (vif->bss_conf.enable_beacon)
 942                         iter_data->beacons = true;
 943                 break;
 944         case NL80211_IFTYPE_MESH_POINT:
 945                 iter_data->nmeshes++;
 946                 if (vif->bss_conf.enable_beacon)
 947                         iter_data->beacons = true;
 948                 break;
 949         case NL80211_IFTYPE_WDS:
 950                 iter_data->nwds++;
 951                 break;
 952         default:
 953                 break;
 954         }
 955 }
 956
 957 static void ath9k_update_bssid_mask(struct ath_softc *sc,
 958                                     struct ath_chanctx *ctx,
 959                                     struct ath9k_vif_iter_data *iter_data)
 960 {
 961         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 962         struct ath_vif *avp;
 963         int i;
 964
 965         if (!ath9k_is_chanctx_enabled())
 966                 return;
 967
 968         list_for_each_entry(avp, &ctx->vifs, list) {
 969                 if (ctx->nvifs_assigned != 1)
 970                         continue;
 971
 972                 if (!avp->vif->p2p || !iter_data->has_hw_macaddr)
 973                         continue;
 974
 975                 ether_addr_copy(common->curbssid, avp->bssid);
 976
 977                 /* perm_addr will be used as the p2p device address. */
 978                 for (i = 0; i < ETH_ALEN; i++)
 979                         iter_data->mask[i] &=
 980                                 ~(iter_data->hw_macaddr[i] ^
 981                                   sc->hw->wiphy->perm_addr[i]);
 982         }
 983 }
 984
 985 /* Called with sc->mutex held. */
 986 void ath9k_calculate_iter_data(struct ath_softc *sc,
 987                                struct ath_chanctx *ctx,
 988                                struct ath9k_vif_iter_data *iter_data)
 989 {
 990         struct ath_vif *avp;
 991
 992         /*
 993          * The hardware will use primary station addr together with the
 994          * BSSID mask when matching addresses.
 995          */
 996         memset(iter_data, 0, sizeof(*iter_data));
 997         eth_broadcast_addr(iter_data->mask);
 998         iter_data->slottime = ATH9K_SLOT_TIME_9;
 999
1000         list_for_each_entry(avp, &ctx->vifs, list)
1001                 ath9k_vif_iter(iter_data, avp->vif->addr, avp->vif);
1002
1003         ath9k_update_bssid_mask(sc, ctx, iter_data);
1004 }
1005
1006 static void ath9k_set_assoc_state(struct ath_softc *sc,
1007                                   struct ieee80211_vif *vif, bool changed)
1008 {
1009         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1010         struct ath_vif *avp = (struct ath_vif *)vif->drv_priv;
1011         unsigned long flags;
1012
1013         set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1014
1015         ether_addr_copy(common->curbssid, avp->bssid);
1016         common->curaid = avp->aid;
1017         ath9k_hw_write_associd(sc->sc_ah);
1018
1019         if (changed) {
1020                 common->last_rssi = ATH_RSSI_DUMMY_MARKER;
1021                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
1022
1023                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1024                 sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
1025                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1026         }
1027
1028         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1029                 ath9k_mci_update_wlan_channels(sc, false);
1030
1031         ath_dbg(common, CONFIG,
1032                 "Primary Station interface: %pM, BSSID: %pM\n",
1033                 vif->addr, common->curbssid);
1034 }
1035
1036 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1037 static void ath9k_set_offchannel_state(struct ath_softc *sc)
1038 {
1039         struct ath_hw *ah = sc->sc_ah;
1040         struct ath_common *common = ath9k_hw_common(ah);
1041         struct ieee80211_vif *vif = NULL;
1042
1043         ath9k_ps_wakeup(sc);
1044
1045         if (sc->offchannel.state < ATH_OFFCHANNEL_ROC_START)
1046                 vif = sc->offchannel.scan_vif;
1047         else
1048                 vif = sc->offchannel.roc_vif;
1049
1050         if (WARN_ON(!vif))
1051                 goto exit;
1052
1053         eth_zero_addr(common->curbssid);
1054         eth_broadcast_addr(common->bssidmask);
1055         memcpy(common->macaddr, vif->addr, ETH_ALEN);
1056         common->curaid = 0;
1057         ah->opmode = vif->type;
1058         ah->imask &= ~ATH9K_INT_SWBA;
1059         ah->imask &= ~ATH9K_INT_TSFOOR;
1060         ah->slottime = ATH9K_SLOT_TIME_9;
1061
1062         ath_hw_setbssidmask(common);
1063         ath9k_hw_setopmode(ah);
1064         ath9k_hw_write_associd(sc->sc_ah);
1065         ath9k_hw_set_interrupts(ah);
1066         ath9k_hw_init_global_settings(ah);
1067
1068 exit:
1069         ath9k_ps_restore(sc);
1070 }
1071 #endif
1072
1073 /* Called with sc->mutex held. */
1074 void ath9k_calculate_summary_state(struct ath_softc *sc,
1075                                    struct ath_chanctx *ctx)
1076 {
1077         struct ath_hw *ah = sc->sc_ah;
1078         struct ath_common *common = ath9k_hw_common(ah);
1079         struct ath9k_vif_iter_data iter_data;
1080         struct ath_beacon_config *cur_conf;
1081
1082         ath_chanctx_check_active(sc, ctx);
1083
1084         if (ctx != sc->cur_chan)
1085                 return;
1086
1087 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1088         if (ctx == &sc->offchannel.chan)
1089                 return ath9k_set_offchannel_state(sc);
1090 #endif
1091
1092         ath9k_ps_wakeup(sc);
1093         ath9k_calculate_iter_data(sc, ctx, &iter_data);
1094
1095         if (iter_data.has_hw_macaddr)
1096                 memcpy(common->macaddr, iter_data.hw_macaddr, ETH_ALEN);
1097
1098         memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
1099         ath_hw_setbssidmask(common);
1100
1101         if (iter_data.naps > 0) {
1102                 cur_conf = &ctx->beacon;
1103                 ath9k_hw_set_tsfadjust(ah, true);
1104                 ah->opmode = NL80211_IFTYPE_AP;
1105                 if (cur_conf->enable_beacon)
1106                         iter_data.beacons = true;
1107         } else {
1108                 ath9k_hw_set_tsfadjust(ah, false);
1109
1110                 if (iter_data.nmeshes)
1111                         ah->opmode = NL80211_IFTYPE_MESH_POINT;
1112                 else if (iter_data.nocbs)
1113                         ah->opmode = NL80211_IFTYPE_OCB;
1114                 else if (iter_data.nwds)
1115                         ah->opmode = NL80211_IFTYPE_AP;
1116                 else if (iter_data.nadhocs)
1117                         ah->opmode = NL80211_IFTYPE_ADHOC;
1118                 else
1119                         ah->opmode = NL80211_IFTYPE_STATION;
1120         }
1121
1122         ath9k_hw_setopmode(ah);
1123
1124         ctx->switch_after_beacon = false;
1125         if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0)
1126                 ah->imask |= ATH9K_INT_TSFOOR;
1127         else {
1128                 ah->imask &= ~ATH9K_INT_TSFOOR;
1129                 if (iter_data.naps == 1 && iter_data.beacons)
1130                         ctx->switch_after_beacon = true;
1131         }
1132
1133         ah->imask &= ~ATH9K_INT_SWBA;
1134         if (ah->opmode == NL80211_IFTYPE_STATION) {
1135                 bool changed = (iter_data.primary_sta != ctx->primary_sta);
1136
1137                 if (iter_data.primary_sta) {
1138                         iter_data.beacons = true;
1139                         ath9k_set_assoc_state(sc, iter_data.primary_sta,
1140                                               changed);
1141                         ctx->primary_sta = iter_data.primary_sta;
1142                 } else {
1143                         ctx->primary_sta = NULL;
1144                         eth_zero_addr(common->curbssid);
1145                         common->curaid = 0;
1146                         ath9k_hw_write_associd(sc->sc_ah);
1147                         if (ath9k_hw_mci_is_enabled(sc->sc_ah))
1148                                 ath9k_mci_update_wlan_channels(sc, true);
1149                 }
1150         } else if (iter_data.beacons) {
1151                 ah->imask |= ATH9K_INT_SWBA;
1152         }
1153         ath9k_hw_set_interrupts(ah);
1154
1155         if (iter_data.beacons)
1156                 set_bit(ATH_OP_BEACONS, &common->op_flags);
1157         else
1158                 clear_bit(ATH_OP_BEACONS, &common->op_flags);
1159
1160         if (ah->slottime != iter_data.slottime) {
1161                 ah->slottime = iter_data.slottime;
1162                 ath9k_hw_init_global_settings(ah);
1163         }
1164
1165         if (iter_data.primary_sta)
1166                 set_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1167         else
1168                 clear_bit(ATH_OP_PRIM_STA_VIF, &common->op_flags);
1169
1170         ath_dbg(common, CONFIG,
1171                 "macaddr: %pM, bssid: %pM, bssidmask: %pM\n",
1172                 common->macaddr, common->curbssid, common->bssidmask);
1173
1174         ath9k_ps_restore(sc);
1175 }
1176
1177 static void ath9k_tpc_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
1178 {
1179         int *power = (int *)data;
1180
1181         if (*power < vif->bss_conf.txpower)
1182                 *power = vif->bss_conf.txpower;
1183 }
1184
1185 /* Called with sc->mutex held. */
1186 void ath9k_set_txpower(struct ath_softc *sc, struct ieee80211_vif *vif)
1187 {
1188         int power;
1189         struct ath_hw *ah = sc->sc_ah;
1190         struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
1191
1192         ath9k_ps_wakeup(sc);
1193         if (ah->tpc_enabled) {
1194                 power = (vif) ? vif->bss_conf.txpower : -1;
1195                 ieee80211_iterate_active_interfaces_atomic(
1196                                 sc->hw, IEEE80211_IFACE_ITER_RESUME_ALL,
1197                                 ath9k_tpc_vif_iter, &power);
1198                 if (power == -1)
1199                         power = sc->hw->conf.power_level;
1200         } else {
1201                 power = sc->hw->conf.power_level;
1202         }
1203         sc->cur_chan->txpower = 2 * power;
1204         ath9k_hw_set_txpowerlimit(ah, sc->cur_chan->txpower, false);
1205         sc->cur_chan->cur_txpower = reg->max_power_level;
1206         ath9k_ps_restore(sc);
1207 }
1208
1209 static void ath9k_assign_hw_queues(struct ieee80211_hw *hw,
1210                                    struct ieee80211_vif *vif)
1211 {
1212         int i;
1213
1214         if (!ath9k_is_chanctx_enabled())
1215                 return;
1216
1217         for (i = 0; i < IEEE80211_NUM_ACS; i++)
1218                 vif->hw_queue[i] = i;
1219
1220         if (vif->type == NL80211_IFTYPE_AP ||
1221             vif->type == NL80211_IFTYPE_MESH_POINT)
1222                 vif->cab_queue = hw->queues - 2;
1223         else
1224                 vif->cab_queue = IEEE80211_INVAL_HW_QUEUE;
1225 }
1226
1227 static int ath9k_add_interface(struct ieee80211_hw *hw,
1228                                struct ieee80211_vif *vif)
1229 {
1230         struct ath_softc *sc = hw->priv;
1231         struct ath_hw *ah = sc->sc_ah;
1232         struct ath_common *common = ath9k_hw_common(ah);
1233         struct ath_vif *avp = (void *)vif->drv_priv;
1234         struct ath_node *an = &avp->mcast_node;
1235
1236         mutex_lock(&sc->mutex);
1237
1238         if (config_enabled(CONFIG_ATH9K_TX99)) {
1239                 if (sc->cur_chan->nvifs >= 1) {
1240                         mutex_unlock(&sc->mutex);
1241                         return -EOPNOTSUPP;
1242                 }
1243                 sc->tx99_vif = vif;
1244         }
1245
1246         ath_dbg(common, CONFIG, "Attach a VIF of type: %d\n", vif->type);
1247         sc->cur_chan->nvifs++;
1248
1249         if (ath9k_uses_beacons(vif->type))
1250                 ath9k_beacon_assign_slot(sc, vif);
1251
1252         avp->vif = vif;
1253         if (!ath9k_is_chanctx_enabled()) {
1254                 avp->chanctx = sc->cur_chan;
1255                 list_add_tail(&avp->list, &avp->chanctx->vifs);
1256         }
1257
1258         ath9k_calculate_summary_state(sc, avp->chanctx);
1259
1260         ath9k_assign_hw_queues(hw, vif);
1261
1262         ath9k_set_txpower(sc, vif);
1263
1264         an->sc = sc;
1265         an->sta = NULL;
1266         an->vif = vif;
1267         an->no_ps_filter = true;
1268         ath_tx_node_init(sc, an);
1269
1270         mutex_unlock(&sc->mutex);
1271         return 0;
1272 }
1273
1274 static int ath9k_change_interface(struct ieee80211_hw *hw,
1275                                   struct ieee80211_vif *vif,
1276                                   enum nl80211_iftype new_type,
1277                                   bool p2p)
1278 {
1279         struct ath_softc *sc = hw->priv;
1280         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1281         struct ath_vif *avp = (void *)vif->drv_priv;
1282
1283         mutex_lock(&sc->mutex);
1284
1285         if (config_enabled(CONFIG_ATH9K_TX99)) {
1286                 mutex_unlock(&sc->mutex);
1287                 return -EOPNOTSUPP;
1288         }
1289
1290         ath_dbg(common, CONFIG, "Change Interface\n");
1291
1292         if (ath9k_uses_beacons(vif->type))
1293                 ath9k_beacon_remove_slot(sc, vif);
1294
1295         vif->type = new_type;
1296         vif->p2p = p2p;
1297
1298         if (ath9k_uses_beacons(vif->type))
1299                 ath9k_beacon_assign_slot(sc, vif);
1300
1301         ath9k_assign_hw_queues(hw, vif);
1302         ath9k_calculate_summary_state(sc, avp->chanctx);
1303
1304         ath9k_set_txpower(sc, vif);
1305
1306         mutex_unlock(&sc->mutex);
1307         return 0;
1308 }
1309
1310 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1311                                    struct ieee80211_vif *vif)
1312 {
1313         struct ath_softc *sc = hw->priv;
1314         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1315         struct ath_vif *avp = (void *)vif->drv_priv;
1316
1317         ath_dbg(common, CONFIG, "Detach Interface\n");
1318
1319         mutex_lock(&sc->mutex);
1320
1321         ath9k_p2p_remove_vif(sc, vif);
1322
1323         sc->cur_chan->nvifs--;
1324         sc->tx99_vif = NULL;
1325         if (!ath9k_is_chanctx_enabled())
1326                 list_del(&avp->list);
1327
1328         if (ath9k_uses_beacons(vif->type))
1329                 ath9k_beacon_remove_slot(sc, vif);
1330
1331         ath_tx_node_cleanup(sc, &avp->mcast_node);
1332
1333         ath9k_calculate_summary_state(sc, avp->chanctx);
1334
1335         ath9k_set_txpower(sc, NULL);
1336
1337         mutex_unlock(&sc->mutex);
1338 }
1339
1340 static void ath9k_enable_ps(struct ath_softc *sc)
1341 {
1342         struct ath_hw *ah = sc->sc_ah;
1343         struct ath_common *common = ath9k_hw_common(ah);
1344
1345         if (config_enabled(CONFIG_ATH9K_TX99))
1346                 return;
1347
1348         sc->ps_enabled = true;
1349         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1350                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1351                         ah->imask |= ATH9K_INT_TIM_TIMER;
1352                         ath9k_hw_set_interrupts(ah);
1353                 }
1354                 ath9k_hw_setrxabort(ah, 1);
1355         }
1356         ath_dbg(common, PS, "PowerSave enabled\n");
1357 }
1358
1359 static void ath9k_disable_ps(struct ath_softc *sc)
1360 {
1361         struct ath_hw *ah = sc->sc_ah;
1362         struct ath_common *common = ath9k_hw_common(ah);
1363
1364         if (config_enabled(CONFIG_ATH9K_TX99))
1365                 return;
1366
1367         sc->ps_enabled = false;
1368         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1369         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1370                 ath9k_hw_setrxabort(ah, 0);
1371                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1372                                   PS_WAIT_FOR_CAB |
1373                                   PS_WAIT_FOR_PSPOLL_DATA |
1374                                   PS_WAIT_FOR_TX_ACK);
1375                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1376                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1377                         ath9k_hw_set_interrupts(ah);
1378                 }
1379         }
1380         ath_dbg(common, PS, "PowerSave disabled\n");
1381 }
1382
1383 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1384 {
1385         struct ath_softc *sc = hw->priv;
1386         struct ath_hw *ah = sc->sc_ah;
1387         struct ath_common *common = ath9k_hw_common(ah);
1388         struct ieee80211_conf *conf = &hw->conf;
1389         struct ath_chanctx *ctx = sc->cur_chan;
1390
1391         ath9k_ps_wakeup(sc);
1392         mutex_lock(&sc->mutex);
1393
1394         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1395                 sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1396                 if (sc->ps_idle) {
1397                         ath_cancel_work(sc);
1398                         ath9k_stop_btcoex(sc);
1399                 } else {
1400                         ath9k_start_btcoex(sc);
1401                         /*
1402                          * The chip needs a reset to properly wake up from
1403                          * full sleep
1404                          */
1405                         ath_chanctx_set_channel(sc, ctx, &ctx->chandef);
1406                 }
1407         }
1408
1409         /*
1410          * We just prepare to enable PS. We have to wait until our AP has
1411          * ACK'd our null data frame to disable RX otherwise we'll ignore
1412          * those ACKs and end up retransmitting the same null data frames.
1413          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1414          */
1415         if (changed & IEEE80211_CONF_CHANGE_PS) {
1416                 unsigned long flags;
1417                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1418                 if (conf->flags & IEEE80211_CONF_PS)
1419                         ath9k_enable_ps(sc);
1420                 else
1421                         ath9k_disable_ps(sc);
1422                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1423         }
1424
1425         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1426                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1427                         ath_dbg(common, CONFIG, "Monitor mode is enabled\n");
1428                         sc->sc_ah->is_monitoring = true;
1429                 } else {
1430                         ath_dbg(common, CONFIG, "Monitor mode is disabled\n");
1431                         sc->sc_ah->is_monitoring = false;
1432                 }
1433         }
1434
1435         if (!ath9k_is_chanctx_enabled() && (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
1436                 ctx->offchannel = !!(conf->flags & IEEE80211_CONF_OFFCHANNEL);
1437                 ath_chanctx_set_channel(sc, ctx, &hw->conf.chandef);
1438         }
1439
1440         if (changed & IEEE80211_CONF_CHANGE_POWER)
1441                 ath9k_set_txpower(sc, NULL);
1442
1443         mutex_unlock(&sc->mutex);
1444         ath9k_ps_restore(sc);
1445
1446         return 0;
1447 }
1448
1449 #define SUPPORTED_FILTERS                       \
1450         (FIF_ALLMULTI |                         \
1451         FIF_CONTROL |                           \
1452         FIF_PSPOLL |                            \
1453         FIF_OTHER_BSS |                         \
1454         FIF_BCN_PRBRESP_PROMISC |               \
1455         FIF_PROBE_REQ |                         \
1456         FIF_FCSFAIL)
1457
1458 /* FIXME: sc->sc_full_reset ? */
1459 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1460                                    unsigned int changed_flags,
1461                                    unsigned int *total_flags,
1462                                    u64 multicast)
1463 {
1464         struct ath_softc *sc = hw->priv;
1465         struct ath_chanctx *ctx;
1466         u32 rfilt;
1467
1468         changed_flags &= SUPPORTED_FILTERS;
1469         *total_flags &= SUPPORTED_FILTERS;
1470
1471         spin_lock_bh(&sc->chan_lock);
1472         ath_for_each_chanctx(sc, ctx)
1473                 ctx->rxfilter = *total_flags;
1474 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
1475         sc->offchannel.chan.rxfilter = *total_flags;
1476 #endif
1477         spin_unlock_bh(&sc->chan_lock);
1478
1479         ath9k_ps_wakeup(sc);
1480         rfilt = ath_calcrxfilter(sc);
1481         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1482         ath9k_ps_restore(sc);
1483
1484         ath_dbg(ath9k_hw_common(sc->sc_ah), CONFIG, "Set HW RX filter: 0x%x\n",
1485                 rfilt);
1486 }
1487
1488 static int ath9k_sta_add(struct ieee80211_hw *hw,
1489                          struct ieee80211_vif *vif,
1490                          struct ieee80211_sta *sta)
1491 {
1492         struct ath_softc *sc = hw->priv;
1493         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1494         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1495         struct ieee80211_key_conf ps_key = { };
1496         int key;
1497
1498         ath_node_attach(sc, sta, vif);
1499
1500         if (vif->type != NL80211_IFTYPE_AP &&
1501             vif->type != NL80211_IFTYPE_AP_VLAN)
1502                 return 0;
1503
1504         key = ath_key_config(common, vif, sta, &ps_key);
1505         if (key > 0) {
1506                 an->ps_key = key;
1507                 an->key_idx[0] = key;
1508         }
1509
1510         return 0;
1511 }
1512
1513 static void ath9k_del_ps_key(struct ath_softc *sc,
1514                              struct ieee80211_vif *vif,
1515                              struct ieee80211_sta *sta)
1516 {
1517         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1518         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1519         struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
1520
1521         if (!an->ps_key)
1522             return;
1523
1524         ath_key_delete(common, &ps_key);
1525         an->ps_key = 0;
1526         an->key_idx[0] = 0;
1527 }
1528
1529 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1530                             struct ieee80211_vif *vif,
1531                             struct ieee80211_sta *sta)
1532 {
1533         struct ath_softc *sc = hw->priv;
1534
1535         ath9k_del_ps_key(sc, vif, sta);
1536         ath_node_detach(sc, sta);
1537
1538         return 0;
1539 }
1540
1541 static int ath9k_sta_state(struct ieee80211_hw *hw,
1542                            struct ieee80211_vif *vif,
1543                            struct ieee80211_sta *sta,
1544                            enum ieee80211_sta_state old_state,
1545                            enum ieee80211_sta_state new_state)
1546 {
1547         struct ath_softc *sc = hw->priv;
1548         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1549         int ret = 0;
1550
1551         if (old_state == IEEE80211_STA_NOTEXIST &&
1552             new_state == IEEE80211_STA_NONE) {
1553                 ret = ath9k_sta_add(hw, vif, sta);
1554                 ath_dbg(common, CONFIG,
1555                         "Add station: %pM\n", sta->addr);
1556         } else if (old_state == IEEE80211_STA_NONE &&
1557                    new_state == IEEE80211_STA_NOTEXIST) {
1558                 ret = ath9k_sta_remove(hw, vif, sta);
1559                 ath_dbg(common, CONFIG,
1560                         "Remove station: %pM\n", sta->addr);
1561         }
1562
1563         if (ath9k_is_chanctx_enabled()) {
1564                 if (vif->type == NL80211_IFTYPE_STATION) {
1565                         if (old_state == IEEE80211_STA_ASSOC &&
1566                             new_state == IEEE80211_STA_AUTHORIZED)
1567                                 ath_chanctx_event(sc, vif,
1568                                                   ATH_CHANCTX_EVENT_AUTHORIZED);
1569                 }
1570         }
1571
1572         return ret;
1573 }
1574
1575 static void ath9k_sta_set_tx_filter(struct ath_hw *ah,
1576                                     struct ath_node *an,
1577                                     bool set)
1578 {
1579         int i;
1580
1581         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1582                 if (!an->key_idx[i])
1583                         continue;
1584                 ath9k_hw_set_tx_filter(ah, an->key_idx[i], set);
1585         }
1586 }
1587
1588 static void ath9k_sta_notify(struct ieee80211_hw *hw,
1589                          struct ieee80211_vif *vif,
1590                          enum sta_notify_cmd cmd,
1591                          struct ieee80211_sta *sta)
1592 {
1593         struct ath_softc *sc = hw->priv;
1594         struct ath_node *an = (struct ath_node *) sta->drv_priv;
1595
1596         switch (cmd) {
1597         case STA_NOTIFY_SLEEP:
1598                 an->sleeping = true;
1599                 ath_tx_aggr_sleep(sta, sc, an);
1600                 ath9k_sta_set_tx_filter(sc->sc_ah, an, true);
1601                 break;
1602         case STA_NOTIFY_AWAKE:
1603                 ath9k_sta_set_tx_filter(sc->sc_ah, an, false);
1604                 an->sleeping = false;
1605                 ath_tx_aggr_wakeup(sc, an);
1606                 break;
1607         }
1608 }
1609
1610 static int ath9k_conf_tx(struct ieee80211_hw *hw,
1611                          struct ieee80211_vif *vif, u16 queue,
1612                          const struct ieee80211_tx_queue_params *params)
1613 {
1614         struct ath_softc *sc = hw->priv;
1615         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1616         struct ath_txq *txq;
1617         struct ath9k_tx_queue_info qi;
1618         int ret = 0;
1619
1620         if (queue >= IEEE80211_NUM_ACS)
1621                 return 0;
1622
1623         txq = sc->tx.txq_map[queue];
1624
1625         ath9k_ps_wakeup(sc);
1626         mutex_lock(&sc->mutex);
1627
1628         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1629
1630         qi.tqi_aifs = params->aifs;
1631         qi.tqi_cwmin = params->cw_min;
1632         qi.tqi_cwmax = params->cw_max;
1633         qi.tqi_burstTime = params->txop * 32;
1634
1635         ath_dbg(common, CONFIG,
1636                 "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1637                 queue, txq->axq_qnum, params->aifs, params->cw_min,
1638                 params->cw_max, params->txop);
1639
1640         ath_update_max_aggr_framelen(sc, queue, qi.tqi_burstTime);
1641         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1642         if (ret)
1643                 ath_err(common, "TXQ Update failed\n");
1644
1645         mutex_unlock(&sc->mutex);
1646         ath9k_ps_restore(sc);
1647
1648         return ret;
1649 }
1650
1651 static int ath9k_set_key(struct ieee80211_hw *hw,
1652                          enum set_key_cmd cmd,
1653                          struct ieee80211_vif *vif,
1654                          struct ieee80211_sta *sta,
1655                          struct ieee80211_key_conf *key)
1656 {
1657         struct ath_softc *sc = hw->priv;
1658         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1659         struct ath_node *an = NULL;
1660         int ret = 0, i;
1661
1662         if (ath9k_modparam_nohwcrypt)
1663                 return -ENOSPC;
1664
1665         if ((vif->type == NL80211_IFTYPE_ADHOC ||
1666              vif->type == NL80211_IFTYPE_MESH_POINT) &&
1667             (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
1668              key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
1669             !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
1670                 /*
1671                  * For now, disable hw crypto for the RSN IBSS group keys. This
1672                  * could be optimized in the future to use a modified key cache
1673                  * design to support per-STA RX GTK, but until that gets
1674                  * implemented, use of software crypto for group addressed
1675                  * frames is a acceptable to allow RSN IBSS to be used.
1676                  */
1677                 return -EOPNOTSUPP;
1678         }
1679
1680         mutex_lock(&sc->mutex);
1681         ath9k_ps_wakeup(sc);
1682         ath_dbg(common, CONFIG, "Set HW Key %d\n", cmd);
1683         if (sta)
1684                 an = (struct ath_node *)sta->drv_priv;
1685
1686         switch (cmd) {
1687         case SET_KEY:
1688                 if (sta)
1689                         ath9k_del_ps_key(sc, vif, sta);
1690
1691                 key->hw_key_idx = 0;
1692                 ret = ath_key_config(common, vif, sta, key);
1693                 if (ret >= 0) {
1694                         key->hw_key_idx = ret;
1695                         /* push IV and Michael MIC generation to stack */
1696                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1697                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1698                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1699                         if (sc->sc_ah->sw_mgmt_crypto_tx &&
1700                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1701                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT_TX;
1702                         ret = 0;
1703                 }
1704                 if (an && key->hw_key_idx) {
1705                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1706                                 if (an->key_idx[i])
1707                                         continue;
1708                                 an->key_idx[i] = key->hw_key_idx;
1709                                 break;
1710                         }
1711                         WARN_ON(i == ARRAY_SIZE(an->key_idx));
1712                 }
1713                 break;
1714         case DISABLE_KEY:
1715                 ath_key_delete(common, key);
1716                 if (an) {
1717                         for (i = 0; i < ARRAY_SIZE(an->key_idx); i++) {
1718                                 if (an->key_idx[i] != key->hw_key_idx)
1719                                         continue;
1720                                 an->key_idx[i] = 0;
1721                                 break;
1722                         }
1723                 }
1724                 key->hw_key_idx = 0;
1725                 break;
1726         default:
1727                 ret = -EINVAL;
1728         }
1729
1730         ath9k_ps_restore(sc);
1731         mutex_unlock(&sc->mutex);
1732
1733         return ret;
1734 }
1735
1736 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1737                                    struct ieee80211_vif *vif,
1738                                    struct ieee80211_bss_conf *bss_conf,
1739                                    u32 changed)
1740 {
1741 #define CHECK_ANI                               \
1742         (BSS_CHANGED_ASSOC |                    \
1743          BSS_CHANGED_IBSS |                     \
1744          BSS_CHANGED_BEACON_ENABLED)
1745
1746         struct ath_softc *sc = hw->priv;
1747         struct ath_hw *ah = sc->sc_ah;
1748         struct ath_common *common = ath9k_hw_common(ah);
1749         struct ath_vif *avp = (void *)vif->drv_priv;
1750         int slottime;
1751
1752         ath9k_ps_wakeup(sc);
1753         mutex_lock(&sc->mutex);
1754
1755         if (changed & BSS_CHANGED_ASSOC) {
1756                 ath_dbg(common, CONFIG, "BSSID %pM Changed ASSOC %d\n",
1757                         bss_conf->bssid, bss_conf->assoc);
1758
1759                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1760                 avp->aid = bss_conf->aid;
1761                 avp->assoc = bss_conf->assoc;
1762
1763                 ath9k_calculate_summary_state(sc, avp->chanctx);
1764         }
1765
1766         if ((changed & BSS_CHANGED_IBSS) ||
1767               (changed & BSS_CHANGED_OCB)) {
1768                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1769                 common->curaid = bss_conf->aid;
1770                 ath9k_hw_write_associd(sc->sc_ah);
1771         }
1772
1773         if ((changed & BSS_CHANGED_BEACON_ENABLED) ||
1774             (changed & BSS_CHANGED_BEACON_INT) ||
1775             (changed & BSS_CHANGED_BEACON_INFO)) {
1776                 ath9k_beacon_config(sc, vif, changed);
1777                 if (changed & BSS_CHANGED_BEACON_ENABLED)
1778                         ath9k_calculate_summary_state(sc, avp->chanctx);
1779         }
1780
1781         if ((avp->chanctx == sc->cur_chan) &&
1782             (changed & BSS_CHANGED_ERP_SLOT)) {
1783                 if (bss_conf->use_short_slot)
1784                         slottime = 9;
1785                 else
1786                         slottime = 20;
1787                 if (vif->type == NL80211_IFTYPE_AP) {
1788                         /*
1789                          * Defer update, so that connected stations can adjust
1790                          * their settings at the same time.
1791                          * See beacon.c for more details
1792                          */
1793                         sc->beacon.slottime = slottime;
1794                         sc->beacon.updateslot = UPDATE;
1795                 } else {
1796                         ah->slottime = slottime;
1797                         ath9k_hw_init_global_settings(ah);
1798                 }
1799         }
1800
1801         if (changed & BSS_CHANGED_P2P_PS)
1802                 ath9k_p2p_bss_info_changed(sc, vif);
1803
1804         if (changed & CHECK_ANI)
1805                 ath_check_ani(sc);
1806
1807         if (changed & BSS_CHANGED_TXPOWER) {
1808                 ath_dbg(common, CONFIG, "vif %pM power %d dbm power_type %d\n",
1809                         vif->addr, bss_conf->txpower, bss_conf->txpower_type);
1810                 ath9k_set_txpower(sc, vif);
1811         }
1812
1813         mutex_unlock(&sc->mutex);
1814         ath9k_ps_restore(sc);
1815
1816 #undef CHECK_ANI
1817 }
1818
1819 static u64 ath9k_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1820 {
1821         struct ath_softc *sc = hw->priv;
1822         u64 tsf;
1823
1824         mutex_lock(&sc->mutex);
1825         ath9k_ps_wakeup(sc);
1826         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1827         ath9k_ps_restore(sc);
1828         mutex_unlock(&sc->mutex);
1829
1830         return tsf;
1831 }
1832
1833 static void ath9k_set_tsf(struct ieee80211_hw *hw,
1834                           struct ieee80211_vif *vif,
1835                           u64 tsf)
1836 {
1837         struct ath_softc *sc = hw->priv;
1838
1839         mutex_lock(&sc->mutex);
1840         ath9k_ps_wakeup(sc);
1841         ath9k_hw_settsf64(sc->sc_ah, tsf);
1842         ath9k_ps_restore(sc);
1843         mutex_unlock(&sc->mutex);
1844 }
1845
1846 static void ath9k_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1847 {
1848         struct ath_softc *sc = hw->priv;
1849
1850         mutex_lock(&sc->mutex);
1851
1852         ath9k_ps_wakeup(sc);
1853         ath9k_hw_reset_tsf(sc->sc_ah);
1854         ath9k_ps_restore(sc);
1855
1856         mutex_unlock(&sc->mutex);
1857 }
1858
1859 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1860                               struct ieee80211_vif *vif,
1861                               struct ieee80211_ampdu_params *params)
1862 {
1863         struct ath_softc *sc = hw->priv;
1864         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1865         bool flush = false;
1866         int ret = 0;
1867         struct ieee80211_sta *sta = params->sta;
1868         enum ieee80211_ampdu_mlme_action action = params->action;
1869         u16 tid = params->tid;
1870         u16 *ssn = &params->ssn;
1871
1872         mutex_lock(&sc->mutex);
1873
1874         switch (action) {
1875         case IEEE80211_AMPDU_RX_START:
1876                 break;
1877         case IEEE80211_AMPDU_RX_STOP:
1878                 break;
1879         case IEEE80211_AMPDU_TX_START:
1880                 if (ath9k_is_chanctx_enabled()) {
1881                         if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
1882                                 ret = -EBUSY;
1883                                 break;
1884                         }
1885                 }
1886                 ath9k_ps_wakeup(sc);
1887                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
1888                 if (!ret)
1889                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1890                 ath9k_ps_restore(sc);
1891                 break;
1892         case IEEE80211_AMPDU_TX_STOP_FLUSH:
1893         case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
1894                 flush = true;
1895         case IEEE80211_AMPDU_TX_STOP_CONT:
1896                 ath9k_ps_wakeup(sc);
1897                 ath_tx_aggr_stop(sc, sta, tid);
1898                 if (!flush)
1899                         ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1900                 ath9k_ps_restore(sc);
1901                 break;
1902         case IEEE80211_AMPDU_TX_OPERATIONAL:
1903                 ath9k_ps_wakeup(sc);
1904                 ath_tx_aggr_resume(sc, sta, tid);
1905                 ath9k_ps_restore(sc);
1906                 break;
1907         default:
1908                 ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
1909         }
1910
1911         mutex_unlock(&sc->mutex);
1912
1913         return ret;
1914 }
1915
1916 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
1917                              struct survey_info *survey)
1918 {
1919         struct ath_softc *sc = hw->priv;
1920         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1921         struct ieee80211_supported_band *sband;
1922         struct ieee80211_channel *chan;
1923         int pos;
1924
1925         if (config_enabled(CONFIG_ATH9K_TX99))
1926                 return -EOPNOTSUPP;
1927
1928         spin_lock_bh(&common->cc_lock);
1929         if (idx == 0)
1930                 ath_update_survey_stats(sc);
1931
1932         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
1933         if (sband && idx >= sband->n_channels) {
1934                 idx -= sband->n_channels;
1935                 sband = NULL;
1936         }
1937
1938         if (!sband)
1939                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
1940
1941         if (!sband || idx >= sband->n_channels) {
1942                 spin_unlock_bh(&common->cc_lock);
1943                 return -ENOENT;
1944         }
1945
1946         chan = &sband->channels[idx];
1947         pos = chan->hw_value;
1948         memcpy(survey, &sc->survey[pos], sizeof(*survey));
1949         survey->channel = chan;
1950         spin_unlock_bh(&common->cc_lock);
1951
1952         return 0;
1953 }
1954
1955 static void ath9k_enable_dynack(struct ath_softc *sc)
1956 {
1957 #ifdef CONFIG_ATH9K_DYNACK
1958         u32 rfilt;
1959         struct ath_hw *ah = sc->sc_ah;
1960
1961         ath_dynack_reset(ah);
1962
1963         ah->dynack.enabled = true;
1964         rfilt = ath_calcrxfilter(sc);
1965         ath9k_hw_setrxfilter(ah, rfilt);
1966 #endif
1967 }
1968
1969 static void ath9k_set_coverage_class(struct ieee80211_hw *hw,
1970                                      s16 coverage_class)
1971 {
1972         struct ath_softc *sc = hw->priv;
1973         struct ath_hw *ah = sc->sc_ah;
1974
1975         if (config_enabled(CONFIG_ATH9K_TX99))
1976                 return;
1977
1978         mutex_lock(&sc->mutex);
1979
1980         if (coverage_class >= 0) {
1981                 ah->coverage_class = coverage_class;
1982                 if (ah->dynack.enabled) {
1983                         u32 rfilt;
1984
1985                         ah->dynack.enabled = false;
1986                         rfilt = ath_calcrxfilter(sc);
1987                         ath9k_hw_setrxfilter(ah, rfilt);
1988                 }
1989                 ath9k_ps_wakeup(sc);
1990                 ath9k_hw_init_global_settings(ah);
1991                 ath9k_ps_restore(sc);
1992         } else if (!ah->dynack.enabled) {
1993                 ath9k_enable_dynack(sc);
1994         }
1995
1996         mutex_unlock(&sc->mutex);
1997 }
1998
1999 static bool ath9k_has_tx_pending(struct ath_softc *sc,
2000                                  bool sw_pending)
2001 {
2002         int i, npend = 0;
2003
2004         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2005                 if (!ATH_TXQ_SETUP(sc, i))
2006                         continue;
2007
2008                 npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i],
2009                                                  sw_pending);
2010                 if (npend)
2011                         break;
2012         }
2013
2014         return !!npend;
2015 }
2016
2017 static void ath9k_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2018                         u32 queues, bool drop)
2019 {
2020         struct ath_softc *sc = hw->priv;
2021         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2022
2023         if (ath9k_is_chanctx_enabled()) {
2024                 if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2025                         goto flush;
2026
2027                 /*
2028                  * If MCC is active, extend the flush timeout
2029                  * and wait for the HW/SW queues to become
2030                  * empty. This needs to be done outside the
2031                  * sc->mutex lock to allow the channel scheduler
2032                  * to switch channel contexts.
2033                  *
2034                  * The vif queues have been stopped in mac80211,
2035                  * so there won't be any incoming frames.
2036                  */
2037                 __ath9k_flush(hw, queues, drop, true, true);
2038                 return;
2039         }
2040 flush:
2041         mutex_lock(&sc->mutex);
2042         __ath9k_flush(hw, queues, drop, true, false);
2043         mutex_unlock(&sc->mutex);
2044 }
2045
2046 void __ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop,
2047                    bool sw_pending, bool timeout_override)
2048 {
2049         struct ath_softc *sc = hw->priv;
2050         struct ath_hw *ah = sc->sc_ah;
2051         struct ath_common *common = ath9k_hw_common(ah);
2052         int timeout;
2053         bool drain_txq;
2054
2055         cancel_delayed_work_sync(&sc->tx_complete_work);
2056
2057         if (ah->ah_flags & AH_UNPLUGGED) {
2058                 ath_dbg(common, ANY, "Device has been unplugged!\n");
2059                 return;
2060         }
2061
2062         if (test_bit(ATH_OP_INVALID, &common->op_flags)) {
2063                 ath_dbg(common, ANY, "Device not present\n");
2064                 return;
2065         }
2066
2067         spin_lock_bh(&sc->chan_lock);
2068         if (timeout_override)
2069                 timeout = HZ / 5;
2070         else
2071                 timeout = sc->cur_chan->flush_timeout;
2072         spin_unlock_bh(&sc->chan_lock);
2073
2074         ath_dbg(common, CHAN_CTX,
2075                 "Flush timeout: %d\n", jiffies_to_msecs(timeout));
2076
2077         if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc, sw_pending),
2078                                timeout) > 0)
2079                 drop = false;
2080
2081         if (drop) {
2082                 ath9k_ps_wakeup(sc);
2083                 spin_lock_bh(&sc->sc_pcu_lock);
2084                 drain_txq = ath_drain_all_txq(sc);
2085                 spin_unlock_bh(&sc->sc_pcu_lock);
2086
2087                 if (!drain_txq)
2088                         ath_reset(sc, NULL);
2089
2090                 ath9k_ps_restore(sc);
2091         }
2092
2093         ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
2094 }
2095
2096 static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
2097 {
2098         struct ath_softc *sc = hw->priv;
2099
2100         return ath9k_has_tx_pending(sc, true);
2101 }
2102
2103 static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
2104 {
2105         struct ath_softc *sc = hw->priv;
2106         struct ath_hw *ah = sc->sc_ah;
2107         struct ieee80211_vif *vif;
2108         struct ath_vif *avp;
2109         struct ath_buf *bf;
2110         struct ath_tx_status ts;
2111         bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA);
2112         int status;
2113
2114         vif = sc->beacon.bslot[0];
2115         if (!vif)
2116                 return 0;
2117
2118         if (!vif->bss_conf.enable_beacon)
2119                 return 0;
2120
2121         avp = (void *)vif->drv_priv;
2122
2123         if (!sc->beacon.tx_processed && !edma) {
2124                 tasklet_disable(&sc->bcon_tasklet);
2125
2126                 bf = avp->av_bcbuf;
2127                 if (!bf || !bf->bf_mpdu)
2128                         goto skip;
2129
2130                 status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
2131                 if (status == -EINPROGRESS)
2132                         goto skip;
2133
2134                 sc->beacon.tx_processed = true;
2135                 sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
2136
2137 skip:
2138                 tasklet_enable(&sc->bcon_tasklet);
2139         }
2140
2141         return sc->beacon.tx_last;
2142 }
2143
2144 static int ath9k_get_stats(struct ieee80211_hw *hw,
2145                            struct ieee80211_low_level_stats *stats)
2146 {
2147         struct ath_softc *sc = hw->priv;
2148         struct ath_hw *ah = sc->sc_ah;
2149         struct ath9k_mib_stats *mib_stats = &ah->ah_mibStats;
2150
2151         stats->dot11ACKFailureCount = mib_stats->ackrcv_bad;
2152         stats->dot11RTSFailureCount = mib_stats->rts_bad;
2153         stats->dot11FCSErrorCount = mib_stats->fcs_bad;
2154         stats->dot11RTSSuccessCount = mib_stats->rts_good;
2155         return 0;
2156 }
2157
2158 static u32 fill_chainmask(u32 cap, u32 new)
2159 {
2160         u32 filled = 0;
2161         int i;
2162
2163         for (i = 0; cap && new; i++, cap >>= 1) {
2164                 if (!(cap & BIT(0)))
2165                         continue;
2166
2167                 if (new & BIT(0))
2168                         filled |= BIT(i);
2169
2170                 new >>= 1;
2171         }
2172
2173         return filled;
2174 }
2175
2176 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
2177 {
2178         if (AR_SREV_9300_20_OR_LATER(ah))
2179                 return true;
2180
2181         switch (val & 0x7) {
2182         case 0x1:
2183         case 0x3:
2184         case 0x7:
2185                 return true;
2186         case 0x2:
2187                 return (ah->caps.rx_chainmask == 1);
2188         default:
2189                 return false;
2190         }
2191 }
2192
2193 static int ath9k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
2194 {
2195         struct ath_softc *sc = hw->priv;
2196         struct ath_hw *ah = sc->sc_ah;
2197
2198         if (ah->caps.rx_chainmask != 1)
2199                 rx_ant |= tx_ant;
2200
2201         if (!validate_antenna_mask(ah, rx_ant) || !tx_ant)
2202                 return -EINVAL;
2203
2204         sc->ant_rx = rx_ant;
2205         sc->ant_tx = tx_ant;
2206
2207         if (ah->caps.rx_chainmask == 1)
2208                 return 0;
2209
2210         /* AR9100 runs into calibration issues if not all rx chains are enabled */
2211         if (AR_SREV_9100(ah))
2212                 ah->rxchainmask = 0x7;
2213         else
2214                 ah->rxchainmask = fill_chainmask(ah->caps.rx_chainmask, rx_ant);
2215
2216         ah->txchainmask = fill_chainmask(ah->caps.tx_chainmask, tx_ant);
2217         ath9k_cmn_reload_chainmask(ah);
2218
2219         return 0;
2220 }
2221
2222 static int ath9k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
2223 {
2224         struct ath_softc *sc = hw->priv;
2225
2226         *tx_ant = sc->ant_tx;
2227         *rx_ant = sc->ant_rx;
2228         return 0;
2229 }
2230
2231 static void ath9k_sw_scan_start(struct ieee80211_hw *hw,
2232                                 struct ieee80211_vif *vif,
2233                                 const u8 *mac_addr)
2234 {
2235         struct ath_softc *sc = hw->priv;
2236         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2237         set_bit(ATH_OP_SCANNING, &common->op_flags);
2238 }
2239
2240 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw,
2241                                    struct ieee80211_vif *vif)
2242 {
2243         struct ath_softc *sc = hw->priv;
2244         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2245         clear_bit(ATH_OP_SCANNING, &common->op_flags);
2246 }
2247
2248 #ifdef CONFIG_ATH9K_CHANNEL_CONTEXT
2249
2250 static void ath9k_cancel_pending_offchannel(struct ath_softc *sc)
2251 {
2252         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2253
2254         if (sc->offchannel.roc_vif) {
2255                 ath_dbg(common, CHAN_CTX,
2256                         "%s: Aborting RoC\n", __func__);
2257
2258                 del_timer_sync(&sc->offchannel.timer);
2259                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2260                         ath_roc_complete(sc, ATH_ROC_COMPLETE_ABORT);
2261         }
2262
2263         if (test_bit(ATH_OP_SCANNING, &common->op_flags)) {
2264                 ath_dbg(common, CHAN_CTX,
2265                         "%s: Aborting HW scan\n", __func__);
2266
2267                 del_timer_sync(&sc->offchannel.timer);
2268                 ath_scan_complete(sc, true);
2269         }
2270 }
2271
2272 static int ath9k_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2273                          struct ieee80211_scan_request *hw_req)
2274 {
2275         struct cfg80211_scan_request *req = &hw_req->req;
2276         struct ath_softc *sc = hw->priv;
2277         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2278         int ret = 0;
2279
2280         mutex_lock(&sc->mutex);
2281
2282         if (WARN_ON(sc->offchannel.scan_req)) {
2283                 ret = -EBUSY;
2284                 goto out;
2285         }
2286
2287         ath9k_ps_wakeup(sc);
2288         set_bit(ATH_OP_SCANNING, &common->op_flags);
2289         sc->offchannel.scan_vif = vif;
2290         sc->offchannel.scan_req = req;
2291         sc->offchannel.scan_idx = 0;
2292
2293         ath_dbg(common, CHAN_CTX, "HW scan request received on vif: %pM\n",
2294                 vif->addr);
2295
2296         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2297                 ath_dbg(common, CHAN_CTX, "Starting HW scan\n");
2298                 ath_offchannel_next(sc);
2299         }
2300
2301 out:
2302         mutex_unlock(&sc->mutex);
2303
2304         return ret;
2305 }
2306
2307 static void ath9k_cancel_hw_scan(struct ieee80211_hw *hw,
2308                                  struct ieee80211_vif *vif)
2309 {
2310         struct ath_softc *sc = hw->priv;
2311         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2312
2313         ath_dbg(common, CHAN_CTX, "Cancel HW scan on vif: %pM\n", vif->addr);
2314
2315         mutex_lock(&sc->mutex);
2316         del_timer_sync(&sc->offchannel.timer);
2317         ath_scan_complete(sc, true);
2318         mutex_unlock(&sc->mutex);
2319 }
2320
2321 static int ath9k_remain_on_channel(struct ieee80211_hw *hw,
2322                                    struct ieee80211_vif *vif,
2323                                    struct ieee80211_channel *chan, int duration,
2324                                    enum ieee80211_roc_type type)
2325 {
2326         struct ath_softc *sc = hw->priv;
2327         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2328         int ret = 0;
2329
2330         mutex_lock(&sc->mutex);
2331
2332         if (WARN_ON(sc->offchannel.roc_vif)) {
2333                 ret = -EBUSY;
2334                 goto out;
2335         }
2336
2337         ath9k_ps_wakeup(sc);
2338         sc->offchannel.roc_vif = vif;
2339         sc->offchannel.roc_chan = chan;
2340         sc->offchannel.roc_duration = duration;
2341
2342         ath_dbg(common, CHAN_CTX,
2343                 "RoC request on vif: %pM, type: %d duration: %d\n",
2344                 vif->addr, type, duration);
2345
2346         if (sc->offchannel.state == ATH_OFFCHANNEL_IDLE) {
2347                 ath_dbg(common, CHAN_CTX, "Starting RoC period\n");
2348                 ath_offchannel_next(sc);
2349         }
2350
2351 out:
2352         mutex_unlock(&sc->mutex);
2353
2354         return ret;
2355 }
2356
2357 static int ath9k_cancel_remain_on_channel(struct ieee80211_hw *hw)
2358 {
2359         struct ath_softc *sc = hw->priv;
2360         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2361
2362         mutex_lock(&sc->mutex);
2363
2364         ath_dbg(common, CHAN_CTX, "Cancel RoC\n");
2365         del_timer_sync(&sc->offchannel.timer);
2366
2367         if (sc->offchannel.roc_vif) {
2368                 if (sc->offchannel.state >= ATH_OFFCHANNEL_ROC_START)
2369                         ath_roc_complete(sc, ATH_ROC_COMPLETE_CANCEL);
2370         }
2371
2372         mutex_unlock(&sc->mutex);
2373
2374         return 0;
2375 }
2376
2377 static int ath9k_add_chanctx(struct ieee80211_hw *hw,
2378                              struct ieee80211_chanctx_conf *conf)
2379 {
2380         struct ath_softc *sc = hw->priv;
2381         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2382         struct ath_chanctx *ctx, **ptr;
2383         int pos;
2384
2385         mutex_lock(&sc->mutex);
2386
2387         ath_for_each_chanctx(sc, ctx) {
2388                 if (ctx->assigned)
2389                         continue;
2390
2391                 ptr = (void *) conf->drv_priv;
2392                 *ptr = ctx;
2393                 ctx->assigned = true;
2394                 pos = ctx - &sc->chanctx[0];
2395                 ctx->hw_queue_base = pos * IEEE80211_NUM_ACS;
2396
2397                 ath_dbg(common, CHAN_CTX,
2398                         "Add channel context: %d MHz\n",
2399                         conf->def.chan->center_freq);
2400
2401                 ath_chanctx_set_channel(sc, ctx, &conf->def);
2402
2403                 mutex_unlock(&sc->mutex);
2404                 return 0;
2405         }
2406
2407         mutex_unlock(&sc->mutex);
2408         return -ENOSPC;
2409 }
2410
2411
2412 static void ath9k_remove_chanctx(struct ieee80211_hw *hw,
2413                                  struct ieee80211_chanctx_conf *conf)
2414 {
2415         struct ath_softc *sc = hw->priv;
2416         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2417         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2418
2419         mutex_lock(&sc->mutex);
2420
2421         ath_dbg(common, CHAN_CTX,
2422                 "Remove channel context: %d MHz\n",
2423                 conf->def.chan->center_freq);
2424
2425         ctx->assigned = false;
2426         ctx->hw_queue_base = 0;
2427         ath_chanctx_event(sc, NULL, ATH_CHANCTX_EVENT_UNASSIGN);
2428
2429         mutex_unlock(&sc->mutex);
2430 }
2431
2432 static void ath9k_change_chanctx(struct ieee80211_hw *hw,
2433                                  struct ieee80211_chanctx_conf *conf,
2434                                  u32 changed)
2435 {
2436         struct ath_softc *sc = hw->priv;
2437         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2438         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2439
2440         mutex_lock(&sc->mutex);
2441         ath_dbg(common, CHAN_CTX,
2442                 "Change channel context: %d MHz\n",
2443                 conf->def.chan->center_freq);
2444         ath_chanctx_set_channel(sc, ctx, &conf->def);
2445         mutex_unlock(&sc->mutex);
2446 }
2447
2448 static int ath9k_assign_vif_chanctx(struct ieee80211_hw *hw,
2449                                     struct ieee80211_vif *vif,
2450                                     struct ieee80211_chanctx_conf *conf)
2451 {
2452         struct ath_softc *sc = hw->priv;
2453         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2454         struct ath_vif *avp = (void *)vif->drv_priv;
2455         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2456         int i;
2457
2458         ath9k_cancel_pending_offchannel(sc);
2459
2460         mutex_lock(&sc->mutex);
2461
2462         ath_dbg(common, CHAN_CTX,
2463                 "Assign VIF (addr: %pM, type: %d, p2p: %d) to channel context: %d MHz\n",
2464                 vif->addr, vif->type, vif->p2p,
2465                 conf->def.chan->center_freq);
2466
2467         avp->chanctx = ctx;
2468         ctx->nvifs_assigned++;
2469         list_add_tail(&avp->list, &ctx->vifs);
2470         ath9k_calculate_summary_state(sc, ctx);
2471         for (i = 0; i < IEEE80211_NUM_ACS; i++)
2472                 vif->hw_queue[i] = ctx->hw_queue_base + i;
2473
2474         mutex_unlock(&sc->mutex);
2475
2476         return 0;
2477 }
2478
2479 static void ath9k_unassign_vif_chanctx(struct ieee80211_hw *hw,
2480                                        struct ieee80211_vif *vif,
2481                                        struct ieee80211_chanctx_conf *conf)
2482 {
2483         struct ath_softc *sc = hw->priv;
2484         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2485         struct ath_vif *avp = (void *)vif->drv_priv;
2486         struct ath_chanctx *ctx = ath_chanctx_get(conf);
2487         int ac;
2488
2489         ath9k_cancel_pending_offchannel(sc);
2490
2491         mutex_lock(&sc->mutex);
2492
2493         ath_dbg(common, CHAN_CTX,
2494                 "Remove VIF (addr: %pM, type: %d, p2p: %d) from channel context: %d MHz\n",
2495                 vif->addr, vif->type, vif->p2p,
2496                 conf->def.chan->center_freq);
2497
2498         avp->chanctx = NULL;
2499         ctx->nvifs_assigned--;
2500         list_del(&avp->list);
2501         ath9k_calculate_summary_state(sc, ctx);
2502         for (ac = 0; ac < IEEE80211_NUM_ACS; ac++)
2503                 vif->hw_queue[ac] = IEEE80211_INVAL_HW_QUEUE;
2504
2505         mutex_unlock(&sc->mutex);
2506 }
2507
2508 static void ath9k_mgd_prepare_tx(struct ieee80211_hw *hw,
2509                                  struct ieee80211_vif *vif)
2510 {
2511         struct ath_softc *sc = hw->priv;
2512         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2513         struct ath_vif *avp = (struct ath_vif *) vif->drv_priv;
2514         struct ath_beacon_config *cur_conf;
2515         struct ath_chanctx *go_ctx;
2516         unsigned long timeout;
2517         bool changed = false;
2518         u32 beacon_int;
2519
2520         if (!test_bit(ATH_OP_MULTI_CHANNEL, &common->op_flags))
2521                 return;
2522
2523         if (!avp->chanctx)
2524                 return;
2525
2526         mutex_lock(&sc->mutex);
2527
2528         spin_lock_bh(&sc->chan_lock);
2529         if (sc->next_chan || (sc->cur_chan != avp->chanctx))
2530                 changed = true;
2531         spin_unlock_bh(&sc->chan_lock);
2532
2533         if (!changed)
2534                 goto out;
2535
2536         ath9k_cancel_pending_offchannel(sc);
2537
2538         go_ctx = ath_is_go_chanctx_present(sc);
2539
2540         if (go_ctx) {
2541                 /*
2542                  * Wait till the GO interface gets a chance
2543                  * to send out an NoA.
2544                  */
2545                 spin_lock_bh(&sc->chan_lock);
2546                 sc->sched.mgd_prepare_tx = true;
2547                 cur_conf = &go_ctx->beacon;
2548                 beacon_int = TU_TO_USEC(cur_conf->beacon_interval);
2549                 spin_unlock_bh(&sc->chan_lock);
2550
2551                 timeout = usecs_to_jiffies(beacon_int * 2);
2552                 init_completion(&sc->go_beacon);
2553
2554                 mutex_unlock(&sc->mutex);
2555
2556                 if (wait_for_completion_timeout(&sc->go_beacon,
2557                                                 timeout) == 0) {
2558                         ath_dbg(common, CHAN_CTX,
2559                                 "Failed to send new NoA\n");
2560
2561                         spin_lock_bh(&sc->chan_lock);
2562                         sc->sched.mgd_prepare_tx = false;
2563                         spin_unlock_bh(&sc->chan_lock);
2564                 }
2565
2566                 mutex_lock(&sc->mutex);
2567         }
2568
2569         ath_dbg(common, CHAN_CTX,
2570                 "%s: Set chanctx state to FORCE_ACTIVE for vif: %pM\n",
2571                 __func__, vif->addr);
2572
2573         spin_lock_bh(&sc->chan_lock);
2574         sc->next_chan = avp->chanctx;
2575         sc->sched.state = ATH_CHANCTX_STATE_FORCE_ACTIVE;
2576         spin_unlock_bh(&sc->chan_lock);
2577
2578         ath_chanctx_set_next(sc, true);
2579 out:
2580         mutex_unlock(&sc->mutex);
2581 }
2582
2583 void ath9k_fill_chanctx_ops(void)
2584 {
2585         if (!ath9k_is_chanctx_enabled())
2586                 return;
2587
2588         ath9k_ops.hw_scan                  = ath9k_hw_scan;
2589         ath9k_ops.cancel_hw_scan           = ath9k_cancel_hw_scan;
2590         ath9k_ops.remain_on_channel        = ath9k_remain_on_channel;
2591         ath9k_ops.cancel_remain_on_channel = ath9k_cancel_remain_on_channel;
2592         ath9k_ops.add_chanctx              = ath9k_add_chanctx;
2593         ath9k_ops.remove_chanctx           = ath9k_remove_chanctx;
2594         ath9k_ops.change_chanctx           = ath9k_change_chanctx;
2595         ath9k_ops.assign_vif_chanctx       = ath9k_assign_vif_chanctx;
2596         ath9k_ops.unassign_vif_chanctx     = ath9k_unassign_vif_chanctx;
2597         ath9k_ops.mgd_prepare_tx           = ath9k_mgd_prepare_tx;
2598 }
2599
2600 #endif
2601
2602 static int ath9k_get_txpower(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2603                              int *dbm)
2604 {
2605         struct ath_softc *sc = hw->priv;
2606         struct ath_vif *avp = (void *)vif->drv_priv;
2607
2608         mutex_lock(&sc->mutex);
2609         if (avp->chanctx)
2610                 *dbm = avp->chanctx->cur_txpower;
2611         else
2612                 *dbm = sc->cur_chan->cur_txpower;
2613         mutex_unlock(&sc->mutex);
2614
2615         *dbm /= 2;
2616
2617         return 0;
2618 }
2619
2620 struct ieee80211_ops ath9k_ops = {
2621         .tx                 = ath9k_tx,
2622         .start              = ath9k_start,
2623         .stop               = ath9k_stop,
2624         .add_interface      = ath9k_add_interface,
2625         .change_interface   = ath9k_change_interface,
2626         .remove_interface   = ath9k_remove_interface,
2627         .config             = ath9k_config,
2628         .configure_filter   = ath9k_configure_filter,
2629         .sta_state          = ath9k_sta_state,
2630         .sta_notify         = ath9k_sta_notify,
2631         .conf_tx            = ath9k_conf_tx,
2632         .bss_info_changed   = ath9k_bss_info_changed,
2633         .set_key            = ath9k_set_key,
2634         .get_tsf            = ath9k_get_tsf,
2635         .set_tsf            = ath9k_set_tsf,
2636         .reset_tsf          = ath9k_reset_tsf,
2637         .ampdu_action       = ath9k_ampdu_action,
2638         .get_survey         = ath9k_get_survey,
2639         .rfkill_poll        = ath9k_rfkill_poll_state,
2640         .set_coverage_class = ath9k_set_coverage_class,
2641         .flush              = ath9k_flush,
2642         .tx_frames_pending  = ath9k_tx_frames_pending,
2643         .tx_last_beacon     = ath9k_tx_last_beacon,
2644         .release_buffered_frames = ath9k_release_buffered_frames,
2645         .get_stats          = ath9k_get_stats,
2646         .set_antenna        = ath9k_set_antenna,
2647         .get_antenna        = ath9k_get_antenna,
2648
2649 #ifdef CONFIG_ATH9K_WOW
2650         .suspend            = ath9k_suspend,
2651         .resume             = ath9k_resume,
2652         .set_wakeup         = ath9k_set_wakeup,
2653 #endif
2654
2655 #ifdef CONFIG_ATH9K_DEBUGFS
2656         .get_et_sset_count  = ath9k_get_et_sset_count,
2657         .get_et_stats       = ath9k_get_et_stats,
2658         .get_et_strings     = ath9k_get_et_strings,
2659 #endif
2660
2661 #if defined(CONFIG_MAC80211_DEBUGFS) && defined(CONFIG_ATH9K_STATION_STATISTICS)
2662         .sta_add_debugfs    = ath9k_sta_add_debugfs,
2663 #endif
2664         .sw_scan_start      = ath9k_sw_scan_start,
2665         .sw_scan_complete   = ath9k_sw_scan_complete,
2666         .get_txpower        = ath9k_get_txpower,
2667 };