drivers/net/wireless/ath/ath10k/core.c

   1 /*
   2  * Copyright (c) 2005-2011 Atheros Communications Inc.
   3  * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
   4  *
   5  * Permission to use, copy, modify, and/or distribute this software for any
   6  * purpose with or without fee is hereby granted, provided that the above
   7  * copyright notice and this permission notice appear in all copies.
   8  *
   9  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/firmware.h>
  20 #include <linux/of.h>
  21 #include <asm/byteorder.h>
  22
  23 #include "core.h"
  24 #include "mac.h"
  25 #include "htc.h"
  26 #include "hif.h"
  27 #include "wmi.h"
  28 #include "bmi.h"
  29 #include "debug.h"
  30 #include "htt.h"
  31 #include "testmode.h"
  32 #include "wmi-ops.h"
  33
  34 unsigned int ath10k_debug_mask;
  35 static unsigned int ath10k_cryptmode_param;
  36 static bool uart_print;
  37 static bool skip_otp;
  38 static bool rawmode;
  39
  40 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  41 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644);
  42 module_param(uart_print, bool, 0644);
  43 module_param(skip_otp, bool, 0644);
  44 module_param(rawmode, bool, 0644);
  45
  46 MODULE_PARM_DESC(debug_mask, "Debugging mask");
  47 MODULE_PARM_DESC(uart_print, "Uart target debugging");
  48 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
  49 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software");
  50 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath");
  51
  52 static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  53         {
  54                 .id = QCA988X_HW_2_0_VERSION,
  55                 .dev_id = QCA988X_2_0_DEVICE_ID,
  56                 .name = "qca988x hw2.0",
  57                 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  58                 .uart_pin = 7,
  59                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  60                 .otp_exe_param = 0,
  61                 .channel_counters_freq_hz = 88000,
  62                 .max_probe_resp_desc_thres = 0,
  63                 .cal_data_len = 2116,
  64                 .fw = {
  65                         .dir = QCA988X_HW_2_0_FW_DIR,
  66                         .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  67                         .board_size = QCA988X_BOARD_DATA_SZ,
  68                         .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ,
  69                 },
  70                 .hw_ops = &qca988x_ops,
  71                 .decap_align_bytes = 4,
  72         },
  73         {
  74                 .id = QCA9887_HW_1_0_VERSION,
  75                 .dev_id = QCA9887_1_0_DEVICE_ID,
  76                 .name = "qca9887 hw1.0",
  77                 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR,
  78                 .uart_pin = 7,
  79                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL,
  80                 .otp_exe_param = 0,
  81                 .channel_counters_freq_hz = 88000,
  82                 .max_probe_resp_desc_thres = 0,
  83                 .cal_data_len = 2116,
  84                 .fw = {
  85                         .dir = QCA9887_HW_1_0_FW_DIR,
  86                         .board = QCA9887_HW_1_0_BOARD_DATA_FILE,
  87                         .board_size = QCA9887_BOARD_DATA_SZ,
  88                         .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ,
  89                 },
  90                 .hw_ops = &qca988x_ops,
  91                 .decap_align_bytes = 4,
  92         },
  93         {
  94                 .id = QCA6174_HW_2_1_VERSION,
  95                 .dev_id = QCA6164_2_1_DEVICE_ID,
  96                 .name = "qca6164 hw2.1",
  97                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
  98                 .uart_pin = 6,
  99                 .otp_exe_param = 0,
 100                 .channel_counters_freq_hz = 88000,
 101                 .max_probe_resp_desc_thres = 0,
 102                 .cal_data_len = 8124,
 103                 .fw = {
 104                         .dir = QCA6174_HW_2_1_FW_DIR,
 105                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 106                         .board_size = QCA6174_BOARD_DATA_SZ,
 107                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 108                 },
 109                 .hw_ops = &qca988x_ops,
 110                 .decap_align_bytes = 4,
 111         },
 112         {
 113                 .id = QCA6174_HW_2_1_VERSION,
 114                 .dev_id = QCA6174_2_1_DEVICE_ID,
 115                 .name = "qca6174 hw2.1",
 116                 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR,
 117                 .uart_pin = 6,
 118                 .otp_exe_param = 0,
 119                 .channel_counters_freq_hz = 88000,
 120                 .max_probe_resp_desc_thres = 0,
 121                 .cal_data_len = 8124,
 122                 .fw = {
 123                         .dir = QCA6174_HW_2_1_FW_DIR,
 124                         .board = QCA6174_HW_2_1_BOARD_DATA_FILE,
 125                         .board_size = QCA6174_BOARD_DATA_SZ,
 126                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 127                 },
 128                 .hw_ops = &qca988x_ops,
 129                 .decap_align_bytes = 4,
 130         },
 131         {
 132                 .id = QCA6174_HW_3_0_VERSION,
 133                 .dev_id = QCA6174_2_1_DEVICE_ID,
 134                 .name = "qca6174 hw3.0",
 135                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 136                 .uart_pin = 6,
 137                 .otp_exe_param = 0,
 138                 .channel_counters_freq_hz = 88000,
 139                 .max_probe_resp_desc_thres = 0,
 140                 .cal_data_len = 8124,
 141                 .fw = {
 142                         .dir = QCA6174_HW_3_0_FW_DIR,
 143                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 144                         .board_size = QCA6174_BOARD_DATA_SZ,
 145                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 146                 },
 147                 .hw_ops = &qca988x_ops,
 148                 .decap_align_bytes = 4,
 149         },
 150         {
 151                 .id = QCA6174_HW_3_2_VERSION,
 152                 .dev_id = QCA6174_2_1_DEVICE_ID,
 153                 .name = "qca6174 hw3.2",
 154                 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR,
 155                 .uart_pin = 6,
 156                 .otp_exe_param = 0,
 157                 .channel_counters_freq_hz = 88000,
 158                 .max_probe_resp_desc_thres = 0,
 159                 .cal_data_len = 8124,
 160                 .fw = {
 161                         /* uses same binaries as hw3.0 */
 162                         .dir = QCA6174_HW_3_0_FW_DIR,
 163                         .board = QCA6174_HW_3_0_BOARD_DATA_FILE,
 164                         .board_size = QCA6174_BOARD_DATA_SZ,
 165                         .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ,
 166                 },
 167                 .hw_ops = &qca988x_ops,
 168                 .decap_align_bytes = 4,
 169         },
 170         {
 171                 .id = QCA99X0_HW_2_0_DEV_VERSION,
 172                 .dev_id = QCA99X0_2_0_DEVICE_ID,
 173                 .name = "qca99x0 hw2.0",
 174                 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR,
 175                 .uart_pin = 7,
 176                 .otp_exe_param = 0x00000700,
 177                 .continuous_frag_desc = true,
 178                 .cck_rate_map_rev2 = true,
 179                 .channel_counters_freq_hz = 150000,
 180                 .max_probe_resp_desc_thres = 24,
 181                 .tx_chain_mask = 0xf,
 182                 .rx_chain_mask = 0xf,
 183                 .max_spatial_stream = 4,
 184                 .cal_data_len = 12064,
 185                 .fw = {
 186                         .dir = QCA99X0_HW_2_0_FW_DIR,
 187                         .board = QCA99X0_HW_2_0_BOARD_DATA_FILE,
 188                         .board_size = QCA99X0_BOARD_DATA_SZ,
 189                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 190                 },
 191                 .sw_decrypt_mcast_mgmt = true,
 192                 .hw_ops = &qca99x0_ops,
 193                 .decap_align_bytes = 1,
 194         },
 195         {
 196                 .id = QCA9984_HW_1_0_DEV_VERSION,
 197                 .dev_id = QCA9984_1_0_DEVICE_ID,
 198                 .name = "qca9984/qca9994 hw1.0",
 199                 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR,
 200                 .uart_pin = 7,
 201                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 202                 .otp_exe_param = 0x00000700,
 203                 .continuous_frag_desc = true,
 204                 .cck_rate_map_rev2 = true,
 205                 .channel_counters_freq_hz = 150000,
 206                 .max_probe_resp_desc_thres = 24,
 207                 .tx_chain_mask = 0xf,
 208                 .rx_chain_mask = 0xf,
 209                 .max_spatial_stream = 4,
 210                 .cal_data_len = 12064,
 211                 .fw = {
 212                         .dir = QCA9984_HW_1_0_FW_DIR,
 213                         .board = QCA9984_HW_1_0_BOARD_DATA_FILE,
 214                         .board_size = QCA99X0_BOARD_DATA_SZ,
 215                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 216                 },
 217                 .sw_decrypt_mcast_mgmt = true,
 218                 .hw_ops = &qca99x0_ops,
 219                 .decap_align_bytes = 1,
 220         },
 221         {
 222                 .id = QCA9888_HW_2_0_DEV_VERSION,
 223                 .dev_id = QCA9888_2_0_DEVICE_ID,
 224                 .name = "qca9888 hw2.0",
 225                 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR,
 226                 .uart_pin = 7,
 227                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 228                 .otp_exe_param = 0x00000700,
 229                 .continuous_frag_desc = true,
 230                 .channel_counters_freq_hz = 150000,
 231                 .max_probe_resp_desc_thres = 24,
 232                 .tx_chain_mask = 3,
 233                 .rx_chain_mask = 3,
 234                 .max_spatial_stream = 2,
 235                 .cal_data_len = 12064,
 236                 .fw = {
 237                         .dir = QCA9888_HW_2_0_FW_DIR,
 238                         .board = QCA9888_HW_2_0_BOARD_DATA_FILE,
 239                         .board_size = QCA99X0_BOARD_DATA_SZ,
 240                         .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ,
 241                 },
 242                 .sw_decrypt_mcast_mgmt = true,
 243                 .hw_ops = &qca99x0_ops,
 244                 .decap_align_bytes = 1,
 245         },
 246         {
 247                 .id = QCA9377_HW_1_0_DEV_VERSION,
 248                 .dev_id = QCA9377_1_0_DEVICE_ID,
 249                 .name = "qca9377 hw1.0",
 250                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 251                 .uart_pin = 6,
 252                 .otp_exe_param = 0,
 253                 .channel_counters_freq_hz = 88000,
 254                 .max_probe_resp_desc_thres = 0,
 255                 .cal_data_len = 8124,
 256                 .fw = {
 257                         .dir = QCA9377_HW_1_0_FW_DIR,
 258                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 259                         .board_size = QCA9377_BOARD_DATA_SZ,
 260                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 261                 },
 262                 .hw_ops = &qca988x_ops,
 263                 .decap_align_bytes = 4,
 264         },
 265         {
 266                 .id = QCA9377_HW_1_1_DEV_VERSION,
 267                 .dev_id = QCA9377_1_0_DEVICE_ID,
 268                 .name = "qca9377 hw1.1",
 269                 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR,
 270                 .uart_pin = 6,
 271                 .otp_exe_param = 0,
 272                 .channel_counters_freq_hz = 88000,
 273                 .max_probe_resp_desc_thres = 0,
 274                 .cal_data_len = 8124,
 275                 .fw = {
 276                         .dir = QCA9377_HW_1_0_FW_DIR,
 277                         .board = QCA9377_HW_1_0_BOARD_DATA_FILE,
 278                         .board_size = QCA9377_BOARD_DATA_SZ,
 279                         .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ,
 280                 },
 281                 .hw_ops = &qca988x_ops,
 282                 .decap_align_bytes = 4,
 283         },
 284         {
 285                 .id = QCA4019_HW_1_0_DEV_VERSION,
 286                 .dev_id = 0,
 287                 .name = "qca4019 hw1.0",
 288                 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR,
 289                 .uart_pin = 7,
 290                 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH,
 291                 .otp_exe_param = 0x0010000,
 292                 .continuous_frag_desc = true,
 293                 .cck_rate_map_rev2 = true,
 294                 .channel_counters_freq_hz = 125000,
 295                 .max_probe_resp_desc_thres = 24,
 296                 .tx_chain_mask = 0x3,
 297                 .rx_chain_mask = 0x3,
 298                 .max_spatial_stream = 2,
 299                 .cal_data_len = 12064,
 300                 .fw = {
 301                         .dir = QCA4019_HW_1_0_FW_DIR,
 302                         .board = QCA4019_HW_1_0_BOARD_DATA_FILE,
 303                         .board_size = QCA4019_BOARD_DATA_SZ,
 304                         .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ,
 305                 },
 306                 .sw_decrypt_mcast_mgmt = true,
 307                 .hw_ops = &qca99x0_ops,
 308                 .decap_align_bytes = 1,
 309         },
 310 };
 311
 312 static const char *const ath10k_core_fw_feature_str[] = {
 313         [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx",
 314         [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x",
 315         [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx",
 316         [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p",
 317         [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2",
 318         [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps",
 319         [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan",
 320         [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp",
 321         [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad",
 322         [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init",
 323         [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode",
 324         [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca",
 325         [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp",
 326         [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl",
 327         [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param",
 328         [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war",
 329         [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast",
 330 };
 331
 332 static unsigned int ath10k_core_get_fw_feature_str(char *buf,
 333                                                    size_t buf_len,
 334                                                    enum ath10k_fw_features feat)
 335 {
 336         /* make sure that ath10k_core_fw_feature_str[] gets updated */
 337         BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) !=
 338                      ATH10K_FW_FEATURE_COUNT);
 339
 340         if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) ||
 341             WARN_ON(!ath10k_core_fw_feature_str[feat])) {
 342                 return scnprintf(buf, buf_len, "bit%d", feat);
 343         }
 344
 345         return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]);
 346 }
 347
 348 void ath10k_core_get_fw_features_str(struct ath10k *ar,
 349                                      char *buf,
 350                                      size_t buf_len)
 351 {
 352         unsigned int len = 0;
 353         int i;
 354
 355         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
 356                 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) {
 357                         if (len > 0)
 358                                 len += scnprintf(buf + len, buf_len - len, ",");
 359
 360                         len += ath10k_core_get_fw_feature_str(buf + len,
 361                                                               buf_len - len,
 362                                                               i);
 363                 }
 364         }
 365 }
 366
 367 static void ath10k_send_suspend_complete(struct ath10k *ar)
 368 {
 369         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
 370
 371         complete(&ar->target_suspend);
 372 }
 373
 374 static int ath10k_init_configure_target(struct ath10k *ar)
 375 {
 376         u32 param_host;
 377         int ret;
 378
 379         /* tell target which HTC version it is used*/
 380         ret = ath10k_bmi_write32(ar, hi_app_host_interest,
 381                                  HTC_PROTOCOL_VERSION);
 382         if (ret) {
 383                 ath10k_err(ar, "settings HTC version failed\n");
 384                 return ret;
 385         }
 386
 387         /* set the firmware mode to STA/IBSS/AP */
 388         ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
 389         if (ret) {
 390                 ath10k_err(ar, "setting firmware mode (1/2) failed\n");
 391                 return ret;
 392         }
 393
 394         /* TODO following parameters need to be re-visited. */
 395         /* num_device */
 396         param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
 397         /* Firmware mode */
 398         /* FIXME: Why FW_MODE_AP ??.*/
 399         param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
 400         /* mac_addr_method */
 401         param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
 402         /* firmware_bridge */
 403         param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
 404         /* fwsubmode */
 405         param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
 406
 407         ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
 408         if (ret) {
 409                 ath10k_err(ar, "setting firmware mode (2/2) failed\n");
 410                 return ret;
 411         }
 412
 413         /* We do all byte-swapping on the host */
 414         ret = ath10k_bmi_write32(ar, hi_be, 0);
 415         if (ret) {
 416                 ath10k_err(ar, "setting host CPU BE mode failed\n");
 417                 return ret;
 418         }
 419
 420         /* FW descriptor/Data swap flags */
 421         ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
 422
 423         if (ret) {
 424                 ath10k_err(ar, "setting FW data/desc swap flags failed\n");
 425                 return ret;
 426         }
 427
 428         /* Some devices have a special sanity check that verifies the PCI
 429          * Device ID is written to this host interest var. It is known to be
 430          * required to boot QCA6164.
 431          */
 432         ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext,
 433                                  ar->dev_id);
 434         if (ret) {
 435                 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret);
 436                 return ret;
 437         }
 438
 439         return 0;
 440 }
 441
 442 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
 443                                                    const char *dir,
 444                                                    const char *file)
 445 {
 446         char filename[100];
 447         const struct firmware *fw;
 448         int ret;
 449
 450         if (file == NULL)
 451                 return ERR_PTR(-ENOENT);
 452
 453         if (dir == NULL)
 454                 dir = ".";
 455
 456         snprintf(filename, sizeof(filename), "%s/%s", dir, file);
 457         ret = reject_firmware(&fw, filename, ar->dev);
 458         if (ret)
 459                 return ERR_PTR(ret);
 460
 461         return fw;
 462 }
 463
 464 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
 465                                       size_t data_len)
 466 {
 467         u32 board_data_size = ar->hw_params.fw.board_size;
 468         u32 board_ext_data_size = ar->hw_params.fw.board_ext_size;
 469         u32 board_ext_data_addr;
 470         int ret;
 471
 472         ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
 473         if (ret) {
 474                 ath10k_err(ar, "could not read board ext data addr (%d)\n",
 475                            ret);
 476                 return ret;
 477         }
 478
 479         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 480                    "boot push board extended data addr 0x%x\n",
 481                    board_ext_data_addr);
 482
 483         if (board_ext_data_addr == 0)
 484                 return 0;
 485
 486         if (data_len != (board_data_size + board_ext_data_size)) {
 487                 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
 488                            data_len, board_data_size, board_ext_data_size);
 489                 return -EINVAL;
 490         }
 491
 492         ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
 493                                       data + board_data_size,
 494                                       board_ext_data_size);
 495         if (ret) {
 496                 ath10k_err(ar, "could not write board ext data (%d)\n", ret);
 497                 return ret;
 498         }
 499
 500         ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
 501                                  (board_ext_data_size << 16) | 1);
 502         if (ret) {
 503                 ath10k_err(ar, "could not write board ext data bit (%d)\n",
 504                            ret);
 505                 return ret;
 506         }
 507
 508         return 0;
 509 }
 510
 511 static int ath10k_download_board_data(struct ath10k *ar, const void *data,
 512                                       size_t data_len)
 513 {
 514         u32 board_data_size = ar->hw_params.fw.board_size;
 515         u32 address;
 516         int ret;
 517
 518         ret = ath10k_push_board_ext_data(ar, data, data_len);
 519         if (ret) {
 520                 ath10k_err(ar, "could not push board ext data (%d)\n", ret);
 521                 goto exit;
 522         }
 523
 524         ret = ath10k_bmi_read32(ar, hi_board_data, &address);
 525         if (ret) {
 526                 ath10k_err(ar, "could not read board data addr (%d)\n", ret);
 527                 goto exit;
 528         }
 529
 530         ret = ath10k_bmi_write_memory(ar, address, data,
 531                                       min_t(u32, board_data_size,
 532                                             data_len));
 533         if (ret) {
 534                 ath10k_err(ar, "could not write board data (%d)\n", ret);
 535                 goto exit;
 536         }
 537
 538         ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
 539         if (ret) {
 540                 ath10k_err(ar, "could not write board data bit (%d)\n", ret);
 541                 goto exit;
 542         }
 543
 544 exit:
 545         return ret;
 546 }
 547
 548 static int ath10k_download_cal_file(struct ath10k *ar,
 549                                     const struct firmware *file)
 550 {
 551         int ret;
 552
 553         if (!file)
 554                 return -ENOENT;
 555
 556         if (IS_ERR(file))
 557                 return PTR_ERR(file);
 558
 559         ret = ath10k_download_board_data(ar, file->data, file->size);
 560         if (ret) {
 561                 ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
 562                 return ret;
 563         }
 564
 565         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
 566
 567         return 0;
 568 }
 569
 570 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name)
 571 {
 572         struct device_node *node;
 573         int data_len;
 574         void *data;
 575         int ret;
 576
 577         node = ar->dev->of_node;
 578         if (!node)
 579                 /* Device Tree is optional, don't print any warnings if
 580                  * there's no node for ath10k.
 581                  */
 582                 return -ENOENT;
 583
 584         if (!of_get_property(node, dt_name, &data_len)) {
 585                 /* The calibration data node is optional */
 586                 return -ENOENT;
 587         }
 588
 589         if (data_len != ar->hw_params.cal_data_len) {
 590                 ath10k_warn(ar, "invalid calibration data length in DT: %d\n",
 591                             data_len);
 592                 ret = -EMSGSIZE;
 593                 goto out;
 594         }
 595
 596         data = kmalloc(data_len, GFP_KERNEL);
 597         if (!data) {
 598                 ret = -ENOMEM;
 599                 goto out;
 600         }
 601
 602         ret = of_property_read_u8_array(node, dt_name, data, data_len);
 603         if (ret) {
 604                 ath10k_warn(ar, "failed to read calibration data from DT: %d\n",
 605                             ret);
 606                 goto out_free;
 607         }
 608
 609         ret = ath10k_download_board_data(ar, data, data_len);
 610         if (ret) {
 611                 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n",
 612                             ret);
 613                 goto out_free;
 614         }
 615
 616         ret = 0;
 617
 618 out_free:
 619         kfree(data);
 620
 621 out:
 622         return ret;
 623 }
 624
 625 static int ath10k_download_cal_eeprom(struct ath10k *ar)
 626 {
 627         size_t data_len;
 628         void *data = NULL;
 629         int ret;
 630
 631         ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len);
 632         if (ret) {
 633                 if (ret != -EOPNOTSUPP)
 634                         ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n",
 635                                     ret);
 636                 goto out_free;
 637         }
 638
 639         ret = ath10k_download_board_data(ar, data, data_len);
 640         if (ret) {
 641                 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n",
 642                             ret);
 643                 goto out_free;
 644         }
 645
 646         ret = 0;
 647
 648 out_free:
 649         kfree(data);
 650
 651         return ret;
 652 }
 653
 654 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar)
 655 {
 656         u32 result, address;
 657         u8 board_id, chip_id;
 658         int ret;
 659
 660         address = ar->hw_params.patch_load_addr;
 661
 662         if (!ar->normal_mode_fw.fw_file.otp_data ||
 663             !ar->normal_mode_fw.fw_file.otp_len) {
 664                 ath10k_warn(ar,
 665                             "failed to retrieve board id because of invalid otp\n");
 666                 return -ENODATA;
 667         }
 668
 669         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 670                    "boot upload otp to 0x%x len %zd for board id\n",
 671                    address, ar->normal_mode_fw.fw_file.otp_len);
 672
 673         ret = ath10k_bmi_fast_download(ar, address,
 674                                        ar->normal_mode_fw.fw_file.otp_data,
 675                                        ar->normal_mode_fw.fw_file.otp_len);
 676         if (ret) {
 677                 ath10k_err(ar, "could not write otp for board id check: %d\n",
 678                            ret);
 679                 return ret;
 680         }
 681
 682         ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EEPROM_BOARD_ID,
 683                                  &result);
 684         if (ret) {
 685                 ath10k_err(ar, "could not execute otp for board id check: %d\n",
 686                            ret);
 687                 return ret;
 688         }
 689
 690         board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP);
 691         chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP);
 692
 693         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 694                    "boot get otp board id result 0x%08x board_id %d chip_id %d\n",
 695                    result, board_id, chip_id);
 696
 697         if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0)
 698                 return -EOPNOTSUPP;
 699
 700         ar->id.bmi_ids_valid = true;
 701         ar->id.bmi_board_id = board_id;
 702         ar->id.bmi_chip_id = chip_id;
 703
 704         return 0;
 705 }
 706
 707 static int ath10k_download_and_run_otp(struct ath10k *ar)
 708 {
 709         u32 result, address = ar->hw_params.patch_load_addr;
 710         u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param;
 711         int ret;
 712
 713         ret = ath10k_download_board_data(ar,
 714                                          ar->running_fw->board_data,
 715                                          ar->running_fw->board_len);
 716         if (ret) {
 717                 ath10k_err(ar, "failed to download board data: %d\n", ret);
 718                 return ret;
 719         }
 720
 721         /* OTP is optional */
 722
 723         if (!ar->running_fw->fw_file.otp_data ||
 724             !ar->running_fw->fw_file.otp_len) {
 725                 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n",
 726                             ar->running_fw->fw_file.otp_data,
 727                             ar->running_fw->fw_file.otp_len);
 728                 return 0;
 729         }
 730
 731         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
 732                    address, ar->running_fw->fw_file.otp_len);
 733
 734         ret = ath10k_bmi_fast_download(ar, address,
 735                                        ar->running_fw->fw_file.otp_data,
 736                                        ar->running_fw->fw_file.otp_len);
 737         if (ret) {
 738                 ath10k_err(ar, "could not write otp (%d)\n", ret);
 739                 return ret;
 740         }
 741
 742         ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result);
 743         if (ret) {
 744                 ath10k_err(ar, "could not execute otp (%d)\n", ret);
 745                 return ret;
 746         }
 747
 748         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
 749
 750         if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT,
 751                                    ar->running_fw->fw_file.fw_features)) &&
 752             result != 0) {
 753                 ath10k_err(ar, "otp calibration failed: %d", result);
 754                 return -EINVAL;
 755         }
 756
 757         return 0;
 758 }
 759
 760 static int ath10k_download_fw(struct ath10k *ar)
 761 {
 762         u32 address, data_len;
 763         const void *data;
 764         int ret;
 765
 766         address = ar->hw_params.patch_load_addr;
 767
 768         data = ar->running_fw->fw_file.firmware_data;
 769         data_len = ar->running_fw->fw_file.firmware_len;
 770
 771         ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file);
 772         if (ret) {
 773                 ath10k_err(ar, "failed to configure fw code swap: %d\n",
 774                            ret);
 775                 return ret;
 776         }
 777
 778         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 779                    "boot uploading firmware image %pK len %d\n",
 780                    data, data_len);
 781
 782         ret = ath10k_bmi_fast_download(ar, address, data, data_len);
 783         if (ret) {
 784                 ath10k_err(ar, "failed to download firmware: %d\n",
 785                            ret);
 786                 return ret;
 787         }
 788
 789         return ret;
 790 }
 791
 792 static void ath10k_core_free_board_files(struct ath10k *ar)
 793 {
 794         if (!IS_ERR(ar->normal_mode_fw.board))
 795                 release_firmware(ar->normal_mode_fw.board);
 796
 797         ar->normal_mode_fw.board = NULL;
 798         ar->normal_mode_fw.board_data = NULL;
 799         ar->normal_mode_fw.board_len = 0;
 800 }
 801
 802 static void ath10k_core_free_firmware_files(struct ath10k *ar)
 803 {
 804         if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware))
 805                 release_firmware(ar->normal_mode_fw.fw_file.firmware);
 806
 807         if (!IS_ERR(ar->cal_file))
 808                 release_firmware(ar->cal_file);
 809
 810         if (!IS_ERR(ar->pre_cal_file))
 811                 release_firmware(ar->pre_cal_file);
 812
 813         ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file);
 814
 815         ar->normal_mode_fw.fw_file.otp_data = NULL;
 816         ar->normal_mode_fw.fw_file.otp_len = 0;
 817
 818         ar->normal_mode_fw.fw_file.firmware = NULL;
 819         ar->normal_mode_fw.fw_file.firmware_data = NULL;
 820         ar->normal_mode_fw.fw_file.firmware_len = 0;
 821
 822         ar->cal_file = NULL;
 823         ar->pre_cal_file = NULL;
 824 }
 825
 826 static int ath10k_fetch_cal_file(struct ath10k *ar)
 827 {
 828         char filename[100];
 829
 830         /* pre-cal-<bus>-<id>.bin */
 831         scnprintf(filename, sizeof(filename), "/*(DEBLOBBED)*/",
 832                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
 833
 834         ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
 835         if (!IS_ERR(ar->pre_cal_file))
 836                 goto success;
 837
 838         /*(DEBLOBBED)*/
 839         scnprintf(filename, sizeof(filename), "/*(DEBLOBBED)*/",
 840                   ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
 841
 842         ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
 843         if (IS_ERR(ar->cal_file))
 844                 /* calibration file is optional, don't print any warnings */
 845                 return PTR_ERR(ar->cal_file);
 846 success:
 847         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
 848                    ATH10K_FW_DIR, filename);
 849
 850         return 0;
 851 }
 852
 853 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar)
 854 {
 855         if (!ar->hw_params.fw.board) {
 856                 ath10k_err(ar, "failed to find board file fw entry\n");
 857                 return -EINVAL;
 858         }
 859
 860         ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
 861                                                         ar->hw_params.fw.dir,
 862                                                         ar->hw_params.fw.board);
 863         if (IS_ERR(ar->normal_mode_fw.board))
 864                 return PTR_ERR(ar->normal_mode_fw.board);
 865
 866         ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data;
 867         ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size;
 868
 869         return 0;
 870 }
 871
 872 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar,
 873                                          const void *buf, size_t buf_len,
 874                                          const char *boardname)
 875 {
 876         const struct ath10k_fw_ie *hdr;
 877         bool name_match_found;
 878         int ret, board_ie_id;
 879         size_t board_ie_len;
 880         const void *board_ie_data;
 881
 882         name_match_found = false;
 883
 884         /* go through ATH10K_BD_IE_BOARD_ elements */
 885         while (buf_len > sizeof(struct ath10k_fw_ie)) {
 886                 hdr = buf;
 887                 board_ie_id = le32_to_cpu(hdr->id);
 888                 board_ie_len = le32_to_cpu(hdr->len);
 889                 board_ie_data = hdr->data;
 890
 891                 buf_len -= sizeof(*hdr);
 892                 buf += sizeof(*hdr);
 893
 894                 if (buf_len < ALIGN(board_ie_len, 4)) {
 895                         ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n",
 896                                    buf_len, ALIGN(board_ie_len, 4));
 897                         ret = -EINVAL;
 898                         goto out;
 899                 }
 900
 901                 switch (board_ie_id) {
 902                 case ATH10K_BD_IE_BOARD_NAME:
 903                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "",
 904                                         board_ie_data, board_ie_len);
 905
 906                         if (board_ie_len != strlen(boardname))
 907                                 break;
 908
 909                         ret = memcmp(board_ie_data, boardname, strlen(boardname));
 910                         if (ret)
 911                                 break;
 912
 913                         name_match_found = true;
 914                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 915                                    "boot found match for name '%s'",
 916                                    boardname);
 917                         break;
 918                 case ATH10K_BD_IE_BOARD_DATA:
 919                         if (!name_match_found)
 920                                 /* no match found */
 921                                 break;
 922
 923                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
 924                                    "boot found board data for '%s'",
 925                                    boardname);
 926
 927                         ar->normal_mode_fw.board_data = board_ie_data;
 928                         ar->normal_mode_fw.board_len = board_ie_len;
 929
 930                         ret = 0;
 931                         goto out;
 932                 default:
 933                         ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n",
 934                                     board_ie_id);
 935                         break;
 936                 }
 937
 938                 /* jump over the padding */
 939                 board_ie_len = ALIGN(board_ie_len, 4);
 940
 941                 buf_len -= board_ie_len;
 942                 buf += board_ie_len;
 943         }
 944
 945         /* no match found */
 946         ret = -ENOENT;
 947
 948 out:
 949         return ret;
 950 }
 951
 952 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar,
 953                                               const char *boardname,
 954                                               const char *filename)
 955 {
 956         size_t len, magic_len, ie_len;
 957         struct ath10k_fw_ie *hdr;
 958         const u8 *data;
 959         int ret, ie_id;
 960
 961         ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar,
 962                                                         ar->hw_params.fw.dir,
 963                                                         filename);
 964         if (IS_ERR(ar->normal_mode_fw.board))
 965                 return PTR_ERR(ar->normal_mode_fw.board);
 966
 967         data = ar->normal_mode_fw.board->data;
 968         len = ar->normal_mode_fw.board->size;
 969
 970         /* magic has extra null byte padded */
 971         magic_len = strlen(ATH10K_BOARD_MAGIC) + 1;
 972         if (len < magic_len) {
 973                 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n",
 974                            ar->hw_params.fw.dir, filename, len);
 975                 ret = -EINVAL;
 976                 goto err;
 977         }
 978
 979         if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) {
 980                 ath10k_err(ar, "found invalid board magic\n");
 981                 ret = -EINVAL;
 982                 goto err;
 983         }
 984
 985         /* magic is padded to 4 bytes */
 986         magic_len = ALIGN(magic_len, 4);
 987         if (len < magic_len) {
 988                 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n",
 989                            ar->hw_params.fw.dir, filename, len);
 990                 ret = -EINVAL;
 991                 goto err;
 992         }
 993
 994         data += magic_len;
 995         len -= magic_len;
 996
 997         while (len > sizeof(struct ath10k_fw_ie)) {
 998                 hdr = (struct ath10k_fw_ie *)data;
 999                 ie_id = le32_to_cpu(hdr->id);
1000                 ie_len = le32_to_cpu(hdr->len);
1001
1002                 len -= sizeof(*hdr);
1003                 data = hdr->data;
1004
1005                 if (len < ALIGN(ie_len, 4)) {
1006                         ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n",
1007                                    ie_id, ie_len, len);
1008                         ret = -EINVAL;
1009                         goto err;
1010                 }
1011
1012                 switch (ie_id) {
1013                 case ATH10K_BD_IE_BOARD:
1014                         ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len,
1015                                                             boardname);
1016                         if (ret == -ENOENT)
1017                                 /* no match found, continue */
1018                                 break;
1019                         else if (ret)
1020                                 /* there was an error, bail out */
1021                                 goto err;
1022
1023                         /* board data found */
1024                         goto out;
1025                 }
1026
1027                 /* jump over the padding */
1028                 ie_len = ALIGN(ie_len, 4);
1029
1030                 len -= ie_len;
1031                 data += ie_len;
1032         }
1033
1034 out:
1035         if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) {
1036                 ath10k_err(ar,
1037                            "failed to fetch board data for %s from %s/%s\n",
1038                            boardname, ar->hw_params.fw.dir, filename);
1039                 ret = -ENODATA;
1040                 goto err;
1041         }
1042
1043         return 0;
1044
1045 err:
1046         ath10k_core_free_board_files(ar);
1047         return ret;
1048 }
1049
1050 static int ath10k_core_create_board_name(struct ath10k *ar, char *name,
1051                                          size_t name_len)
1052 {
1053         if (ar->id.bmi_ids_valid) {
1054                 scnprintf(name, name_len,
1055                           "bus=%s,bmi-chip-id=%d,bmi-board-id=%d",
1056                           ath10k_bus_str(ar->hif.bus),
1057                           ar->id.bmi_chip_id,
1058                           ar->id.bmi_board_id);
1059                 goto out;
1060         }
1061
1062         scnprintf(name, name_len,
1063                   "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x",
1064                   ath10k_bus_str(ar->hif.bus),
1065                   ar->id.vendor, ar->id.device,
1066                   ar->id.subsystem_vendor, ar->id.subsystem_device);
1067
1068 out:
1069         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name);
1070
1071         return 0;
1072 }
1073
1074 static int ath10k_core_fetch_board_file(struct ath10k *ar)
1075 {
1076         char boardname[100];
1077         int ret;
1078
1079         ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname));
1080         if (ret) {
1081                 ath10k_err(ar, "failed to create board name: %d", ret);
1082                 return ret;
1083         }
1084
1085         ar->bd_api = 2;
1086         ret = ath10k_core_fetch_board_data_api_n(ar, boardname,
1087                                                  ATH10K_BOARD_API2_FILE);
1088         if (!ret)
1089                 goto success;
1090
1091         ar->bd_api = 1;
1092         ret = ath10k_core_fetch_board_data_api_1(ar);
1093         if (ret) {
1094                 ath10k_err(ar, "failed to fetch board data\n");
1095                 return ret;
1096         }
1097
1098 success:
1099         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api);
1100         return 0;
1101 }
1102
1103 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1104                                      struct ath10k_fw_file *fw_file)
1105 {
1106         size_t magic_len, len, ie_len;
1107         int ie_id, i, index, bit, ret;
1108         struct ath10k_fw_ie *hdr;
1109         const u8 *data;
1110         __le32 *timestamp, *version;
1111
1112         /* first fetch the firmware file (firmware-*.bin) */
1113         fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir,
1114                                                  name);
1115         if (IS_ERR(fw_file->firmware)) {
1116                 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
1117                            ar->hw_params.fw.dir, name,
1118                            PTR_ERR(fw_file->firmware));
1119                 return PTR_ERR(fw_file->firmware);
1120         }
1121
1122         data = fw_file->firmware->data;
1123         len = fw_file->firmware->size;
1124
1125         /* magic also includes the null byte, check that as well */
1126         magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
1127
1128         if (len < magic_len) {
1129                 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
1130                            ar->hw_params.fw.dir, name, len);
1131                 ret = -EINVAL;
1132                 goto err;
1133         }
1134
1135         if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
1136                 ath10k_err(ar, "invalid firmware magic\n");
1137                 ret = -EINVAL;
1138                 goto err;
1139         }
1140
1141         /* jump over the padding */
1142         magic_len = ALIGN(magic_len, 4);
1143
1144         len -= magic_len;
1145         data += magic_len;
1146
1147         /* loop elements */
1148         while (len > sizeof(struct ath10k_fw_ie)) {
1149                 hdr = (struct ath10k_fw_ie *)data;
1150
1151                 ie_id = le32_to_cpu(hdr->id);
1152                 ie_len = le32_to_cpu(hdr->len);
1153
1154                 len -= sizeof(*hdr);
1155                 data += sizeof(*hdr);
1156
1157                 if (len < ie_len) {
1158                         ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
1159                                    ie_id, len, ie_len);
1160                         ret = -EINVAL;
1161                         goto err;
1162                 }
1163
1164                 switch (ie_id) {
1165                 case ATH10K_FW_IE_FW_VERSION:
1166                         if (ie_len > sizeof(fw_file->fw_version) - 1)
1167                                 break;
1168
1169                         memcpy(fw_file->fw_version, data, ie_len);
1170                         fw_file->fw_version[ie_len] = '\0';
1171
1172                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1173                                    "found fw version %s\n",
1174                                     fw_file->fw_version);
1175                         break;
1176                 case ATH10K_FW_IE_TIMESTAMP:
1177                         if (ie_len != sizeof(u32))
1178                                 break;
1179
1180                         timestamp = (__le32 *)data;
1181
1182                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
1183                                    le32_to_cpup(timestamp));
1184                         break;
1185                 case ATH10K_FW_IE_FEATURES:
1186                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1187                                    "found firmware features ie (%zd B)\n",
1188                                    ie_len);
1189
1190                         for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
1191                                 index = i / 8;
1192                                 bit = i % 8;
1193
1194                                 if (index == ie_len)
1195                                         break;
1196
1197                                 if (data[index] & (1 << bit)) {
1198                                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1199                                                    "Enabling feature bit: %i\n",
1200                                                    i);
1201                                         __set_bit(i, fw_file->fw_features);
1202                                 }
1203                         }
1204
1205                         ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
1206                                         fw_file->fw_features,
1207                                         sizeof(fw_file->fw_features));
1208                         break;
1209                 case ATH10K_FW_IE_FW_IMAGE:
1210                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1211                                    "found fw image ie (%zd B)\n",
1212                                    ie_len);
1213
1214                         fw_file->firmware_data = data;
1215                         fw_file->firmware_len = ie_len;
1216
1217                         break;
1218                 case ATH10K_FW_IE_OTP_IMAGE:
1219                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1220                                    "found otp image ie (%zd B)\n",
1221                                    ie_len);
1222
1223                         fw_file->otp_data = data;
1224                         fw_file->otp_len = ie_len;
1225
1226                         break;
1227                 case ATH10K_FW_IE_WMI_OP_VERSION:
1228                         if (ie_len != sizeof(u32))
1229                                 break;
1230
1231                         version = (__le32 *)data;
1232
1233                         fw_file->wmi_op_version = le32_to_cpup(version);
1234
1235                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n",
1236                                    fw_file->wmi_op_version);
1237                         break;
1238                 case ATH10K_FW_IE_HTT_OP_VERSION:
1239                         if (ie_len != sizeof(u32))
1240                                 break;
1241
1242                         version = (__le32 *)data;
1243
1244                         fw_file->htt_op_version = le32_to_cpup(version);
1245
1246                         ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n",
1247                                    fw_file->htt_op_version);
1248                         break;
1249                 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE:
1250                         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1251                                    "found fw code swap image ie (%zd B)\n",
1252                                    ie_len);
1253                         fw_file->codeswap_data = data;
1254                         fw_file->codeswap_len = ie_len;
1255                         break;
1256                 default:
1257                         ath10k_warn(ar, "Unknown FW IE: %u\n",
1258                                     le32_to_cpu(hdr->id));
1259                         break;
1260                 }
1261
1262                 /* jump over the padding */
1263                 ie_len = ALIGN(ie_len, 4);
1264
1265                 len -= ie_len;
1266                 data += ie_len;
1267         }
1268
1269         if (!fw_file->firmware_data ||
1270             !fw_file->firmware_len) {
1271                 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
1272                             ar->hw_params.fw.dir, name);
1273                 ret = -ENOMEDIUM;
1274                 goto err;
1275         }
1276
1277         return 0;
1278
1279 err:
1280         ath10k_core_free_firmware_files(ar);
1281         return ret;
1282 }
1283
1284 static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
1285 {
1286         int ret;
1287
1288         /* calibration file is optional, don't check for any errors */
1289         ath10k_fetch_cal_file(ar);
1290
1291         ar->fw_api = 5;
1292         ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1293
1294         ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API5_FILE,
1295                                                &ar->normal_mode_fw.fw_file);
1296         if (ret == 0)
1297                 goto success;
1298
1299         ar->fw_api = 4;
1300         ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1301
1302         ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE,
1303                                                &ar->normal_mode_fw.fw_file);
1304         if (ret == 0)
1305                 goto success;
1306
1307         ar->fw_api = 3;
1308         ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1309
1310         ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE,
1311                                                &ar->normal_mode_fw.fw_file);
1312         if (ret == 0)
1313                 goto success;
1314
1315         ar->fw_api = 2;
1316         ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
1317
1318         ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE,
1319                                                &ar->normal_mode_fw.fw_file);
1320         if (ret)
1321                 return ret;
1322
1323 success:
1324         ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
1325
1326         return 0;
1327 }
1328
1329 static int ath10k_core_pre_cal_download(struct ath10k *ar)
1330 {
1331         int ret;
1332
1333         ret = ath10k_download_cal_file(ar, ar->pre_cal_file);
1334         if (ret == 0) {
1335                 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE;
1336                 goto success;
1337         }
1338
1339         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1340                    "boot did not find a pre calibration file, try DT next: %d\n",
1341                    ret);
1342
1343         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data");
1344         if (ret) {
1345                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1346                            "unable to load pre cal data from DT: %d\n", ret);
1347                 return ret;
1348         }
1349         ar->cal_mode = ATH10K_PRE_CAL_MODE_DT;
1350
1351 success:
1352         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1353                    ath10k_cal_mode_str(ar->cal_mode));
1354
1355         return 0;
1356 }
1357
1358 static int ath10k_core_pre_cal_config(struct ath10k *ar)
1359 {
1360         int ret;
1361
1362         ret = ath10k_core_pre_cal_download(ar);
1363         if (ret) {
1364                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
1365                            "failed to load pre cal data: %d\n", ret);
1366                 return ret;
1367         }
1368
1369         ret = ath10k_core_get_board_id_from_otp(ar);
1370         if (ret) {
1371                 ath10k_err(ar, "failed to get board id: %d\n", ret);
1372                 return ret;
1373         }
1374
1375         ret = ath10k_download_and_run_otp(ar);
1376         if (ret) {
1377                 ath10k_err(ar, "failed to run otp: %d\n", ret);
1378                 return ret;
1379         }
1380
1381         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1382                    "pre cal configuration done successfully\n");
1383
1384         return 0;
1385 }
1386
1387 static int ath10k_download_cal_data(struct ath10k *ar)
1388 {
1389         int ret;
1390
1391         ret = ath10k_core_pre_cal_config(ar);
1392         if (ret == 0)
1393                 return 0;
1394
1395         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1396                    "pre cal download procedure failed, try cal file: %d\n",
1397                    ret);
1398
1399         ret = ath10k_download_cal_file(ar, ar->cal_file);
1400         if (ret == 0) {
1401                 ar->cal_mode = ATH10K_CAL_MODE_FILE;
1402                 goto done;
1403         }
1404
1405         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1406                    "boot did not find a calibration file, try DT next: %d\n",
1407                    ret);
1408
1409         ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data");
1410         if (ret == 0) {
1411                 ar->cal_mode = ATH10K_CAL_MODE_DT;
1412                 goto done;
1413         }
1414
1415         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1416                    "boot did not find DT entry, try target EEPROM next: %d\n",
1417                    ret);
1418
1419         ret = ath10k_download_cal_eeprom(ar);
1420         if (ret == 0) {
1421                 ar->cal_mode = ATH10K_CAL_MODE_EEPROM;
1422                 goto done;
1423         }
1424
1425         ath10k_dbg(ar, ATH10K_DBG_BOOT,
1426                    "boot did not find target EEPROM entry, try OTP next: %d\n",
1427                    ret);
1428
1429         ret = ath10k_download_and_run_otp(ar);
1430         if (ret) {
1431                 ath10k_err(ar, "failed to run otp: %d\n", ret);
1432                 return ret;
1433         }
1434
1435         ar->cal_mode = ATH10K_CAL_MODE_OTP;
1436
1437 done:
1438         ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
1439                    ath10k_cal_mode_str(ar->cal_mode));
1440         return 0;
1441 }
1442
1443 static int ath10k_init_uart(struct ath10k *ar)
1444 {
1445         int ret;
1446
1447         /*
1448          * Explicitly setting UART prints to zero as target turns it on
1449          * based on scratch registers.
1450          */
1451         ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
1452         if (ret) {
1453                 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
1454                 return ret;
1455         }
1456
1457         if (!uart_print)
1458                 return 0;
1459
1460         ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin);
1461         if (ret) {
1462                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
1463                 return ret;
1464         }
1465
1466         ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
1467         if (ret) {
1468                 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
1469                 return ret;
1470         }
1471
1472         /* Set the UART baud rate to 19200. */
1473         ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
1474         if (ret) {
1475                 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
1476                 return ret;
1477         }
1478
1479         ath10k_info(ar, "UART prints enabled\n");
1480         return 0;
1481 }
1482
1483 static int ath10k_init_hw_params(struct ath10k *ar)
1484 {
1485         const struct ath10k_hw_params *uninitialized_var(hw_params);
1486         int i;
1487
1488         for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
1489                 hw_params = &ath10k_hw_params_list[i];
1490
1491                 if (hw_params->id == ar->target_version &&
1492                     hw_params->dev_id == ar->dev_id)
1493                         break;
1494         }
1495
1496         if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
1497                 ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
1498                            ar->target_version);
1499                 return -EINVAL;
1500         }
1501
1502         ar->hw_params = *hw_params;
1503
1504         ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
1505                    ar->hw_params.name, ar->target_version);
1506
1507         return 0;
1508 }
1509
1510 static void ath10k_core_restart(struct work_struct *work)
1511 {
1512         struct ath10k *ar = container_of(work, struct ath10k, restart_work);
1513
1514         set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1515
1516         /* Place a barrier to make sure the compiler doesn't reorder
1517          * CRASH_FLUSH and calling other functions.
1518          */
1519         barrier();
1520
1521         ieee80211_stop_queues(ar->hw);
1522         ath10k_drain_tx(ar);
1523         complete(&ar->scan.started);
1524         complete(&ar->scan.completed);
1525         complete(&ar->scan.on_channel);
1526         complete(&ar->offchan_tx_completed);
1527         complete(&ar->install_key_done);
1528         complete(&ar->vdev_setup_done);
1529         complete(&ar->thermal.wmi_sync);
1530         complete(&ar->bss_survey_done);
1531         wake_up(&ar->htt.empty_tx_wq);
1532         wake_up(&ar->wmi.tx_credits_wq);
1533         wake_up(&ar->peer_mapping_wq);
1534
1535         mutex_lock(&ar->conf_mutex);
1536
1537         switch (ar->state) {
1538         case ATH10K_STATE_ON:
1539                 ar->state = ATH10K_STATE_RESTARTING;
1540                 ath10k_halt(ar);
1541                 ath10k_scan_finish(ar);
1542                 ieee80211_restart_hw(ar->hw);
1543                 break;
1544         case ATH10K_STATE_OFF:
1545                 /* this can happen if driver is being unloaded
1546                  * or if the crash happens during FW probing */
1547                 ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
1548                 break;
1549         case ATH10K_STATE_RESTARTING:
1550                 /* hw restart might be requested from multiple places */
1551                 break;
1552         case ATH10K_STATE_RESTARTED:
1553                 ar->state = ATH10K_STATE_WEDGED;
1554                 /* fall through */
1555         case ATH10K_STATE_WEDGED:
1556                 ath10k_warn(ar, "device is wedged, will not restart\n");
1557                 break;
1558         case ATH10K_STATE_UTF:
1559                 ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
1560                 break;
1561         }
1562
1563         mutex_unlock(&ar->conf_mutex);
1564 }
1565
1566 static void ath10k_core_set_coverage_class_work(struct work_struct *work)
1567 {
1568         struct ath10k *ar = container_of(work, struct ath10k,
1569                                          set_coverage_class_work);
1570
1571         if (ar->hw_params.hw_ops->set_coverage_class)
1572                 ar->hw_params.hw_ops->set_coverage_class(ar, -1);
1573 }
1574
1575 static int ath10k_core_init_firmware_features(struct ath10k *ar)
1576 {
1577         struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file;
1578
1579         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) &&
1580             !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
1581                 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
1582                 return -EINVAL;
1583         }
1584
1585         if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) {
1586                 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n",
1587                            ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version);
1588                 return -EINVAL;
1589         }
1590
1591         ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI;
1592         switch (ath10k_cryptmode_param) {
1593         case ATH10K_CRYPT_MODE_HW:
1594                 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1595                 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1596                 break;
1597         case ATH10K_CRYPT_MODE_SW:
1598                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1599                               fw_file->fw_features)) {
1600                         ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware");
1601                         return -EINVAL;
1602                 }
1603
1604                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1605                 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags);
1606                 break;
1607         default:
1608                 ath10k_info(ar, "invalid cryptmode: %d\n",
1609                             ath10k_cryptmode_param);
1610                 return -EINVAL;
1611         }
1612
1613         ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT;
1614         ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT;
1615
1616         if (rawmode) {
1617                 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT,
1618                               fw_file->fw_features)) {
1619                         ath10k_err(ar, "rawmode = 1 requires support from firmware");
1620                         return -EINVAL;
1621                 }
1622                 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags);
1623         }
1624
1625         if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) {
1626                 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW;
1627
1628                 /* Workaround:
1629                  *
1630                  * Firmware A-MSDU aggregation breaks with RAW Tx encap mode
1631                  * and causes enormous performance issues (malformed frames,
1632                  * etc).
1633                  *
1634                  * Disabling A-MSDU makes RAW mode stable with heavy traffic
1635                  * albeit a bit slower compared to regular operation.
1636                  */
1637                 ar->htt.max_num_amsdu = 1;
1638         }
1639
1640         /* Backwards compatibility for firmwares without
1641          * ATH10K_FW_IE_WMI_OP_VERSION.
1642          */
1643         if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) {
1644                 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) {
1645                         if (test_bit(ATH10K_FW_FEATURE_WMI_10_2,
1646                                      fw_file->fw_features))
1647                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2;
1648                         else
1649                                 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1;
1650                 } else {
1651                         fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN;
1652                 }
1653         }
1654
1655         switch (fw_file->wmi_op_version) {
1656         case ATH10K_FW_WMI_OP_VERSION_MAIN:
1657                 ar->max_num_peers = TARGET_NUM_PEERS;
1658                 ar->max_num_stations = TARGET_NUM_STATIONS;
1659                 ar->max_num_vdevs = TARGET_NUM_VDEVS;
1660                 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC;
1661                 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1662                         WMI_STAT_PEER;
1663                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1664                 break;
1665         case ATH10K_FW_WMI_OP_VERSION_10_1:
1666         case ATH10K_FW_WMI_OP_VERSION_10_2:
1667         case ATH10K_FW_WMI_OP_VERSION_10_2_4:
1668                 if (ath10k_peer_stats_enabled(ar)) {
1669                         ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS;
1670                         ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS;
1671                 } else {
1672                         ar->max_num_peers = TARGET_10X_NUM_PEERS;
1673                         ar->max_num_stations = TARGET_10X_NUM_STATIONS;
1674                 }
1675                 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS;
1676                 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
1677                 ar->fw_stats_req_mask = WMI_STAT_PEER;
1678                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1679                 break;
1680         case ATH10K_FW_WMI_OP_VERSION_TLV:
1681                 ar->max_num_peers = TARGET_TLV_NUM_PEERS;
1682                 ar->max_num_stations = TARGET_TLV_NUM_STATIONS;
1683                 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS;
1684                 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS;
1685                 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC;
1686                 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS;
1687                 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV |
1688                         WMI_STAT_PEER;
1689                 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM;
1690                 break;
1691         case ATH10K_FW_WMI_OP_VERSION_10_4:
1692                 ar->max_num_peers = TARGET_10_4_NUM_PEERS;
1693                 ar->max_num_stations = TARGET_10_4_NUM_STATIONS;
1694                 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS;
1695                 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS;
1696                 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS;
1697                 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER |
1698                                         WMI_10_4_STAT_PEER_EXTD;
1699                 ar->max_spatial_stream = ar->hw_params.max_spatial_stream;
1700
1701                 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
1702                              fw_file->fw_features))
1703                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC;
1704                 else
1705                         ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC;
1706                 break;
1707         case ATH10K_FW_WMI_OP_VERSION_UNSET:
1708         case ATH10K_FW_WMI_OP_VERSION_MAX:
1709                 WARN_ON(1);
1710                 return -EINVAL;
1711         }
1712
1713         /* Backwards compatibility for firmwares without
1714          * ATH10K_FW_IE_HTT_OP_VERSION.
1715          */
1716         if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) {
1717                 switch (fw_file->wmi_op_version) {
1718                 case ATH10K_FW_WMI_OP_VERSION_MAIN:
1719                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN;
1720                         break;
1721                 case ATH10K_FW_WMI_OP_VERSION_10_1:
1722                 case ATH10K_FW_WMI_OP_VERSION_10_2:
1723                 case ATH10K_FW_WMI_OP_VERSION_10_2_4:
1724                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1;
1725                         break;
1726                 case ATH10K_FW_WMI_OP_VERSION_TLV:
1727                         fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV;
1728                         break;
1729                 case ATH10K_FW_WMI_OP_VERSION_10_4:
1730                 case ATH10K_FW_WMI_OP_VERSION_UNSET:
1731                 case ATH10K_FW_WMI_OP_VERSION_MAX:
1732                         ath10k_err(ar, "htt op version not found from fw meta data");
1733                         return -EINVAL;
1734                 }
1735         }
1736
1737         return 0;
1738 }
1739
1740 static int ath10k_core_reset_rx_filter(struct ath10k *ar)
1741 {
1742         int ret;
1743         int vdev_id;
1744         int vdev_type;
1745         int vdev_subtype;
1746         const u8 *vdev_addr;
1747
1748         vdev_id = 0;
1749         vdev_type = WMI_VDEV_TYPE_STA;
1750         vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE);
1751         vdev_addr = ar->mac_addr;
1752
1753         ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype,
1754                                      vdev_addr);
1755         if (ret) {
1756                 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret);
1757                 return ret;
1758         }
1759
1760         ret = ath10k_wmi_vdev_delete(ar, vdev_id);
1761         if (ret) {
1762                 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret);
1763                 return ret;
1764         }
1765
1766         /* WMI and HTT may use separate HIF pipes and are not guaranteed to be
1767          * serialized properly implicitly.
1768          *
1769          * Moreover (most) WMI commands have no explicit acknowledges. It is
1770          * possible to infer it implicitly by poking firmware with echo
1771          * command - getting a reply means all preceding comments have been
1772          * (mostly) processed.
1773          *
1774          * In case of vdev create/delete this is sufficient.
1775          *
1776          * Without this it's possible to end up with a race when HTT Rx ring is
1777          * started before vdev create/delete hack is complete allowing a short
1778          * window of opportunity to receive (and Tx ACK) a bunch of frames.
1779          */
1780         ret = ath10k_wmi_barrier(ar);
1781         if (ret) {
1782                 ath10k_err(ar, "failed to ping firmware: %d\n", ret);
1783                 return ret;
1784         }
1785
1786         return 0;
1787 }
1788
1789 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
1790                       const struct ath10k_fw_components *fw)
1791 {
1792         int status;
1793         u32 val;
1794
1795         lockdep_assert_held(&ar->conf_mutex);
1796
1797         clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
1798
1799         ar->running_fw = fw;
1800
1801         ath10k_bmi_start(ar);
1802
1803         if (ath10k_init_configure_target(ar)) {
1804                 status = -EINVAL;
1805                 goto err;
1806         }
1807
1808         status = ath10k_download_cal_data(ar);
1809         if (status)
1810                 goto err;
1811
1812         /* Some of of qca988x solutions are having global reset issue
1813          * during target initialization. Bypassing PLL setting before
1814          * downloading firmware and letting the SoC run on REF_CLK is
1815          * fixing the problem. Corresponding firmware change is also needed
1816          * to set the clock source once the target is initialized.
1817          */
1818         if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT,
1819                      ar->running_fw->fw_file.fw_features)) {
1820                 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1);
1821                 if (status) {
1822                         ath10k_err(ar, "could not write to skip_clock_init: %d\n",
1823                                    status);
1824                         goto err;
1825                 }
1826         }
1827
1828         status = ath10k_download_fw(ar);
1829         if (status)
1830                 goto err;
1831
1832         status = ath10k_init_uart(ar);
1833         if (status)
1834                 goto err;
1835
1836         ar->htc.htc_ops.target_send_suspend_complete =
1837                 ath10k_send_suspend_complete;
1838
1839         status = ath10k_htc_init(ar);
1840         if (status) {
1841                 ath10k_err(ar, "could not init HTC (%d)\n", status);
1842                 goto err;
1843         }
1844
1845         status = ath10k_bmi_done(ar);
1846         if (status)
1847                 goto err;
1848
1849         status = ath10k_wmi_attach(ar);
1850         if (status) {
1851                 ath10k_err(ar, "WMI attach failed: %d\n", status);
1852                 goto err;
1853         }
1854
1855         status = ath10k_htt_init(ar);
1856         if (status) {
1857                 ath10k_err(ar, "failed to init htt: %d\n", status);
1858                 goto err_wmi_detach;
1859         }
1860
1861         status = ath10k_htt_tx_start(&ar->htt);
1862         if (status) {
1863                 ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
1864                 goto err_wmi_detach;
1865         }
1866
1867         status = ath10k_htt_rx_alloc(&ar->htt);
1868         if (status) {
1869                 ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
1870                 goto err_htt_tx_detach;
1871         }
1872
1873         status = ath10k_hif_start(ar);
1874         if (status) {
1875                 ath10k_err(ar, "could not start HIF: %d\n", status);
1876                 goto err_htt_rx_detach;
1877         }
1878
1879         status = ath10k_htc_wait_target(&ar->htc);
1880         if (status) {
1881                 ath10k_err(ar, "failed to connect to HTC: %d\n", status);
1882                 goto err_hif_stop;
1883         }
1884
1885         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1886                 status = ath10k_htt_connect(&ar->htt);
1887                 if (status) {
1888                         ath10k_err(ar, "failed to connect htt (%d)\n", status);
1889                         goto err_hif_stop;
1890                 }
1891         }
1892
1893         status = ath10k_wmi_connect(ar);
1894         if (status) {
1895                 ath10k_err(ar, "could not connect wmi: %d\n", status);
1896                 goto err_hif_stop;
1897         }
1898
1899         status = ath10k_htc_start(&ar->htc);
1900         if (status) {
1901                 ath10k_err(ar, "failed to start htc: %d\n", status);
1902                 goto err_hif_stop;
1903         }
1904
1905         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1906                 status = ath10k_wmi_wait_for_service_ready(ar);
1907                 if (status) {
1908                         ath10k_warn(ar, "wmi service ready event not received");
1909                         goto err_hif_stop;
1910                 }
1911         }
1912
1913         ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
1914                    ar->hw->wiphy->fw_version);
1915
1916         if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) &&
1917             mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1918                 val = 0;
1919                 if (ath10k_peer_stats_enabled(ar))
1920                         val = WMI_10_4_PEER_STATS;
1921
1922                 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
1923                         val |= WMI_10_4_BSS_CHANNEL_INFO_64;
1924
1925                 /* 10.4 firmware supports BT-Coex without reloading firmware
1926                  * via pdev param. To support Bluetooth coexistence pdev param,
1927                  * WMI_COEX_GPIO_SUPPORT of extended resource config should be
1928                  * enabled always.
1929                  */
1930                 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) &&
1931                     test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM,
1932                              ar->running_fw->fw_file.fw_features))
1933                         val |= WMI_10_4_COEX_GPIO_SUPPORT;
1934
1935                 status = ath10k_mac_ext_resource_config(ar, val);
1936                 if (status) {
1937                         ath10k_err(ar,
1938                                    "failed to send ext resource cfg command : %d\n",
1939                                    status);
1940                         goto err_hif_stop;
1941                 }
1942         }
1943
1944         status = ath10k_wmi_cmd_init(ar);
1945         if (status) {
1946                 ath10k_err(ar, "could not send WMI init command (%d)\n",
1947                            status);
1948                 goto err_hif_stop;
1949         }
1950
1951         status = ath10k_wmi_wait_for_unified_ready(ar);
1952         if (status) {
1953                 ath10k_err(ar, "wmi unified ready event not received\n");
1954                 goto err_hif_stop;
1955         }
1956
1957         /* Some firmware revisions do not properly set up hardware rx filter
1958          * registers.
1959          *
1960          * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK
1961          * is filled with 0s instead of 1s allowing HW to respond with ACKs to
1962          * any frames that matches MAC_PCU_RX_FILTER which is also
1963          * misconfigured to accept anything.
1964          *
1965          * The ADDR1 is programmed using internal firmware structure field and
1966          * can't be (easily/sanely) reached from the driver explicitly. It is
1967          * possible to implicitly make it correct by creating a dummy vdev and
1968          * then deleting it.
1969          */
1970         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
1971                 status = ath10k_core_reset_rx_filter(ar);
1972                 if (status) {
1973                         ath10k_err(ar,
1974                                    "failed to reset rx filter: %d\n", status);
1975                         goto err_hif_stop;
1976                 }
1977         }
1978
1979         /* If firmware indicates Full Rx Reorder support it must be used in a
1980          * slightly different manner. Let HTT code know.
1981          */
1982         ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER,
1983                                                 ar->wmi.svc_map));
1984
1985         status = ath10k_htt_rx_ring_refill(ar);
1986         if (status) {
1987                 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status);
1988                 goto err_hif_stop;
1989         }
1990
1991         if (ar->max_num_vdevs >= 64)
1992                 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL;
1993         else
1994                 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1;
1995
1996         INIT_LIST_HEAD(&ar->arvifs);
1997
1998         /* we don't care about HTT in UTF mode */
1999         if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
2000                 status = ath10k_htt_setup(&ar->htt);
2001                 if (status) {
2002                         ath10k_err(ar, "failed to setup htt: %d\n", status);
2003                         goto err_hif_stop;
2004                 }
2005         }
2006
2007         status = ath10k_debug_start(ar);
2008         if (status)
2009                 goto err_hif_stop;
2010
2011         return 0;
2012
2013 err_hif_stop:
2014         ath10k_hif_stop(ar);
2015 err_htt_rx_detach:
2016         ath10k_htt_rx_free(&ar->htt);
2017 err_htt_tx_detach:
2018         ath10k_htt_tx_free(&ar->htt);
2019 err_wmi_detach:
2020         ath10k_wmi_detach(ar);
2021 err:
2022         return status;
2023 }
2024 EXPORT_SYMBOL(ath10k_core_start);
2025
2026 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
2027 {
2028         int ret;
2029         unsigned long time_left;
2030
2031         reinit_completion(&ar->target_suspend);
2032
2033         ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
2034         if (ret) {
2035                 ath10k_warn(ar, "could not suspend target (%d)\n", ret);
2036                 return ret;
2037         }
2038
2039         time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
2040
2041         if (!time_left) {
2042                 ath10k_warn(ar, "suspend timed out - target pause event never came\n");
2043                 return -ETIMEDOUT;
2044         }
2045
2046         return 0;
2047 }
2048
2049 void ath10k_core_stop(struct ath10k *ar)
2050 {
2051         lockdep_assert_held(&ar->conf_mutex);
2052         ath10k_debug_stop(ar);
2053
2054         /* try to suspend target */
2055         if (ar->state != ATH10K_STATE_RESTARTING &&
2056             ar->state != ATH10K_STATE_UTF)
2057                 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
2058
2059         ath10k_hif_stop(ar);
2060         ath10k_htt_tx_stop(&ar->htt);
2061         ath10k_htt_rx_free(&ar->htt);
2062         ath10k_wmi_detach(ar);
2063 }
2064 EXPORT_SYMBOL(ath10k_core_stop);
2065
2066 /* mac80211 manages fw/hw initialization through start/stop hooks. However in
2067  * order to know what hw capabilities should be advertised to mac80211 it is
2068  * necessary to load the firmware (and tear it down immediately since start
2069  * hook will try to init it again) before registering */
2070 static int ath10k_core_probe_fw(struct ath10k *ar)
2071 {
2072         struct bmi_target_info target_info;
2073         int ret = 0;
2074
2075         ret = ath10k_hif_power_up(ar);
2076         if (ret) {
2077                 ath10k_err(ar, "could not start pci hif (%d)\n", ret);
2078                 return ret;
2079         }
2080
2081         memset(&target_info, 0, sizeof(target_info));
2082         ret = ath10k_bmi_get_target_info(ar, &target_info);
2083         if (ret) {
2084                 ath10k_err(ar, "could not get target info (%d)\n", ret);
2085                 goto err_power_down;
2086         }
2087
2088         ar->target_version = target_info.version;
2089         ar->hw->wiphy->hw_version = target_info.version;
2090
2091         ret = ath10k_init_hw_params(ar);
2092         if (ret) {
2093                 ath10k_err(ar, "could not get hw params (%d)\n", ret);
2094                 goto err_power_down;
2095         }
2096
2097         ret = ath10k_core_fetch_firmware_files(ar);
2098         if (ret) {
2099                 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
2100                 goto err_power_down;
2101         }
2102
2103         BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) !=
2104                      sizeof(ar->normal_mode_fw.fw_file.fw_version));
2105         memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version,
2106                sizeof(ar->hw->wiphy->fw_version));
2107
2108         ath10k_debug_print_hwfw_info(ar);
2109
2110         ret = ath10k_core_pre_cal_download(ar);
2111         if (ret) {
2112                 /* pre calibration data download is not necessary
2113                  * for all the chipsets. Ignore failures and continue.
2114                  */
2115                 ath10k_dbg(ar, ATH10K_DBG_BOOT,
2116                            "could not load pre cal data: %d\n", ret);
2117         }
2118
2119         ret = ath10k_core_get_board_id_from_otp(ar);
2120         if (ret && ret != -EOPNOTSUPP) {
2121                 ath10k_err(ar, "failed to get board id from otp: %d\n",
2122                            ret);
2123                 goto err_free_firmware_files;
2124         }
2125
2126         ret = ath10k_core_fetch_board_file(ar);
2127         if (ret) {
2128                 ath10k_err(ar, "failed to fetch board file: %d\n", ret);
2129                 goto err_free_firmware_files;
2130         }
2131
2132         ath10k_debug_print_board_info(ar);
2133
2134         ret = ath10k_core_init_firmware_features(ar);
2135         if (ret) {
2136                 ath10k_err(ar, "fatal problem with firmware features: %d\n",
2137                            ret);
2138                 goto err_free_firmware_files;
2139         }
2140
2141         ret = ath10k_swap_code_seg_init(ar, &ar->normal_mode_fw.fw_file);
2142         if (ret) {
2143                 ath10k_err(ar, "failed to initialize code swap segment: %d\n",
2144                            ret);
2145                 goto err_free_firmware_files;
2146         }
2147
2148         mutex_lock(&ar->conf_mutex);
2149
2150         ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL,
2151                                 &ar->normal_mode_fw);
2152         if (ret) {
2153                 ath10k_err(ar, "could not init core (%d)\n", ret);
2154                 goto err_unlock;
2155         }
2156
2157         ath10k_debug_print_boot_info(ar);
2158         ath10k_core_stop(ar);
2159
2160         mutex_unlock(&ar->conf_mutex);
2161
2162         ath10k_hif_power_down(ar);
2163         return 0;
2164
2165 err_unlock:
2166         mutex_unlock(&ar->conf_mutex);
2167
2168 err_free_firmware_files:
2169         ath10k_core_free_firmware_files(ar);
2170
2171 err_power_down:
2172         ath10k_hif_power_down(ar);
2173
2174         return ret;
2175 }
2176
2177 static void ath10k_core_register_work(struct work_struct *work)
2178 {
2179         struct ath10k *ar = container_of(work, struct ath10k, register_work);
2180         int status;
2181
2182         /* peer stats are enabled by default */
2183         set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags);
2184
2185         status = ath10k_core_probe_fw(ar);
2186         if (status) {
2187                 ath10k_err(ar, "could not probe fw (%d)\n", status);
2188                 goto err;
2189         }
2190
2191         status = ath10k_mac_register(ar);
2192         if (status) {
2193                 ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
2194                 goto err_release_fw;
2195         }
2196
2197         status = ath10k_debug_register(ar);
2198         if (status) {
2199                 ath10k_err(ar, "unable to initialize debugfs\n");
2200                 goto err_unregister_mac;
2201         }
2202
2203         status = ath10k_spectral_create(ar);
2204         if (status) {
2205                 ath10k_err(ar, "failed to initialize spectral\n");
2206                 goto err_debug_destroy;
2207         }
2208
2209         status = ath10k_thermal_register(ar);
2210         if (status) {
2211                 ath10k_err(ar, "could not register thermal device: %d\n",
2212                            status);
2213                 goto err_spectral_destroy;
2214         }
2215
2216         set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
2217         return;
2218
2219 err_spectral_destroy:
2220         ath10k_spectral_destroy(ar);
2221 err_debug_destroy:
2222         ath10k_debug_destroy(ar);
2223 err_unregister_mac:
2224         ath10k_mac_unregister(ar);
2225 err_release_fw:
2226         ath10k_core_free_firmware_files(ar);
2227 err:
2228         /* TODO: It's probably a good idea to release device from the driver
2229          * but calling device_release_driver() here will cause a deadlock.
2230          */
2231         return;
2232 }
2233
2234 int ath10k_core_register(struct ath10k *ar, u32 chip_id)
2235 {
2236         ar->chip_id = chip_id;
2237         queue_work(ar->workqueue, &ar->register_work);
2238
2239         return 0;
2240 }
2241 EXPORT_SYMBOL(ath10k_core_register);
2242
2243 void ath10k_core_unregister(struct ath10k *ar)
2244 {
2245         cancel_work_sync(&ar->register_work);
2246
2247         if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
2248                 return;
2249
2250         ath10k_thermal_unregister(ar);
2251         /* Stop spectral before unregistering from mac80211 to remove the
2252          * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
2253          * would be already be free'd recursively, leading to a double free.
2254          */
2255         ath10k_spectral_destroy(ar);
2256
2257         /* We must unregister from mac80211 before we stop HTC and HIF.
2258          * Otherwise we will fail to submit commands to FW and mac80211 will be
2259          * unhappy about callback failures. */
2260         ath10k_mac_unregister(ar);
2261
2262         ath10k_testmode_destroy(ar);
2263
2264         ath10k_core_free_firmware_files(ar);
2265         ath10k_core_free_board_files(ar);
2266
2267         ath10k_debug_unregister(ar);
2268 }
2269 EXPORT_SYMBOL(ath10k_core_unregister);
2270
2271 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
2272                                   enum ath10k_bus bus,
2273                                   enum ath10k_hw_rev hw_rev,
2274                                   const struct ath10k_hif_ops *hif_ops)
2275 {
2276         struct ath10k *ar;
2277         int ret;
2278
2279         ar = ath10k_mac_create(priv_size);
2280         if (!ar)
2281                 return NULL;
2282
2283         ar->ath_common.priv = ar;
2284         ar->ath_common.hw = ar->hw;
2285         ar->dev = dev;
2286         ar->hw_rev = hw_rev;
2287         ar->hif.ops = hif_ops;
2288         ar->hif.bus = bus;
2289
2290         switch (hw_rev) {
2291         case ATH10K_HW_QCA988X:
2292         case ATH10K_HW_QCA9887:
2293                 ar->regs = &qca988x_regs;
2294                 ar->hw_values = &qca988x_values;
2295                 break;
2296         case ATH10K_HW_QCA6174:
2297         case ATH10K_HW_QCA9377:
2298                 ar->regs = &qca6174_regs;
2299                 ar->hw_values = &qca6174_values;
2300                 break;
2301         case ATH10K_HW_QCA99X0:
2302         case ATH10K_HW_QCA9984:
2303                 ar->regs = &qca99x0_regs;
2304                 ar->hw_values = &qca99x0_values;
2305                 break;
2306         case ATH10K_HW_QCA9888:
2307                 ar->regs = &qca99x0_regs;
2308                 ar->hw_values = &qca9888_values;
2309                 break;
2310         case ATH10K_HW_QCA4019:
2311                 ar->regs = &qca4019_regs;
2312                 ar->hw_values = &qca4019_values;
2313                 break;
2314         default:
2315                 ath10k_err(ar, "unsupported core hardware revision %d\n",
2316                            hw_rev);
2317                 ret = -ENOTSUPP;
2318                 goto err_free_mac;
2319         }
2320
2321         init_completion(&ar->scan.started);
2322         init_completion(&ar->scan.completed);
2323         init_completion(&ar->scan.on_channel);
2324         init_completion(&ar->target_suspend);
2325         init_completion(&ar->wow.wakeup_completed);
2326
2327         init_completion(&ar->install_key_done);
2328         init_completion(&ar->vdev_setup_done);
2329         init_completion(&ar->thermal.wmi_sync);
2330         init_completion(&ar->bss_survey_done);
2331
2332         INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
2333
2334         ar->workqueue = create_singlethread_workqueue("ath10k_wq");
2335         if (!ar->workqueue)
2336                 goto err_free_mac;
2337
2338         ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq");
2339         if (!ar->workqueue_aux)
2340                 goto err_free_wq;
2341
2342         mutex_init(&ar->conf_mutex);
2343         spin_lock_init(&ar->data_lock);
2344         spin_lock_init(&ar->txqs_lock);
2345
2346         INIT_LIST_HEAD(&ar->txqs);
2347         INIT_LIST_HEAD(&ar->peers);
2348         init_waitqueue_head(&ar->peer_mapping_wq);
2349         init_waitqueue_head(&ar->htt.empty_tx_wq);
2350         init_waitqueue_head(&ar->wmi.tx_credits_wq);
2351
2352         init_completion(&ar->offchan_tx_completed);
2353         INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
2354         skb_queue_head_init(&ar->offchan_tx_queue);
2355
2356         INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
2357         skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
2358
2359         INIT_WORK(&ar->register_work, ath10k_core_register_work);
2360         INIT_WORK(&ar->restart_work, ath10k_core_restart);
2361         INIT_WORK(&ar->set_coverage_class_work,
2362                   ath10k_core_set_coverage_class_work);
2363
2364         init_dummy_netdev(&ar->napi_dev);
2365
2366         ret = ath10k_debug_create(ar);
2367         if (ret)
2368                 goto err_free_aux_wq;
2369
2370         return ar;
2371
2372 err_free_aux_wq:
2373         destroy_workqueue(ar->workqueue_aux);
2374 err_free_wq:
2375         destroy_workqueue(ar->workqueue);
2376
2377 err_free_mac:
2378         ath10k_mac_destroy(ar);
2379
2380         return NULL;
2381 }
2382 EXPORT_SYMBOL(ath10k_core_create);
2383
2384 void ath10k_core_destroy(struct ath10k *ar)
2385 {
2386         flush_workqueue(ar->workqueue);
2387         destroy_workqueue(ar->workqueue);
2388
2389         flush_workqueue(ar->workqueue_aux);
2390         destroy_workqueue(ar->workqueue_aux);
2391
2392         ath10k_debug_destroy(ar);
2393         ath10k_htt_tx_destroy(&ar->htt);
2394         ath10k_wmi_free_host_mem(ar);
2395         ath10k_mac_destroy(ar);
2396 }
2397 EXPORT_SYMBOL(ath10k_core_destroy);
2398
2399 MODULE_AUTHOR("Qualcomm Atheros");
2400 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards.");
2401 MODULE_LICENSE("Dual BSD/GPL");