1 // SPDX-License-Identifier: GPL-2.0-only
2 /****************************************************************************
3 * Driver for Solarflare network controllers and boards
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2005-2013 Solarflare Communications Inc.
8 #include <linux/module.h>
10 #include <linux/netdevice.h>
11 #include <linux/etherdevice.h>
12 #include <linux/delay.h>
13 #include <linux/notifier.h>
15 #include <linux/tcp.h>
17 #include <linux/ethtool.h>
18 #include <linux/topology.h>
19 #include <linux/gfp.h>
20 #include <linux/aer.h>
21 #include <linux/interrupt.h>
22 #include "net_driver.h"
24 #include <net/udp_tunnel.h>
32 #include "mcdi_pcol.h"
33 #include "workarounds.h"
35 /**************************************************************************
39 **************************************************************************
42 /* Loopback mode names (see LOOPBACK_MODE()) */
43 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
44 const char *const efx_loopback_mode_names[] = {
45 [LOOPBACK_NONE] = "NONE",
46 [LOOPBACK_DATA] = "DATAPATH",
47 [LOOPBACK_GMAC] = "GMAC",
48 [LOOPBACK_XGMII] = "XGMII",
49 [LOOPBACK_XGXS] = "XGXS",
50 [LOOPBACK_XAUI] = "XAUI",
51 [LOOPBACK_GMII] = "GMII",
52 [LOOPBACK_SGMII] = "SGMII",
53 [LOOPBACK_XGBR] = "XGBR",
54 [LOOPBACK_XFI] = "XFI",
55 [LOOPBACK_XAUI_FAR] = "XAUI_FAR",
56 [LOOPBACK_GMII_FAR] = "GMII_FAR",
57 [LOOPBACK_SGMII_FAR] = "SGMII_FAR",
58 [LOOPBACK_XFI_FAR] = "XFI_FAR",
59 [LOOPBACK_GPHY] = "GPHY",
60 [LOOPBACK_PHYXS] = "PHYXS",
61 [LOOPBACK_PCS] = "PCS",
62 [LOOPBACK_PMAPMD] = "PMA/PMD",
63 [LOOPBACK_XPORT] = "XPORT",
64 [LOOPBACK_XGMII_WS] = "XGMII_WS",
65 [LOOPBACK_XAUI_WS] = "XAUI_WS",
66 [LOOPBACK_XAUI_WS_FAR] = "XAUI_WS_FAR",
67 [LOOPBACK_XAUI_WS_NEAR] = "XAUI_WS_NEAR",
68 [LOOPBACK_GMII_WS] = "GMII_WS",
69 [LOOPBACK_XFI_WS] = "XFI_WS",
70 [LOOPBACK_XFI_WS_FAR] = "XFI_WS_FAR",
71 [LOOPBACK_PHYXS_WS] = "PHYXS_WS",
74 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
75 const char *const efx_reset_type_names[] = {
76 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
77 [RESET_TYPE_ALL] = "ALL",
78 [RESET_TYPE_RECOVER_OR_ALL] = "RECOVER_OR_ALL",
79 [RESET_TYPE_WORLD] = "WORLD",
80 [RESET_TYPE_RECOVER_OR_DISABLE] = "RECOVER_OR_DISABLE",
81 [RESET_TYPE_DATAPATH] = "DATAPATH",
82 [RESET_TYPE_MC_BIST] = "MC_BIST",
83 [RESET_TYPE_DISABLE] = "DISABLE",
84 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
85 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
86 [RESET_TYPE_DMA_ERROR] = "DMA_ERROR",
87 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
88 [RESET_TYPE_MC_FAILURE] = "MC_FAILURE",
89 [RESET_TYPE_MCDI_TIMEOUT] = "MCDI_TIMEOUT (FLR)",
92 /* UDP tunnel type names */
93 static const char *const efx_udp_tunnel_type_names[] = {
94 [TUNNEL_ENCAP_UDP_PORT_ENTRY_VXLAN] = "vxlan",
95 [TUNNEL_ENCAP_UDP_PORT_ENTRY_GENEVE] = "geneve",
98 void efx_get_udp_tunnel_type_name(u16 type, char *buf, size_t buflen)
100 if (type < ARRAY_SIZE(efx_udp_tunnel_type_names) &&
101 efx_udp_tunnel_type_names[type] != NULL)
102 snprintf(buf, buflen, "%s", efx_udp_tunnel_type_names[type]);
104 snprintf(buf, buflen, "type %d", type);
107 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
108 * queued onto this work queue. This is not a per-nic work queue, because
109 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
111 static struct workqueue_struct *reset_workqueue;
113 /* How often and how many times to poll for a reset while waiting for a
114 * BIST that another function started to complete.
116 #define BIST_WAIT_DELAY_MS 100
117 #define BIST_WAIT_DELAY_COUNT 100
119 /**************************************************************************
121 * Configurable values
123 *************************************************************************/
126 * Use separate channels for TX and RX events
128 * Set this to 1 to use separate channels for TX and RX. It allows us
129 * to control interrupt affinity separately for TX and RX.
131 * This is only used in MSI-X interrupt mode
133 bool efx_separate_tx_channels;
134 module_param(efx_separate_tx_channels, bool, 0444);
135 MODULE_PARM_DESC(efx_separate_tx_channels,
136 "Use separate channels for TX and RX");
138 /* This is the weight assigned to each of the (per-channel) virtual
141 static int napi_weight = 64;
143 /* This is the time (in jiffies) between invocations of the hardware
145 * On Falcon-based NICs, this will:
146 * - Check the on-board hardware monitor;
147 * - Poll the link state and reconfigure the hardware as necessary.
148 * On Siena-based NICs for power systems with EEH support, this will give EEH a
151 static unsigned int efx_monitor_interval = 1 * HZ;
153 /* Initial interrupt moderation settings. They can be modified after
154 * module load with ethtool.
156 * The default for RX should strike a balance between increasing the
157 * round-trip latency and reducing overhead.
159 static unsigned int rx_irq_mod_usec = 60;
161 /* Initial interrupt moderation settings. They can be modified after
162 * module load with ethtool.
164 * This default is chosen to ensure that a 10G link does not go idle
165 * while a TX queue is stopped after it has become full. A queue is
166 * restarted when it drops below half full. The time this takes (assuming
167 * worst case 3 descriptors per packet and 1024 descriptors) is
168 * 512 / 3 * 1.2 = 205 usec.
170 static unsigned int tx_irq_mod_usec = 150;
172 /* This is the first interrupt mode to try out of:
177 static unsigned int interrupt_mode;
179 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
180 * i.e. the number of CPUs among which we may distribute simultaneous
181 * interrupt handling.
183 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
184 * The default (0) means to assign an interrupt to each core.
186 static unsigned int rss_cpus;
187 module_param(rss_cpus, uint, 0444);
188 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
190 static bool phy_flash_cfg;
191 module_param(phy_flash_cfg, bool, 0644);
192 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
194 static unsigned irq_adapt_low_thresh = 8000;
195 module_param(irq_adapt_low_thresh, uint, 0644);
196 MODULE_PARM_DESC(irq_adapt_low_thresh,
197 "Threshold score for reducing IRQ moderation");
199 static unsigned irq_adapt_high_thresh = 16000;
200 module_param(irq_adapt_high_thresh, uint, 0644);
201 MODULE_PARM_DESC(irq_adapt_high_thresh,
202 "Threshold score for increasing IRQ moderation");
204 static unsigned debug = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
205 NETIF_MSG_LINK | NETIF_MSG_IFDOWN |
206 NETIF_MSG_IFUP | NETIF_MSG_RX_ERR |
207 NETIF_MSG_TX_ERR | NETIF_MSG_HW);
208 module_param(debug, uint, 0);
209 MODULE_PARM_DESC(debug, "Bitmapped debugging message enable value");
211 /**************************************************************************
213 * Utility functions and prototypes
215 *************************************************************************/
217 static int efx_soft_enable_interrupts(struct efx_nic *efx);
218 static void efx_soft_disable_interrupts(struct efx_nic *efx);
219 static void efx_remove_channel(struct efx_channel *channel);
220 static void efx_remove_channels(struct efx_nic *efx);
221 static const struct efx_channel_type efx_default_channel_type;
222 static void efx_remove_port(struct efx_nic *efx);
223 static void efx_init_napi_channel(struct efx_channel *channel);
224 static void efx_fini_napi(struct efx_nic *efx);
225 static void efx_fini_napi_channel(struct efx_channel *channel);
226 static void efx_fini_struct(struct efx_nic *efx);
227 static void efx_start_all(struct efx_nic *efx);
228 static void efx_stop_all(struct efx_nic *efx);
230 #define EFX_ASSERT_RESET_SERIALISED(efx) \
232 if ((efx->state == STATE_READY) || \
233 (efx->state == STATE_RECOVERY) || \
234 (efx->state == STATE_DISABLED)) \
238 static int efx_check_disabled(struct efx_nic *efx)
240 if (efx->state == STATE_DISABLED || efx->state == STATE_RECOVERY) {
241 netif_err(efx, drv, efx->net_dev,
242 "device is disabled due to earlier errors\n");
248 /**************************************************************************
250 * Event queue processing
252 *************************************************************************/
254 /* Process channel's event queue
256 * This function is responsible for processing the event queue of a
257 * single channel. The caller must guarantee that this function will
258 * never be concurrently called more than once on the same channel,
259 * though different channels may be being processed concurrently.
261 static int efx_process_channel(struct efx_channel *channel, int budget)
263 struct efx_tx_queue *tx_queue;
264 struct list_head rx_list;
267 if (unlikely(!channel->enabled))
270 /* Prepare the batch receive list */
271 EFX_WARN_ON_PARANOID(channel->rx_list != NULL);
272 INIT_LIST_HEAD(&rx_list);
273 channel->rx_list = &rx_list;
275 efx_for_each_channel_tx_queue(tx_queue, channel) {
276 tx_queue->pkts_compl = 0;
277 tx_queue->bytes_compl = 0;
280 spent = efx_nic_process_eventq(channel, budget);
281 if (spent && efx_channel_has_rx_queue(channel)) {
282 struct efx_rx_queue *rx_queue =
283 efx_channel_get_rx_queue(channel);
285 efx_rx_flush_packet(channel);
286 efx_fast_push_rx_descriptors(rx_queue, true);
290 efx_for_each_channel_tx_queue(tx_queue, channel) {
291 if (tx_queue->bytes_compl) {
292 netdev_tx_completed_queue(tx_queue->core_txq,
293 tx_queue->pkts_compl, tx_queue->bytes_compl);
297 /* Receive any packets we queued up */
298 netif_receive_skb_list(channel->rx_list);
299 channel->rx_list = NULL;
306 * NAPI guarantees serialisation of polls of the same device, which
307 * provides the guarantee required by efx_process_channel().
309 static void efx_update_irq_mod(struct efx_nic *efx, struct efx_channel *channel)
311 int step = efx->irq_mod_step_us;
313 if (channel->irq_mod_score < irq_adapt_low_thresh) {
314 if (channel->irq_moderation_us > step) {
315 channel->irq_moderation_us -= step;
316 efx->type->push_irq_moderation(channel);
318 } else if (channel->irq_mod_score > irq_adapt_high_thresh) {
319 if (channel->irq_moderation_us <
320 efx->irq_rx_moderation_us) {
321 channel->irq_moderation_us += step;
322 efx->type->push_irq_moderation(channel);
326 channel->irq_count = 0;
327 channel->irq_mod_score = 0;
330 static int efx_poll(struct napi_struct *napi, int budget)
332 struct efx_channel *channel =
333 container_of(napi, struct efx_channel, napi_str);
334 struct efx_nic *efx = channel->efx;
337 netif_vdbg(efx, intr, efx->net_dev,
338 "channel %d NAPI poll executing on CPU %d\n",
339 channel->channel, raw_smp_processor_id());
341 spent = efx_process_channel(channel, budget);
343 if (spent < budget) {
344 if (efx_channel_has_rx_queue(channel) &&
345 efx->irq_rx_adaptive &&
346 unlikely(++channel->irq_count == 1000)) {
347 efx_update_irq_mod(efx, channel);
350 #ifdef CONFIG_RFS_ACCEL
351 /* Perhaps expire some ARFS filters */
352 schedule_work(&channel->filter_work);
355 /* There is no race here; although napi_disable() will
356 * only wait for napi_complete(), this isn't a problem
357 * since efx_nic_eventq_read_ack() will have no effect if
358 * interrupts have already been disabled.
360 if (napi_complete_done(napi, spent))
361 efx_nic_eventq_read_ack(channel);
367 /* Create event queue
368 * Event queue memory allocations are done only once. If the channel
369 * is reset, the memory buffer will be reused; this guards against
370 * errors during channel reset and also simplifies interrupt handling.
372 static int efx_probe_eventq(struct efx_channel *channel)
374 struct efx_nic *efx = channel->efx;
375 unsigned long entries;
377 netif_dbg(efx, probe, efx->net_dev,
378 "chan %d create event queue\n", channel->channel);
380 /* Build an event queue with room for one event per tx and rx buffer,
381 * plus some extra for link state events and MCDI completions. */
382 entries = roundup_pow_of_two(efx->rxq_entries + efx->txq_entries + 128);
383 EFX_WARN_ON_PARANOID(entries > EFX_MAX_EVQ_SIZE);
384 channel->eventq_mask = max(entries, EFX_MIN_EVQ_SIZE) - 1;
386 return efx_nic_probe_eventq(channel);
389 /* Prepare channel's event queue */
390 static int efx_init_eventq(struct efx_channel *channel)
392 struct efx_nic *efx = channel->efx;
395 EFX_WARN_ON_PARANOID(channel->eventq_init);
397 netif_dbg(efx, drv, efx->net_dev,
398 "chan %d init event queue\n", channel->channel);
400 rc = efx_nic_init_eventq(channel);
402 efx->type->push_irq_moderation(channel);
403 channel->eventq_read_ptr = 0;
404 channel->eventq_init = true;
409 /* Enable event queue processing and NAPI */
410 void efx_start_eventq(struct efx_channel *channel)
412 netif_dbg(channel->efx, ifup, channel->efx->net_dev,
413 "chan %d start event queue\n", channel->channel);
415 /* Make sure the NAPI handler sees the enabled flag set */
416 channel->enabled = true;
419 napi_enable(&channel->napi_str);
420 efx_nic_eventq_read_ack(channel);
423 /* Disable event queue processing and NAPI */
424 void efx_stop_eventq(struct efx_channel *channel)
426 if (!channel->enabled)
429 napi_disable(&channel->napi_str);
430 channel->enabled = false;
433 static void efx_fini_eventq(struct efx_channel *channel)
435 if (!channel->eventq_init)
438 netif_dbg(channel->efx, drv, channel->efx->net_dev,
439 "chan %d fini event queue\n", channel->channel);
441 efx_nic_fini_eventq(channel);
442 channel->eventq_init = false;
445 static void efx_remove_eventq(struct efx_channel *channel)
447 netif_dbg(channel->efx, drv, channel->efx->net_dev,
448 "chan %d remove event queue\n", channel->channel);
450 efx_nic_remove_eventq(channel);
453 /**************************************************************************
457 *************************************************************************/
459 /* Allocate and initialise a channel structure. */
460 static struct efx_channel *
461 efx_alloc_channel(struct efx_nic *efx, int i, struct efx_channel *old_channel)
463 struct efx_channel *channel;
464 struct efx_rx_queue *rx_queue;
465 struct efx_tx_queue *tx_queue;
468 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
473 channel->channel = i;
474 channel->type = &efx_default_channel_type;
476 for (j = 0; j < EFX_TXQ_TYPES; j++) {
477 tx_queue = &channel->tx_queue[j];
479 tx_queue->queue = i * EFX_TXQ_TYPES + j;
480 tx_queue->channel = channel;
483 #ifdef CONFIG_RFS_ACCEL
484 INIT_WORK(&channel->filter_work, efx_filter_rfs_expire);
487 rx_queue = &channel->rx_queue;
489 timer_setup(&rx_queue->slow_fill, efx_rx_slow_fill, 0);
494 /* Allocate and initialise a channel structure, copying parameters
495 * (but not resources) from an old channel structure.
497 static struct efx_channel *
498 efx_copy_channel(const struct efx_channel *old_channel)
500 struct efx_channel *channel;
501 struct efx_rx_queue *rx_queue;
502 struct efx_tx_queue *tx_queue;
505 channel = kmalloc(sizeof(*channel), GFP_KERNEL);
509 *channel = *old_channel;
511 channel->napi_dev = NULL;
512 INIT_HLIST_NODE(&channel->napi_str.napi_hash_node);
513 channel->napi_str.napi_id = 0;
514 channel->napi_str.state = 0;
515 memset(&channel->eventq, 0, sizeof(channel->eventq));
517 for (j = 0; j < EFX_TXQ_TYPES; j++) {
518 tx_queue = &channel->tx_queue[j];
519 if (tx_queue->channel)
520 tx_queue->channel = channel;
521 tx_queue->buffer = NULL;
522 tx_queue->cb_page = NULL;
523 memset(&tx_queue->txd, 0, sizeof(tx_queue->txd));
526 rx_queue = &channel->rx_queue;
527 rx_queue->buffer = NULL;
528 memset(&rx_queue->rxd, 0, sizeof(rx_queue->rxd));
529 timer_setup(&rx_queue->slow_fill, efx_rx_slow_fill, 0);
530 #ifdef CONFIG_RFS_ACCEL
531 INIT_WORK(&channel->filter_work, efx_filter_rfs_expire);
537 static int efx_probe_channel(struct efx_channel *channel)
539 struct efx_tx_queue *tx_queue;
540 struct efx_rx_queue *rx_queue;
543 netif_dbg(channel->efx, probe, channel->efx->net_dev,
544 "creating channel %d\n", channel->channel);
546 rc = channel->type->pre_probe(channel);
550 rc = efx_probe_eventq(channel);
554 efx_for_each_channel_tx_queue(tx_queue, channel) {
555 rc = efx_probe_tx_queue(tx_queue);
560 efx_for_each_channel_rx_queue(rx_queue, channel) {
561 rc = efx_probe_rx_queue(rx_queue);
566 channel->rx_list = NULL;
571 efx_remove_channel(channel);
576 efx_get_channel_name(struct efx_channel *channel, char *buf, size_t len)
578 struct efx_nic *efx = channel->efx;
582 number = channel->channel;
583 if (efx->tx_channel_offset == 0) {
585 } else if (channel->channel < efx->tx_channel_offset) {
589 number -= efx->tx_channel_offset;
591 snprintf(buf, len, "%s%s-%d", efx->name, type, number);
594 static void efx_set_channel_names(struct efx_nic *efx)
596 struct efx_channel *channel;
598 efx_for_each_channel(channel, efx)
599 channel->type->get_name(channel,
600 efx->msi_context[channel->channel].name,
601 sizeof(efx->msi_context[0].name));
604 static int efx_probe_channels(struct efx_nic *efx)
606 struct efx_channel *channel;
609 /* Restart special buffer allocation */
610 efx->next_buffer_table = 0;
612 /* Probe channels in reverse, so that any 'extra' channels
613 * use the start of the buffer table. This allows the traffic
614 * channels to be resized without moving them or wasting the
615 * entries before them.
617 efx_for_each_channel_rev(channel, efx) {
618 rc = efx_probe_channel(channel);
620 netif_err(efx, probe, efx->net_dev,
621 "failed to create channel %d\n",
626 efx_set_channel_names(efx);
631 efx_remove_channels(efx);
635 /* Channels are shutdown and reinitialised whilst the NIC is running
636 * to propagate configuration changes (mtu, checksum offload), or
637 * to clear hardware error conditions
639 static void efx_start_datapath(struct efx_nic *efx)
641 netdev_features_t old_features = efx->net_dev->features;
642 bool old_rx_scatter = efx->rx_scatter;
643 struct efx_tx_queue *tx_queue;
644 struct efx_rx_queue *rx_queue;
645 struct efx_channel *channel;
648 /* Calculate the rx buffer allocation parameters required to
649 * support the current MTU, including padding for header
650 * alignment and overruns.
652 efx->rx_dma_len = (efx->rx_prefix_size +
653 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
654 efx->type->rx_buffer_padding);
655 rx_buf_len = (sizeof(struct efx_rx_page_state) +
656 efx->rx_ip_align + efx->rx_dma_len);
657 if (rx_buf_len <= PAGE_SIZE) {
658 efx->rx_scatter = efx->type->always_rx_scatter;
659 efx->rx_buffer_order = 0;
660 } else if (efx->type->can_rx_scatter) {
661 BUILD_BUG_ON(EFX_RX_USR_BUF_SIZE % L1_CACHE_BYTES);
662 BUILD_BUG_ON(sizeof(struct efx_rx_page_state) +
663 2 * ALIGN(NET_IP_ALIGN + EFX_RX_USR_BUF_SIZE,
664 EFX_RX_BUF_ALIGNMENT) >
666 efx->rx_scatter = true;
667 efx->rx_dma_len = EFX_RX_USR_BUF_SIZE;
668 efx->rx_buffer_order = 0;
670 efx->rx_scatter = false;
671 efx->rx_buffer_order = get_order(rx_buf_len);
674 efx_rx_config_page_split(efx);
675 if (efx->rx_buffer_order)
676 netif_dbg(efx, drv, efx->net_dev,
677 "RX buf len=%u; page order=%u batch=%u\n",
678 efx->rx_dma_len, efx->rx_buffer_order,
679 efx->rx_pages_per_batch);
681 netif_dbg(efx, drv, efx->net_dev,
682 "RX buf len=%u step=%u bpp=%u; page batch=%u\n",
683 efx->rx_dma_len, efx->rx_page_buf_step,
684 efx->rx_bufs_per_page, efx->rx_pages_per_batch);
686 /* Restore previously fixed features in hw_features and remove
687 * features which are fixed now
689 efx->net_dev->hw_features |= efx->net_dev->features;
690 efx->net_dev->hw_features &= ~efx->fixed_features;
691 efx->net_dev->features |= efx->fixed_features;
692 if (efx->net_dev->features != old_features)
693 netdev_features_change(efx->net_dev);
695 /* RX filters may also have scatter-enabled flags */
696 if (efx->rx_scatter != old_rx_scatter)
697 efx->type->filter_update_rx_scatter(efx);
699 /* We must keep at least one descriptor in a TX ring empty.
700 * We could avoid this when the queue size does not exactly
701 * match the hardware ring size, but it's not that important.
702 * Therefore we stop the queue when one more skb might fill
703 * the ring completely. We wake it when half way back to
706 efx->txq_stop_thresh = efx->txq_entries - efx_tx_max_skb_descs(efx);
707 efx->txq_wake_thresh = efx->txq_stop_thresh / 2;
709 /* Initialise the channels */
710 efx_for_each_channel(channel, efx) {
711 efx_for_each_channel_tx_queue(tx_queue, channel) {
712 efx_init_tx_queue(tx_queue);
713 atomic_inc(&efx->active_queues);
716 efx_for_each_channel_rx_queue(rx_queue, channel) {
717 efx_init_rx_queue(rx_queue);
718 atomic_inc(&efx->active_queues);
719 efx_stop_eventq(channel);
720 efx_fast_push_rx_descriptors(rx_queue, false);
721 efx_start_eventq(channel);
724 WARN_ON(channel->rx_pkt_n_frags);
727 efx_ptp_start_datapath(efx);
729 if (netif_device_present(efx->net_dev))
730 netif_tx_wake_all_queues(efx->net_dev);
733 static void efx_stop_datapath(struct efx_nic *efx)
735 struct efx_channel *channel;
736 struct efx_tx_queue *tx_queue;
737 struct efx_rx_queue *rx_queue;
740 EFX_ASSERT_RESET_SERIALISED(efx);
741 BUG_ON(efx->port_enabled);
743 efx_ptp_stop_datapath(efx);
746 efx_for_each_channel(channel, efx) {
747 efx_for_each_channel_rx_queue(rx_queue, channel)
748 rx_queue->refill_enabled = false;
751 efx_for_each_channel(channel, efx) {
752 /* RX packet processing is pipelined, so wait for the
753 * NAPI handler to complete. At least event queue 0
754 * might be kept active by non-data events, so don't
755 * use napi_synchronize() but actually disable NAPI
758 if (efx_channel_has_rx_queue(channel)) {
759 efx_stop_eventq(channel);
760 efx_start_eventq(channel);
764 rc = efx->type->fini_dmaq(efx);
766 netif_err(efx, drv, efx->net_dev, "failed to flush queues\n");
768 netif_dbg(efx, drv, efx->net_dev,
769 "successfully flushed all queues\n");
772 efx_for_each_channel(channel, efx) {
773 efx_for_each_channel_rx_queue(rx_queue, channel)
774 efx_fini_rx_queue(rx_queue);
775 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
776 efx_fini_tx_queue(tx_queue);
780 static void efx_remove_channel(struct efx_channel *channel)
782 struct efx_tx_queue *tx_queue;
783 struct efx_rx_queue *rx_queue;
785 netif_dbg(channel->efx, drv, channel->efx->net_dev,
786 "destroy chan %d\n", channel->channel);
788 efx_for_each_channel_rx_queue(rx_queue, channel)
789 efx_remove_rx_queue(rx_queue);
790 efx_for_each_possible_channel_tx_queue(tx_queue, channel)
791 efx_remove_tx_queue(tx_queue);
792 efx_remove_eventq(channel);
793 channel->type->post_remove(channel);
796 static void efx_remove_channels(struct efx_nic *efx)
798 struct efx_channel *channel;
800 efx_for_each_channel(channel, efx)
801 efx_remove_channel(channel);
805 efx_realloc_channels(struct efx_nic *efx, u32 rxq_entries, u32 txq_entries)
807 struct efx_channel *other_channel[EFX_MAX_CHANNELS], *channel;
808 u32 old_rxq_entries, old_txq_entries;
809 unsigned i, next_buffer_table = 0;
812 rc = efx_check_disabled(efx);
816 /* Not all channels should be reallocated. We must avoid
817 * reallocating their buffer table entries.
819 efx_for_each_channel(channel, efx) {
820 struct efx_rx_queue *rx_queue;
821 struct efx_tx_queue *tx_queue;
823 if (channel->type->copy)
825 next_buffer_table = max(next_buffer_table,
826 channel->eventq.index +
827 channel->eventq.entries);
828 efx_for_each_channel_rx_queue(rx_queue, channel)
829 next_buffer_table = max(next_buffer_table,
830 rx_queue->rxd.index +
831 rx_queue->rxd.entries);
832 efx_for_each_channel_tx_queue(tx_queue, channel)
833 next_buffer_table = max(next_buffer_table,
834 tx_queue->txd.index +
835 tx_queue->txd.entries);
838 efx_device_detach_sync(efx);
840 efx_soft_disable_interrupts(efx);
842 /* Clone channels (where possible) */
843 memset(other_channel, 0, sizeof(other_channel));
844 for (i = 0; i < efx->n_channels; i++) {
845 channel = efx->channel[i];
846 if (channel->type->copy)
847 channel = channel->type->copy(channel);
852 other_channel[i] = channel;
855 /* Swap entry counts and channel pointers */
856 old_rxq_entries = efx->rxq_entries;
857 old_txq_entries = efx->txq_entries;
858 efx->rxq_entries = rxq_entries;
859 efx->txq_entries = txq_entries;
860 for (i = 0; i < efx->n_channels; i++) {
861 channel = efx->channel[i];
862 efx->channel[i] = other_channel[i];
863 other_channel[i] = channel;
866 /* Restart buffer table allocation */
867 efx->next_buffer_table = next_buffer_table;
869 for (i = 0; i < efx->n_channels; i++) {
870 channel = efx->channel[i];
871 if (!channel->type->copy)
873 rc = efx_probe_channel(channel);
876 efx_init_napi_channel(efx->channel[i]);
880 /* Destroy unused channel structures */
881 for (i = 0; i < efx->n_channels; i++) {
882 channel = other_channel[i];
883 if (channel && channel->type->copy) {
884 efx_fini_napi_channel(channel);
885 efx_remove_channel(channel);
890 rc2 = efx_soft_enable_interrupts(efx);
893 netif_err(efx, drv, efx->net_dev,
894 "unable to restart interrupts on channel reallocation\n");
895 efx_schedule_reset(efx, RESET_TYPE_DISABLE);
898 efx_device_attach_if_not_resetting(efx);
904 efx->rxq_entries = old_rxq_entries;
905 efx->txq_entries = old_txq_entries;
906 for (i = 0; i < efx->n_channels; i++) {
907 channel = efx->channel[i];
908 efx->channel[i] = other_channel[i];
909 other_channel[i] = channel;
914 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue)
916 mod_timer(&rx_queue->slow_fill, jiffies + msecs_to_jiffies(10));
919 static bool efx_default_channel_want_txqs(struct efx_channel *channel)
921 return channel->channel - channel->efx->tx_channel_offset <
922 channel->efx->n_tx_channels;
925 static const struct efx_channel_type efx_default_channel_type = {
926 .pre_probe = efx_channel_dummy_op_int,
927 .post_remove = efx_channel_dummy_op_void,
928 .get_name = efx_get_channel_name,
929 .copy = efx_copy_channel,
930 .want_txqs = efx_default_channel_want_txqs,
931 .keep_eventq = false,
935 int efx_channel_dummy_op_int(struct efx_channel *channel)
940 void efx_channel_dummy_op_void(struct efx_channel *channel)
944 /**************************************************************************
948 **************************************************************************/
950 /* This ensures that the kernel is kept informed (via
951 * netif_carrier_on/off) of the link status, and also maintains the
952 * link status's stop on the port's TX queue.
954 void efx_link_status_changed(struct efx_nic *efx)
956 struct efx_link_state *link_state = &efx->link_state;
958 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
959 * that no events are triggered between unregister_netdev() and the
960 * driver unloading. A more general condition is that NETDEV_CHANGE
961 * can only be generated between NETDEV_UP and NETDEV_DOWN */
962 if (!netif_running(efx->net_dev))
965 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
966 efx->n_link_state_changes++;
969 netif_carrier_on(efx->net_dev);
971 netif_carrier_off(efx->net_dev);
974 /* Status message for kernel log */
976 netif_info(efx, link, efx->net_dev,
977 "link up at %uMbps %s-duplex (MTU %d)\n",
978 link_state->speed, link_state->fd ? "full" : "half",
981 netif_info(efx, link, efx->net_dev, "link down\n");
984 void efx_link_set_advertising(struct efx_nic *efx,
985 const unsigned long *advertising)
987 memcpy(efx->link_advertising, advertising,
988 sizeof(__ETHTOOL_DECLARE_LINK_MODE_MASK()));
990 efx->link_advertising[0] |= ADVERTISED_Autoneg;
991 if (advertising[0] & ADVERTISED_Pause)
992 efx->wanted_fc |= (EFX_FC_TX | EFX_FC_RX);
994 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
995 if (advertising[0] & ADVERTISED_Asym_Pause)
996 efx->wanted_fc ^= EFX_FC_TX;
999 /* Equivalent to efx_link_set_advertising with all-zeroes, except does not
1000 * force the Autoneg bit on.
1002 void efx_link_clear_advertising(struct efx_nic *efx)
1004 bitmap_zero(efx->link_advertising, __ETHTOOL_LINK_MODE_MASK_NBITS);
1005 efx->wanted_fc &= ~(EFX_FC_TX | EFX_FC_RX);
1008 void efx_link_set_wanted_fc(struct efx_nic *efx, u8 wanted_fc)
1010 efx->wanted_fc = wanted_fc;
1011 if (efx->link_advertising[0]) {
1012 if (wanted_fc & EFX_FC_RX)
1013 efx->link_advertising[0] |= (ADVERTISED_Pause |
1014 ADVERTISED_Asym_Pause);
1016 efx->link_advertising[0] &= ~(ADVERTISED_Pause |
1017 ADVERTISED_Asym_Pause);
1018 if (wanted_fc & EFX_FC_TX)
1019 efx->link_advertising[0] ^= ADVERTISED_Asym_Pause;
1023 static void efx_fini_port(struct efx_nic *efx);
1025 /* We assume that efx->type->reconfigure_mac will always try to sync RX
1026 * filters and therefore needs to read-lock the filter table against freeing
1028 void efx_mac_reconfigure(struct efx_nic *efx)
1030 down_read(&efx->filter_sem);
1031 efx->type->reconfigure_mac(efx);
1032 up_read(&efx->filter_sem);
1035 /* Push loopback/power/transmit disable settings to the PHY, and reconfigure
1036 * the MAC appropriately. All other PHY configuration changes are pushed
1037 * through phy_op->set_settings(), and pushed asynchronously to the MAC
1038 * through efx_monitor().
1040 * Callers must hold the mac_lock
1042 int __efx_reconfigure_port(struct efx_nic *efx)
1044 enum efx_phy_mode phy_mode;
1047 WARN_ON(!mutex_is_locked(&efx->mac_lock));
1049 /* Disable PHY transmit in mac level loopbacks */
1050 phy_mode = efx->phy_mode;
1051 if (LOOPBACK_INTERNAL(efx))
1052 efx->phy_mode |= PHY_MODE_TX_DISABLED;
1054 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
1056 rc = efx->type->reconfigure_port(efx);
1059 efx->phy_mode = phy_mode;
1064 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
1066 int efx_reconfigure_port(struct efx_nic *efx)
1070 EFX_ASSERT_RESET_SERIALISED(efx);
1072 mutex_lock(&efx->mac_lock);
1073 rc = __efx_reconfigure_port(efx);
1074 mutex_unlock(&efx->mac_lock);
1079 /* Asynchronous work item for changing MAC promiscuity and multicast
1080 * hash. Avoid a drain/rx_ingress enable by reconfiguring the current
1082 static void efx_mac_work(struct work_struct *data)
1084 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
1086 mutex_lock(&efx->mac_lock);
1087 if (efx->port_enabled)
1088 efx_mac_reconfigure(efx);
1089 mutex_unlock(&efx->mac_lock);
1092 static int efx_probe_port(struct efx_nic *efx)
1096 netif_dbg(efx, probe, efx->net_dev, "create port\n");
1099 efx->phy_mode = PHY_MODE_SPECIAL;
1101 /* Connect up MAC/PHY operations table */
1102 rc = efx->type->probe_port(efx);
1106 /* Initialise MAC address to permanent address */
1107 ether_addr_copy(efx->net_dev->dev_addr, efx->net_dev->perm_addr);
1112 static int efx_init_port(struct efx_nic *efx)
1116 netif_dbg(efx, drv, efx->net_dev, "init port\n");
1118 mutex_lock(&efx->mac_lock);
1120 rc = efx->phy_op->init(efx);
1124 efx->port_initialized = true;
1126 /* Reconfigure the MAC before creating dma queues (required for
1127 * Falcon/A1 where RX_INGR_EN/TX_DRAIN_EN isn't supported) */
1128 efx_mac_reconfigure(efx);
1130 /* Ensure the PHY advertises the correct flow control settings */
1131 rc = efx->phy_op->reconfigure(efx);
1132 if (rc && rc != -EPERM)
1135 mutex_unlock(&efx->mac_lock);
1139 efx->phy_op->fini(efx);
1141 mutex_unlock(&efx->mac_lock);
1145 static void efx_start_port(struct efx_nic *efx)
1147 netif_dbg(efx, ifup, efx->net_dev, "start port\n");
1148 BUG_ON(efx->port_enabled);
1150 mutex_lock(&efx->mac_lock);
1151 efx->port_enabled = true;
1153 /* Ensure MAC ingress/egress is enabled */
1154 efx_mac_reconfigure(efx);
1156 mutex_unlock(&efx->mac_lock);
1159 /* Cancel work for MAC reconfiguration, periodic hardware monitoring
1160 * and the async self-test, wait for them to finish and prevent them
1161 * being scheduled again. This doesn't cover online resets, which
1162 * should only be cancelled when removing the device.
1164 static void efx_stop_port(struct efx_nic *efx)
1166 netif_dbg(efx, ifdown, efx->net_dev, "stop port\n");
1168 EFX_ASSERT_RESET_SERIALISED(efx);
1170 mutex_lock(&efx->mac_lock);
1171 efx->port_enabled = false;
1172 mutex_unlock(&efx->mac_lock);
1174 /* Serialise against efx_set_multicast_list() */
1175 netif_addr_lock_bh(efx->net_dev);
1176 netif_addr_unlock_bh(efx->net_dev);
1178 cancel_delayed_work_sync(&efx->monitor_work);
1179 efx_selftest_async_cancel(efx);
1180 cancel_work_sync(&efx->mac_work);
1183 static void efx_fini_port(struct efx_nic *efx)
1185 netif_dbg(efx, drv, efx->net_dev, "shut down port\n");
1187 if (!efx->port_initialized)
1190 efx->phy_op->fini(efx);
1191 efx->port_initialized = false;
1193 efx->link_state.up = false;
1194 efx_link_status_changed(efx);
1197 static void efx_remove_port(struct efx_nic *efx)
1199 netif_dbg(efx, drv, efx->net_dev, "destroying port\n");
1201 efx->type->remove_port(efx);
1204 /**************************************************************************
1208 **************************************************************************/
1210 static LIST_HEAD(efx_primary_list);
1211 static LIST_HEAD(efx_unassociated_list);
1213 static bool efx_same_controller(struct efx_nic *left, struct efx_nic *right)
1215 return left->type == right->type &&
1216 left->vpd_sn && right->vpd_sn &&
1217 !strcmp(left->vpd_sn, right->vpd_sn);
1220 static void efx_associate(struct efx_nic *efx)
1222 struct efx_nic *other, *next;
1224 if (efx->primary == efx) {
1225 /* Adding primary function; look for secondaries */
1227 netif_dbg(efx, probe, efx->net_dev, "adding to primary list\n");
1228 list_add_tail(&efx->node, &efx_primary_list);
1230 list_for_each_entry_safe(other, next, &efx_unassociated_list,
1232 if (efx_same_controller(efx, other)) {
1233 list_del(&other->node);
1234 netif_dbg(other, probe, other->net_dev,
1235 "moving to secondary list of %s %s\n",
1236 pci_name(efx->pci_dev),
1237 efx->net_dev->name);
1238 list_add_tail(&other->node,
1239 &efx->secondary_list);
1240 other->primary = efx;
1244 /* Adding secondary function; look for primary */
1246 list_for_each_entry(other, &efx_primary_list, node) {
1247 if (efx_same_controller(efx, other)) {
1248 netif_dbg(efx, probe, efx->net_dev,
1249 "adding to secondary list of %s %s\n",
1250 pci_name(other->pci_dev),
1251 other->net_dev->name);
1252 list_add_tail(&efx->node,
1253 &other->secondary_list);
1254 efx->primary = other;
1259 netif_dbg(efx, probe, efx->net_dev,
1260 "adding to unassociated list\n");
1261 list_add_tail(&efx->node, &efx_unassociated_list);
1265 static void efx_dissociate(struct efx_nic *efx)
1267 struct efx_nic *other, *next;
1269 list_del(&efx->node);
1270 efx->primary = NULL;
1272 list_for_each_entry_safe(other, next, &efx->secondary_list, node) {
1273 list_del(&other->node);
1274 netif_dbg(other, probe, other->net_dev,
1275 "moving to unassociated list\n");
1276 list_add_tail(&other->node, &efx_unassociated_list);
1277 other->primary = NULL;
1281 /* This configures the PCI device to enable I/O and DMA. */
1282 static int efx_init_io(struct efx_nic *efx)
1284 struct pci_dev *pci_dev = efx->pci_dev;
1285 dma_addr_t dma_mask = efx->type->max_dma_mask;
1286 unsigned int mem_map_size = efx->type->mem_map_size(efx);
1289 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
1291 bar = efx->type->mem_bar(efx);
1293 rc = pci_enable_device(pci_dev);
1295 netif_err(efx, probe, efx->net_dev,
1296 "failed to enable PCI device\n");
1300 pci_set_master(pci_dev);
1302 /* Set the PCI DMA mask. Try all possibilities from our genuine mask
1303 * down to 32 bits, because some architectures will allow 40 bit
1304 * masks event though they reject 46 bit masks.
1306 while (dma_mask > 0x7fffffffUL) {
1307 rc = dma_set_mask_and_coherent(&pci_dev->dev, dma_mask);
1313 netif_err(efx, probe, efx->net_dev,
1314 "could not find a suitable DMA mask\n");
1317 netif_dbg(efx, probe, efx->net_dev,
1318 "using DMA mask %llx\n", (unsigned long long) dma_mask);
1320 efx->membase_phys = pci_resource_start(efx->pci_dev, bar);
1321 rc = pci_request_region(pci_dev, bar, "sfc");
1323 netif_err(efx, probe, efx->net_dev,
1324 "request for memory BAR failed\n");
1328 efx->membase = ioremap_nocache(efx->membase_phys, mem_map_size);
1329 if (!efx->membase) {
1330 netif_err(efx, probe, efx->net_dev,
1331 "could not map memory BAR at %llx+%x\n",
1332 (unsigned long long)efx->membase_phys, mem_map_size);
1336 netif_dbg(efx, probe, efx->net_dev,
1337 "memory BAR at %llx+%x (virtual %p)\n",
1338 (unsigned long long)efx->membase_phys, mem_map_size,
1344 pci_release_region(efx->pci_dev, bar);
1346 efx->membase_phys = 0;
1348 pci_disable_device(efx->pci_dev);
1353 static void efx_fini_io(struct efx_nic *efx)
1357 netif_dbg(efx, drv, efx->net_dev, "shutting down I/O\n");
1360 iounmap(efx->membase);
1361 efx->membase = NULL;
1364 if (efx->membase_phys) {
1365 bar = efx->type->mem_bar(efx);
1366 pci_release_region(efx->pci_dev, bar);
1367 efx->membase_phys = 0;
1370 /* Don't disable bus-mastering if VFs are assigned */
1371 if (!pci_vfs_assigned(efx->pci_dev))
1372 pci_disable_device(efx->pci_dev);
1375 void efx_set_default_rx_indir_table(struct efx_nic *efx,
1376 struct efx_rss_context *ctx)
1380 for (i = 0; i < ARRAY_SIZE(ctx->rx_indir_table); i++)
1381 ctx->rx_indir_table[i] =
1382 ethtool_rxfh_indir_default(i, efx->rss_spread);
1385 static unsigned int efx_wanted_parallelism(struct efx_nic *efx)
1387 cpumask_var_t thread_mask;
1394 if (unlikely(!zalloc_cpumask_var(&thread_mask, GFP_KERNEL))) {
1395 netif_warn(efx, probe, efx->net_dev,
1396 "RSS disabled due to allocation failure\n");
1401 for_each_online_cpu(cpu) {
1402 if (!cpumask_test_cpu(cpu, thread_mask)) {
1404 cpumask_or(thread_mask, thread_mask,
1405 topology_sibling_cpumask(cpu));
1409 free_cpumask_var(thread_mask);
1412 if (count > EFX_MAX_RX_QUEUES) {
1413 netif_cond_dbg(efx, probe, efx->net_dev, !rss_cpus, warn,
1414 "Reducing number of rx queues from %u to %u.\n",
1415 count, EFX_MAX_RX_QUEUES);
1416 count = EFX_MAX_RX_QUEUES;
1419 /* If RSS is requested for the PF *and* VFs then we can't write RSS
1420 * table entries that are inaccessible to VFs
1422 #ifdef CONFIG_SFC_SRIOV
1423 if (efx->type->sriov_wanted) {
1424 if (efx->type->sriov_wanted(efx) && efx_vf_size(efx) > 1 &&
1425 count > efx_vf_size(efx)) {
1426 netif_warn(efx, probe, efx->net_dev,
1427 "Reducing number of RSS channels from %u to %u for "
1428 "VF support. Increase vf-msix-limit to use more "
1429 "channels on the PF.\n",
1430 count, efx_vf_size(efx));
1431 count = efx_vf_size(efx);
1439 /* Probe the number and type of interrupts we are able to obtain, and
1440 * the resulting numbers of channels and RX queues.
1442 static int efx_probe_interrupts(struct efx_nic *efx)
1444 unsigned int extra_channels = 0;
1448 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++)
1449 if (efx->extra_channel_type[i])
1452 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
1453 struct msix_entry xentries[EFX_MAX_CHANNELS];
1454 unsigned int n_channels;
1456 n_channels = efx_wanted_parallelism(efx);
1457 if (efx_separate_tx_channels)
1459 n_channels += extra_channels;
1460 n_channels = min(n_channels, efx->max_channels);
1462 for (i = 0; i < n_channels; i++)
1463 xentries[i].entry = i;
1464 rc = pci_enable_msix_range(efx->pci_dev,
1465 xentries, 1, n_channels);
1467 /* Fall back to single channel MSI */
1468 netif_err(efx, drv, efx->net_dev,
1469 "could not enable MSI-X\n");
1470 if (efx->type->min_interrupt_mode >= EFX_INT_MODE_MSI)
1471 efx->interrupt_mode = EFX_INT_MODE_MSI;
1474 } else if (rc < n_channels) {
1475 netif_err(efx, drv, efx->net_dev,
1476 "WARNING: Insufficient MSI-X vectors"
1477 " available (%d < %u).\n", rc, n_channels);
1478 netif_err(efx, drv, efx->net_dev,
1479 "WARNING: Performance may be reduced.\n");
1484 efx->n_channels = n_channels;
1485 if (n_channels > extra_channels)
1486 n_channels -= extra_channels;
1487 if (efx_separate_tx_channels) {
1488 efx->n_tx_channels = min(max(n_channels / 2,
1490 efx->max_tx_channels);
1491 efx->n_rx_channels = max(n_channels -
1495 efx->n_tx_channels = min(n_channels,
1496 efx->max_tx_channels);
1497 efx->n_rx_channels = n_channels;
1499 for (i = 0; i < efx->n_channels; i++)
1500 efx_get_channel(efx, i)->irq =
1505 /* Try single interrupt MSI */
1506 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
1507 efx->n_channels = 1;
1508 efx->n_rx_channels = 1;
1509 efx->n_tx_channels = 1;
1510 rc = pci_enable_msi(efx->pci_dev);
1512 efx_get_channel(efx, 0)->irq = efx->pci_dev->irq;
1514 netif_err(efx, drv, efx->net_dev,
1515 "could not enable MSI\n");
1516 if (efx->type->min_interrupt_mode >= EFX_INT_MODE_LEGACY)
1517 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1523 /* Assume legacy interrupts */
1524 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1525 efx->n_channels = 1 + (efx_separate_tx_channels ? 1 : 0);
1526 efx->n_rx_channels = 1;
1527 efx->n_tx_channels = 1;
1528 efx->legacy_irq = efx->pci_dev->irq;
1531 /* Assign extra channels if possible */
1532 efx->n_extra_tx_channels = 0;
1533 j = efx->n_channels;
1534 for (i = 0; i < EFX_MAX_EXTRA_CHANNELS; i++) {
1535 if (!efx->extra_channel_type[i])
1537 if (efx->interrupt_mode != EFX_INT_MODE_MSIX ||
1538 efx->n_channels <= extra_channels) {
1539 efx->extra_channel_type[i]->handle_no_channel(efx);
1542 efx_get_channel(efx, j)->type =
1543 efx->extra_channel_type[i];
1544 if (efx_channel_has_tx_queues(efx_get_channel(efx, j)))
1545 efx->n_extra_tx_channels++;
1549 /* RSS might be usable on VFs even if it is disabled on the PF */
1550 #ifdef CONFIG_SFC_SRIOV
1551 if (efx->type->sriov_wanted) {
1552 efx->rss_spread = ((efx->n_rx_channels > 1 ||
1553 !efx->type->sriov_wanted(efx)) ?
1554 efx->n_rx_channels : efx_vf_size(efx));
1558 efx->rss_spread = efx->n_rx_channels;
1563 #if defined(CONFIG_SMP)
1564 static void efx_set_interrupt_affinity(struct efx_nic *efx)
1566 struct efx_channel *channel;
1569 efx_for_each_channel(channel, efx) {
1570 cpu = cpumask_local_spread(channel->channel,
1571 pcibus_to_node(efx->pci_dev->bus));
1572 irq_set_affinity_hint(channel->irq, cpumask_of(cpu));
1576 static void efx_clear_interrupt_affinity(struct efx_nic *efx)
1578 struct efx_channel *channel;
1580 efx_for_each_channel(channel, efx)
1581 irq_set_affinity_hint(channel->irq, NULL);
1585 efx_set_interrupt_affinity(struct efx_nic *efx __attribute__ ((unused)))
1590 efx_clear_interrupt_affinity(struct efx_nic *efx __attribute__ ((unused)))
1593 #endif /* CONFIG_SMP */
1595 static int efx_soft_enable_interrupts(struct efx_nic *efx)
1597 struct efx_channel *channel, *end_channel;
1600 BUG_ON(efx->state == STATE_DISABLED);
1602 efx->irq_soft_enabled = true;
1605 efx_for_each_channel(channel, efx) {
1606 if (!channel->type->keep_eventq) {
1607 rc = efx_init_eventq(channel);
1611 efx_start_eventq(channel);
1614 efx_mcdi_mode_event(efx);
1618 end_channel = channel;
1619 efx_for_each_channel(channel, efx) {
1620 if (channel == end_channel)
1622 efx_stop_eventq(channel);
1623 if (!channel->type->keep_eventq)
1624 efx_fini_eventq(channel);
1630 static void efx_soft_disable_interrupts(struct efx_nic *efx)
1632 struct efx_channel *channel;
1634 if (efx->state == STATE_DISABLED)
1637 efx_mcdi_mode_poll(efx);
1639 efx->irq_soft_enabled = false;
1642 if (efx->legacy_irq)
1643 synchronize_irq(efx->legacy_irq);
1645 efx_for_each_channel(channel, efx) {
1647 synchronize_irq(channel->irq);
1649 efx_stop_eventq(channel);
1650 if (!channel->type->keep_eventq)
1651 efx_fini_eventq(channel);
1654 /* Flush the asynchronous MCDI request queue */
1655 efx_mcdi_flush_async(efx);
1658 static int efx_enable_interrupts(struct efx_nic *efx)
1660 struct efx_channel *channel, *end_channel;
1663 BUG_ON(efx->state == STATE_DISABLED);
1665 if (efx->eeh_disabled_legacy_irq) {
1666 enable_irq(efx->legacy_irq);
1667 efx->eeh_disabled_legacy_irq = false;
1670 efx->type->irq_enable_master(efx);
1672 efx_for_each_channel(channel, efx) {
1673 if (channel->type->keep_eventq) {
1674 rc = efx_init_eventq(channel);
1680 rc = efx_soft_enable_interrupts(efx);
1687 end_channel = channel;
1688 efx_for_each_channel(channel, efx) {
1689 if (channel == end_channel)
1691 if (channel->type->keep_eventq)
1692 efx_fini_eventq(channel);
1695 efx->type->irq_disable_non_ev(efx);
1700 static void efx_disable_interrupts(struct efx_nic *efx)
1702 struct efx_channel *channel;
1704 efx_soft_disable_interrupts(efx);
1706 efx_for_each_channel(channel, efx) {
1707 if (channel->type->keep_eventq)
1708 efx_fini_eventq(channel);
1711 efx->type->irq_disable_non_ev(efx);
1714 static void efx_remove_interrupts(struct efx_nic *efx)
1716 struct efx_channel *channel;
1718 /* Remove MSI/MSI-X interrupts */
1719 efx_for_each_channel(channel, efx)
1721 pci_disable_msi(efx->pci_dev);
1722 pci_disable_msix(efx->pci_dev);
1724 /* Remove legacy interrupt */
1725 efx->legacy_irq = 0;
1728 static void efx_set_channels(struct efx_nic *efx)
1730 struct efx_channel *channel;
1731 struct efx_tx_queue *tx_queue;
1733 efx->tx_channel_offset =
1734 efx_separate_tx_channels ?
1735 efx->n_channels - efx->n_tx_channels : 0;
1737 /* We need to mark which channels really have RX and TX
1738 * queues, and adjust the TX queue numbers if we have separate
1739 * RX-only and TX-only channels.
1741 efx_for_each_channel(channel, efx) {
1742 if (channel->channel < efx->n_rx_channels)
1743 channel->rx_queue.core_index = channel->channel;
1745 channel->rx_queue.core_index = -1;
1747 efx_for_each_channel_tx_queue(tx_queue, channel)
1748 tx_queue->queue -= (efx->tx_channel_offset *
1753 static int efx_probe_nic(struct efx_nic *efx)
1757 netif_dbg(efx, probe, efx->net_dev, "creating NIC\n");
1759 /* Carry out hardware-type specific initialisation */
1760 rc = efx->type->probe(efx);
1765 if (!efx->max_channels || !efx->max_tx_channels) {
1766 netif_err(efx, drv, efx->net_dev,
1767 "Insufficient resources to allocate"
1773 /* Determine the number of channels and queues by trying
1774 * to hook in MSI-X interrupts.
1776 rc = efx_probe_interrupts(efx);
1780 efx_set_channels(efx);
1782 /* dimension_resources can fail with EAGAIN */
1783 rc = efx->type->dimension_resources(efx);
1784 if (rc != 0 && rc != -EAGAIN)
1788 /* try again with new max_channels */
1789 efx_remove_interrupts(efx);
1791 } while (rc == -EAGAIN);
1793 if (efx->n_channels > 1)
1794 netdev_rss_key_fill(efx->rss_context.rx_hash_key,
1795 sizeof(efx->rss_context.rx_hash_key));
1796 efx_set_default_rx_indir_table(efx, &efx->rss_context);
1798 netif_set_real_num_tx_queues(efx->net_dev, efx->n_tx_channels);
1799 netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
1801 /* Initialise the interrupt moderation settings */
1802 efx->irq_mod_step_us = DIV_ROUND_UP(efx->timer_quantum_ns, 1000);
1803 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
1809 efx_remove_interrupts(efx);
1811 efx->type->remove(efx);
1815 static void efx_remove_nic(struct efx_nic *efx)
1817 netif_dbg(efx, drv, efx->net_dev, "destroying NIC\n");
1819 efx_remove_interrupts(efx);
1820 efx->type->remove(efx);
1823 static int efx_probe_filters(struct efx_nic *efx)
1827 init_rwsem(&efx->filter_sem);
1828 mutex_lock(&efx->mac_lock);
1829 down_write(&efx->filter_sem);
1830 rc = efx->type->filter_table_probe(efx);
1834 #ifdef CONFIG_RFS_ACCEL
1835 if (efx->type->offload_features & NETIF_F_NTUPLE) {
1836 struct efx_channel *channel;
1839 efx_for_each_channel(channel, efx) {
1840 channel->rps_flow_id =
1841 kcalloc(efx->type->max_rx_ip_filters,
1842 sizeof(*channel->rps_flow_id),
1844 if (!channel->rps_flow_id)
1848 i < efx->type->max_rx_ip_filters;
1850 channel->rps_flow_id[i] =
1851 RPS_FLOW_ID_INVALID;
1855 efx_for_each_channel(channel, efx)
1856 kfree(channel->rps_flow_id);
1857 efx->type->filter_table_remove(efx);
1862 efx->rps_expire_index = efx->rps_expire_channel = 0;
1866 up_write(&efx->filter_sem);
1867 mutex_unlock(&efx->mac_lock);
1871 static void efx_remove_filters(struct efx_nic *efx)
1873 #ifdef CONFIG_RFS_ACCEL
1874 struct efx_channel *channel;
1876 efx_for_each_channel(channel, efx)
1877 kfree(channel->rps_flow_id);
1879 down_write(&efx->filter_sem);
1880 efx->type->filter_table_remove(efx);
1881 up_write(&efx->filter_sem);
1885 /**************************************************************************
1887 * NIC startup/shutdown
1889 *************************************************************************/
1891 static int efx_probe_all(struct efx_nic *efx)
1895 rc = efx_probe_nic(efx);
1897 netif_err(efx, probe, efx->net_dev, "failed to create NIC\n");
1901 rc = efx_probe_port(efx);
1903 netif_err(efx, probe, efx->net_dev, "failed to create port\n");
1907 BUILD_BUG_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_RXQ_MIN_ENT);
1908 if (WARN_ON(EFX_DEFAULT_DMAQ_SIZE < EFX_TXQ_MIN_ENT(efx))) {
1912 efx->rxq_entries = efx->txq_entries = EFX_DEFAULT_DMAQ_SIZE;
1914 #ifdef CONFIG_SFC_SRIOV
1915 rc = efx->type->vswitching_probe(efx);
1916 if (rc) /* not fatal; the PF will still work fine */
1917 netif_warn(efx, probe, efx->net_dev,
1918 "failed to setup vswitching rc=%d;"
1919 " VFs may not function\n", rc);
1922 rc = efx_probe_filters(efx);
1924 netif_err(efx, probe, efx->net_dev,
1925 "failed to create filter tables\n");
1929 rc = efx_probe_channels(efx);
1936 efx_remove_filters(efx);
1938 #ifdef CONFIG_SFC_SRIOV
1939 efx->type->vswitching_remove(efx);
1942 efx_remove_port(efx);
1944 efx_remove_nic(efx);
1949 /* If the interface is supposed to be running but is not, start
1950 * the hardware and software data path, regular activity for the port
1951 * (MAC statistics, link polling, etc.) and schedule the port to be
1952 * reconfigured. Interrupts must already be enabled. This function
1953 * is safe to call multiple times, so long as the NIC is not disabled.
1954 * Requires the RTNL lock.
1956 static void efx_start_all(struct efx_nic *efx)
1958 EFX_ASSERT_RESET_SERIALISED(efx);
1959 BUG_ON(efx->state == STATE_DISABLED);
1961 /* Check that it is appropriate to restart the interface. All
1962 * of these flags are safe to read under just the rtnl lock */
1963 if (efx->port_enabled || !netif_running(efx->net_dev) ||
1967 efx_start_port(efx);
1968 efx_start_datapath(efx);
1970 /* Start the hardware monitor if there is one */
1971 if (efx->type->monitor != NULL)
1972 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1973 efx_monitor_interval);
1975 /* Link state detection is normally event-driven; we have
1976 * to poll now because we could have missed a change
1978 mutex_lock(&efx->mac_lock);
1979 if (efx->phy_op->poll(efx))
1980 efx_link_status_changed(efx);
1981 mutex_unlock(&efx->mac_lock);
1983 efx->type->start_stats(efx);
1984 efx->type->pull_stats(efx);
1985 spin_lock_bh(&efx->stats_lock);
1986 efx->type->update_stats(efx, NULL, NULL);
1987 spin_unlock_bh(&efx->stats_lock);
1990 /* Quiesce the hardware and software data path, and regular activity
1991 * for the port without bringing the link down. Safe to call multiple
1992 * times with the NIC in almost any state, but interrupts should be
1993 * enabled. Requires the RTNL lock.
1995 static void efx_stop_all(struct efx_nic *efx)
1997 EFX_ASSERT_RESET_SERIALISED(efx);
1999 /* port_enabled can be read safely under the rtnl lock */
2000 if (!efx->port_enabled)
2003 /* update stats before we go down so we can accurately count
2006 efx->type->pull_stats(efx);
2007 spin_lock_bh(&efx->stats_lock);
2008 efx->type->update_stats(efx, NULL, NULL);
2009 spin_unlock_bh(&efx->stats_lock);
2010 efx->type->stop_stats(efx);
2013 /* Stop the kernel transmit interface. This is only valid if
2014 * the device is stopped or detached; otherwise the watchdog
2015 * may fire immediately.
2017 WARN_ON(netif_running(efx->net_dev) &&
2018 netif_device_present(efx->net_dev));
2019 netif_tx_disable(efx->net_dev);
2021 efx_stop_datapath(efx);
2024 static void efx_remove_all(struct efx_nic *efx)
2026 efx_remove_channels(efx);
2027 efx_remove_filters(efx);
2028 #ifdef CONFIG_SFC_SRIOV
2029 efx->type->vswitching_remove(efx);
2031 efx_remove_port(efx);
2032 efx_remove_nic(efx);
2035 /**************************************************************************
2037 * Interrupt moderation
2039 **************************************************************************/
2040 unsigned int efx_usecs_to_ticks(struct efx_nic *efx, unsigned int usecs)
2044 if (usecs * 1000 < efx->timer_quantum_ns)
2045 return 1; /* never round down to 0 */
2046 return usecs * 1000 / efx->timer_quantum_ns;
2049 unsigned int efx_ticks_to_usecs(struct efx_nic *efx, unsigned int ticks)
2051 /* We must round up when converting ticks to microseconds
2052 * because we round down when converting the other way.
2054 return DIV_ROUND_UP(ticks * efx->timer_quantum_ns, 1000);
2057 /* Set interrupt moderation parameters */
2058 int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
2059 unsigned int rx_usecs, bool rx_adaptive,
2060 bool rx_may_override_tx)
2062 struct efx_channel *channel;
2063 unsigned int timer_max_us;
2065 EFX_ASSERT_RESET_SERIALISED(efx);
2067 timer_max_us = efx->timer_max_ns / 1000;
2069 if (tx_usecs > timer_max_us || rx_usecs > timer_max_us)
2072 if (tx_usecs != rx_usecs && efx->tx_channel_offset == 0 &&
2073 !rx_may_override_tx) {
2074 netif_err(efx, drv, efx->net_dev, "Channels are shared. "
2075 "RX and TX IRQ moderation must be equal\n");
2079 efx->irq_rx_adaptive = rx_adaptive;
2080 efx->irq_rx_moderation_us = rx_usecs;
2081 efx_for_each_channel(channel, efx) {
2082 if (efx_channel_has_rx_queue(channel))
2083 channel->irq_moderation_us = rx_usecs;
2084 else if (efx_channel_has_tx_queues(channel))
2085 channel->irq_moderation_us = tx_usecs;
2091 void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
2092 unsigned int *rx_usecs, bool *rx_adaptive)
2094 *rx_adaptive = efx->irq_rx_adaptive;
2095 *rx_usecs = efx->irq_rx_moderation_us;
2097 /* If channels are shared between RX and TX, so is IRQ
2098 * moderation. Otherwise, IRQ moderation is the same for all
2099 * TX channels and is not adaptive.
2101 if (efx->tx_channel_offset == 0) {
2102 *tx_usecs = *rx_usecs;
2104 struct efx_channel *tx_channel;
2106 tx_channel = efx->channel[efx->tx_channel_offset];
2107 *tx_usecs = tx_channel->irq_moderation_us;
2111 /**************************************************************************
2115 **************************************************************************/
2117 /* Run periodically off the general workqueue */
2118 static void efx_monitor(struct work_struct *data)
2120 struct efx_nic *efx = container_of(data, struct efx_nic,
2123 netif_vdbg(efx, timer, efx->net_dev,
2124 "hardware monitor executing on CPU %d\n",
2125 raw_smp_processor_id());
2126 BUG_ON(efx->type->monitor == NULL);
2128 /* If the mac_lock is already held then it is likely a port
2129 * reconfiguration is already in place, which will likely do
2130 * most of the work of monitor() anyway. */
2131 if (mutex_trylock(&efx->mac_lock)) {
2132 if (efx->port_enabled)
2133 efx->type->monitor(efx);
2134 mutex_unlock(&efx->mac_lock);
2137 queue_delayed_work(efx->workqueue, &efx->monitor_work,
2138 efx_monitor_interval);
2141 /**************************************************************************
2145 *************************************************************************/
2148 * Context: process, rtnl_lock() held.
2150 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
2152 struct efx_nic *efx = netdev_priv(net_dev);
2153 struct mii_ioctl_data *data = if_mii(ifr);
2155 if (cmd == SIOCSHWTSTAMP)
2156 return efx_ptp_set_ts_config(efx, ifr);
2157 if (cmd == SIOCGHWTSTAMP)
2158 return efx_ptp_get_ts_config(efx, ifr);
2160 /* Convert phy_id from older PRTAD/DEVAD format */
2161 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
2162 (data->phy_id & 0xfc00) == 0x0400)
2163 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
2165 return mdio_mii_ioctl(&efx->mdio, data, cmd);
2168 /**************************************************************************
2172 **************************************************************************/
2174 static void efx_init_napi_channel(struct efx_channel *channel)
2176 struct efx_nic *efx = channel->efx;
2178 channel->napi_dev = efx->net_dev;
2179 netif_napi_add(channel->napi_dev, &channel->napi_str,
2180 efx_poll, napi_weight);
2183 static void efx_init_napi(struct efx_nic *efx)
2185 struct efx_channel *channel;
2187 efx_for_each_channel(channel, efx)
2188 efx_init_napi_channel(channel);
2191 static void efx_fini_napi_channel(struct efx_channel *channel)
2193 if (channel->napi_dev)
2194 netif_napi_del(&channel->napi_str);
2196 channel->napi_dev = NULL;
2199 static void efx_fini_napi(struct efx_nic *efx)
2201 struct efx_channel *channel;
2203 efx_for_each_channel(channel, efx)
2204 efx_fini_napi_channel(channel);
2207 /**************************************************************************
2209 * Kernel net device interface
2211 *************************************************************************/
2213 /* Context: process, rtnl_lock() held. */
2214 int efx_net_open(struct net_device *net_dev)
2216 struct efx_nic *efx = netdev_priv(net_dev);
2219 netif_dbg(efx, ifup, efx->net_dev, "opening device on CPU %d\n",
2220 raw_smp_processor_id());
2222 rc = efx_check_disabled(efx);
2225 if (efx->phy_mode & PHY_MODE_SPECIAL)
2227 if (efx_mcdi_poll_reboot(efx) && efx_reset(efx, RESET_TYPE_ALL))
2230 /* Notify the kernel of the link state polled during driver load,
2231 * before the monitor starts running */
2232 efx_link_status_changed(efx);
2235 if (efx->state == STATE_DISABLED || efx->reset_pending)
2236 netif_device_detach(efx->net_dev);
2237 efx_selftest_async_start(efx);
2241 /* Context: process, rtnl_lock() held.
2242 * Note that the kernel will ignore our return code; this method
2243 * should really be a void.
2245 int efx_net_stop(struct net_device *net_dev)
2247 struct efx_nic *efx = netdev_priv(net_dev);
2249 netif_dbg(efx, ifdown, efx->net_dev, "closing on CPU %d\n",
2250 raw_smp_processor_id());
2252 /* Stop the device and flush all the channels */
2258 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
2259 static void efx_net_stats(struct net_device *net_dev,
2260 struct rtnl_link_stats64 *stats)
2262 struct efx_nic *efx = netdev_priv(net_dev);
2264 spin_lock_bh(&efx->stats_lock);
2265 efx->type->update_stats(efx, NULL, stats);
2266 spin_unlock_bh(&efx->stats_lock);
2269 /* Context: netif_tx_lock held, BHs disabled. */
2270 static void efx_watchdog(struct net_device *net_dev)
2272 struct efx_nic *efx = netdev_priv(net_dev);
2274 netif_err(efx, tx_err, efx->net_dev,
2275 "TX stuck with port_enabled=%d: resetting channels\n",
2278 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
2282 /* Context: process, rtnl_lock() held. */
2283 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
2285 struct efx_nic *efx = netdev_priv(net_dev);
2288 rc = efx_check_disabled(efx);
2292 netif_dbg(efx, drv, efx->net_dev, "changing MTU to %d\n", new_mtu);
2294 efx_device_detach_sync(efx);
2297 mutex_lock(&efx->mac_lock);
2298 net_dev->mtu = new_mtu;
2299 efx_mac_reconfigure(efx);
2300 mutex_unlock(&efx->mac_lock);
2303 efx_device_attach_if_not_resetting(efx);
2307 static int efx_set_mac_address(struct net_device *net_dev, void *data)
2309 struct efx_nic *efx = netdev_priv(net_dev);
2310 struct sockaddr *addr = data;
2311 u8 *new_addr = addr->sa_data;
2315 if (!is_valid_ether_addr(new_addr)) {
2316 netif_err(efx, drv, efx->net_dev,
2317 "invalid ethernet MAC address requested: %pM\n",
2319 return -EADDRNOTAVAIL;
2322 /* save old address */
2323 ether_addr_copy(old_addr, net_dev->dev_addr);
2324 ether_addr_copy(net_dev->dev_addr, new_addr);
2325 if (efx->type->set_mac_address) {
2326 rc = efx->type->set_mac_address(efx);
2328 ether_addr_copy(net_dev->dev_addr, old_addr);
2333 /* Reconfigure the MAC */
2334 mutex_lock(&efx->mac_lock);
2335 efx_mac_reconfigure(efx);
2336 mutex_unlock(&efx->mac_lock);
2341 /* Context: netif_addr_lock held, BHs disabled. */
2342 static void efx_set_rx_mode(struct net_device *net_dev)
2344 struct efx_nic *efx = netdev_priv(net_dev);
2346 if (efx->port_enabled)
2347 queue_work(efx->workqueue, &efx->mac_work);
2348 /* Otherwise efx_start_port() will do this */
2351 static int efx_set_features(struct net_device *net_dev, netdev_features_t data)
2353 struct efx_nic *efx = netdev_priv(net_dev);
2356 /* If disabling RX n-tuple filtering, clear existing filters */
2357 if (net_dev->features & ~data & NETIF_F_NTUPLE) {
2358 rc = efx->type->filter_clear_rx(efx, EFX_FILTER_PRI_MANUAL);
2363 /* If Rx VLAN filter is changed, update filters via mac_reconfigure.
2364 * If rx-fcs is changed, mac_reconfigure updates that too.
2366 if ((net_dev->features ^ data) & (NETIF_F_HW_VLAN_CTAG_FILTER |
2368 /* efx_set_rx_mode() will schedule MAC work to update filters
2369 * when a new features are finally set in net_dev.
2371 efx_set_rx_mode(net_dev);
2377 static int efx_get_phys_port_id(struct net_device *net_dev,
2378 struct netdev_phys_item_id *ppid)
2380 struct efx_nic *efx = netdev_priv(net_dev);
2382 if (efx->type->get_phys_port_id)
2383 return efx->type->get_phys_port_id(efx, ppid);
2388 static int efx_get_phys_port_name(struct net_device *net_dev,
2389 char *name, size_t len)
2391 struct efx_nic *efx = netdev_priv(net_dev);
2393 if (snprintf(name, len, "p%u", efx->port_num) >= len)
2398 static int efx_vlan_rx_add_vid(struct net_device *net_dev, __be16 proto, u16 vid)
2400 struct efx_nic *efx = netdev_priv(net_dev);
2402 if (efx->type->vlan_rx_add_vid)
2403 return efx->type->vlan_rx_add_vid(efx, proto, vid);
2408 static int efx_vlan_rx_kill_vid(struct net_device *net_dev, __be16 proto, u16 vid)
2410 struct efx_nic *efx = netdev_priv(net_dev);
2412 if (efx->type->vlan_rx_kill_vid)
2413 return efx->type->vlan_rx_kill_vid(efx, proto, vid);
2418 static int efx_udp_tunnel_type_map(enum udp_parsable_tunnel_type in)
2421 case UDP_TUNNEL_TYPE_VXLAN:
2422 return TUNNEL_ENCAP_UDP_PORT_ENTRY_VXLAN;
2423 case UDP_TUNNEL_TYPE_GENEVE:
2424 return TUNNEL_ENCAP_UDP_PORT_ENTRY_GENEVE;
2430 static void efx_udp_tunnel_add(struct net_device *dev, struct udp_tunnel_info *ti)
2432 struct efx_nic *efx = netdev_priv(dev);
2433 struct efx_udp_tunnel tnl;
2434 int efx_tunnel_type;
2436 efx_tunnel_type = efx_udp_tunnel_type_map(ti->type);
2437 if (efx_tunnel_type < 0)
2440 tnl.type = (u16)efx_tunnel_type;
2441 tnl.port = ti->port;
2443 if (efx->type->udp_tnl_add_port)
2444 (void)efx->type->udp_tnl_add_port(efx, tnl);
2447 static void efx_udp_tunnel_del(struct net_device *dev, struct udp_tunnel_info *ti)
2449 struct efx_nic *efx = netdev_priv(dev);
2450 struct efx_udp_tunnel tnl;
2451 int efx_tunnel_type;
2453 efx_tunnel_type = efx_udp_tunnel_type_map(ti->type);
2454 if (efx_tunnel_type < 0)
2457 tnl.type = (u16)efx_tunnel_type;
2458 tnl.port = ti->port;
2460 if (efx->type->udp_tnl_del_port)
2461 (void)efx->type->udp_tnl_del_port(efx, tnl);
2464 static const struct net_device_ops efx_netdev_ops = {
2465 .ndo_open = efx_net_open,
2466 .ndo_stop = efx_net_stop,
2467 .ndo_get_stats64 = efx_net_stats,
2468 .ndo_tx_timeout = efx_watchdog,
2469 .ndo_start_xmit = efx_hard_start_xmit,
2470 .ndo_validate_addr = eth_validate_addr,
2471 .ndo_do_ioctl = efx_ioctl,
2472 .ndo_change_mtu = efx_change_mtu,
2473 .ndo_set_mac_address = efx_set_mac_address,
2474 .ndo_set_rx_mode = efx_set_rx_mode,
2475 .ndo_set_features = efx_set_features,
2476 .ndo_vlan_rx_add_vid = efx_vlan_rx_add_vid,
2477 .ndo_vlan_rx_kill_vid = efx_vlan_rx_kill_vid,
2478 #ifdef CONFIG_SFC_SRIOV
2479 .ndo_set_vf_mac = efx_sriov_set_vf_mac,
2480 .ndo_set_vf_vlan = efx_sriov_set_vf_vlan,
2481 .ndo_set_vf_spoofchk = efx_sriov_set_vf_spoofchk,
2482 .ndo_get_vf_config = efx_sriov_get_vf_config,
2483 .ndo_set_vf_link_state = efx_sriov_set_vf_link_state,
2485 .ndo_get_phys_port_id = efx_get_phys_port_id,
2486 .ndo_get_phys_port_name = efx_get_phys_port_name,
2487 .ndo_setup_tc = efx_setup_tc,
2488 #ifdef CONFIG_RFS_ACCEL
2489 .ndo_rx_flow_steer = efx_filter_rfs,
2491 .ndo_udp_tunnel_add = efx_udp_tunnel_add,
2492 .ndo_udp_tunnel_del = efx_udp_tunnel_del,
2495 static void efx_update_name(struct efx_nic *efx)
2497 strcpy(efx->name, efx->net_dev->name);
2498 efx_mtd_rename(efx);
2499 efx_set_channel_names(efx);
2502 static int efx_netdev_event(struct notifier_block *this,
2503 unsigned long event, void *ptr)
2505 struct net_device *net_dev = netdev_notifier_info_to_dev(ptr);
2507 if ((net_dev->netdev_ops == &efx_netdev_ops) &&
2508 event == NETDEV_CHANGENAME)
2509 efx_update_name(netdev_priv(net_dev));
2514 static struct notifier_block efx_netdev_notifier = {
2515 .notifier_call = efx_netdev_event,
2519 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
2521 struct efx_nic *efx = dev_get_drvdata(dev);
2522 return sprintf(buf, "%d\n", efx->phy_type);
2524 static DEVICE_ATTR(phy_type, 0444, show_phy_type, NULL);
2526 #ifdef CONFIG_SFC_MCDI_LOGGING
2527 static ssize_t show_mcdi_log(struct device *dev, struct device_attribute *attr,
2530 struct efx_nic *efx = dev_get_drvdata(dev);
2531 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
2533 return scnprintf(buf, PAGE_SIZE, "%d\n", mcdi->logging_enabled);
2535 static ssize_t set_mcdi_log(struct device *dev, struct device_attribute *attr,
2536 const char *buf, size_t count)
2538 struct efx_nic *efx = dev_get_drvdata(dev);
2539 struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
2540 bool enable = count > 0 && *buf != '0';
2542 mcdi->logging_enabled = enable;
2545 static DEVICE_ATTR(mcdi_logging, 0644, show_mcdi_log, set_mcdi_log);
2548 static int efx_register_netdev(struct efx_nic *efx)
2550 struct net_device *net_dev = efx->net_dev;
2551 struct efx_channel *channel;
2554 net_dev->watchdog_timeo = 5 * HZ;
2555 net_dev->irq = efx->pci_dev->irq;
2556 net_dev->netdev_ops = &efx_netdev_ops;
2557 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0)
2558 net_dev->priv_flags |= IFF_UNICAST_FLT;
2559 net_dev->ethtool_ops = &efx_ethtool_ops;
2560 net_dev->gso_max_segs = EFX_TSO_MAX_SEGS;
2561 net_dev->min_mtu = EFX_MIN_MTU;
2562 net_dev->max_mtu = EFX_MAX_MTU;
2566 /* Enable resets to be scheduled and check whether any were
2567 * already requested. If so, the NIC is probably hosed so we
2570 efx->state = STATE_READY;
2571 smp_mb(); /* ensure we change state before checking reset_pending */
2572 if (efx->reset_pending) {
2573 netif_err(efx, probe, efx->net_dev,
2574 "aborting probe due to scheduled reset\n");
2579 rc = dev_alloc_name(net_dev, net_dev->name);
2582 efx_update_name(efx);
2584 /* Always start with carrier off; PHY events will detect the link */
2585 netif_carrier_off(net_dev);
2587 rc = register_netdevice(net_dev);
2591 efx_for_each_channel(channel, efx) {
2592 struct efx_tx_queue *tx_queue;
2593 efx_for_each_channel_tx_queue(tx_queue, channel)
2594 efx_init_tx_queue_core_txq(tx_queue);
2601 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2603 netif_err(efx, drv, efx->net_dev,
2604 "failed to init net dev attributes\n");
2605 goto fail_registered;
2607 #ifdef CONFIG_SFC_MCDI_LOGGING
2608 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
2610 netif_err(efx, drv, efx->net_dev,
2611 "failed to init net dev attributes\n");
2612 goto fail_attr_mcdi_logging;
2618 #ifdef CONFIG_SFC_MCDI_LOGGING
2619 fail_attr_mcdi_logging:
2620 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2624 efx_dissociate(efx);
2625 unregister_netdevice(net_dev);
2627 efx->state = STATE_UNINIT;
2629 netif_err(efx, drv, efx->net_dev, "could not register net dev\n");
2633 static void efx_unregister_netdev(struct efx_nic *efx)
2638 BUG_ON(netdev_priv(efx->net_dev) != efx);
2640 if (efx_dev_registered(efx)) {
2641 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
2642 #ifdef CONFIG_SFC_MCDI_LOGGING
2643 device_remove_file(&efx->pci_dev->dev, &dev_attr_mcdi_logging);
2645 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
2646 unregister_netdev(efx->net_dev);
2650 /**************************************************************************
2652 * Device reset and suspend
2654 **************************************************************************/
2656 /* Tears down the entire software state and most of the hardware state
2658 void efx_reset_down(struct efx_nic *efx, enum reset_type method)
2660 EFX_ASSERT_RESET_SERIALISED(efx);
2662 if (method == RESET_TYPE_MCDI_TIMEOUT)
2663 efx->type->prepare_flr(efx);
2666 efx_disable_interrupts(efx);
2668 mutex_lock(&efx->mac_lock);
2669 down_write(&efx->filter_sem);
2670 mutex_lock(&efx->rss_lock);
2671 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
2672 method != RESET_TYPE_DATAPATH)
2673 efx->phy_op->fini(efx);
2674 efx->type->fini(efx);
2677 /* This function will always ensure that the locks acquired in
2678 * efx_reset_down() are released. A failure return code indicates
2679 * that we were unable to reinitialise the hardware, and the
2680 * driver should be disabled. If ok is false, then the rx and tx
2681 * engines are not restarted, pending a RESET_DISABLE. */
2682 int efx_reset_up(struct efx_nic *efx, enum reset_type method, bool ok)
2686 EFX_ASSERT_RESET_SERIALISED(efx);
2688 if (method == RESET_TYPE_MCDI_TIMEOUT)
2689 efx->type->finish_flr(efx);
2691 /* Ensure that SRAM is initialised even if we're disabling the device */
2692 rc = efx->type->init(efx);
2694 netif_err(efx, drv, efx->net_dev, "failed to initialise NIC\n");
2701 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE &&
2702 method != RESET_TYPE_DATAPATH) {
2703 rc = efx->phy_op->init(efx);
2706 rc = efx->phy_op->reconfigure(efx);
2707 if (rc && rc != -EPERM)
2708 netif_err(efx, drv, efx->net_dev,
2709 "could not restore PHY settings\n");
2712 rc = efx_enable_interrupts(efx);
2716 #ifdef CONFIG_SFC_SRIOV
2717 rc = efx->type->vswitching_restore(efx);
2718 if (rc) /* not fatal; the PF will still work fine */
2719 netif_warn(efx, probe, efx->net_dev,
2720 "failed to restore vswitching rc=%d;"
2721 " VFs may not function\n", rc);
2724 if (efx->type->rx_restore_rss_contexts)
2725 efx->type->rx_restore_rss_contexts(efx);
2726 mutex_unlock(&efx->rss_lock);
2727 efx->type->filter_table_restore(efx);
2728 up_write(&efx->filter_sem);
2729 if (efx->type->sriov_reset)
2730 efx->type->sriov_reset(efx);
2732 mutex_unlock(&efx->mac_lock);
2736 if (efx->type->udp_tnl_push_ports)
2737 efx->type->udp_tnl_push_ports(efx);
2742 efx->port_initialized = false;
2744 mutex_unlock(&efx->rss_lock);
2745 up_write(&efx->filter_sem);
2746 mutex_unlock(&efx->mac_lock);
2751 /* Reset the NIC using the specified method. Note that the reset may
2752 * fail, in which case the card will be left in an unusable state.
2754 * Caller must hold the rtnl_lock.
2756 int efx_reset(struct efx_nic *efx, enum reset_type method)
2761 netif_info(efx, drv, efx->net_dev, "resetting (%s)\n",
2762 RESET_TYPE(method));
2764 efx_device_detach_sync(efx);
2765 efx_reset_down(efx, method);
2767 rc = efx->type->reset(efx, method);
2769 netif_err(efx, drv, efx->net_dev, "failed to reset hardware\n");
2773 /* Clear flags for the scopes we covered. We assume the NIC and
2774 * driver are now quiescent so that there is no race here.
2776 if (method < RESET_TYPE_MAX_METHOD)
2777 efx->reset_pending &= -(1 << (method + 1));
2778 else /* it doesn't fit into the well-ordered scope hierarchy */
2779 __clear_bit(method, &efx->reset_pending);
2781 /* Reinitialise bus-mastering, which may have been turned off before
2782 * the reset was scheduled. This is still appropriate, even in the
2783 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
2784 * can respond to requests. */
2785 pci_set_master(efx->pci_dev);
2788 /* Leave device stopped if necessary */
2790 method == RESET_TYPE_DISABLE ||
2791 method == RESET_TYPE_RECOVER_OR_DISABLE;
2792 rc2 = efx_reset_up(efx, method, !disabled);
2800 dev_close(efx->net_dev);
2801 netif_err(efx, drv, efx->net_dev, "has been disabled\n");
2802 efx->state = STATE_DISABLED;
2804 netif_dbg(efx, drv, efx->net_dev, "reset complete\n");
2805 efx_device_attach_if_not_resetting(efx);
2810 /* Try recovery mechanisms.
2811 * For now only EEH is supported.
2812 * Returns 0 if the recovery mechanisms are unsuccessful.
2813 * Returns a non-zero value otherwise.
2815 int efx_try_recovery(struct efx_nic *efx)
2818 /* A PCI error can occur and not be seen by EEH because nothing
2819 * happens on the PCI bus. In this case the driver may fail and
2820 * schedule a 'recover or reset', leading to this recovery handler.
2821 * Manually call the eeh failure check function.
2823 struct eeh_dev *eehdev = pci_dev_to_eeh_dev(efx->pci_dev);
2824 if (eeh_dev_check_failure(eehdev)) {
2825 /* The EEH mechanisms will handle the error and reset the
2826 * device if necessary.
2834 static void efx_wait_for_bist_end(struct efx_nic *efx)
2838 for (i = 0; i < BIST_WAIT_DELAY_COUNT; ++i) {
2839 if (efx_mcdi_poll_reboot(efx))
2841 msleep(BIST_WAIT_DELAY_MS);
2844 netif_err(efx, drv, efx->net_dev, "Warning: No MC reboot after BIST mode\n");
2846 /* Either way unset the BIST flag. If we found no reboot we probably
2847 * won't recover, but we should try.
2849 efx->mc_bist_for_other_fn = false;
2852 /* The worker thread exists so that code that cannot sleep can
2853 * schedule a reset for later.
2855 static void efx_reset_work(struct work_struct *data)
2857 struct efx_nic *efx = container_of(data, struct efx_nic, reset_work);
2858 unsigned long pending;
2859 enum reset_type method;
2861 pending = READ_ONCE(efx->reset_pending);
2862 method = fls(pending) - 1;
2864 if (method == RESET_TYPE_MC_BIST)
2865 efx_wait_for_bist_end(efx);
2867 if ((method == RESET_TYPE_RECOVER_OR_DISABLE ||
2868 method == RESET_TYPE_RECOVER_OR_ALL) &&
2869 efx_try_recovery(efx))
2877 /* We checked the state in efx_schedule_reset() but it may
2878 * have changed by now. Now that we have the RTNL lock,
2879 * it cannot change again.
2881 if (efx->state == STATE_READY)
2882 (void)efx_reset(efx, method);
2887 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
2889 enum reset_type method;
2891 if (efx->state == STATE_RECOVERY) {
2892 netif_dbg(efx, drv, efx->net_dev,
2893 "recovering: skip scheduling %s reset\n",
2899 case RESET_TYPE_INVISIBLE:
2900 case RESET_TYPE_ALL:
2901 case RESET_TYPE_RECOVER_OR_ALL:
2902 case RESET_TYPE_WORLD:
2903 case RESET_TYPE_DISABLE:
2904 case RESET_TYPE_RECOVER_OR_DISABLE:
2905 case RESET_TYPE_DATAPATH:
2906 case RESET_TYPE_MC_BIST:
2907 case RESET_TYPE_MCDI_TIMEOUT:
2909 netif_dbg(efx, drv, efx->net_dev, "scheduling %s reset\n",
2910 RESET_TYPE(method));
2913 method = efx->type->map_reset_reason(type);
2914 netif_dbg(efx, drv, efx->net_dev,
2915 "scheduling %s reset for %s\n",
2916 RESET_TYPE(method), RESET_TYPE(type));
2920 set_bit(method, &efx->reset_pending);
2921 smp_mb(); /* ensure we change reset_pending before checking state */
2923 /* If we're not READY then just leave the flags set as the cue
2924 * to abort probing or reschedule the reset later.
2926 if (READ_ONCE(efx->state) != STATE_READY)
2929 /* efx_process_channel() will no longer read events once a
2930 * reset is scheduled. So switch back to poll'd MCDI completions. */
2931 efx_mcdi_mode_poll(efx);
2933 queue_work(reset_workqueue, &efx->reset_work);
2936 /**************************************************************************
2938 * List of NICs we support
2940 **************************************************************************/
2942 /* PCI device ID table */
2943 static const struct pci_device_id efx_pci_table[] = {
2944 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0803), /* SFC9020 */
2945 .driver_data = (unsigned long) &siena_a0_nic_type},
2946 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0813), /* SFL9021 */
2947 .driver_data = (unsigned long) &siena_a0_nic_type},
2948 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0903), /* SFC9120 PF */
2949 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2950 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1903), /* SFC9120 VF */
2951 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
2952 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0923), /* SFC9140 PF */
2953 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2954 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1923), /* SFC9140 VF */
2955 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
2956 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0a03), /* SFC9220 PF */
2957 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2958 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1a03), /* SFC9220 VF */
2959 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
2960 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x0b03), /* SFC9250 PF */
2961 .driver_data = (unsigned long) &efx_hunt_a0_nic_type},
2962 {PCI_DEVICE(PCI_VENDOR_ID_SOLARFLARE, 0x1b03), /* SFC9250 VF */
2963 .driver_data = (unsigned long) &efx_hunt_a0_vf_nic_type},
2964 {0} /* end of list */
2967 /**************************************************************************
2969 * Dummy PHY/MAC operations
2971 * Can be used for some unimplemented operations
2972 * Needed so all function pointers are valid and do not have to be tested
2975 **************************************************************************/
2976 int efx_port_dummy_op_int(struct efx_nic *efx)
2980 void efx_port_dummy_op_void(struct efx_nic *efx) {}
2982 static bool efx_port_dummy_op_poll(struct efx_nic *efx)
2987 static const struct efx_phy_operations efx_dummy_phy_operations = {
2988 .init = efx_port_dummy_op_int,
2989 .reconfigure = efx_port_dummy_op_int,
2990 .poll = efx_port_dummy_op_poll,
2991 .fini = efx_port_dummy_op_void,
2994 /**************************************************************************
2998 **************************************************************************/
3000 /* This zeroes out and then fills in the invariants in a struct
3001 * efx_nic (including all sub-structures).
3003 static int efx_init_struct(struct efx_nic *efx,
3004 struct pci_dev *pci_dev, struct net_device *net_dev)
3006 int rc = -ENOMEM, i;
3008 /* Initialise common structures */
3009 INIT_LIST_HEAD(&efx->node);
3010 INIT_LIST_HEAD(&efx->secondary_list);
3011 spin_lock_init(&efx->biu_lock);
3012 #ifdef CONFIG_SFC_MTD
3013 INIT_LIST_HEAD(&efx->mtd_list);
3015 INIT_WORK(&efx->reset_work, efx_reset_work);
3016 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
3017 INIT_DELAYED_WORK(&efx->selftest_work, efx_selftest_async_work);
3018 efx->pci_dev = pci_dev;
3019 efx->msg_enable = debug;
3020 efx->state = STATE_UNINIT;
3021 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
3023 efx->net_dev = net_dev;
3024 efx->rx_prefix_size = efx->type->rx_prefix_size;
3026 NET_IP_ALIGN ? (efx->rx_prefix_size + NET_IP_ALIGN) % 4 : 0;
3027 efx->rx_packet_hash_offset =
3028 efx->type->rx_hash_offset - efx->type->rx_prefix_size;
3029 efx->rx_packet_ts_offset =
3030 efx->type->rx_ts_offset - efx->type->rx_prefix_size;
3031 INIT_LIST_HEAD(&efx->rss_context.list);
3032 mutex_init(&efx->rss_lock);
3033 spin_lock_init(&efx->stats_lock);
3034 efx->vi_stride = EFX_DEFAULT_VI_STRIDE;
3035 efx->num_mac_stats = MC_CMD_MAC_NSTATS;
3036 BUILD_BUG_ON(MC_CMD_MAC_NSTATS - 1 != MC_CMD_MAC_GENERATION_END);
3037 mutex_init(&efx->mac_lock);
3038 #ifdef CONFIG_RFS_ACCEL
3039 mutex_init(&efx->rps_mutex);
3040 spin_lock_init(&efx->rps_hash_lock);
3041 /* Failure to allocate is not fatal, but may degrade ARFS performance */
3042 efx->rps_hash_table = kcalloc(EFX_ARFS_HASH_TABLE_SIZE,
3043 sizeof(*efx->rps_hash_table), GFP_KERNEL);
3045 efx->phy_op = &efx_dummy_phy_operations;
3046 efx->mdio.dev = net_dev;
3047 INIT_WORK(&efx->mac_work, efx_mac_work);
3048 init_waitqueue_head(&efx->flush_wq);
3050 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
3051 efx->channel[i] = efx_alloc_channel(efx, i, NULL);
3052 if (!efx->channel[i])
3054 efx->msi_context[i].efx = efx;
3055 efx->msi_context[i].index = i;
3058 /* Higher numbered interrupt modes are less capable! */
3059 if (WARN_ON_ONCE(efx->type->max_interrupt_mode >
3060 efx->type->min_interrupt_mode)) {
3064 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
3066 efx->interrupt_mode = min(efx->type->min_interrupt_mode,
3069 /* Would be good to use the net_dev name, but we're too early */
3070 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
3072 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
3073 if (!efx->workqueue)
3079 efx_fini_struct(efx);
3083 static void efx_fini_struct(struct efx_nic *efx)
3087 #ifdef CONFIG_RFS_ACCEL
3088 kfree(efx->rps_hash_table);
3091 for (i = 0; i < EFX_MAX_CHANNELS; i++)
3092 kfree(efx->channel[i]);
3096 if (efx->workqueue) {
3097 destroy_workqueue(efx->workqueue);
3098 efx->workqueue = NULL;
3102 void efx_update_sw_stats(struct efx_nic *efx, u64 *stats)
3104 u64 n_rx_nodesc_trunc = 0;
3105 struct efx_channel *channel;
3107 efx_for_each_channel(channel, efx)
3108 n_rx_nodesc_trunc += channel->n_rx_nodesc_trunc;
3109 stats[GENERIC_STAT_rx_nodesc_trunc] = n_rx_nodesc_trunc;
3110 stats[GENERIC_STAT_rx_noskb_drops] = atomic_read(&efx->n_rx_noskb_drops);
3113 bool efx_filter_spec_equal(const struct efx_filter_spec *left,
3114 const struct efx_filter_spec *right)
3116 if ((left->match_flags ^ right->match_flags) |
3117 ((left->flags ^ right->flags) &
3118 (EFX_FILTER_FLAG_RX | EFX_FILTER_FLAG_TX)))
3121 return memcmp(&left->outer_vid, &right->outer_vid,
3122 sizeof(struct efx_filter_spec) -
3123 offsetof(struct efx_filter_spec, outer_vid)) == 0;
3126 u32 efx_filter_spec_hash(const struct efx_filter_spec *spec)
3128 BUILD_BUG_ON(offsetof(struct efx_filter_spec, outer_vid) & 3);
3129 return jhash2((const u32 *)&spec->outer_vid,
3130 (sizeof(struct efx_filter_spec) -
3131 offsetof(struct efx_filter_spec, outer_vid)) / 4,
3135 #ifdef CONFIG_RFS_ACCEL
3136 bool efx_rps_check_rule(struct efx_arfs_rule *rule, unsigned int filter_idx,
3139 if (rule->filter_id == EFX_ARFS_FILTER_ID_PENDING) {
3140 /* ARFS is currently updating this entry, leave it */
3143 if (rule->filter_id == EFX_ARFS_FILTER_ID_ERROR) {
3144 /* ARFS tried and failed to update this, so it's probably out
3145 * of date. Remove the filter and the ARFS rule entry.
3147 rule->filter_id = EFX_ARFS_FILTER_ID_REMOVING;
3150 } else if (WARN_ON(rule->filter_id != filter_idx)) { /* can't happen */
3151 /* ARFS has moved on, so old filter is not needed. Since we did
3152 * not mark the rule with EFX_ARFS_FILTER_ID_REMOVING, it will
3153 * not be removed by efx_rps_hash_del() subsequently.
3158 /* Remove it iff ARFS wants to. */
3163 struct hlist_head *efx_rps_hash_bucket(struct efx_nic *efx,
3164 const struct efx_filter_spec *spec)
3166 u32 hash = efx_filter_spec_hash(spec);
3168 lockdep_assert_held(&efx->rps_hash_lock);
3169 if (!efx->rps_hash_table)
3171 return &efx->rps_hash_table[hash % EFX_ARFS_HASH_TABLE_SIZE];
3174 struct efx_arfs_rule *efx_rps_hash_find(struct efx_nic *efx,
3175 const struct efx_filter_spec *spec)
3177 struct efx_arfs_rule *rule;
3178 struct hlist_head *head;
3179 struct hlist_node *node;
3181 head = efx_rps_hash_bucket(efx, spec);
3184 hlist_for_each(node, head) {
3185 rule = container_of(node, struct efx_arfs_rule, node);
3186 if (efx_filter_spec_equal(spec, &rule->spec))
3192 struct efx_arfs_rule *efx_rps_hash_add(struct efx_nic *efx,
3193 const struct efx_filter_spec *spec,
3196 struct efx_arfs_rule *rule;
3197 struct hlist_head *head;
3198 struct hlist_node *node;
3200 head = efx_rps_hash_bucket(efx, spec);
3203 hlist_for_each(node, head) {
3204 rule = container_of(node, struct efx_arfs_rule, node);
3205 if (efx_filter_spec_equal(spec, &rule->spec)) {
3210 rule = kmalloc(sizeof(*rule), GFP_ATOMIC);
3213 memcpy(&rule->spec, spec, sizeof(rule->spec));
3214 hlist_add_head(&rule->node, head);
3219 void efx_rps_hash_del(struct efx_nic *efx, const struct efx_filter_spec *spec)
3221 struct efx_arfs_rule *rule;
3222 struct hlist_head *head;
3223 struct hlist_node *node;
3225 head = efx_rps_hash_bucket(efx, spec);
3228 hlist_for_each(node, head) {
3229 rule = container_of(node, struct efx_arfs_rule, node);
3230 if (efx_filter_spec_equal(spec, &rule->spec)) {
3231 /* Someone already reused the entry. We know that if
3232 * this check doesn't fire (i.e. filter_id == REMOVING)
3233 * then the REMOVING mark was put there by our caller,
3234 * because caller is holding a lock on filter table and
3235 * only holders of that lock set REMOVING.
3237 if (rule->filter_id != EFX_ARFS_FILTER_ID_REMOVING)
3244 /* We didn't find it. */
3249 /* RSS contexts. We're using linked lists and crappy O(n) algorithms, because
3250 * (a) this is an infrequent control-plane operation and (b) n is small (max 64)
3252 struct efx_rss_context *efx_alloc_rss_context_entry(struct efx_nic *efx)
3254 struct list_head *head = &efx->rss_context.list;
3255 struct efx_rss_context *ctx, *new;
3256 u32 id = 1; /* Don't use zero, that refers to the master RSS context */
3258 WARN_ON(!mutex_is_locked(&efx->rss_lock));
3260 /* Search for first gap in the numbering */
3261 list_for_each_entry(ctx, head, list) {
3262 if (ctx->user_id != id)
3265 /* Check for wrap. If this happens, we have nearly 2^32
3266 * allocated RSS contexts, which seems unlikely.
3268 if (WARN_ON_ONCE(!id))
3272 /* Create the new entry */
3273 new = kmalloc(sizeof(struct efx_rss_context), GFP_KERNEL);
3276 new->context_id = EFX_EF10_RSS_CONTEXT_INVALID;
3277 new->rx_hash_udp_4tuple = false;
3279 /* Insert the new entry into the gap */
3281 list_add_tail(&new->list, &ctx->list);
3285 struct efx_rss_context *efx_find_rss_context_entry(struct efx_nic *efx, u32 id)
3287 struct list_head *head = &efx->rss_context.list;
3288 struct efx_rss_context *ctx;
3290 WARN_ON(!mutex_is_locked(&efx->rss_lock));
3292 list_for_each_entry(ctx, head, list)
3293 if (ctx->user_id == id)
3298 void efx_free_rss_context_entry(struct efx_rss_context *ctx)
3300 list_del(&ctx->list);
3304 /**************************************************************************
3308 **************************************************************************/
3310 /* Main body of final NIC shutdown code
3311 * This is called only at module unload (or hotplug removal).
3313 static void efx_pci_remove_main(struct efx_nic *efx)
3315 /* Flush reset_work. It can no longer be scheduled since we
3318 BUG_ON(efx->state == STATE_READY);
3319 cancel_work_sync(&efx->reset_work);
3321 efx_disable_interrupts(efx);
3322 efx_clear_interrupt_affinity(efx);
3323 efx_nic_fini_interrupt(efx);
3325 efx->type->fini(efx);
3327 efx_remove_all(efx);
3330 /* Final NIC shutdown
3331 * This is called only at module unload (or hotplug removal). A PF can call
3332 * this on its VFs to ensure they are unbound first.
3334 static void efx_pci_remove(struct pci_dev *pci_dev)
3336 struct efx_nic *efx;
3338 efx = pci_get_drvdata(pci_dev);
3342 /* Mark the NIC as fini, then stop the interface */
3344 efx_dissociate(efx);
3345 dev_close(efx->net_dev);
3346 efx_disable_interrupts(efx);
3347 efx->state = STATE_UNINIT;
3350 if (efx->type->sriov_fini)
3351 efx->type->sriov_fini(efx);
3353 efx_unregister_netdev(efx);
3355 efx_mtd_remove(efx);
3357 efx_pci_remove_main(efx);
3360 netif_dbg(efx, drv, efx->net_dev, "shutdown successful\n");
3362 efx_fini_struct(efx);
3363 free_netdev(efx->net_dev);
3365 pci_disable_pcie_error_reporting(pci_dev);
3368 /* NIC VPD information
3369 * Called during probe to display the part number of the
3370 * installed NIC. VPD is potentially very large but this should
3371 * always appear within the first 512 bytes.
3373 #define SFC_VPD_LEN 512
3374 static void efx_probe_vpd_strings(struct efx_nic *efx)
3376 struct pci_dev *dev = efx->pci_dev;
3377 char vpd_data[SFC_VPD_LEN];
3379 int ro_start, ro_size, i, j;
3381 /* Get the vpd data from the device */
3382 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
3383 if (vpd_size <= 0) {
3384 netif_err(efx, drv, efx->net_dev, "Unable to read VPD\n");
3388 /* Get the Read only section */
3389 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size, PCI_VPD_LRDT_RO_DATA);
3391 netif_err(efx, drv, efx->net_dev, "VPD Read-only not found\n");
3395 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
3397 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
3398 if (i + j > vpd_size)
3401 /* Get the Part number */
3402 i = pci_vpd_find_info_keyword(vpd_data, i, j, "PN");
3404 netif_err(efx, drv, efx->net_dev, "Part number not found\n");
3408 j = pci_vpd_info_field_size(&vpd_data[i]);
3409 i += PCI_VPD_INFO_FLD_HDR_SIZE;
3410 if (i + j > vpd_size) {
3411 netif_err(efx, drv, efx->net_dev, "Incomplete part number\n");
3415 netif_info(efx, drv, efx->net_dev,
3416 "Part Number : %.*s\n", j, &vpd_data[i]);
3418 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
3420 i = pci_vpd_find_info_keyword(vpd_data, i, j, "SN");
3422 netif_err(efx, drv, efx->net_dev, "Serial number not found\n");
3426 j = pci_vpd_info_field_size(&vpd_data[i]);
3427 i += PCI_VPD_INFO_FLD_HDR_SIZE;
3428 if (i + j > vpd_size) {
3429 netif_err(efx, drv, efx->net_dev, "Incomplete serial number\n");
3433 efx->vpd_sn = kmalloc(j + 1, GFP_KERNEL);
3437 snprintf(efx->vpd_sn, j + 1, "%s", &vpd_data[i]);
3441 /* Main body of NIC initialisation
3442 * This is called at module load (or hotplug insertion, theoretically).
3444 static int efx_pci_probe_main(struct efx_nic *efx)
3448 /* Do start-of-day initialisation */
3449 rc = efx_probe_all(efx);
3455 down_write(&efx->filter_sem);
3456 rc = efx->type->init(efx);
3457 up_write(&efx->filter_sem);
3459 netif_err(efx, probe, efx->net_dev,
3460 "failed to initialise NIC\n");
3464 rc = efx_init_port(efx);
3466 netif_err(efx, probe, efx->net_dev,
3467 "failed to initialise port\n");
3471 rc = efx_nic_init_interrupt(efx);
3475 efx_set_interrupt_affinity(efx);
3476 rc = efx_enable_interrupts(efx);
3483 efx_clear_interrupt_affinity(efx);
3484 efx_nic_fini_interrupt(efx);
3488 efx->type->fini(efx);
3491 efx_remove_all(efx);
3496 static int efx_pci_probe_post_io(struct efx_nic *efx)
3498 struct net_device *net_dev = efx->net_dev;
3499 int rc = efx_pci_probe_main(efx);
3504 if (efx->type->sriov_init) {
3505 rc = efx->type->sriov_init(efx);
3507 netif_err(efx, probe, efx->net_dev,
3508 "SR-IOV can't be enabled rc %d\n", rc);
3511 /* Determine netdevice features */
3512 net_dev->features |= (efx->type->offload_features | NETIF_F_SG |
3513 NETIF_F_TSO | NETIF_F_RXCSUM | NETIF_F_RXALL);
3514 if (efx->type->offload_features & (NETIF_F_IPV6_CSUM | NETIF_F_HW_CSUM))
3515 net_dev->features |= NETIF_F_TSO6;
3516 /* Check whether device supports TSO */
3517 if (!efx->type->tso_versions || !efx->type->tso_versions(efx))
3518 net_dev->features &= ~NETIF_F_ALL_TSO;
3519 /* Mask for features that also apply to VLAN devices */
3520 net_dev->vlan_features |= (NETIF_F_HW_CSUM | NETIF_F_SG |
3521 NETIF_F_HIGHDMA | NETIF_F_ALL_TSO |
3524 net_dev->hw_features |= net_dev->features & ~efx->fixed_features;
3526 /* Disable receiving frames with bad FCS, by default. */
3527 net_dev->features &= ~NETIF_F_RXALL;
3529 /* Disable VLAN filtering by default. It may be enforced if
3530 * the feature is fixed (i.e. VLAN filters are required to
3531 * receive VLAN tagged packets due to vPort restrictions).
3533 net_dev->features &= ~NETIF_F_HW_VLAN_CTAG_FILTER;
3534 net_dev->features |= efx->fixed_features;
3536 rc = efx_register_netdev(efx);
3540 efx_pci_remove_main(efx);
3544 /* NIC initialisation
3546 * This is called at module load (or hotplug insertion,
3547 * theoretically). It sets up PCI mappings, resets the NIC,
3548 * sets up and registers the network devices with the kernel and hooks
3549 * the interrupt service routine. It does not prepare the device for
3550 * transmission; this is left to the first time one of the network
3551 * interfaces is brought up (i.e. efx_net_open).
3553 static int efx_pci_probe(struct pci_dev *pci_dev,
3554 const struct pci_device_id *entry)
3556 struct net_device *net_dev;
3557 struct efx_nic *efx;
3560 /* Allocate and initialise a struct net_device and struct efx_nic */
3561 net_dev = alloc_etherdev_mqs(sizeof(*efx), EFX_MAX_CORE_TX_QUEUES,
3565 efx = netdev_priv(net_dev);
3566 efx->type = (const struct efx_nic_type *) entry->driver_data;
3567 efx->fixed_features |= NETIF_F_HIGHDMA;
3569 pci_set_drvdata(pci_dev, efx);
3570 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
3571 rc = efx_init_struct(efx, pci_dev, net_dev);
3575 netif_info(efx, probe, efx->net_dev,
3576 "Solarflare NIC detected\n");
3578 if (!efx->type->is_vf)
3579 efx_probe_vpd_strings(efx);
3581 /* Set up basic I/O (BAR mappings etc) */
3582 rc = efx_init_io(efx);
3586 rc = efx_pci_probe_post_io(efx);
3588 /* On failure, retry once immediately.
3589 * If we aborted probe due to a scheduled reset, dismiss it.
3591 efx->reset_pending = 0;
3592 rc = efx_pci_probe_post_io(efx);
3594 /* On another failure, retry once more
3595 * after a 50-305ms delay.
3599 get_random_bytes(&r, 1);
3600 msleep((unsigned int)r + 50);
3601 efx->reset_pending = 0;
3602 rc = efx_pci_probe_post_io(efx);
3608 netif_dbg(efx, probe, efx->net_dev, "initialisation successful\n");
3610 /* Try to create MTDs, but allow this to fail */
3612 rc = efx_mtd_probe(efx);
3614 if (rc && rc != -EPERM)
3615 netif_warn(efx, probe, efx->net_dev,
3616 "failed to create MTDs (%d)\n", rc);
3618 (void)pci_enable_pcie_error_reporting(pci_dev);
3620 if (efx->type->udp_tnl_push_ports)
3621 efx->type->udp_tnl_push_ports(efx);
3628 efx_fini_struct(efx);
3631 netif_dbg(efx, drv, efx->net_dev, "initialisation failed. rc=%d\n", rc);
3632 free_netdev(net_dev);
3636 /* efx_pci_sriov_configure returns the actual number of Virtual Functions
3637 * enabled on success
3639 #ifdef CONFIG_SFC_SRIOV
3640 static int efx_pci_sriov_configure(struct pci_dev *dev, int num_vfs)
3643 struct efx_nic *efx = pci_get_drvdata(dev);
3645 if (efx->type->sriov_configure) {
3646 rc = efx->type->sriov_configure(efx, num_vfs);
3656 static int efx_pm_freeze(struct device *dev)
3658 struct efx_nic *efx = dev_get_drvdata(dev);
3662 if (efx->state != STATE_DISABLED) {
3663 efx->state = STATE_UNINIT;
3665 efx_device_detach_sync(efx);
3668 efx_disable_interrupts(efx);
3676 static int efx_pm_thaw(struct device *dev)
3679 struct efx_nic *efx = dev_get_drvdata(dev);
3683 if (efx->state != STATE_DISABLED) {
3684 rc = efx_enable_interrupts(efx);
3688 mutex_lock(&efx->mac_lock);
3689 efx->phy_op->reconfigure(efx);
3690 mutex_unlock(&efx->mac_lock);
3694 efx_device_attach_if_not_resetting(efx);
3696 efx->state = STATE_READY;
3698 efx->type->resume_wol(efx);
3703 /* Reschedule any quenched resets scheduled during efx_pm_freeze() */
3704 queue_work(reset_workqueue, &efx->reset_work);
3714 static int efx_pm_poweroff(struct device *dev)
3716 struct pci_dev *pci_dev = to_pci_dev(dev);
3717 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3719 efx->type->fini(efx);
3721 efx->reset_pending = 0;
3723 pci_save_state(pci_dev);
3724 return pci_set_power_state(pci_dev, PCI_D3hot);
3727 /* Used for both resume and restore */
3728 static int efx_pm_resume(struct device *dev)
3730 struct pci_dev *pci_dev = to_pci_dev(dev);
3731 struct efx_nic *efx = pci_get_drvdata(pci_dev);
3734 rc = pci_set_power_state(pci_dev, PCI_D0);
3737 pci_restore_state(pci_dev);
3738 rc = pci_enable_device(pci_dev);
3741 pci_set_master(efx->pci_dev);
3742 rc = efx->type->reset(efx, RESET_TYPE_ALL);
3745 down_write(&efx->filter_sem);
3746 rc = efx->type->init(efx);
3747 up_write(&efx->filter_sem);
3750 rc = efx_pm_thaw(dev);
3754 static int efx_pm_suspend(struct device *dev)
3759 rc = efx_pm_poweroff(dev);
3765 static const struct dev_pm_ops efx_pm_ops = {
3766 .suspend = efx_pm_suspend,
3767 .resume = efx_pm_resume,
3768 .freeze = efx_pm_freeze,
3769 .thaw = efx_pm_thaw,
3770 .poweroff = efx_pm_poweroff,
3771 .restore = efx_pm_resume,
3774 /* A PCI error affecting this device was detected.
3775 * At this point MMIO and DMA may be disabled.
3776 * Stop the software path and request a slot reset.
3778 static pci_ers_result_t efx_io_error_detected(struct pci_dev *pdev,
3779 enum pci_channel_state state)
3781 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3782 struct efx_nic *efx = pci_get_drvdata(pdev);
3784 if (state == pci_channel_io_perm_failure)
3785 return PCI_ERS_RESULT_DISCONNECT;
3789 if (efx->state != STATE_DISABLED) {
3790 efx->state = STATE_RECOVERY;
3791 efx->reset_pending = 0;
3793 efx_device_detach_sync(efx);
3796 efx_disable_interrupts(efx);
3798 status = PCI_ERS_RESULT_NEED_RESET;
3800 /* If the interface is disabled we don't want to do anything
3803 status = PCI_ERS_RESULT_RECOVERED;
3808 pci_disable_device(pdev);
3813 /* Fake a successful reset, which will be performed later in efx_io_resume. */
3814 static pci_ers_result_t efx_io_slot_reset(struct pci_dev *pdev)
3816 struct efx_nic *efx = pci_get_drvdata(pdev);
3817 pci_ers_result_t status = PCI_ERS_RESULT_RECOVERED;
3819 if (pci_enable_device(pdev)) {
3820 netif_err(efx, hw, efx->net_dev,
3821 "Cannot re-enable PCI device after reset.\n");
3822 status = PCI_ERS_RESULT_DISCONNECT;
3828 /* Perform the actual reset and resume I/O operations. */
3829 static void efx_io_resume(struct pci_dev *pdev)
3831 struct efx_nic *efx = pci_get_drvdata(pdev);
3836 if (efx->state == STATE_DISABLED)
3839 rc = efx_reset(efx, RESET_TYPE_ALL);
3841 netif_err(efx, hw, efx->net_dev,
3842 "efx_reset failed after PCI error (%d)\n", rc);
3844 efx->state = STATE_READY;
3845 netif_dbg(efx, hw, efx->net_dev,
3846 "Done resetting and resuming IO after PCI error.\n");
3853 /* For simplicity and reliability, we always require a slot reset and try to
3854 * reset the hardware when a pci error affecting the device is detected.
3855 * We leave both the link_reset and mmio_enabled callback unimplemented:
3856 * with our request for slot reset the mmio_enabled callback will never be
3857 * called, and the link_reset callback is not used by AER or EEH mechanisms.
3859 static const struct pci_error_handlers efx_err_handlers = {
3860 .error_detected = efx_io_error_detected,
3861 .slot_reset = efx_io_slot_reset,
3862 .resume = efx_io_resume,
3865 static struct pci_driver efx_pci_driver = {
3866 .name = KBUILD_MODNAME,
3867 .id_table = efx_pci_table,
3868 .probe = efx_pci_probe,
3869 .remove = efx_pci_remove,
3870 .driver.pm = &efx_pm_ops,
3871 .err_handler = &efx_err_handlers,
3872 #ifdef CONFIG_SFC_SRIOV
3873 .sriov_configure = efx_pci_sriov_configure,
3877 /**************************************************************************
3879 * Kernel module interface
3881 *************************************************************************/
3883 module_param(interrupt_mode, uint, 0444);
3884 MODULE_PARM_DESC(interrupt_mode,
3885 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
3887 static int __init efx_init_module(void)
3891 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
3893 rc = register_netdevice_notifier(&efx_netdev_notifier);
3897 #ifdef CONFIG_SFC_SRIOV
3898 rc = efx_init_sriov();
3903 reset_workqueue = create_singlethread_workqueue("sfc_reset");
3904 if (!reset_workqueue) {
3909 rc = pci_register_driver(&efx_pci_driver);
3916 destroy_workqueue(reset_workqueue);
3918 #ifdef CONFIG_SFC_SRIOV
3922 unregister_netdevice_notifier(&efx_netdev_notifier);
3927 static void __exit efx_exit_module(void)
3929 printk(KERN_INFO "Solarflare NET driver unloading\n");
3931 pci_unregister_driver(&efx_pci_driver);
3932 destroy_workqueue(reset_workqueue);
3933 #ifdef CONFIG_SFC_SRIOV
3936 unregister_netdevice_notifier(&efx_netdev_notifier);
3940 module_init(efx_init_module);
3941 module_exit(efx_exit_module);
3943 MODULE_AUTHOR("Solarflare Communications and "
3944 "Michael Brown <mbrown@fensystems.co.uk>");
3945 MODULE_DESCRIPTION("Solarflare network driver");
3946 MODULE_LICENSE("GPL");
3947 MODULE_DEVICE_TABLE(pci, efx_pci_table);
3948 MODULE_VERSION(EFX_DRIVER_VERSION);