drivers/net/ethernet/qlogic/qed/qed_main.c

   1 /* QLogic qed NIC Driver
   2  * Copyright (c) 2015-2017  QLogic Corporation
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and /or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  */
  32
  33 #include <linux/stddef.h>
  34 #include <linux/pci.h>
  35 #include <linux/kernel.h>
  36 #include <linux/slab.h>
  37 #include <linux/delay.h>
  38 #include <asm/byteorder.h>
  39 #include <linux/dma-mapping.h>
  40 #include <linux/string.h>
  41 #include <linux/module.h>
  42 #include <linux/interrupt.h>
  43 #include <linux/workqueue.h>
  44 #include <linux/ethtool.h>
  45 #include <linux/etherdevice.h>
  46 #include <linux/vmalloc.h>
  47 #include <linux/crash_dump.h>
  48 #include <linux/qed/qed_if.h>
  49 #include <linux/qed/qed_ll2_if.h>
  50
  51 #include "qed.h"
  52 #include "qed_sriov.h"
  53 #include "qed_sp.h"
  54 #include "qed_dev_api.h"
  55 #include "qed_ll2.h"
  56 #include "qed_fcoe.h"
  57 #include "qed_iscsi.h"
  58
  59 #include "qed_mcp.h"
  60 #include "qed_hw.h"
  61 #include "qed_selftest.h"
  62 #include "qed_debug.h"
  63
  64 #define QED_ROCE_QPS                    (8192)
  65 #define QED_ROCE_DPIS                   (8)
  66
  67 static char version[] =
  68         "QLogic FastLinQ 4xxxx Core Module qed " DRV_MODULE_VERSION "\n";
  69
  70 MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Core Module");
  71 MODULE_LICENSE("GPL");
  72 MODULE_VERSION(DRV_MODULE_VERSION);
  73
  74 #define FW_FILE_VERSION                         \
  75         __stringify(FW_MAJOR_VERSION) "."       \
  76         __stringify(FW_MINOR_VERSION) "."       \
  77         __stringify(FW_REVISION_VERSION) "."    \
  78         __stringify(FW_ENGINEERING_VERSION)
  79
  80 #define QED_FW_FILE_NAME        \
  81         "/*(DEBLOBBED)*/"
  82
  83 /*(DEBLOBBED)*/
  84
  85 static int __init qed_init(void)
  86 {
  87         pr_info("%s", version);
  88
  89         return 0;
  90 }
  91
  92 static void __exit qed_cleanup(void)
  93 {
  94         pr_notice("qed_cleanup called\n");
  95 }
  96
  97 module_init(qed_init);
  98 module_exit(qed_cleanup);
  99
 100 /* Check if the DMA controller on the machine can properly handle the DMA
 101  * addressing required by the device.
 102 */
 103 static int qed_set_coherency_mask(struct qed_dev *cdev)
 104 {
 105         struct device *dev = &cdev->pdev->dev;
 106
 107         if (dma_set_mask(dev, DMA_BIT_MASK(64)) == 0) {
 108                 if (dma_set_coherent_mask(dev, DMA_BIT_MASK(64)) != 0) {
 109                         DP_NOTICE(cdev,
 110                                   "Can't request 64-bit consistent allocations\n");
 111                         return -EIO;
 112                 }
 113         } else if (dma_set_mask(dev, DMA_BIT_MASK(32)) != 0) {
 114                 DP_NOTICE(cdev, "Can't request 64b/32b DMA addresses\n");
 115                 return -EIO;
 116         }
 117
 118         return 0;
 119 }
 120
 121 static void qed_free_pci(struct qed_dev *cdev)
 122 {
 123         struct pci_dev *pdev = cdev->pdev;
 124
 125         if (cdev->doorbells && cdev->db_size)
 126                 iounmap(cdev->doorbells);
 127         if (cdev->regview)
 128                 iounmap(cdev->regview);
 129         if (atomic_read(&pdev->enable_cnt) == 1)
 130                 pci_release_regions(pdev);
 131
 132         pci_disable_device(pdev);
 133 }
 134
 135 #define PCI_REVISION_ID_ERROR_VAL       0xff
 136
 137 /* Performs PCI initializations as well as initializing PCI-related parameters
 138  * in the device structrue. Returns 0 in case of success.
 139  */
 140 static int qed_init_pci(struct qed_dev *cdev, struct pci_dev *pdev)
 141 {
 142         u8 rev_id;
 143         int rc;
 144
 145         cdev->pdev = pdev;
 146
 147         rc = pci_enable_device(pdev);
 148         if (rc) {
 149                 DP_NOTICE(cdev, "Cannot enable PCI device\n");
 150                 goto err0;
 151         }
 152
 153         if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) {
 154                 DP_NOTICE(cdev, "No memory region found in bar #0\n");
 155                 rc = -EIO;
 156                 goto err1;
 157         }
 158
 159         if (IS_PF(cdev) && !(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) {
 160                 DP_NOTICE(cdev, "No memory region found in bar #2\n");
 161                 rc = -EIO;
 162                 goto err1;
 163         }
 164
 165         if (atomic_read(&pdev->enable_cnt) == 1) {
 166                 rc = pci_request_regions(pdev, "qed");
 167                 if (rc) {
 168                         DP_NOTICE(cdev,
 169                                   "Failed to request PCI memory resources\n");
 170                         goto err1;
 171                 }
 172                 pci_set_master(pdev);
 173                 pci_save_state(pdev);
 174         }
 175
 176         pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id);
 177         if (rev_id == PCI_REVISION_ID_ERROR_VAL) {
 178                 DP_NOTICE(cdev,
 179                           "Detected PCI device error [rev_id 0x%x]. Probably due to prior indication. Aborting.\n",
 180                           rev_id);
 181                 rc = -ENODEV;
 182                 goto err2;
 183         }
 184         if (!pci_is_pcie(pdev)) {
 185                 DP_NOTICE(cdev, "The bus is not PCI Express\n");
 186                 rc = -EIO;
 187                 goto err2;
 188         }
 189
 190         cdev->pci_params.pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM);
 191         if (IS_PF(cdev) && !cdev->pci_params.pm_cap)
 192                 DP_NOTICE(cdev, "Cannot find power management capability\n");
 193
 194         rc = qed_set_coherency_mask(cdev);
 195         if (rc)
 196                 goto err2;
 197
 198         cdev->pci_params.mem_start = pci_resource_start(pdev, 0);
 199         cdev->pci_params.mem_end = pci_resource_end(pdev, 0);
 200         cdev->pci_params.irq = pdev->irq;
 201
 202         cdev->regview = pci_ioremap_bar(pdev, 0);
 203         if (!cdev->regview) {
 204                 DP_NOTICE(cdev, "Cannot map register space, aborting\n");
 205                 rc = -ENOMEM;
 206                 goto err2;
 207         }
 208
 209         cdev->db_phys_addr = pci_resource_start(cdev->pdev, 2);
 210         cdev->db_size = pci_resource_len(cdev->pdev, 2);
 211         if (!cdev->db_size) {
 212                 if (IS_PF(cdev)) {
 213                         DP_NOTICE(cdev, "No Doorbell bar available\n");
 214                         return -EINVAL;
 215                 } else {
 216                         return 0;
 217                 }
 218         }
 219
 220         cdev->doorbells = ioremap_wc(cdev->db_phys_addr, cdev->db_size);
 221
 222         if (!cdev->doorbells) {
 223                 DP_NOTICE(cdev, "Cannot map doorbell space\n");
 224                 return -ENOMEM;
 225         }
 226
 227         return 0;
 228
 229 err2:
 230         pci_release_regions(pdev);
 231 err1:
 232         pci_disable_device(pdev);
 233 err0:
 234         return rc;
 235 }
 236
 237 int qed_fill_dev_info(struct qed_dev *cdev,
 238                       struct qed_dev_info *dev_info)
 239 {
 240         struct qed_hwfn *p_hwfn = QED_LEADING_HWFN(cdev);
 241         struct qed_hw_info *hw_info = &p_hwfn->hw_info;
 242         struct qed_tunnel_info *tun = &cdev->tunnel;
 243         struct qed_ptt  *ptt;
 244
 245         memset(dev_info, 0, sizeof(struct qed_dev_info));
 246
 247         if (tun->vxlan.tun_cls == QED_TUNN_CLSS_MAC_VLAN &&
 248             tun->vxlan.b_mode_enabled)
 249                 dev_info->vxlan_enable = true;
 250
 251         if (tun->l2_gre.b_mode_enabled && tun->ip_gre.b_mode_enabled &&
 252             tun->l2_gre.tun_cls == QED_TUNN_CLSS_MAC_VLAN &&
 253             tun->ip_gre.tun_cls == QED_TUNN_CLSS_MAC_VLAN)
 254                 dev_info->gre_enable = true;
 255
 256         if (tun->l2_geneve.b_mode_enabled && tun->ip_geneve.b_mode_enabled &&
 257             tun->l2_geneve.tun_cls == QED_TUNN_CLSS_MAC_VLAN &&
 258             tun->ip_geneve.tun_cls == QED_TUNN_CLSS_MAC_VLAN)
 259                 dev_info->geneve_enable = true;
 260
 261         dev_info->num_hwfns = cdev->num_hwfns;
 262         dev_info->pci_mem_start = cdev->pci_params.mem_start;
 263         dev_info->pci_mem_end = cdev->pci_params.mem_end;
 264         dev_info->pci_irq = cdev->pci_params.irq;
 265         dev_info->rdma_supported = QED_IS_RDMA_PERSONALITY(p_hwfn);
 266         dev_info->is_mf_default = IS_MF_DEFAULT(&cdev->hwfns[0]);
 267         dev_info->dev_type = cdev->type;
 268         ether_addr_copy(dev_info->hw_mac, hw_info->hw_mac_addr);
 269
 270         if (IS_PF(cdev)) {
 271                 dev_info->fw_major = FW_MAJOR_VERSION;
 272                 dev_info->fw_minor = FW_MINOR_VERSION;
 273                 dev_info->fw_rev = FW_REVISION_VERSION;
 274                 dev_info->fw_eng = FW_ENGINEERING_VERSION;
 275                 dev_info->mf_mode = cdev->mf_mode;
 276                 dev_info->tx_switching = true;
 277
 278                 if (hw_info->b_wol_support == QED_WOL_SUPPORT_PME)
 279                         dev_info->wol_support = true;
 280
 281                 dev_info->abs_pf_id = QED_LEADING_HWFN(cdev)->abs_pf_id;
 282         } else {
 283                 qed_vf_get_fw_version(&cdev->hwfns[0], &dev_info->fw_major,
 284                                       &dev_info->fw_minor, &dev_info->fw_rev,
 285                                       &dev_info->fw_eng);
 286         }
 287
 288         if (IS_PF(cdev)) {
 289                 ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
 290                 if (ptt) {
 291                         qed_mcp_get_mfw_ver(QED_LEADING_HWFN(cdev), ptt,
 292                                             &dev_info->mfw_rev, NULL);
 293
 294                         qed_mcp_get_mbi_ver(QED_LEADING_HWFN(cdev), ptt,
 295                                             &dev_info->mbi_version);
 296
 297                         qed_mcp_get_flash_size(QED_LEADING_HWFN(cdev), ptt,
 298                                                &dev_info->flash_size);
 299
 300                         qed_ptt_release(QED_LEADING_HWFN(cdev), ptt);
 301                 }
 302         } else {
 303                 qed_mcp_get_mfw_ver(QED_LEADING_HWFN(cdev), NULL,
 304                                     &dev_info->mfw_rev, NULL);
 305         }
 306
 307         dev_info->mtu = hw_info->mtu;
 308
 309         return 0;
 310 }
 311
 312 static void qed_free_cdev(struct qed_dev *cdev)
 313 {
 314         kfree((void *)cdev);
 315 }
 316
 317 static struct qed_dev *qed_alloc_cdev(struct pci_dev *pdev)
 318 {
 319         struct qed_dev *cdev;
 320
 321         cdev = kzalloc(sizeof(*cdev), GFP_KERNEL);
 322         if (!cdev)
 323                 return cdev;
 324
 325         qed_init_struct(cdev);
 326
 327         return cdev;
 328 }
 329
 330 /* Sets the requested power state */
 331 static int qed_set_power_state(struct qed_dev *cdev, pci_power_t state)
 332 {
 333         if (!cdev)
 334                 return -ENODEV;
 335
 336         DP_VERBOSE(cdev, NETIF_MSG_DRV, "Omitting Power state change\n");
 337         return 0;
 338 }
 339
 340 /* probing */
 341 static struct qed_dev *qed_probe(struct pci_dev *pdev,
 342                                  struct qed_probe_params *params)
 343 {
 344         struct qed_dev *cdev;
 345         int rc;
 346
 347         cdev = qed_alloc_cdev(pdev);
 348         if (!cdev)
 349                 goto err0;
 350
 351         cdev->drv_type = DRV_ID_DRV_TYPE_LINUX;
 352         cdev->protocol = params->protocol;
 353
 354         if (params->is_vf)
 355                 cdev->b_is_vf = true;
 356
 357         qed_init_dp(cdev, params->dp_module, params->dp_level);
 358
 359         rc = qed_init_pci(cdev, pdev);
 360         if (rc) {
 361                 DP_ERR(cdev, "init pci failed\n");
 362                 goto err1;
 363         }
 364         DP_INFO(cdev, "PCI init completed successfully\n");
 365
 366         rc = qed_hw_prepare(cdev, QED_PCI_DEFAULT);
 367         if (rc) {
 368                 DP_ERR(cdev, "hw prepare failed\n");
 369                 goto err2;
 370         }
 371
 372         DP_INFO(cdev, "qed_probe completed successffuly\n");
 373
 374         return cdev;
 375
 376 err2:
 377         qed_free_pci(cdev);
 378 err1:
 379         qed_free_cdev(cdev);
 380 err0:
 381         return NULL;
 382 }
 383
 384 static void qed_remove(struct qed_dev *cdev)
 385 {
 386         if (!cdev)
 387                 return;
 388
 389         qed_hw_remove(cdev);
 390
 391         qed_free_pci(cdev);
 392
 393         qed_set_power_state(cdev, PCI_D3hot);
 394
 395         qed_free_cdev(cdev);
 396 }
 397
 398 static void qed_disable_msix(struct qed_dev *cdev)
 399 {
 400         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 401                 pci_disable_msix(cdev->pdev);
 402                 kfree(cdev->int_params.msix_table);
 403         } else if (cdev->int_params.out.int_mode == QED_INT_MODE_MSI) {
 404                 pci_disable_msi(cdev->pdev);
 405         }
 406
 407         memset(&cdev->int_params.out, 0, sizeof(struct qed_int_param));
 408 }
 409
 410 static int qed_enable_msix(struct qed_dev *cdev,
 411                            struct qed_int_params *int_params)
 412 {
 413         int i, rc, cnt;
 414
 415         cnt = int_params->in.num_vectors;
 416
 417         for (i = 0; i < cnt; i++)
 418                 int_params->msix_table[i].entry = i;
 419
 420         rc = pci_enable_msix_range(cdev->pdev, int_params->msix_table,
 421                                    int_params->in.min_msix_cnt, cnt);
 422         if (rc < cnt && rc >= int_params->in.min_msix_cnt &&
 423             (rc % cdev->num_hwfns)) {
 424                 pci_disable_msix(cdev->pdev);
 425
 426                 /* If fastpath is initialized, we need at least one interrupt
 427                  * per hwfn [and the slow path interrupts]. New requested number
 428                  * should be a multiple of the number of hwfns.
 429                  */
 430                 cnt = (rc / cdev->num_hwfns) * cdev->num_hwfns;
 431                 DP_NOTICE(cdev,
 432                           "Trying to enable MSI-X with less vectors (%d out of %d)\n",
 433                           cnt, int_params->in.num_vectors);
 434                 rc = pci_enable_msix_exact(cdev->pdev, int_params->msix_table,
 435                                            cnt);
 436                 if (!rc)
 437                         rc = cnt;
 438         }
 439
 440         if (rc > 0) {
 441                 /* MSI-x configuration was achieved */
 442                 int_params->out.int_mode = QED_INT_MODE_MSIX;
 443                 int_params->out.num_vectors = rc;
 444                 rc = 0;
 445         } else {
 446                 DP_NOTICE(cdev,
 447                           "Failed to enable MSI-X [Requested %d vectors][rc %d]\n",
 448                           cnt, rc);
 449         }
 450
 451         return rc;
 452 }
 453
 454 /* This function outputs the int mode and the number of enabled msix vector */
 455 static int qed_set_int_mode(struct qed_dev *cdev, bool force_mode)
 456 {
 457         struct qed_int_params *int_params = &cdev->int_params;
 458         struct msix_entry *tbl;
 459         int rc = 0, cnt;
 460
 461         switch (int_params->in.int_mode) {
 462         case QED_INT_MODE_MSIX:
 463                 /* Allocate MSIX table */
 464                 cnt = int_params->in.num_vectors;
 465                 int_params->msix_table = kcalloc(cnt, sizeof(*tbl), GFP_KERNEL);
 466                 if (!int_params->msix_table) {
 467                         rc = -ENOMEM;
 468                         goto out;
 469                 }
 470
 471                 /* Enable MSIX */
 472                 rc = qed_enable_msix(cdev, int_params);
 473                 if (!rc)
 474                         goto out;
 475
 476                 DP_NOTICE(cdev, "Failed to enable MSI-X\n");
 477                 kfree(int_params->msix_table);
 478                 if (force_mode)
 479                         goto out;
 480                 /* Fallthrough */
 481
 482         case QED_INT_MODE_MSI:
 483                 if (cdev->num_hwfns == 1) {
 484                         rc = pci_enable_msi(cdev->pdev);
 485                         if (!rc) {
 486                                 int_params->out.int_mode = QED_INT_MODE_MSI;
 487                                 goto out;
 488                         }
 489
 490                         DP_NOTICE(cdev, "Failed to enable MSI\n");
 491                         if (force_mode)
 492                                 goto out;
 493                 }
 494                 /* Fallthrough */
 495
 496         case QED_INT_MODE_INTA:
 497                         int_params->out.int_mode = QED_INT_MODE_INTA;
 498                         rc = 0;
 499                         goto out;
 500         default:
 501                 DP_NOTICE(cdev, "Unknown int_mode value %d\n",
 502                           int_params->in.int_mode);
 503                 rc = -EINVAL;
 504         }
 505
 506 out:
 507         if (!rc)
 508                 DP_INFO(cdev, "Using %s interrupts\n",
 509                         int_params->out.int_mode == QED_INT_MODE_INTA ?
 510                         "INTa" : int_params->out.int_mode == QED_INT_MODE_MSI ?
 511                         "MSI" : "MSIX");
 512         cdev->int_coalescing_mode = QED_COAL_MODE_ENABLE;
 513
 514         return rc;
 515 }
 516
 517 static void qed_simd_handler_config(struct qed_dev *cdev, void *token,
 518                                     int index, void(*handler)(void *))
 519 {
 520         struct qed_hwfn *hwfn = &cdev->hwfns[index % cdev->num_hwfns];
 521         int relative_idx = index / cdev->num_hwfns;
 522
 523         hwfn->simd_proto_handler[relative_idx].func = handler;
 524         hwfn->simd_proto_handler[relative_idx].token = token;
 525 }
 526
 527 static void qed_simd_handler_clean(struct qed_dev *cdev, int index)
 528 {
 529         struct qed_hwfn *hwfn = &cdev->hwfns[index % cdev->num_hwfns];
 530         int relative_idx = index / cdev->num_hwfns;
 531
 532         memset(&hwfn->simd_proto_handler[relative_idx], 0,
 533                sizeof(struct qed_simd_fp_handler));
 534 }
 535
 536 static irqreturn_t qed_msix_sp_int(int irq, void *tasklet)
 537 {
 538         tasklet_schedule((struct tasklet_struct *)tasklet);
 539         return IRQ_HANDLED;
 540 }
 541
 542 static irqreturn_t qed_single_int(int irq, void *dev_instance)
 543 {
 544         struct qed_dev *cdev = (struct qed_dev *)dev_instance;
 545         struct qed_hwfn *hwfn;
 546         irqreturn_t rc = IRQ_NONE;
 547         u64 status;
 548         int i, j;
 549
 550         for (i = 0; i < cdev->num_hwfns; i++) {
 551                 status = qed_int_igu_read_sisr_reg(&cdev->hwfns[i]);
 552
 553                 if (!status)
 554                         continue;
 555
 556                 hwfn = &cdev->hwfns[i];
 557
 558                 /* Slowpath interrupt */
 559                 if (unlikely(status & 0x1)) {
 560                         tasklet_schedule(hwfn->sp_dpc);
 561                         status &= ~0x1;
 562                         rc = IRQ_HANDLED;
 563                 }
 564
 565                 /* Fastpath interrupts */
 566                 for (j = 0; j < 64; j++) {
 567                         if ((0x2ULL << j) & status) {
 568                                 struct qed_simd_fp_handler *p_handler =
 569                                         &hwfn->simd_proto_handler[j];
 570
 571                                 if (p_handler->func)
 572                                         p_handler->func(p_handler->token);
 573                                 else
 574                                         DP_NOTICE(hwfn,
 575                                                   "Not calling fastpath handler as it is NULL [handler #%d, status 0x%llx]\n",
 576                                                   j, status);
 577
 578                                 status &= ~(0x2ULL << j);
 579                                 rc = IRQ_HANDLED;
 580                         }
 581                 }
 582
 583                 if (unlikely(status))
 584                         DP_VERBOSE(hwfn, NETIF_MSG_INTR,
 585                                    "got an unknown interrupt status 0x%llx\n",
 586                                    status);
 587         }
 588
 589         return rc;
 590 }
 591
 592 int qed_slowpath_irq_req(struct qed_hwfn *hwfn)
 593 {
 594         struct qed_dev *cdev = hwfn->cdev;
 595         u32 int_mode;
 596         int rc = 0;
 597         u8 id;
 598
 599         int_mode = cdev->int_params.out.int_mode;
 600         if (int_mode == QED_INT_MODE_MSIX) {
 601                 id = hwfn->my_id;
 602                 snprintf(hwfn->name, NAME_SIZE, "sp-%d-%02x:%02x.%02x",
 603                          id, cdev->pdev->bus->number,
 604                          PCI_SLOT(cdev->pdev->devfn), hwfn->abs_pf_id);
 605                 rc = request_irq(cdev->int_params.msix_table[id].vector,
 606                                  qed_msix_sp_int, 0, hwfn->name, hwfn->sp_dpc);
 607         } else {
 608                 unsigned long flags = 0;
 609
 610                 snprintf(cdev->name, NAME_SIZE, "%02x:%02x.%02x",
 611                          cdev->pdev->bus->number, PCI_SLOT(cdev->pdev->devfn),
 612                          PCI_FUNC(cdev->pdev->devfn));
 613
 614                 if (cdev->int_params.out.int_mode == QED_INT_MODE_INTA)
 615                         flags |= IRQF_SHARED;
 616
 617                 rc = request_irq(cdev->pdev->irq, qed_single_int,
 618                                  flags, cdev->name, cdev);
 619         }
 620
 621         if (rc)
 622                 DP_NOTICE(cdev, "request_irq failed, rc = %d\n", rc);
 623         else
 624                 DP_VERBOSE(hwfn, (NETIF_MSG_INTR | QED_MSG_SP),
 625                            "Requested slowpath %s\n",
 626                            (int_mode == QED_INT_MODE_MSIX) ? "MSI-X" : "IRQ");
 627
 628         return rc;
 629 }
 630
 631 static void qed_slowpath_tasklet_flush(struct qed_hwfn *p_hwfn)
 632 {
 633         /* Calling the disable function will make sure that any
 634          * currently-running function is completed. The following call to the
 635          * enable function makes this sequence a flush-like operation.
 636          */
 637         if (p_hwfn->b_sp_dpc_enabled) {
 638                 tasklet_disable(p_hwfn->sp_dpc);
 639                 tasklet_enable(p_hwfn->sp_dpc);
 640         }
 641 }
 642
 643 void qed_slowpath_irq_sync(struct qed_hwfn *p_hwfn)
 644 {
 645         struct qed_dev *cdev = p_hwfn->cdev;
 646         u8 id = p_hwfn->my_id;
 647         u32 int_mode;
 648
 649         int_mode = cdev->int_params.out.int_mode;
 650         if (int_mode == QED_INT_MODE_MSIX)
 651                 synchronize_irq(cdev->int_params.msix_table[id].vector);
 652         else
 653                 synchronize_irq(cdev->pdev->irq);
 654
 655         qed_slowpath_tasklet_flush(p_hwfn);
 656 }
 657
 658 static void qed_slowpath_irq_free(struct qed_dev *cdev)
 659 {
 660         int i;
 661
 662         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 663                 for_each_hwfn(cdev, i) {
 664                         if (!cdev->hwfns[i].b_int_requested)
 665                                 break;
 666                         synchronize_irq(cdev->int_params.msix_table[i].vector);
 667                         free_irq(cdev->int_params.msix_table[i].vector,
 668                                  cdev->hwfns[i].sp_dpc);
 669                 }
 670         } else {
 671                 if (QED_LEADING_HWFN(cdev)->b_int_requested)
 672                         free_irq(cdev->pdev->irq, cdev);
 673         }
 674         qed_int_disable_post_isr_release(cdev);
 675 }
 676
 677 static int qed_nic_stop(struct qed_dev *cdev)
 678 {
 679         int i, rc;
 680
 681         rc = qed_hw_stop(cdev);
 682
 683         for (i = 0; i < cdev->num_hwfns; i++) {
 684                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 685
 686                 if (p_hwfn->b_sp_dpc_enabled) {
 687                         tasklet_disable(p_hwfn->sp_dpc);
 688                         p_hwfn->b_sp_dpc_enabled = false;
 689                         DP_VERBOSE(cdev, NETIF_MSG_IFDOWN,
 690                                    "Disabled sp taskelt [hwfn %d] at %p\n",
 691                                    i, p_hwfn->sp_dpc);
 692                 }
 693         }
 694
 695         qed_dbg_pf_exit(cdev);
 696
 697         return rc;
 698 }
 699
 700 static int qed_nic_setup(struct qed_dev *cdev)
 701 {
 702         int rc, i;
 703
 704         /* Determine if interface is going to require LL2 */
 705         if (QED_LEADING_HWFN(cdev)->hw_info.personality != QED_PCI_ETH) {
 706                 for (i = 0; i < cdev->num_hwfns; i++) {
 707                         struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 708
 709                         p_hwfn->using_ll2 = true;
 710                 }
 711         }
 712
 713         rc = qed_resc_alloc(cdev);
 714         if (rc)
 715                 return rc;
 716
 717         DP_INFO(cdev, "Allocated qed resources\n");
 718
 719         qed_resc_setup(cdev);
 720
 721         return rc;
 722 }
 723
 724 static int qed_set_int_fp(struct qed_dev *cdev, u16 cnt)
 725 {
 726         int limit = 0;
 727
 728         /* Mark the fastpath as free/used */
 729         cdev->int_params.fp_initialized = cnt ? true : false;
 730
 731         if (cdev->int_params.out.int_mode != QED_INT_MODE_MSIX)
 732                 limit = cdev->num_hwfns * 63;
 733         else if (cdev->int_params.fp_msix_cnt)
 734                 limit = cdev->int_params.fp_msix_cnt;
 735
 736         if (!limit)
 737                 return -ENOMEM;
 738
 739         return min_t(int, cnt, limit);
 740 }
 741
 742 static int qed_get_int_fp(struct qed_dev *cdev, struct qed_int_info *info)
 743 {
 744         memset(info, 0, sizeof(struct qed_int_info));
 745
 746         if (!cdev->int_params.fp_initialized) {
 747                 DP_INFO(cdev,
 748                         "Protocol driver requested interrupt information, but its support is not yet configured\n");
 749                 return -EINVAL;
 750         }
 751
 752         /* Need to expose only MSI-X information; Single IRQ is handled solely
 753          * by qed.
 754          */
 755         if (cdev->int_params.out.int_mode == QED_INT_MODE_MSIX) {
 756                 int msix_base = cdev->int_params.fp_msix_base;
 757
 758                 info->msix_cnt = cdev->int_params.fp_msix_cnt;
 759                 info->msix = &cdev->int_params.msix_table[msix_base];
 760         }
 761
 762         return 0;
 763 }
 764
 765 static int qed_slowpath_setup_int(struct qed_dev *cdev,
 766                                   enum qed_int_mode int_mode)
 767 {
 768         struct qed_sb_cnt_info sb_cnt_info;
 769         int num_l2_queues = 0;
 770         int rc;
 771         int i;
 772
 773         if ((int_mode == QED_INT_MODE_MSI) && (cdev->num_hwfns > 1)) {
 774                 DP_NOTICE(cdev, "MSI mode is not supported for CMT devices\n");
 775                 return -EINVAL;
 776         }
 777
 778         memset(&cdev->int_params, 0, sizeof(struct qed_int_params));
 779         cdev->int_params.in.int_mode = int_mode;
 780         for_each_hwfn(cdev, i) {
 781                 memset(&sb_cnt_info, 0, sizeof(sb_cnt_info));
 782                 qed_int_get_num_sbs(&cdev->hwfns[i], &sb_cnt_info);
 783                 cdev->int_params.in.num_vectors += sb_cnt_info.cnt;
 784                 cdev->int_params.in.num_vectors++; /* slowpath */
 785         }
 786
 787         /* We want a minimum of one slowpath and one fastpath vector per hwfn */
 788         cdev->int_params.in.min_msix_cnt = cdev->num_hwfns * 2;
 789
 790         if (is_kdump_kernel()) {
 791                 DP_INFO(cdev,
 792                         "Kdump kernel: Limit the max number of requested MSI-X vectors to %hd\n",
 793                         cdev->int_params.in.min_msix_cnt);
 794                 cdev->int_params.in.num_vectors =
 795                         cdev->int_params.in.min_msix_cnt;
 796         }
 797
 798         rc = qed_set_int_mode(cdev, false);
 799         if (rc)  {
 800                 DP_ERR(cdev, "qed_slowpath_setup_int ERR\n");
 801                 return rc;
 802         }
 803
 804         cdev->int_params.fp_msix_base = cdev->num_hwfns;
 805         cdev->int_params.fp_msix_cnt = cdev->int_params.out.num_vectors -
 806                                        cdev->num_hwfns;
 807
 808         if (!IS_ENABLED(CONFIG_QED_RDMA) ||
 809             !QED_IS_RDMA_PERSONALITY(QED_LEADING_HWFN(cdev)))
 810                 return 0;
 811
 812         for_each_hwfn(cdev, i)
 813                 num_l2_queues += FEAT_NUM(&cdev->hwfns[i], QED_PF_L2_QUE);
 814
 815         DP_VERBOSE(cdev, QED_MSG_RDMA,
 816                    "cdev->int_params.fp_msix_cnt=%d num_l2_queues=%d\n",
 817                    cdev->int_params.fp_msix_cnt, num_l2_queues);
 818
 819         if (cdev->int_params.fp_msix_cnt > num_l2_queues) {
 820                 cdev->int_params.rdma_msix_cnt =
 821                         (cdev->int_params.fp_msix_cnt - num_l2_queues)
 822                         / cdev->num_hwfns;
 823                 cdev->int_params.rdma_msix_base =
 824                         cdev->int_params.fp_msix_base + num_l2_queues;
 825                 cdev->int_params.fp_msix_cnt = num_l2_queues;
 826         } else {
 827                 cdev->int_params.rdma_msix_cnt = 0;
 828         }
 829
 830         DP_VERBOSE(cdev, QED_MSG_RDMA, "roce_msix_cnt=%d roce_msix_base=%d\n",
 831                    cdev->int_params.rdma_msix_cnt,
 832                    cdev->int_params.rdma_msix_base);
 833
 834         return 0;
 835 }
 836
 837 static int qed_slowpath_vf_setup_int(struct qed_dev *cdev)
 838 {
 839         int rc;
 840
 841         memset(&cdev->int_params, 0, sizeof(struct qed_int_params));
 842         cdev->int_params.in.int_mode = QED_INT_MODE_MSIX;
 843
 844         qed_vf_get_num_rxqs(QED_LEADING_HWFN(cdev),
 845                             &cdev->int_params.in.num_vectors);
 846         if (cdev->num_hwfns > 1) {
 847                 u8 vectors = 0;
 848
 849                 qed_vf_get_num_rxqs(&cdev->hwfns[1], &vectors);
 850                 cdev->int_params.in.num_vectors += vectors;
 851         }
 852
 853         /* We want a minimum of one fastpath vector per vf hwfn */
 854         cdev->int_params.in.min_msix_cnt = cdev->num_hwfns;
 855
 856         rc = qed_set_int_mode(cdev, true);
 857         if (rc)
 858                 return rc;
 859
 860         cdev->int_params.fp_msix_base = 0;
 861         cdev->int_params.fp_msix_cnt = cdev->int_params.out.num_vectors;
 862
 863         return 0;
 864 }
 865
 866 u32 qed_unzip_data(struct qed_hwfn *p_hwfn, u32 input_len,
 867                    u8 *input_buf, u32 max_size, u8 *unzip_buf)
 868 {
 869         int rc;
 870
 871         p_hwfn->stream->next_in = input_buf;
 872         p_hwfn->stream->avail_in = input_len;
 873         p_hwfn->stream->next_out = unzip_buf;
 874         p_hwfn->stream->avail_out = max_size;
 875
 876         rc = zlib_inflateInit2(p_hwfn->stream, MAX_WBITS);
 877
 878         if (rc != Z_OK) {
 879                 DP_VERBOSE(p_hwfn, NETIF_MSG_DRV, "zlib init failed, rc = %d\n",
 880                            rc);
 881                 return 0;
 882         }
 883
 884         rc = zlib_inflate(p_hwfn->stream, Z_FINISH);
 885         zlib_inflateEnd(p_hwfn->stream);
 886
 887         if (rc != Z_OK && rc != Z_STREAM_END) {
 888                 DP_VERBOSE(p_hwfn, NETIF_MSG_DRV, "FW unzip error: %s, rc=%d\n",
 889                            p_hwfn->stream->msg, rc);
 890                 return 0;
 891         }
 892
 893         return p_hwfn->stream->total_out / 4;
 894 }
 895
 896 static int qed_alloc_stream_mem(struct qed_dev *cdev)
 897 {
 898         int i;
 899         void *workspace;
 900
 901         for_each_hwfn(cdev, i) {
 902                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 903
 904                 p_hwfn->stream = kzalloc(sizeof(*p_hwfn->stream), GFP_KERNEL);
 905                 if (!p_hwfn->stream)
 906                         return -ENOMEM;
 907
 908                 workspace = vzalloc(zlib_inflate_workspacesize());
 909                 if (!workspace)
 910                         return -ENOMEM;
 911                 p_hwfn->stream->workspace = workspace;
 912         }
 913
 914         return 0;
 915 }
 916
 917 static void qed_free_stream_mem(struct qed_dev *cdev)
 918 {
 919         int i;
 920
 921         for_each_hwfn(cdev, i) {
 922                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 923
 924                 if (!p_hwfn->stream)
 925                         return;
 926
 927                 vfree(p_hwfn->stream->workspace);
 928                 kfree(p_hwfn->stream);
 929         }
 930 }
 931
 932 static void qed_update_pf_params(struct qed_dev *cdev,
 933                                  struct qed_pf_params *params)
 934 {
 935         int i;
 936
 937         if (IS_ENABLED(CONFIG_QED_RDMA)) {
 938                 params->rdma_pf_params.num_qps = QED_ROCE_QPS;
 939                 params->rdma_pf_params.min_dpis = QED_ROCE_DPIS;
 940                 /* divide by 3 the MRs to avoid MF ILT overflow */
 941                 params->rdma_pf_params.gl_pi = QED_ROCE_PROTOCOL_INDEX;
 942         }
 943
 944         if (cdev->num_hwfns > 1 || IS_VF(cdev))
 945                 params->eth_pf_params.num_arfs_filters = 0;
 946
 947         /* In case we might support RDMA, don't allow qede to be greedy
 948          * with the L2 contexts. Allow for 64 queues [rx, tx, xdp] per hwfn.
 949          */
 950         if (QED_IS_RDMA_PERSONALITY(QED_LEADING_HWFN(cdev))) {
 951                 u16 *num_cons;
 952
 953                 num_cons = &params->eth_pf_params.num_cons;
 954                 *num_cons = min_t(u16, *num_cons, 192);
 955         }
 956
 957         for (i = 0; i < cdev->num_hwfns; i++) {
 958                 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
 959
 960                 p_hwfn->pf_params = *params;
 961         }
 962 }
 963
 964 static int qed_slowpath_start(struct qed_dev *cdev,
 965                               struct qed_slowpath_params *params)
 966 {
 967         struct qed_drv_load_params drv_load_params;
 968         struct qed_hw_init_params hw_init_params;
 969         struct qed_mcp_drv_version drv_version;
 970         struct qed_tunnel_info tunn_info;
 971         const u8 *data = NULL;
 972         struct qed_hwfn *hwfn;
 973         struct qed_ptt *p_ptt;
 974         int rc = -EINVAL;
 975
 976         if (qed_iov_wq_start(cdev))
 977                 goto err;
 978
 979         if (IS_PF(cdev)) {
 980                 rc = reject_firmware(&cdev->firmware, QED_FW_FILE_NAME,
 981                                       &cdev->pdev->dev);
 982                 if (rc) {
 983                         DP_NOTICE(cdev,
 984                                   "Failed to find fw file - /lib/firmware/%s\n",
 985                                   QED_FW_FILE_NAME);
 986                         goto err;
 987                 }
 988
 989                 if (cdev->num_hwfns == 1) {
 990                         p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
 991                         if (p_ptt) {
 992                                 QED_LEADING_HWFN(cdev)->p_arfs_ptt = p_ptt;
 993                         } else {
 994                                 DP_NOTICE(cdev,
 995                                           "Failed to acquire PTT for aRFS\n");
 996                                 goto err;
 997                         }
 998                 }
 999         }
1000
1001         cdev->rx_coalesce_usecs = QED_DEFAULT_RX_USECS;
1002         rc = qed_nic_setup(cdev);
1003         if (rc)
1004                 goto err;
1005
1006         if (IS_PF(cdev))
1007                 rc = qed_slowpath_setup_int(cdev, params->int_mode);
1008         else
1009                 rc = qed_slowpath_vf_setup_int(cdev);
1010         if (rc)
1011                 goto err1;
1012
1013         if (IS_PF(cdev)) {
1014                 /* Allocate stream for unzipping */
1015                 rc = qed_alloc_stream_mem(cdev);
1016                 if (rc)
1017                         goto err2;
1018
1019                 /* First Dword used to differentiate between various sources */
1020                 data = cdev->firmware->data + sizeof(u32);
1021
1022                 qed_dbg_pf_init(cdev);
1023         }
1024
1025         /* Start the slowpath */
1026         memset(&hw_init_params, 0, sizeof(hw_init_params));
1027         memset(&tunn_info, 0, sizeof(tunn_info));
1028         tunn_info.vxlan.b_mode_enabled = true;
1029         tunn_info.l2_gre.b_mode_enabled = true;
1030         tunn_info.ip_gre.b_mode_enabled = true;
1031         tunn_info.l2_geneve.b_mode_enabled = true;
1032         tunn_info.ip_geneve.b_mode_enabled = true;
1033         tunn_info.vxlan.tun_cls = QED_TUNN_CLSS_MAC_VLAN;
1034         tunn_info.l2_gre.tun_cls = QED_TUNN_CLSS_MAC_VLAN;
1035         tunn_info.ip_gre.tun_cls = QED_TUNN_CLSS_MAC_VLAN;
1036         tunn_info.l2_geneve.tun_cls = QED_TUNN_CLSS_MAC_VLAN;
1037         tunn_info.ip_geneve.tun_cls = QED_TUNN_CLSS_MAC_VLAN;
1038         hw_init_params.p_tunn = &tunn_info;
1039         hw_init_params.b_hw_start = true;
1040         hw_init_params.int_mode = cdev->int_params.out.int_mode;
1041         hw_init_params.allow_npar_tx_switch = true;
1042         hw_init_params.bin_fw_data = data;
1043
1044         memset(&drv_load_params, 0, sizeof(drv_load_params));
1045         drv_load_params.is_crash_kernel = is_kdump_kernel();
1046         drv_load_params.mfw_timeout_val = QED_LOAD_REQ_LOCK_TO_DEFAULT;
1047         drv_load_params.avoid_eng_reset = false;
1048         drv_load_params.override_force_load = QED_OVERRIDE_FORCE_LOAD_NONE;
1049         hw_init_params.p_drv_load_params = &drv_load_params;
1050
1051         rc = qed_hw_init(cdev, &hw_init_params);
1052         if (rc)
1053                 goto err2;
1054
1055         DP_INFO(cdev,
1056                 "HW initialization and function start completed successfully\n");
1057
1058         if (IS_PF(cdev)) {
1059                 cdev->tunn_feature_mask = (BIT(QED_MODE_VXLAN_TUNN) |
1060                                            BIT(QED_MODE_L2GENEVE_TUNN) |
1061                                            BIT(QED_MODE_IPGENEVE_TUNN) |
1062                                            BIT(QED_MODE_L2GRE_TUNN) |
1063                                            BIT(QED_MODE_IPGRE_TUNN));
1064         }
1065
1066         /* Allocate LL2 interface if needed */
1067         if (QED_LEADING_HWFN(cdev)->using_ll2) {
1068                 rc = qed_ll2_alloc_if(cdev);
1069                 if (rc)
1070                         goto err3;
1071         }
1072         if (IS_PF(cdev)) {
1073                 hwfn = QED_LEADING_HWFN(cdev);
1074                 drv_version.version = (params->drv_major << 24) |
1075                                       (params->drv_minor << 16) |
1076                                       (params->drv_rev << 8) |
1077                                       (params->drv_eng);
1078                 strlcpy(drv_version.name, params->name,
1079                         MCP_DRV_VER_STR_SIZE - 4);
1080                 rc = qed_mcp_send_drv_version(hwfn, hwfn->p_main_ptt,
1081                                               &drv_version);
1082                 if (rc) {
1083                         DP_NOTICE(cdev, "Failed sending drv version command\n");
1084                         return rc;
1085                 }
1086         }
1087
1088         qed_reset_vport_stats(cdev);
1089
1090         return 0;
1091
1092 err3:
1093         qed_hw_stop(cdev);
1094 err2:
1095         qed_hw_timers_stop_all(cdev);
1096         if (IS_PF(cdev))
1097                 qed_slowpath_irq_free(cdev);
1098         qed_free_stream_mem(cdev);
1099         qed_disable_msix(cdev);
1100 err1:
1101         qed_resc_free(cdev);
1102 err:
1103         if (IS_PF(cdev))
1104                 release_firmware(cdev->firmware);
1105
1106         if (IS_PF(cdev) && (cdev->num_hwfns == 1) &&
1107             QED_LEADING_HWFN(cdev)->p_arfs_ptt)
1108                 qed_ptt_release(QED_LEADING_HWFN(cdev),
1109                                 QED_LEADING_HWFN(cdev)->p_arfs_ptt);
1110
1111         qed_iov_wq_stop(cdev, false);
1112
1113         return rc;
1114 }
1115
1116 static int qed_slowpath_stop(struct qed_dev *cdev)
1117 {
1118         if (!cdev)
1119                 return -ENODEV;
1120
1121         qed_ll2_dealloc_if(cdev);
1122
1123         if (IS_PF(cdev)) {
1124                 if (cdev->num_hwfns == 1)
1125                         qed_ptt_release(QED_LEADING_HWFN(cdev),
1126                                         QED_LEADING_HWFN(cdev)->p_arfs_ptt);
1127                 qed_free_stream_mem(cdev);
1128                 if (IS_QED_ETH_IF(cdev))
1129                         qed_sriov_disable(cdev, true);
1130         }
1131
1132         qed_nic_stop(cdev);
1133
1134         if (IS_PF(cdev))
1135                 qed_slowpath_irq_free(cdev);
1136
1137         qed_disable_msix(cdev);
1138
1139         qed_resc_free(cdev);
1140
1141         qed_iov_wq_stop(cdev, true);
1142
1143         if (IS_PF(cdev))
1144                 release_firmware(cdev->firmware);
1145
1146         return 0;
1147 }
1148
1149 static void qed_set_name(struct qed_dev *cdev, char name[NAME_SIZE])
1150 {
1151         int i;
1152
1153         memcpy(cdev->name, name, NAME_SIZE);
1154         for_each_hwfn(cdev, i)
1155                 snprintf(cdev->hwfns[i].name, NAME_SIZE, "%s-%d", name, i);
1156 }
1157
1158 static u32 qed_sb_init(struct qed_dev *cdev,
1159                        struct qed_sb_info *sb_info,
1160                        void *sb_virt_addr,
1161                        dma_addr_t sb_phy_addr, u16 sb_id,
1162                        enum qed_sb_type type)
1163 {
1164         struct qed_hwfn *p_hwfn;
1165         struct qed_ptt *p_ptt;
1166         int hwfn_index;
1167         u16 rel_sb_id;
1168         u8 n_hwfns;
1169         u32 rc;
1170
1171         /* RoCE uses single engine and CMT uses two engines. When using both
1172          * we force only a single engine. Storage uses only engine 0 too.
1173          */
1174         if (type == QED_SB_TYPE_L2_QUEUE)
1175                 n_hwfns = cdev->num_hwfns;
1176         else
1177                 n_hwfns = 1;
1178
1179         hwfn_index = sb_id % n_hwfns;
1180         p_hwfn = &cdev->hwfns[hwfn_index];
1181         rel_sb_id = sb_id / n_hwfns;
1182
1183         DP_VERBOSE(cdev, NETIF_MSG_INTR,
1184                    "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
1185                    hwfn_index, rel_sb_id, sb_id);
1186
1187         if (IS_PF(p_hwfn->cdev)) {
1188                 p_ptt = qed_ptt_acquire(p_hwfn);
1189                 if (!p_ptt)
1190                         return -EBUSY;
1191
1192                 rc = qed_int_sb_init(p_hwfn, p_ptt, sb_info, sb_virt_addr,
1193                                      sb_phy_addr, rel_sb_id);
1194                 qed_ptt_release(p_hwfn, p_ptt);
1195         } else {
1196                 rc = qed_int_sb_init(p_hwfn, NULL, sb_info, sb_virt_addr,
1197                                      sb_phy_addr, rel_sb_id);
1198         }
1199
1200         return rc;
1201 }
1202
1203 static u32 qed_sb_release(struct qed_dev *cdev,
1204                           struct qed_sb_info *sb_info, u16 sb_id)
1205 {
1206         struct qed_hwfn *p_hwfn;
1207         int hwfn_index;
1208         u16 rel_sb_id;
1209         u32 rc;
1210
1211         hwfn_index = sb_id % cdev->num_hwfns;
1212         p_hwfn = &cdev->hwfns[hwfn_index];
1213         rel_sb_id = sb_id / cdev->num_hwfns;
1214
1215         DP_VERBOSE(cdev, NETIF_MSG_INTR,
1216                    "hwfn [%d] <--[init]-- SB %04x [0x%04x upper]\n",
1217                    hwfn_index, rel_sb_id, sb_id);
1218
1219         rc = qed_int_sb_release(p_hwfn, sb_info, rel_sb_id);
1220
1221         return rc;
1222 }
1223
1224 static bool qed_can_link_change(struct qed_dev *cdev)
1225 {
1226         return true;
1227 }
1228
1229 static int qed_set_link(struct qed_dev *cdev, struct qed_link_params *params)
1230 {
1231         struct qed_hwfn *hwfn;
1232         struct qed_mcp_link_params *link_params;
1233         struct qed_ptt *ptt;
1234         int rc;
1235
1236         if (!cdev)
1237                 return -ENODEV;
1238
1239         /* The link should be set only once per PF */
1240         hwfn = &cdev->hwfns[0];
1241
1242         /* When VF wants to set link, force it to read the bulletin instead.
1243          * This mimics the PF behavior, where a noitification [both immediate
1244          * and possible later] would be generated when changing properties.
1245          */
1246         if (IS_VF(cdev)) {
1247                 qed_schedule_iov(hwfn, QED_IOV_WQ_VF_FORCE_LINK_QUERY_FLAG);
1248                 return 0;
1249         }
1250
1251         ptt = qed_ptt_acquire(hwfn);
1252         if (!ptt)
1253                 return -EBUSY;
1254
1255         link_params = qed_mcp_get_link_params(hwfn);
1256         if (params->override_flags & QED_LINK_OVERRIDE_SPEED_AUTONEG)
1257                 link_params->speed.autoneg = params->autoneg;
1258         if (params->override_flags & QED_LINK_OVERRIDE_SPEED_ADV_SPEEDS) {
1259                 link_params->speed.advertised_speeds = 0;
1260                 if ((params->adv_speeds & QED_LM_1000baseT_Half_BIT) ||
1261                     (params->adv_speeds & QED_LM_1000baseT_Full_BIT))
1262                         link_params->speed.advertised_speeds |=
1263                             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G;
1264                 if (params->adv_speeds & QED_LM_10000baseKR_Full_BIT)
1265                         link_params->speed.advertised_speeds |=
1266                             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G;
1267                 if (params->adv_speeds & QED_LM_25000baseKR_Full_BIT)
1268                         link_params->speed.advertised_speeds |=
1269                             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_25G;
1270                 if (params->adv_speeds & QED_LM_40000baseLR4_Full_BIT)
1271                         link_params->speed.advertised_speeds |=
1272                             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G;
1273                 if (params->adv_speeds & QED_LM_50000baseKR2_Full_BIT)
1274                         link_params->speed.advertised_speeds |=
1275                             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G;
1276                 if (params->adv_speeds & QED_LM_100000baseKR4_Full_BIT)
1277                         link_params->speed.advertised_speeds |=
1278                             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_BB_100G;
1279         }
1280         if (params->override_flags & QED_LINK_OVERRIDE_SPEED_FORCED_SPEED)
1281                 link_params->speed.forced_speed = params->forced_speed;
1282         if (params->override_flags & QED_LINK_OVERRIDE_PAUSE_CONFIG) {
1283                 if (params->pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
1284                         link_params->pause.autoneg = true;
1285                 else
1286                         link_params->pause.autoneg = false;
1287                 if (params->pause_config & QED_LINK_PAUSE_RX_ENABLE)
1288                         link_params->pause.forced_rx = true;
1289                 else
1290                         link_params->pause.forced_rx = false;
1291                 if (params->pause_config & QED_LINK_PAUSE_TX_ENABLE)
1292                         link_params->pause.forced_tx = true;
1293                 else
1294                         link_params->pause.forced_tx = false;
1295         }
1296         if (params->override_flags & QED_LINK_OVERRIDE_LOOPBACK_MODE) {
1297                 switch (params->loopback_mode) {
1298                 case QED_LINK_LOOPBACK_INT_PHY:
1299                         link_params->loopback_mode = ETH_LOOPBACK_INT_PHY;
1300                         break;
1301                 case QED_LINK_LOOPBACK_EXT_PHY:
1302                         link_params->loopback_mode = ETH_LOOPBACK_EXT_PHY;
1303                         break;
1304                 case QED_LINK_LOOPBACK_EXT:
1305                         link_params->loopback_mode = ETH_LOOPBACK_EXT;
1306                         break;
1307                 case QED_LINK_LOOPBACK_MAC:
1308                         link_params->loopback_mode = ETH_LOOPBACK_MAC;
1309                         break;
1310                 default:
1311                         link_params->loopback_mode = ETH_LOOPBACK_NONE;
1312                         break;
1313                 }
1314         }
1315
1316         if (params->override_flags & QED_LINK_OVERRIDE_EEE_CONFIG)
1317                 memcpy(&link_params->eee, &params->eee,
1318                        sizeof(link_params->eee));
1319
1320         rc = qed_mcp_set_link(hwfn, ptt, params->link_up);
1321
1322         qed_ptt_release(hwfn, ptt);
1323
1324         return rc;
1325 }
1326
1327 static int qed_get_port_type(u32 media_type)
1328 {
1329         int port_type;
1330
1331         switch (media_type) {
1332         case MEDIA_SFPP_10G_FIBER:
1333         case MEDIA_SFP_1G_FIBER:
1334         case MEDIA_XFP_FIBER:
1335         case MEDIA_MODULE_FIBER:
1336         case MEDIA_KR:
1337                 port_type = PORT_FIBRE;
1338                 break;
1339         case MEDIA_DA_TWINAX:
1340                 port_type = PORT_DA;
1341                 break;
1342         case MEDIA_BASE_T:
1343                 port_type = PORT_TP;
1344                 break;
1345         case MEDIA_NOT_PRESENT:
1346                 port_type = PORT_NONE;
1347                 break;
1348         case MEDIA_UNSPECIFIED:
1349         default:
1350                 port_type = PORT_OTHER;
1351                 break;
1352         }
1353         return port_type;
1354 }
1355
1356 static int qed_get_link_data(struct qed_hwfn *hwfn,
1357                              struct qed_mcp_link_params *params,
1358                              struct qed_mcp_link_state *link,
1359                              struct qed_mcp_link_capabilities *link_caps)
1360 {
1361         void *p;
1362
1363         if (!IS_PF(hwfn->cdev)) {
1364                 qed_vf_get_link_params(hwfn, params);
1365                 qed_vf_get_link_state(hwfn, link);
1366                 qed_vf_get_link_caps(hwfn, link_caps);
1367
1368                 return 0;
1369         }
1370
1371         p = qed_mcp_get_link_params(hwfn);
1372         if (!p)
1373                 return -ENXIO;
1374         memcpy(params, p, sizeof(*params));
1375
1376         p = qed_mcp_get_link_state(hwfn);
1377         if (!p)
1378                 return -ENXIO;
1379         memcpy(link, p, sizeof(*link));
1380
1381         p = qed_mcp_get_link_capabilities(hwfn);
1382         if (!p)
1383                 return -ENXIO;
1384         memcpy(link_caps, p, sizeof(*link_caps));
1385
1386         return 0;
1387 }
1388
1389 static void qed_fill_link(struct qed_hwfn *hwfn,
1390                           struct qed_link_output *if_link)
1391 {
1392         struct qed_mcp_link_params params;
1393         struct qed_mcp_link_state link;
1394         struct qed_mcp_link_capabilities link_caps;
1395         u32 media_type;
1396
1397         memset(if_link, 0, sizeof(*if_link));
1398
1399         /* Prepare source inputs */
1400         if (qed_get_link_data(hwfn, &params, &link, &link_caps)) {
1401                 dev_warn(&hwfn->cdev->pdev->dev, "no link data available\n");
1402                 return;
1403         }
1404
1405         /* Set the link parameters to pass to protocol driver */
1406         if (link.link_up)
1407                 if_link->link_up = true;
1408
1409         /* TODO - at the moment assume supported and advertised speed equal */
1410         if_link->supported_caps = QED_LM_FIBRE_BIT;
1411         if (link_caps.default_speed_autoneg)
1412                 if_link->supported_caps |= QED_LM_Autoneg_BIT;
1413         if (params.pause.autoneg ||
1414             (params.pause.forced_rx && params.pause.forced_tx))
1415                 if_link->supported_caps |= QED_LM_Asym_Pause_BIT;
1416         if (params.pause.autoneg || params.pause.forced_rx ||
1417             params.pause.forced_tx)
1418                 if_link->supported_caps |= QED_LM_Pause_BIT;
1419
1420         if_link->advertised_caps = if_link->supported_caps;
1421         if (params.speed.autoneg)
1422                 if_link->advertised_caps |= QED_LM_Autoneg_BIT;
1423         else
1424                 if_link->advertised_caps &= ~QED_LM_Autoneg_BIT;
1425         if (params.speed.advertised_speeds &
1426             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G)
1427                 if_link->advertised_caps |= QED_LM_1000baseT_Half_BIT |
1428                     QED_LM_1000baseT_Full_BIT;
1429         if (params.speed.advertised_speeds &
1430             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G)
1431                 if_link->advertised_caps |= QED_LM_10000baseKR_Full_BIT;
1432         if (params.speed.advertised_speeds &
1433             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_25G)
1434                 if_link->advertised_caps |= QED_LM_25000baseKR_Full_BIT;
1435         if (params.speed.advertised_speeds &
1436             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G)
1437                 if_link->advertised_caps |= QED_LM_40000baseLR4_Full_BIT;
1438         if (params.speed.advertised_speeds &
1439             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G)
1440                 if_link->advertised_caps |= QED_LM_50000baseKR2_Full_BIT;
1441         if (params.speed.advertised_speeds &
1442             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_BB_100G)
1443                 if_link->advertised_caps |= QED_LM_100000baseKR4_Full_BIT;
1444
1445         if (link_caps.speed_capabilities &
1446             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G)
1447                 if_link->supported_caps |= QED_LM_1000baseT_Half_BIT |
1448                     QED_LM_1000baseT_Full_BIT;
1449         if (link_caps.speed_capabilities &
1450             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G)
1451                 if_link->supported_caps |= QED_LM_10000baseKR_Full_BIT;
1452         if (link_caps.speed_capabilities &
1453             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_25G)
1454                 if_link->supported_caps |= QED_LM_25000baseKR_Full_BIT;
1455         if (link_caps.speed_capabilities &
1456             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G)
1457                 if_link->supported_caps |= QED_LM_40000baseLR4_Full_BIT;
1458         if (link_caps.speed_capabilities &
1459             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G)
1460                 if_link->supported_caps |= QED_LM_50000baseKR2_Full_BIT;
1461         if (link_caps.speed_capabilities &
1462             NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_BB_100G)
1463                 if_link->supported_caps |= QED_LM_100000baseKR4_Full_BIT;
1464
1465         if (link.link_up)
1466                 if_link->speed = link.speed;
1467
1468         /* TODO - fill duplex properly */
1469         if_link->duplex = DUPLEX_FULL;
1470         qed_mcp_get_media_type(hwfn->cdev, &media_type);
1471         if_link->port = qed_get_port_type(media_type);
1472
1473         if_link->autoneg = params.speed.autoneg;
1474
1475         if (params.pause.autoneg)
1476                 if_link->pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
1477         if (params.pause.forced_rx)
1478                 if_link->pause_config |= QED_LINK_PAUSE_RX_ENABLE;
1479         if (params.pause.forced_tx)
1480                 if_link->pause_config |= QED_LINK_PAUSE_TX_ENABLE;
1481
1482         /* Link partner capabilities */
1483         if (link.partner_adv_speed & QED_LINK_PARTNER_SPEED_1G_HD)
1484                 if_link->lp_caps |= QED_LM_1000baseT_Half_BIT;
1485         if (link.partner_adv_speed & QED_LINK_PARTNER_SPEED_1G_FD)
1486                 if_link->lp_caps |= QED_LM_1000baseT_Full_BIT;
1487         if (link.partner_adv_speed & QED_LINK_PARTNER_SPEED_10G)
1488                 if_link->lp_caps |= QED_LM_10000baseKR_Full_BIT;
1489         if (link.partner_adv_speed & QED_LINK_PARTNER_SPEED_25G)
1490                 if_link->lp_caps |= QED_LM_25000baseKR_Full_BIT;
1491         if (link.partner_adv_speed & QED_LINK_PARTNER_SPEED_40G)
1492                 if_link->lp_caps |= QED_LM_40000baseLR4_Full_BIT;
1493         if (link.partner_adv_speed & QED_LINK_PARTNER_SPEED_50G)
1494                 if_link->lp_caps |= QED_LM_50000baseKR2_Full_BIT;
1495         if (link.partner_adv_speed & QED_LINK_PARTNER_SPEED_100G)
1496                 if_link->lp_caps |= QED_LM_100000baseKR4_Full_BIT;
1497
1498         if (link.an_complete)
1499                 if_link->lp_caps |= QED_LM_Autoneg_BIT;
1500
1501         if (link.partner_adv_pause)
1502                 if_link->lp_caps |= QED_LM_Pause_BIT;
1503         if (link.partner_adv_pause == QED_LINK_PARTNER_ASYMMETRIC_PAUSE ||
1504             link.partner_adv_pause == QED_LINK_PARTNER_BOTH_PAUSE)
1505                 if_link->lp_caps |= QED_LM_Asym_Pause_BIT;
1506
1507         if (link_caps.default_eee == QED_MCP_EEE_UNSUPPORTED) {
1508                 if_link->eee_supported = false;
1509         } else {
1510                 if_link->eee_supported = true;
1511                 if_link->eee_active = link.eee_active;
1512                 if_link->sup_caps = link_caps.eee_speed_caps;
1513                 /* MFW clears adv_caps on eee disable; use configured value */
1514                 if_link->eee.adv_caps = link.eee_adv_caps ? link.eee_adv_caps :
1515                                         params.eee.adv_caps;
1516                 if_link->eee.lp_adv_caps = link.eee_lp_adv_caps;
1517                 if_link->eee.enable = params.eee.enable;
1518                 if_link->eee.tx_lpi_enable = params.eee.tx_lpi_enable;
1519                 if_link->eee.tx_lpi_timer = params.eee.tx_lpi_timer;
1520         }
1521 }
1522
1523 static void qed_get_current_link(struct qed_dev *cdev,
1524                                  struct qed_link_output *if_link)
1525 {
1526         int i;
1527
1528         qed_fill_link(&cdev->hwfns[0], if_link);
1529
1530         for_each_hwfn(cdev, i)
1531                 qed_inform_vf_link_state(&cdev->hwfns[i]);
1532 }
1533
1534 void qed_link_update(struct qed_hwfn *hwfn)
1535 {
1536         void *cookie = hwfn->cdev->ops_cookie;
1537         struct qed_common_cb_ops *op = hwfn->cdev->protocol_ops.common;
1538         struct qed_link_output if_link;
1539
1540         qed_fill_link(hwfn, &if_link);
1541         qed_inform_vf_link_state(hwfn);
1542
1543         if (IS_LEAD_HWFN(hwfn) && cookie)
1544                 op->link_update(cookie, &if_link);
1545 }
1546
1547 static int qed_drain(struct qed_dev *cdev)
1548 {
1549         struct qed_hwfn *hwfn;
1550         struct qed_ptt *ptt;
1551         int i, rc;
1552
1553         if (IS_VF(cdev))
1554                 return 0;
1555
1556         for_each_hwfn(cdev, i) {
1557                 hwfn = &cdev->hwfns[i];
1558                 ptt = qed_ptt_acquire(hwfn);
1559                 if (!ptt) {
1560                         DP_NOTICE(hwfn, "Failed to drain NIG; No PTT\n");
1561                         return -EBUSY;
1562                 }
1563                 rc = qed_mcp_drain(hwfn, ptt);
1564                 qed_ptt_release(hwfn, ptt);
1565                 if (rc)
1566                         return rc;
1567         }
1568
1569         return 0;
1570 }
1571
1572 static int qed_nvm_get_image(struct qed_dev *cdev, enum qed_nvm_images type,
1573                              u8 *buf, u16 len)
1574 {
1575         struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1576         struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
1577         int rc;
1578
1579         if (!ptt)
1580                 return -EAGAIN;
1581
1582         rc = qed_mcp_get_nvm_image(hwfn, ptt, type, buf, len);
1583         qed_ptt_release(hwfn, ptt);
1584         return rc;
1585 }
1586
1587 static int qed_set_coalesce(struct qed_dev *cdev, u16 rx_coal, u16 tx_coal,
1588                             void *handle)
1589 {
1590                 return qed_set_queue_coalesce(rx_coal, tx_coal, handle);
1591 }
1592
1593 static int qed_set_led(struct qed_dev *cdev, enum qed_led_mode mode)
1594 {
1595         struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1596         struct qed_ptt *ptt;
1597         int status = 0;
1598
1599         ptt = qed_ptt_acquire(hwfn);
1600         if (!ptt)
1601                 return -EAGAIN;
1602
1603         status = qed_mcp_set_led(hwfn, ptt, mode);
1604
1605         qed_ptt_release(hwfn, ptt);
1606
1607         return status;
1608 }
1609
1610 static int qed_update_wol(struct qed_dev *cdev, bool enabled)
1611 {
1612         struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1613         struct qed_ptt *ptt;
1614         int rc = 0;
1615
1616         if (IS_VF(cdev))
1617                 return 0;
1618
1619         ptt = qed_ptt_acquire(hwfn);
1620         if (!ptt)
1621                 return -EAGAIN;
1622
1623         rc = qed_mcp_ov_update_wol(hwfn, ptt, enabled ? QED_OV_WOL_ENABLED
1624                                    : QED_OV_WOL_DISABLED);
1625         if (rc)
1626                 goto out;
1627         rc = qed_mcp_ov_update_current_config(hwfn, ptt, QED_OV_CLIENT_DRV);
1628
1629 out:
1630         qed_ptt_release(hwfn, ptt);
1631         return rc;
1632 }
1633
1634 static int qed_update_drv_state(struct qed_dev *cdev, bool active)
1635 {
1636         struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1637         struct qed_ptt *ptt;
1638         int status = 0;
1639
1640         if (IS_VF(cdev))
1641                 return 0;
1642
1643         ptt = qed_ptt_acquire(hwfn);
1644         if (!ptt)
1645                 return -EAGAIN;
1646
1647         status = qed_mcp_ov_update_driver_state(hwfn, ptt, active ?
1648                                                 QED_OV_DRIVER_STATE_ACTIVE :
1649                                                 QED_OV_DRIVER_STATE_DISABLED);
1650
1651         qed_ptt_release(hwfn, ptt);
1652
1653         return status;
1654 }
1655
1656 static int qed_update_mac(struct qed_dev *cdev, u8 *mac)
1657 {
1658         struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1659         struct qed_ptt *ptt;
1660         int status = 0;
1661
1662         if (IS_VF(cdev))
1663                 return 0;
1664
1665         ptt = qed_ptt_acquire(hwfn);
1666         if (!ptt)
1667                 return -EAGAIN;
1668
1669         status = qed_mcp_ov_update_mac(hwfn, ptt, mac);
1670         if (status)
1671                 goto out;
1672
1673         status = qed_mcp_ov_update_current_config(hwfn, ptt, QED_OV_CLIENT_DRV);
1674
1675 out:
1676         qed_ptt_release(hwfn, ptt);
1677         return status;
1678 }
1679
1680 static int qed_update_mtu(struct qed_dev *cdev, u16 mtu)
1681 {
1682         struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
1683         struct qed_ptt *ptt;
1684         int status = 0;
1685
1686         if (IS_VF(cdev))
1687                 return 0;
1688
1689         ptt = qed_ptt_acquire(hwfn);
1690         if (!ptt)
1691                 return -EAGAIN;
1692
1693         status = qed_mcp_ov_update_mtu(hwfn, ptt, mtu);
1694         if (status)
1695                 goto out;
1696
1697         status = qed_mcp_ov_update_current_config(hwfn, ptt, QED_OV_CLIENT_DRV);
1698
1699 out:
1700         qed_ptt_release(hwfn, ptt);
1701         return status;
1702 }
1703
1704 static struct qed_selftest_ops qed_selftest_ops_pass = {
1705         .selftest_memory = &qed_selftest_memory,
1706         .selftest_interrupt = &qed_selftest_interrupt,
1707         .selftest_register = &qed_selftest_register,
1708         .selftest_clock = &qed_selftest_clock,
1709         .selftest_nvram = &qed_selftest_nvram,
1710 };
1711
1712 const struct qed_common_ops qed_common_ops_pass = {
1713         .selftest = &qed_selftest_ops_pass,
1714         .probe = &qed_probe,
1715         .remove = &qed_remove,
1716         .set_power_state = &qed_set_power_state,
1717         .set_name = &qed_set_name,
1718         .update_pf_params = &qed_update_pf_params,
1719         .slowpath_start = &qed_slowpath_start,
1720         .slowpath_stop = &qed_slowpath_stop,
1721         .set_fp_int = &qed_set_int_fp,
1722         .get_fp_int = &qed_get_int_fp,
1723         .sb_init = &qed_sb_init,
1724         .sb_release = &qed_sb_release,
1725         .simd_handler_config = &qed_simd_handler_config,
1726         .simd_handler_clean = &qed_simd_handler_clean,
1727         .dbg_grc = &qed_dbg_grc,
1728         .dbg_grc_size = &qed_dbg_grc_size,
1729         .can_link_change = &qed_can_link_change,
1730         .set_link = &qed_set_link,
1731         .get_link = &qed_get_current_link,
1732         .drain = &qed_drain,
1733         .update_msglvl = &qed_init_dp,
1734         .dbg_all_data = &qed_dbg_all_data,
1735         .dbg_all_data_size = &qed_dbg_all_data_size,
1736         .chain_alloc = &qed_chain_alloc,
1737         .chain_free = &qed_chain_free,
1738         .nvm_get_image = &qed_nvm_get_image,
1739         .set_coalesce = &qed_set_coalesce,
1740         .set_led = &qed_set_led,
1741         .update_drv_state = &qed_update_drv_state,
1742         .update_mac = &qed_update_mac,
1743         .update_mtu = &qed_update_mtu,
1744         .update_wol = &qed_update_wol,
1745 };
1746
1747 void qed_get_protocol_stats(struct qed_dev *cdev,
1748                             enum qed_mcp_protocol_type type,
1749                             union qed_mcp_protocol_stats *stats)
1750 {
1751         struct qed_eth_stats eth_stats;
1752
1753         memset(stats, 0, sizeof(*stats));
1754
1755         switch (type) {
1756         case QED_MCP_LAN_STATS:
1757                 qed_get_vport_stats(cdev, &eth_stats);
1758                 stats->lan_stats.ucast_rx_pkts =
1759                                         eth_stats.common.rx_ucast_pkts;
1760                 stats->lan_stats.ucast_tx_pkts =
1761                                         eth_stats.common.tx_ucast_pkts;
1762                 stats->lan_stats.fcs_err = -1;
1763                 break;
1764         case QED_MCP_FCOE_STATS:
1765                 qed_get_protocol_stats_fcoe(cdev, &stats->fcoe_stats);
1766                 break;
1767         case QED_MCP_ISCSI_STATS:
1768                 qed_get_protocol_stats_iscsi(cdev, &stats->iscsi_stats);
1769                 break;
1770         default:
1771                 DP_VERBOSE(cdev, QED_MSG_SP,
1772                            "Invalid protocol type = %d\n", type);
1773                 return;
1774         }
1775 }